xmrig
856813c1ae
Merge pull request #3740 from SChernykh/dev
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RISC-V: added vectorized soft AES
2025-12-06 19:39:47 +07:00
SChernykh
23da1a90f5
RISC-V: added vectorized soft AES
2025-12-05 21:09:22 +01:00
xmrig
7981e4a76a
Merge pull request #3736 from SChernykh/dev
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RISC-V: added vectorized dataset init
2025-12-01 10:46:03 +07:00
SChernykh
7ef5142a52
RISC-V: added vectorized dataset init (activated by setting init-avx2 to 1 in config.json)
2025-11-30 19:15:15 +01:00
xmrig
db5c6d9190
Merge pull request #3733 from void-512/master
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Add detection for MSVC/2026
2025-11-13 15:52:43 +07:00
Tony Wang
e88009d575
add detection for MSVC/2026
2025-11-12 17:32:57 -05:00
XMRig
5115597e7f
Improved compatibility for automatically enabling huge pages on Linux systems without NUMA support.
2025-11-07 01:55:00 +07:00
xmrig
4cdc35f966
Merge pull request #3731 from user0-07161/dev-haiku-os-support
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feat: initial haiku os support
2025-11-05 18:47:22 +07:00
user0-07161
b02519b9f5
feat: initial support for haiku
2025-11-04 13:58:01 +00:00
XMRig
a44b21cef3
Cleanup
2025-10-27 19:18:52 +07:00
XMRig
ea832899f2
Fixed macOS build.
2025-10-23 11:17:59 +07:00
xmrig
3ecacf0ac2
Merge pull request #3725 from SChernykh/dev
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RISC-V integration and JIT compiler
2025-10-23 11:02:21 +07:00
SChernykh
27c8e60919
Removed unused files
2025-10-22 23:31:02 +02:00
SChernykh
985fe06e8d
RISC-V: test for instruction extensions
2025-10-22 19:21:26 +02:00
SChernykh
75b63ddde9
RISC-V JIT compiler
2025-10-22 19:00:20 +02:00
slayingripper
643b65f2c0
RISC-V Intergration
2025-10-22 18:57:20 +02:00
xmrig
116ba1828f
Merge pull request #3722 from SChernykh/dev
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Added Zen4 (Hawk Point) CPUs detection
2025-10-15 13:23:36 +07:00
SChernykh
da5a5674b4
Added Zen4 (Hawk Point) CPUs detection
2025-10-15 08:07:58 +02:00
xmrig
6cc4819cec
Merge pull request #3719 from SChernykh/dev
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Fix: correct FCMP++ version number
2025-10-05 18:28:21 +07:00
SChernykh
a659397c41
Fix: correct FCMP++ version number
2025-10-05 13:24:55 +02:00
xmrig
20acfd0d79
Merge pull request #3718 from SChernykh/dev
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Solo mining: added support for FCMP++ hardfork
2025-10-05 18:04:23 +07:00
SChernykh
da683d8c3e
Solo mining: added support for FCMP++ hardfork
2025-10-05 13:00:21 +02:00
XMRig
255565b533
Merge branch 'xtophyr-master' into dev
2025-09-22 21:31:28 +07:00
XMRig
878e83bf59
Merge branch 'master' of https://github.com/xtophyr/xmrig into xtophyr-master
2025-09-22 21:31:14 +07:00
Christopher Wright
7abf17cb59
adjust instruction/register suffixes to compile with gcc-based assemblers.
2025-09-21 14:57:42 -04:00
Christopher Wright
eeec5ecd10
undo this change
2025-09-20 08:38:40 -04:00
Christopher Wright
93f5067999
minor Aarch64 JIT changes (better instruction selection, don't emit instructions that add 0, etc)
2025-09-20 08:32:32 -04:00
XMRig
dd6671bc59
Merge branch 'dev' of github.com:xmrig/xmrig into dev
2025-06-29 12:29:01 +07:00
XMRig
a1ee2fd9d2
Improved LibreSSL support.
2025-06-29 12:28:35 +07:00
xmrig
2619131176
Merge pull request #3680 from benthetechguy/armhf
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Add armv8l to list of 32 bit ARM targets
2025-06-25 04:14:22 +07:00
Ben Westover
1161f230c5
Add armv8l to list of 32 bit ARM targets
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armv8l is what CMAKE_SYSTEM_PROCESSOR is set to when an ARMv8 processor
is in 32-bit mode, so it should be added to the ARMv7 target list even
though it's v8 because it's 32 bits. Currently, it's not in any ARM
target list which means x86 is assumed and the build fails.
2025-06-24 15:28:01 -04:00
XMRig
d2363ba28b
v6.24.1-dev
2025-06-23 08:37:15 +07:00
XMRig
1676da1fe9
Merge branch 'master' into dev
2025-06-23 08:36:52 +07:00
XMRig
6e4a5a6d94
v6.24.0
2025-06-23 07:44:53 +07:00
XMRig
273133aa63
Merge branch 'dev'
2025-06-23 07:44:05 +07:00
xmrig
c69e30c9a0
Update CHANGELOG.md
2025-06-23 05:39:26 +07:00
XMRig
6a690ba1e9
More DNS cleanup.
2025-06-20 23:45:53 +07:00
XMRig
545aef0937
v6.24.0-dev
2025-06-20 08:34:58 +07:00
xmrig
9fa66d3242
Merge pull request #3678 from xmrig/dns_ip_version
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Improved IPv6 support.
2025-06-20 08:33:50 +07:00
XMRig
ec286c7fef
Improved IPv6 support.
2025-06-20 07:39:52 +07:00
xmrig
e28d663d80
Merge pull request #3677 from SChernykh/dev
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Tweaked autoconfig for AMD CPUs with < 2 MB L3 cache per thread, again (hopefully the last time)
2025-06-19 18:07:54 +07:00
SChernykh
aba1ad8cfc
Tweaked autoconfig for AMD CPUs with < 2 MB L3 cache per thread, again (hopefully the last time)
2025-06-19 12:58:31 +02:00
xmrig
bf44ed52e9
Merge pull request #3674 from benthetechguy/armhf
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cflags: Add lax-vector-conversions on ARMv7
2025-06-19 04:46:02 +07:00
Ben Westover
762c435fa8
cflags: Add lax-vector-conversions on ARMv7
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lax-vector-conversions is enabled in the CXXFLAGS but not CFLAGS for ARMv7.
This commit adds it to CFLAGS which fixes the ARMv7 build (Fixes : #3673 ).
2025-06-18 16:38:05 -04:00
xmrig
48faf0a11b
Merge pull request #3671 from SChernykh/dev
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Hwloc: fixed detection of L2 cache size for some complex NUMA topologies
2025-06-17 18:52:43 +07:00
SChernykh
d125d22d27
Hwloc: fixed detection of L2 cache size for some complex NUMA topologies
2025-06-17 13:49:02 +02:00
XMRig
9f3591ae0d
v6.23.1-dev
2025-06-16 21:29:17 +07:00
XMRig
6bbbcc71f1
Merge branch 'master' into dev
2025-06-16 21:28:48 +07:00
XMRig
e5a7a69cc0
v6.23.0
2025-06-16 21:00:42 +07:00
XMRig
f354b85a7b
Merge branch 'dev'
2025-06-16 21:00:12 +07:00
