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Mono Color

• 856813c1ae Merge pull request #3740 from SChernykh/dev dev xmrig 2025-12-06 19:39:47 +07:00
• 23da1a90f5 RISC-V: added vectorized soft AES SChernykh 2025-12-05 21:09:22 +01:00
• 7981e4a76a Merge pull request #3736 from SChernykh/dev xmrig 2025-12-01 10:46:03 +07:00
• 7ef5142a52 RISC-V: added vectorized dataset init (activated by setting init-avx2 to 1 in config.json) SChernykh 2025-11-30 19:15:15 +01:00
• db5c6d9190 Merge pull request #3733 from void-512/master xmrig 2025-11-13 15:52:43 +07:00
• e88009d575 add detection for MSVC/2026 Tony Wang 2025-11-12 17:32:57 -05:00
• 5115597e7f Improved compatibility for automatically enabling huge pages on Linux systems without NUMA support. XMRig 2025-11-07 01:55:00 +07:00
• 4cdc35f966 Merge pull request #3731 from user0-07161/dev-haiku-os-support xmrig 2025-11-05 18:47:22 +07:00
• b02519b9f5 feat: initial support for haiku user0-07161 2025-11-04 06:32:36 +00:00
• a44b21cef3 Cleanup XMRig 2025-10-27 19:18:52 +07:00
• ea832899f2 Fixed macOS build. XMRig 2025-10-23 11:17:59 +07:00
• 3ecacf0ac2 Merge pull request #3725 from SChernykh/dev xmrig 2025-10-23 11:02:21 +07:00
• 27c8e60919 Removed unused files SChernykh 2025-10-22 23:31:02 +02:00
• 985fe06e8d RISC-V: test for instruction extensions SChernykh 2025-10-22 19:14:01 +02:00
• 75b63ddde9 RISC-V JIT compiler SChernykh 2025-10-22 19:00:20 +02:00
• 643b65f2c0 RISC-V Intergration slayingripper 2025-10-22 18:57:20 +02:00
• 116ba1828f Merge pull request #3722 from SChernykh/dev xmrig 2025-10-15 13:23:36 +07:00
• da5a5674b4 Added Zen4 (Hawk Point) CPUs detection SChernykh 2025-10-15 08:05:48 +02:00
• 6cc4819cec Merge pull request #3719 from SChernykh/dev xmrig 2025-10-05 18:28:21 +07:00
• a659397c41 Fix: correct FCMP++ version number SChernykh 2025-10-05 13:24:55 +02:00
• 20acfd0d79 Merge pull request #3718 from SChernykh/dev xmrig 2025-10-05 18:04:23 +07:00
• da683d8c3e Solo mining: added support for FCMP++ hardfork SChernykh 2025-10-05 13:00:21 +02:00
• 255565b533 Merge branch 'xtophyr-master' into dev XMRig 2025-09-22 21:31:28 +07:00
• 878e83bf59 Merge branch 'master' of https://github.com/xtophyr/xmrig into xtophyr-master XMRig 2025-09-22 21:31:14 +07:00
• 7abf17cb59 adjust instruction/register suffixes to compile with gcc-based assemblers. Christopher Wright 2025-09-21 14:57:42 -04:00
• eeec5ecd10 undo this change Christopher Wright 2025-09-20 08:38:40 -04:00
• 93f5067999 minor Aarch64 JIT changes (better instruction selection, don't emit instructions that add 0, etc) Christopher Wright 2025-09-17 15:15:01 -04:00
• dd6671bc59 Merge branch 'dev' of github.com:xmrig/xmrig into dev XMRig 2025-06-29 12:29:01 +07:00
• a1ee2fd9d2 Improved LibreSSL support. XMRig 2025-06-29 12:28:35 +07:00
• 2619131176 Merge pull request #3680 from benthetechguy/armhf xmrig 2025-06-25 04:14:22 +07:00
• 1161f230c5 Add armv8l to list of 32 bit ARM targets Ben Westover 2025-06-24 15:28:01 -04:00
• d2363ba28b v6.24.1-dev XMRig 2025-06-23 08:37:15 +07:00
• 1676da1fe9 Merge branch 'master' into dev XMRig 2025-06-23 08:36:52 +07:00
• 6e4a5a6d94 v6.24.0 master v6.24.0 XMRig 2025-06-23 07:44:53 +07:00
• 273133aa63 Merge branch 'dev' XMRig 2025-06-23 07:44:05 +07:00
• c69e30c9a0 Update CHANGELOG.md xmrig 2025-06-23 05:39:26 +07:00
• 6a690ba1e9 More DNS cleanup. XMRig 2025-06-20 23:45:53 +07:00
• 545aef0937 v6.24.0-dev XMRig 2025-06-20 08:34:58 +07:00
• 9fa66d3242 Merge pull request #3678 from xmrig/dns_ip_version xmrig 2025-06-20 08:33:50 +07:00
• ec286c7fef Improved IPv6 support. dns_ip_version XMRig 2025-06-20 07:39:52 +07:00
• e28d663d80 Merge pull request #3677 from SChernykh/dev xmrig 2025-06-19 18:07:54 +07:00
• aba1ad8cfc Tweaked autoconfig for AMD CPUs with < 2 MB L3 cache per thread, again (hopefully the last time) SChernykh 2025-06-19 12:58:31 +02:00
• bf44ed52e9 Merge pull request #3674 from benthetechguy/armhf xmrig 2025-06-19 04:46:02 +07:00
• 762c435fa8 cflags: Add lax-vector-conversions on ARMv7 Ben Westover 2025-06-18 16:38:05 -04:00
• 48faf0a11b Merge pull request #3671 from SChernykh/dev xmrig 2025-06-17 18:52:43 +07:00
• d125d22d27 Hwloc: fixed detection of L2 cache size for some complex NUMA topologies SChernykh 2025-06-17 13:49:02 +02:00
• 9f3591ae0d v6.23.1-dev XMRig 2025-06-16 21:29:17 +07:00
• 6bbbcc71f1 Merge branch 'master' into dev XMRig 2025-06-16 21:28:48 +07:00
• e5a7a69cc0 v6.23.0 v6.23.0 XMRig 2025-06-16 21:00:42 +07:00
• f354b85a7b Merge branch 'dev' XMRig 2025-06-16 21:00:12 +07:00
• 5ed8d79574 Update CHANGELOG.md xmrig 2025-06-16 20:46:33 +07:00
• fc395a5800 Update ARM CPUs database. XMRig 2025-06-16 19:54:08 +07:00
• 9138690126 v6.23.0-dev XMRig 2025-06-16 02:05:43 +07:00
• d58061c903 Add detection for _aligned_malloc. XMRig 2025-06-15 20:06:19 +07:00
• 3b863cf88f Fixed __umul128 for MSVC ARM64. XMRig 2025-06-15 04:58:03 +07:00
• 9c7468df64 Fixed user agent string. XMRig 2025-06-15 00:21:23 +07:00
• a18fa269a6 Merge pull request #3666 from SChernykh/dev xmrig 2025-06-14 23:09:05 +07:00
• bcc5581535 Better detection of aligned malloc functions SChernykh 2025-06-14 18:00:27 +02:00
• dba336aa04 Update hwloc for MSVC. XMRig 2025-06-14 22:11:33 +07:00
• 3ff41f7c94 Fixed UTF-8 paths support for the config file with Clang compiler on Windows ARM64. XMRig 2025-06-14 15:38:25 +07:00
• faa3d55123 Remove deprecated -Ofast for Clang. XMRig 2025-06-13 21:53:03 +07:00
• 9e7cf69ac3 Detect CPU name and AES instructions on Windows ARM64. XMRig 2025-06-13 21:02:10 +07:00
• 57a4998ae2 Fix Linux build. XMRig 2025-06-13 04:05:30 +07:00
• 34b4448a81 Split BasicCpuInfo_arm. XMRig 2025-06-13 03:57:13 +07:00
• 650d794fb1 Initial Windows ARM64 support via MSYS2. XMRig 2025-06-13 03:00:34 +07:00
• 064a61988a Update deps scripts. XMRig 2025-06-12 00:52:49 +07:00
• 2ab7f85ccd Merge pull request #3665 from SChernykh/dev xmrig 2025-06-11 23:40:46 +07:00
• e4c30eb0dd Tweaked autoconfig for AMD CPUs with < 2 MB L3 cache per thread SChernykh 2025-06-11 18:34:50 +02:00
• d4e57d9427 Fix LLHTTP_EXPORT XMRig 2025-06-10 03:13:34 +07:00
• 9a71190ca1 Update llhttp to 9.3.0 XMRig 2025-06-09 03:02:26 +07:00
• a7dcbb143e Bump minimum CMake version to 3.10 XMRig 2025-06-08 23:23:40 +07:00
• a6a0f80b12 Fix header path. XMRig 2025-06-06 14:42:49 +07:00
• 682834b87d Universal fix for NaN and Infinity in JSON output XMRig 2025-06-06 14:36:21 +07:00
• 184d6100dc Update rapidjson XMRig 2025-06-05 01:22:31 +07:00
• 0c52d789a9 v6.22.4-dev XMRig 2025-06-04 18:59:39 +07:00
• e33334f11a Merge branch 'master' into dev XMRig 2025-06-04 18:58:55 +07:00
• 6184224a66 v6.22.3 v6.22.3 XMRig 2025-06-04 18:11:51 +07:00
• f499155032 Merge branch 'dev' XMRig 2025-06-04 18:11:14 +07:00
• a32b688dcf Update CHANGELOG.md xmrig 2025-06-04 01:47:57 +07:00
• 35b334d58a Fixed compile warning. XMRig 2025-05-31 01:12:00 +07:00
• 33623492fe Allow run generate_cl.js from the scripts directory. XMRig 2025-05-30 01:47:08 +07:00
• 77009bd0d1 Merge pull request #3662 from ybh1998/keccak_f800 xmrig 2025-05-30 01:04:22 +07:00
• 46572dcb3d Fix type of keccak_f800 ybh1998 2025-05-30 01:57:08 +08:00
• 0d9af3347d Merge pull request #3652 from SChernykh/dev xmrig 2025-04-17 16:12:31 +07:00
• d24e13e605 Fixed HttpsClient::flush logic SChernykh 2025-04-17 10:32:14 +02:00
• 36fdfa2694 Merge pull request #3646 from SChernykh/dev xmrig 2025-03-22 18:36:09 +07:00
• 6cfc02d24f Optimized autoconfig for AMD CPUs with < 2 MB L3 cache per thread SChernykh 2025-03-22 11:34:23 +01:00
• 16ecb8f085 Allow use of the previous CUDA plugin version with a warning. XMRig 2024-12-23 23:14:06 +07:00
• 0229c65232 Merge pull request #3605 from SChernykh/dev xmrig 2024-12-18 22:36:08 +07:00
• 4a13a8a75c CUDA backend: update RandomX dataset when it changes SChernykh 2024-12-18 13:18:11 +01:00
• cd2fd9d7a6 Simplified getting PCI topology for the OpenCL backend. XMRig 2024-11-08 13:03:35 +07:00
• 064cd3ef20 Fixed and simplified OpenCL GPU type detection. XMRig 2024-11-08 07:09:35 +07:00
• e8bbd134f9 v6.22.3-dev XMRig 2024-11-03 15:06:54 +07:00
• cf86a1e05c Merge branch 'master' into dev XMRig 2024-11-03 15:06:22 +07:00
• f9e990d0f0 v6.22.2 v6.22.2 XMRig 2024-11-03 14:38:44 +07:00
• 200f23bba7 Merge branch 'dev' XMRig 2024-11-03 14:38:00 +07:00
• 4234b20e21 Update CHANGELOG.md xmrig 2024-11-03 14:31:17 +07:00
• c5d8b8265b Merge pull request #3571 from SChernykh/dev xmrig 2024-10-25 20:55:35 +07:00
• 77c14c8362 Fix number of threads on the new Intel Core Ultra CPUs SChernykh 2024-10-25 13:44:24 +02:00
• 8b03750806 Merge pull request #3569 from SChernykh/dev xmrig 2024-10-23 17:18:36 +07:00