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2 Commits
v6.22.3
...
55e2c4119e
| Author | SHA1 | Date | |
|---|---|---|---|
|
55e2c4119e | ||
|
a776ebf394 |
@@ -1,9 +1,3 @@
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# v6.22.3
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||||
- [#3605](https://github.com/xmrig/xmrig/pull/3605) CUDA backend: added missing RandomX dataset update.
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- [#3646](https://github.com/xmrig/xmrig/pull/3646) Optimized auto-config for AMD CPUs with less than 2 MB L3 cache per thread.
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- [#3652](https://github.com/xmrig/xmrig/pull/3652) Fixed possible crash when submitting RandomX benchmark.
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- [#3662](https://github.com/xmrig/xmrig/pull/3662) Fixed OpenCL kernel compilation error on some platforms.
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# v6.22.2
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- [#3569](https://github.com/xmrig/xmrig/pull/3569) Fixed corrupted API output in some rare conditions.
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- [#3571](https://github.com/xmrig/xmrig/pull/3571) Fixed number of threads on the new Intel Core Ultra CPUs.
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@@ -14,7 +14,9 @@ option(WITH_HTTP "Enable HTTP protocol support (client/server)" ON)
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option(WITH_DEBUG_LOG "Enable debug log output" OFF)
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option(WITH_TLS "Enable OpenSSL support" ON)
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option(WITH_ASM "Enable ASM PoW implementations" ON)
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option(WITH_MSR "Enable MSR mod & 1st-gen Ryzen fix" ON)
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option(WITH_ASM_AMD "Enable ASM for AMD processors" ON)
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option(WITH_MSR "Enable MSR mod" ON)
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option(WITH_MSR_ZEN "Enable MSR mod for AMD Zen-based processors" ON)
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option(WITH_ENV_VARS "Enable environment variables support in config file" ON)
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option(WITH_EMBEDDED_CONFIG "Enable internal embedded JSON config" OFF)
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option(WITH_OPENCL "Enable OpenCL backend" ON)
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@@ -44,9 +44,17 @@ if (WITH_ASM AND NOT XMRIG_ARM AND CMAKE_SIZEOF_VOID_P EQUAL 8)
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set_property(TARGET ${XMRIG_ASM_LIBRARY} PROPERTY LINKER_LANGUAGE C)
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add_definitions(/DXMRIG_FEATURE_ASM)
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if (WITH_ASM_AMD)
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add_definitions(/DXMRIG_FEATURE_ASM_AMD)
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message("-- WITH_ASM=ON (+amd)")
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else()
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message("-- WITH_ASM=ON (-amd)")
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endif()
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else()
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set(XMRIG_ASM_SOURCES "")
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set(XMRIG_ASM_LIBRARY "")
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remove_definitions(/DXMRIG_FEATURE_ASM)
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remove_definitions(/DXMRIG_FEATURE_ASM_AMD)
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message("-- WITH_ASM=OFF")
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endif()
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@@ -104,8 +104,13 @@ if (WITH_RANDOMX)
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if (WITH_MSR AND NOT XMRIG_ARM AND CMAKE_SIZEOF_VOID_P EQUAL 8 AND (XMRIG_OS_WIN OR XMRIG_OS_LINUX))
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add_definitions(/DXMRIG_FEATURE_MSR)
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add_definitions(/DXMRIG_FIX_RYZEN)
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message("-- WITH_MSR=ON")
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if (WITH_MSR_ZEN)
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add_definitions(/DXMRIG_FIX_RYZEN)
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message("-- WITH_MSR=ON (+zen)")
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else()
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remove_definitions(/DXMRIG_FIX_RYZEN)
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message("-- WITH_MSR=ON (-zen)")
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endif()
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if (XMRIG_OS_WIN)
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list(APPEND SOURCES_CRYPTO
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@@ -6,6 +6,7 @@ const fs = require('fs');
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const path = require('path');
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const { text2h, text2h_bundle, addIncludes } = require('./js/opencl');
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const { opencl_minify } = require('./js/opencl_minify');
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const cwd = process.cwd();
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function cn()
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@@ -75,24 +76,18 @@ function kawpow()
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fs.writeFileSync('kawpow_dag_cl.h', text2h(kawpow_dag, 'xmrig', 'kawpow_dag_cl'));
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}
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for (let i = 0; i < 2; i++) {
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if (fs.existsSync('src/backend/opencl/cl/OclSource.h')) {
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break;
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}
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process.chdir('..');
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}
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process.chdir(path.resolve('src/backend/opencl/cl/cn'));
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process.chdir(path.resolve('src/backend/opencl/cl'));
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const cwd = process.cwd();
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process.chdir(path.resolve(cwd, 'cn'));
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cn();
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cn_r();
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process.chdir(path.resolve(cwd, 'rx'));
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process.chdir(cwd);
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process.chdir(path.resolve('src/backend/opencl/cl/rx'));
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rx();
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process.chdir(path.resolve(cwd, 'kawpow'));
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process.chdir(cwd);
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process.chdir(path.resolve('src/backend/opencl/cl/kawpow'));
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kawpow();
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@@ -320,13 +320,8 @@ void xmrig::HwlocCpuInfo::processTopLevelCache(hwloc_obj_t cache, const Algorith
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L2 += l2->attr->cache.size;
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L2_associativity = l2->attr->cache.associativity;
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if (L3_exclusive) {
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if (vendor() == VENDOR_AMD) {
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extra += std::min<size_t>(l2->attr->cache.size, scratchpad);
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}
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else if (l2->attr->cache.size >= scratchpad) {
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extra += scratchpad;
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}
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if (L3_exclusive && l2->attr->cache.size >= scratchpad) {
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extra += scratchpad;
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}
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}
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}
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@@ -5,8 +5,8 @@
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* Copyright 2014-2016 Wolf9466 <https://github.com/OhGodAPet>
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* Copyright 2016 Jay D Dee <jayddee246@gmail.com>
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* Copyright 2017-2018 XMR-Stak <https://github.com/fireice-uk>, <https://github.com/psychocrypt>
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* Copyright 2018-2024 SChernykh <https://github.com/SChernykh>
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* Copyright 2016-2024 XMRig <https://github.com/xmrig>, <support@xmrig.com>
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* Copyright 2018-2019 SChernykh <https://github.com/SChernykh>
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* Copyright 2016-2019 XMRig <https://github.com/xmrig>, <support@xmrig.com>
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*
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* This program is free software: you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
|
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@@ -22,6 +22,7 @@
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include "backend/cuda/runners/CudaRxRunner.h"
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#include "backend/cuda/CudaLaunchData.h"
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#include "backend/cuda/wrappers/CudaLib.h"
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@@ -54,21 +55,12 @@ bool xmrig::CudaRxRunner::run(uint32_t startNonce, uint32_t *rescount, uint32_t
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bool xmrig::CudaRxRunner::set(const Job &job, uint8_t *blob)
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{
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if (!m_datasetHost && (m_seed != job.seed())) {
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m_seed = job.seed();
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if (m_ready) {
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const auto *dataset = Rx::dataset(job, 0);
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callWrapper(CudaLib::rxUpdateDataset(m_ctx, dataset->raw(), dataset->size(false)));
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}
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}
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const bool rc = CudaBaseRunner::set(job, blob);
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if (!rc || m_ready) {
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return rc;
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}
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const auto *dataset = Rx::dataset(job, 0);
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auto dataset = Rx::dataset(job, 0);
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m_ready = callWrapper(CudaLib::rxPrepare(m_ctx, dataset->raw(), dataset->size(false), m_datasetHost, m_intensity));
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return m_ready;
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|
||||
@@ -5,8 +5,8 @@
|
||||
* Copyright 2014-2016 Wolf9466 <https://github.com/OhGodAPet>
|
||||
* Copyright 2016 Jay D Dee <jayddee246@gmail.com>
|
||||
* Copyright 2017-2018 XMR-Stak <https://github.com/fireice-uk>, <https://github.com/psychocrypt>
|
||||
* Copyright 2018-2024 SChernykh <https://github.com/SChernykh>
|
||||
* Copyright 2016-2024 XMRig <https://github.com/xmrig>, <support@xmrig.com>
|
||||
* Copyright 2018-2019 SChernykh <https://github.com/SChernykh>
|
||||
* Copyright 2016-2019 XMRig <https://github.com/xmrig>, <support@xmrig.com>
|
||||
*
|
||||
* This program is free software: you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
@@ -27,7 +27,6 @@
|
||||
|
||||
|
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#include "backend/cuda/runners/CudaBaseRunner.h"
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#include "base/tools/Buffer.h"
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|
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namespace xmrig {
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@@ -47,7 +46,6 @@ protected:
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private:
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bool m_ready = false;
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const bool m_datasetHost = false;
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Buffer m_seed;
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size_t m_intensity = 0;
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};
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|
||||
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@@ -19,10 +19,10 @@
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#include <stdexcept>
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#include <uv.h>
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|
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#include "backend/cuda/wrappers/CudaLib.h"
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#include "base/io/Env.h"
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#include "base/io/log/Log.h"
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#include "base/io/log/Tags.h"
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#include "base/kernel/Process.h"
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#include "crypto/rx/RxAlgo.h"
|
||||
|
||||
@@ -68,7 +68,6 @@ static const char *kPluginVersion = "pluginVersion";
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static const char *kRelease = "release";
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static const char *kRxHash = "rxHash";
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static const char *kRxPrepare = "rxPrepare";
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static const char *kRxUpdateDataset = "rxUpdateDataset";
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static const char *kSetJob = "setJob";
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static const char *kSetJob_v2 = "setJob_v2";
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static const char *kVersion = "version";
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@@ -93,7 +92,6 @@ using pluginVersion_t = const char * (*)();
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using release_t = void (*)(nvid_ctx *);
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using rxHash_t = bool (*)(nvid_ctx *, uint32_t, uint64_t, uint32_t *, uint32_t *);
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using rxPrepare_t = bool (*)(nvid_ctx *, const void *, size_t, bool, uint32_t);
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using rxUpdateDataset_t = bool (*)(nvid_ctx *, const void *, size_t);
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using setJob_t = bool (*)(nvid_ctx *, const void *, size_t, uint32_t);
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using setJob_v2_t = bool (*)(nvid_ctx *, const void *, size_t, const char *);
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||||
using version_t = uint32_t (*)(Version);
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@@ -118,7 +116,6 @@ static pluginVersion_t pPluginVersion = nullptr;
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static release_t pRelease = nullptr;
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static rxHash_t pRxHash = nullptr;
|
||||
static rxPrepare_t pRxPrepare = nullptr;
|
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static rxUpdateDataset_t pRxUpdateDataset = nullptr;
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static setJob_t pSetJob = nullptr;
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static setJob_v2_t pSetJob_v2 = nullptr;
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static version_t pVersion = nullptr;
|
||||
@@ -205,26 +202,10 @@ bool xmrig::CudaLib::rxHash(nvid_ctx *ctx, uint32_t startNonce, uint64_t target,
|
||||
|
||||
bool xmrig::CudaLib::rxPrepare(nvid_ctx *ctx, const void *dataset, size_t datasetSize, bool dataset_host, uint32_t batchSize) noexcept
|
||||
{
|
||||
# ifdef XMRIG_ALGO_RANDOMX
|
||||
if (!pRxUpdateDataset) {
|
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LOG_WARN("%s" YELLOW_BOLD("CUDA plugin is outdated. Please update to the latest version"), Tags::randomx());
|
||||
}
|
||||
# endif
|
||||
|
||||
return pRxPrepare(ctx, dataset, datasetSize, dataset_host, batchSize);
|
||||
}
|
||||
|
||||
|
||||
bool xmrig::CudaLib::rxUpdateDataset(nvid_ctx *ctx, const void *dataset, size_t datasetSize) noexcept
|
||||
{
|
||||
if (pRxUpdateDataset) {
|
||||
return pRxUpdateDataset(ctx, dataset, datasetSize);
|
||||
}
|
||||
|
||||
return true;
|
||||
}
|
||||
|
||||
|
||||
bool xmrig::CudaLib::kawPowHash(nvid_ctx *ctx, uint8_t* job_blob, uint64_t target, uint32_t *rescount, uint32_t *resnonce, uint32_t *skipped_hashes) noexcept
|
||||
{
|
||||
return pKawPowHash(ctx, job_blob, target, rescount, resnonce, skipped_hashes);
|
||||
@@ -420,7 +401,5 @@ void xmrig::CudaLib::load()
|
||||
DLSYM(SetJob_v2);
|
||||
}
|
||||
|
||||
uv_dlsym(&cudaLib, kRxUpdateDataset, reinterpret_cast<void**>(&pRxUpdateDataset));
|
||||
|
||||
pInit();
|
||||
}
|
||||
|
||||
@@ -1,6 +1,6 @@
|
||||
/* XMRig
|
||||
* Copyright (c) 2018-2024 SChernykh <https://github.com/SChernykh>
|
||||
* Copyright (c) 2016-2024 XMRig <https://github.com/xmrig>, <support@xmrig.com>
|
||||
* Copyright (c) 2018-2021 SChernykh <https://github.com/SChernykh>
|
||||
* Copyright (c) 2016-2021 XMRig <https://github.com/xmrig>, <support@xmrig.com>
|
||||
*
|
||||
* This program is free software: you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
@@ -71,7 +71,6 @@ public:
|
||||
static bool deviceInit(nvid_ctx *ctx) noexcept;
|
||||
static bool rxHash(nvid_ctx *ctx, uint32_t startNonce, uint64_t target, uint32_t *rescount, uint32_t *resnonce) noexcept;
|
||||
static bool rxPrepare(nvid_ctx *ctx, const void *dataset, size_t datasetSize, bool dataset_host, uint32_t batchSize) noexcept;
|
||||
static bool rxUpdateDataset(nvid_ctx *ctx, const void *dataset, size_t datasetSize) noexcept;
|
||||
static bool kawPowHash(nvid_ctx *ctx, uint8_t* job_blob, uint64_t target, uint32_t *rescount, uint32_t *resnonce, uint32_t *skipped_hashes) noexcept;
|
||||
static bool kawPowPrepare(nvid_ctx *ctx, const void* cache, size_t cache_size, const void* dag_precalc, size_t dag_size, uint32_t height, const uint64_t* dag_sizes) noexcept;
|
||||
static bool kawPowStopHash(nvid_ctx *ctx) noexcept;
|
||||
|
||||
@@ -74,7 +74,7 @@ void keccak_f800_round(uint32_t st[25], const int r)
|
||||
// Keccak - implemented as a variant of SHAKE
|
||||
// The width is 800, with a bitrate of 576, a capacity of 224, and no padding
|
||||
// Only need 64 bits of output for mining
|
||||
void keccak_f800(uint32_t* st)
|
||||
uint64_t keccak_f800(uint32_t* st)
|
||||
{
|
||||
// Complete all 22 rounds as a separate impl to
|
||||
// evaluate only first 8 words is wasteful of regsters
|
||||
|
||||
@@ -2,7 +2,7 @@
|
||||
|
||||
namespace xmrig {
|
||||
|
||||
static const char kawpow_cl[5944] = {
|
||||
static const char kawpow_cl[5948] = {
|
||||
0x23,0x69,0x66,0x64,0x65,0x66,0x20,0x63,0x6c,0x5f,0x63,0x6c,0x61,0x6e,0x67,0x5f,0x73,0x74,0x6f,0x72,0x61,0x67,0x65,0x5f,0x63,0x6c,0x61,0x73,0x73,0x5f,0x73,0x70,
|
||||
0x65,0x63,0x69,0x66,0x69,0x65,0x72,0x73,0x0a,0x23,0x70,0x72,0x61,0x67,0x6d,0x61,0x20,0x4f,0x50,0x45,0x4e,0x43,0x4c,0x20,0x45,0x58,0x54,0x45,0x4e,0x53,0x49,0x4f,
|
||||
0x4e,0x20,0x63,0x6c,0x5f,0x63,0x6c,0x61,0x6e,0x67,0x5f,0x73,0x74,0x6f,0x72,0x61,0x67,0x65,0x5f,0x63,0x6c,0x61,0x73,0x73,0x5f,0x73,0x70,0x65,0x63,0x69,0x66,0x69,
|
||||
@@ -76,119 +76,119 @@ static const char kawpow_cl[5944] = {
|
||||
0x3d,0x73,0x74,0x5b,0x6a,0x2b,0x69,0x5d,0x3b,0x0a,0x66,0x6f,0x72,0x20,0x28,0x69,0x6e,0x74,0x20,0x69,0x3d,0x30,0x3b,0x20,0x69,0x3c,0x35,0x3b,0x20,0x69,0x2b,0x2b,
|
||||
0x29,0x0a,0x73,0x74,0x5b,0x6a,0x2b,0x69,0x5d,0x20,0x5e,0x3d,0x20,0x28,0x7e,0x62,0x63,0x5b,0x28,0x69,0x2b,0x31,0x29,0x20,0x25,0x20,0x35,0x5d,0x29,0x26,0x62,0x63,
|
||||
0x5b,0x28,0x69,0x2b,0x32,0x29,0x20,0x25,0x20,0x35,0x5d,0x3b,0x0a,0x7d,0x0a,0x73,0x74,0x5b,0x30,0x5d,0x20,0x5e,0x3d,0x20,0x6b,0x65,0x63,0x63,0x61,0x6b,0x66,0x5f,
|
||||
0x72,0x6e,0x64,0x63,0x5b,0x72,0x5d,0x3b,0x0a,0x7d,0x0a,0x76,0x6f,0x69,0x64,0x20,0x6b,0x65,0x63,0x63,0x61,0x6b,0x5f,0x66,0x38,0x30,0x30,0x28,0x75,0x69,0x6e,0x74,
|
||||
0x33,0x32,0x5f,0x74,0x2a,0x20,0x73,0x74,0x29,0x0a,0x7b,0x0a,0x66,0x6f,0x72,0x20,0x28,0x69,0x6e,0x74,0x20,0x72,0x3d,0x30,0x3b,0x20,0x72,0x3c,0x32,0x32,0x3b,0x20,
|
||||
0x72,0x2b,0x2b,0x29,0x20,0x7b,0x0a,0x6b,0x65,0x63,0x63,0x61,0x6b,0x5f,0x66,0x38,0x30,0x30,0x5f,0x72,0x6f,0x75,0x6e,0x64,0x28,0x73,0x74,0x2c,0x72,0x29,0x3b,0x0a,
|
||||
0x7d,0x0a,0x7d,0x0a,0x23,0x64,0x65,0x66,0x69,0x6e,0x65,0x20,0x66,0x6e,0x76,0x31,0x61,0x28,0x68,0x2c,0x20,0x64,0x29,0x20,0x28,0x68,0x20,0x3d,0x20,0x28,0x68,0x20,
|
||||
0x5e,0x20,0x64,0x29,0x20,0x2a,0x20,0x46,0x4e,0x56,0x5f,0x50,0x52,0x49,0x4d,0x45,0x29,0x0a,0x74,0x79,0x70,0x65,0x64,0x65,0x66,0x20,0x73,0x74,0x72,0x75,0x63,0x74,
|
||||
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|
||||
0x6b,0x3c,0x3d,0x31,0x35,0x29,0x0a,0x72,0x65,0x73,0x75,0x6c,0x74,0x73,0x5b,0x6b,0x5d,0x3d,0x67,0x69,0x64,0x3b,0x0a,0x7d,0x0a,0x7d,0x0a,0x00
|
||||
};
|
||||
|
||||
} // namespace xmrig
|
||||
|
||||
@@ -189,12 +189,10 @@ void xmrig::HttpsClient::flush(bool close)
|
||||
}
|
||||
|
||||
char *data = nullptr;
|
||||
const long size = BIO_get_mem_data(m_write, &data); // NOLINT(cppcoreguidelines-pro-type-cstyle-cast)
|
||||
std::string body(data, (size > 0) ? size : 0);
|
||||
const size_t size = BIO_get_mem_data(m_write, &data); // NOLINT(cppcoreguidelines-pro-type-cstyle-cast)
|
||||
std::string body(data, size);
|
||||
|
||||
(void) BIO_reset(m_write);
|
||||
|
||||
if (!body.empty()) {
|
||||
HttpContext::write(std::move(body), close);
|
||||
}
|
||||
HttpContext::write(std::move(body), close);
|
||||
}
|
||||
|
||||
@@ -7,8 +7,8 @@
|
||||
* Copyright 2017-2018 XMR-Stak <https://github.com/fireice-uk>, <https://github.com/psychocrypt>
|
||||
* Copyright 2018 Lee Clagett <https://github.com/vtnerd>
|
||||
* Copyright 2019 Howard Chu <https://github.com/hyc>
|
||||
* Copyright 2018-2025 SChernykh <https://github.com/SChernykh>
|
||||
* Copyright 2016-2025 XMRig <https://github.com/xmrig>, <support@xmrig.com>
|
||||
* Copyright 2018-2024 SChernykh <https://github.com/SChernykh>
|
||||
* Copyright 2016-2024 XMRig <https://github.com/xmrig>, <support@xmrig.com>
|
||||
*
|
||||
* This program is free software: you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
@@ -67,7 +67,7 @@ public:
|
||||
|
||||
inline bool isNicehash() const { return m_nicehash; }
|
||||
inline bool isValid() const { return (m_size > 0 && m_diff > 0) || !m_poolWallet.isEmpty(); }
|
||||
inline bool setId(const char *id) { return (m_id = id); }
|
||||
inline bool setId(const char *id) { return m_id = id; }
|
||||
inline const Algorithm &algorithm() const { return m_algorithm; }
|
||||
inline const Buffer &seed() const { return m_seed; }
|
||||
inline const String &clientId() const { return m_clientId; }
|
||||
|
||||
@@ -94,7 +94,13 @@ static inline const std::string &usage()
|
||||
# ifdef XMRIG_ALGO_RANDOMX
|
||||
u += " --huge-pages-jit enable huge pages support for RandomX JIT code\n";
|
||||
# endif
|
||||
# ifdef XMRIG_FEATURE_ASM
|
||||
# ifdef XMRIG_FEATURE_ASM_AMD
|
||||
u += " --asm=ASM ASM optimizations, possible values: auto, none, intel, ryzen, bulldozer\n";
|
||||
# else
|
||||
u += " --asm=ASM ASM optimizations, possible values: auto, none, intel\n";
|
||||
# endif
|
||||
# endif
|
||||
|
||||
# if defined(__x86_64__) || defined(_M_AMD64)
|
||||
u += " --argon2-impl=IMPL argon2 implementation: x86_64, SSE2, SSSE3, XOP, AVX2, AVX-512F\n";
|
||||
|
||||
@@ -55,6 +55,7 @@ bool cn_vaes_enabled = false;
|
||||
|
||||
|
||||
#ifdef XMRIG_FEATURE_ASM
|
||||
#ifdef XMRIG_FEATURE_ASM_AMD
|
||||
# define ADD_FN_ASM(algo) do { \
|
||||
m_map[algo]->data[AV_SINGLE][Assembly::INTEL] = cryptonight_single_hash_asm<algo, Assembly::INTEL>; \
|
||||
m_map[algo]->data[AV_SINGLE][Assembly::RYZEN] = cryptonight_single_hash_asm<algo, Assembly::RYZEN>; \
|
||||
@@ -63,34 +64,50 @@ bool cn_vaes_enabled = false;
|
||||
m_map[algo]->data[AV_DOUBLE][Assembly::RYZEN] = cryptonight_double_hash_asm<algo, Assembly::RYZEN>; \
|
||||
m_map[algo]->data[AV_DOUBLE][Assembly::BULLDOZER] = cryptonight_double_hash_asm<algo, Assembly::BULLDOZER>; \
|
||||
} while (0)
|
||||
#else
|
||||
# define ADD_FN_ASM(algo) do { \
|
||||
m_map[algo]->data[AV_SINGLE][Assembly::INTEL] = cryptonight_single_hash_asm<algo, Assembly::INTEL>; \
|
||||
m_map[algo]->data[AV_DOUBLE][Assembly::INTEL] = cryptonight_double_hash_asm<algo, Assembly::INTEL>; \
|
||||
} while (0)
|
||||
#endif
|
||||
|
||||
|
||||
namespace xmrig {
|
||||
|
||||
|
||||
cn_mainloop_fun cn_half_mainloop_ivybridge_asm = nullptr;
|
||||
#ifdef XMRIG_FEATURE_ASM_AMD
|
||||
cn_mainloop_fun cn_half_mainloop_ryzen_asm = nullptr;
|
||||
cn_mainloop_fun cn_half_mainloop_bulldozer_asm = nullptr;
|
||||
#endif
|
||||
cn_mainloop_fun cn_half_double_mainloop_sandybridge_asm = nullptr;
|
||||
|
||||
cn_mainloop_fun cn_trtl_mainloop_ivybridge_asm = nullptr;
|
||||
#ifdef XMRIG_FEATURE_ASM_AMD
|
||||
cn_mainloop_fun cn_trtl_mainloop_ryzen_asm = nullptr;
|
||||
cn_mainloop_fun cn_trtl_mainloop_bulldozer_asm = nullptr;
|
||||
#endif
|
||||
cn_mainloop_fun cn_trtl_double_mainloop_sandybridge_asm = nullptr;
|
||||
|
||||
cn_mainloop_fun cn_tlo_mainloop_ivybridge_asm = nullptr;
|
||||
#ifdef XMRIG_FEATURE_ASM_AMD
|
||||
cn_mainloop_fun cn_tlo_mainloop_ryzen_asm = nullptr;
|
||||
cn_mainloop_fun cn_tlo_mainloop_bulldozer_asm = nullptr;
|
||||
#endif
|
||||
cn_mainloop_fun cn_tlo_double_mainloop_sandybridge_asm = nullptr;
|
||||
|
||||
cn_mainloop_fun cn_zls_mainloop_ivybridge_asm = nullptr;
|
||||
#ifdef XMRIG_FEATURE_ASM_AMD
|
||||
cn_mainloop_fun cn_zls_mainloop_ryzen_asm = nullptr;
|
||||
cn_mainloop_fun cn_zls_mainloop_bulldozer_asm = nullptr;
|
||||
#endif
|
||||
cn_mainloop_fun cn_zls_double_mainloop_sandybridge_asm = nullptr;
|
||||
|
||||
cn_mainloop_fun cn_double_mainloop_ivybridge_asm = nullptr;
|
||||
#ifdef XMRIG_FEATURE_ASM_AMD
|
||||
cn_mainloop_fun cn_double_mainloop_ryzen_asm = nullptr;
|
||||
cn_mainloop_fun cn_double_mainloop_bulldozer_asm = nullptr;
|
||||
#endif
|
||||
cn_mainloop_fun cn_double_double_mainloop_sandybridge_asm = nullptr;
|
||||
|
||||
cn_mainloop_fun cn_upx2_mainloop_asm = nullptr;
|
||||
@@ -160,31 +177,41 @@ static void patchAsmVariants()
|
||||
auto base = static_cast<uint8_t *>(VirtualMemory::allocateExecutableMemory(allocation_size, false));
|
||||
|
||||
cn_half_mainloop_ivybridge_asm = reinterpret_cast<cn_mainloop_fun> (base + 0x0000);
|
||||
# ifdef XMRIG_FEATURE_ASM_AMD
|
||||
cn_half_mainloop_ryzen_asm = reinterpret_cast<cn_mainloop_fun> (base + 0x1000);
|
||||
cn_half_mainloop_bulldozer_asm = reinterpret_cast<cn_mainloop_fun> (base + 0x2000);
|
||||
# endif
|
||||
cn_half_double_mainloop_sandybridge_asm = reinterpret_cast<cn_mainloop_fun> (base + 0x3000);
|
||||
|
||||
# ifdef XMRIG_ALGO_CN_PICO
|
||||
cn_trtl_mainloop_ivybridge_asm = reinterpret_cast<cn_mainloop_fun> (base + 0x4000);
|
||||
# ifdef XMRIG_FEATURE_ASM_AMD
|
||||
cn_trtl_mainloop_ryzen_asm = reinterpret_cast<cn_mainloop_fun> (base + 0x5000);
|
||||
cn_trtl_mainloop_bulldozer_asm = reinterpret_cast<cn_mainloop_fun> (base + 0x6000);
|
||||
# endif
|
||||
cn_trtl_double_mainloop_sandybridge_asm = reinterpret_cast<cn_mainloop_fun> (base + 0x7000);
|
||||
# endif
|
||||
|
||||
cn_zls_mainloop_ivybridge_asm = reinterpret_cast<cn_mainloop_fun> (base + 0x8000);
|
||||
# ifdef XMRIG_FEATURE_ASM_AMD
|
||||
cn_zls_mainloop_ryzen_asm = reinterpret_cast<cn_mainloop_fun> (base + 0x9000);
|
||||
cn_zls_mainloop_bulldozer_asm = reinterpret_cast<cn_mainloop_fun> (base + 0xA000);
|
||||
# endif
|
||||
cn_zls_double_mainloop_sandybridge_asm = reinterpret_cast<cn_mainloop_fun> (base + 0xB000);
|
||||
|
||||
cn_double_mainloop_ivybridge_asm = reinterpret_cast<cn_mainloop_fun> (base + 0xC000);
|
||||
# ifdef XMRIG_FEATURE_ASM_AMD
|
||||
cn_double_mainloop_ryzen_asm = reinterpret_cast<cn_mainloop_fun> (base + 0xD000);
|
||||
cn_double_mainloop_bulldozer_asm = reinterpret_cast<cn_mainloop_fun> (base + 0xE000);
|
||||
# endif
|
||||
cn_double_double_mainloop_sandybridge_asm = reinterpret_cast<cn_mainloop_fun> (base + 0xF000);
|
||||
|
||||
# ifdef XMRIG_ALGO_CN_PICO
|
||||
cn_tlo_mainloop_ivybridge_asm = reinterpret_cast<cn_mainloop_fun> (base + 0x10000);
|
||||
# ifdef XMRIG_FEATURE_ASM_AMD
|
||||
cn_tlo_mainloop_ryzen_asm = reinterpret_cast<cn_mainloop_fun> (base + 0x11000);
|
||||
cn_tlo_mainloop_bulldozer_asm = reinterpret_cast<cn_mainloop_fun> (base + 0x12000);
|
||||
# endif
|
||||
cn_tlo_double_mainloop_sandybridge_asm = reinterpret_cast<cn_mainloop_fun> (base + 0x13000);
|
||||
# endif
|
||||
|
||||
@@ -220,8 +247,10 @@ static void patchAsmVariants()
|
||||
constexpr uint32_t ITER = CnAlgo<Algorithm::CN_HALF>().iterations();
|
||||
|
||||
patchCode(cn_half_mainloop_ivybridge_asm, cnv2_mainloop_ivybridge_asm, ITER);
|
||||
# ifdef XMRIG_FEATURE_ASM_AMD
|
||||
patchCode(cn_half_mainloop_ryzen_asm, cnv2_mainloop_ryzen_asm, ITER);
|
||||
patchCode(cn_half_mainloop_bulldozer_asm, cnv2_mainloop_bulldozer_asm, ITER);
|
||||
# endif
|
||||
patchCode(cn_half_double_mainloop_sandybridge_asm, cnv2_double_mainloop_sandybridge_asm, ITER);
|
||||
}
|
||||
|
||||
@@ -231,8 +260,10 @@ static void patchAsmVariants()
|
||||
constexpr uint32_t MASK = CnAlgo<Algorithm::CN_PICO_0>().mask();
|
||||
|
||||
patchCode(cn_trtl_mainloop_ivybridge_asm, cnv2_mainloop_ivybridge_asm, ITER, MASK);
|
||||
# ifdef XMRIG_FEATURE_ASM_AMD
|
||||
patchCode(cn_trtl_mainloop_ryzen_asm, cnv2_mainloop_ryzen_asm, ITER, MASK);
|
||||
patchCode(cn_trtl_mainloop_bulldozer_asm, cnv2_mainloop_bulldozer_asm, ITER, MASK);
|
||||
# endif
|
||||
patchCode(cn_trtl_double_mainloop_sandybridge_asm, cnv2_double_mainloop_sandybridge_asm, ITER, MASK);
|
||||
}
|
||||
|
||||
@@ -241,8 +272,10 @@ static void patchAsmVariants()
|
||||
constexpr uint32_t MASK = CnAlgo<Algorithm::CN_PICO_TLO>().mask();
|
||||
|
||||
patchCode(cn_tlo_mainloop_ivybridge_asm, cnv2_mainloop_ivybridge_asm, ITER, MASK);
|
||||
# ifdef XMRIG_FEATURE_ASM_AMD
|
||||
patchCode(cn_tlo_mainloop_ryzen_asm, cnv2_mainloop_ryzen_asm, ITER, MASK);
|
||||
patchCode(cn_tlo_mainloop_bulldozer_asm, cnv2_mainloop_bulldozer_asm, ITER, MASK);
|
||||
# endif
|
||||
patchCode(cn_tlo_double_mainloop_sandybridge_asm, cnv2_double_mainloop_sandybridge_asm, ITER, MASK);
|
||||
}
|
||||
# endif
|
||||
@@ -251,8 +284,10 @@ static void patchAsmVariants()
|
||||
constexpr uint32_t ITER = CnAlgo<Algorithm::CN_ZLS>().iterations();
|
||||
|
||||
patchCode(cn_zls_mainloop_ivybridge_asm, cnv2_mainloop_ivybridge_asm, ITER);
|
||||
# ifdef XMRIG_FEATURE_ASM_AMD
|
||||
patchCode(cn_zls_mainloop_ryzen_asm, cnv2_mainloop_ryzen_asm, ITER);
|
||||
patchCode(cn_zls_mainloop_bulldozer_asm, cnv2_mainloop_bulldozer_asm, ITER);
|
||||
# endif
|
||||
patchCode(cn_zls_double_mainloop_sandybridge_asm, cnv2_double_mainloop_sandybridge_asm, ITER);
|
||||
}
|
||||
|
||||
@@ -260,8 +295,10 @@ static void patchAsmVariants()
|
||||
constexpr uint32_t ITER = CnAlgo<Algorithm::CN_DOUBLE>().iterations();
|
||||
|
||||
patchCode(cn_double_mainloop_ivybridge_asm, cnv2_mainloop_ivybridge_asm, ITER);
|
||||
# ifdef XMRIG_FEATURE_ASM_AMD
|
||||
patchCode(cn_double_mainloop_ryzen_asm, cnv2_mainloop_ryzen_asm, ITER);
|
||||
patchCode(cn_double_mainloop_bulldozer_asm, cnv2_mainloop_bulldozer_asm, ITER);
|
||||
# endif
|
||||
patchCode(cn_double_double_mainloop_sandybridge_asm, cnv2_double_mainloop_sandybridge_asm, ITER);
|
||||
}
|
||||
|
||||
|
||||
@@ -852,12 +852,16 @@ extern "C" void cnv1_single_mainloop_asm(cryptonight_ctx * *ctx);
|
||||
extern "C" void cnv1_double_mainloop_asm(cryptonight_ctx **ctx);
|
||||
extern "C" void cnv1_quad_mainloop_asm(cryptonight_ctx **ctx);
|
||||
extern "C" void cnv2_mainloop_ivybridge_asm(cryptonight_ctx **ctx);
|
||||
#ifdef XMRIG_FEATURE_ASM_AMD
|
||||
extern "C" void cnv2_mainloop_ryzen_asm(cryptonight_ctx **ctx);
|
||||
extern "C" void cnv2_mainloop_bulldozer_asm(cryptonight_ctx **ctx);
|
||||
#endif
|
||||
extern "C" void cnv2_double_mainloop_sandybridge_asm(cryptonight_ctx **ctx);
|
||||
extern "C" void cnv2_rwz_mainloop_asm(cryptonight_ctx **ctx);
|
||||
extern "C" void cnv2_rwz_double_mainloop_asm(cryptonight_ctx **ctx);
|
||||
#ifdef XMRIG_FEATURE_ASM_AMD
|
||||
extern "C" void cnv2_upx_double_mainloop_zen3_asm(cryptonight_ctx **ctx);
|
||||
#endif
|
||||
|
||||
|
||||
namespace xmrig {
|
||||
@@ -867,28 +871,38 @@ typedef void (*cn_mainloop_fun)(cryptonight_ctx **ctx);
|
||||
|
||||
|
||||
extern cn_mainloop_fun cn_half_mainloop_ivybridge_asm;
|
||||
#ifdef XMRIG_FEATURE_ASM_AMD
|
||||
extern cn_mainloop_fun cn_half_mainloop_ryzen_asm;
|
||||
extern cn_mainloop_fun cn_half_mainloop_bulldozer_asm;
|
||||
#endif
|
||||
extern cn_mainloop_fun cn_half_double_mainloop_sandybridge_asm;
|
||||
|
||||
extern cn_mainloop_fun cn_trtl_mainloop_ivybridge_asm;
|
||||
#ifdef XMRIG_FEATURE_ASM_AMD
|
||||
extern cn_mainloop_fun cn_trtl_mainloop_ryzen_asm;
|
||||
extern cn_mainloop_fun cn_trtl_mainloop_bulldozer_asm;
|
||||
#endif
|
||||
extern cn_mainloop_fun cn_trtl_double_mainloop_sandybridge_asm;
|
||||
|
||||
extern cn_mainloop_fun cn_tlo_mainloop_ivybridge_asm;
|
||||
#ifdef XMRIG_FEATURE_ASM_AMD
|
||||
extern cn_mainloop_fun cn_tlo_mainloop_ryzen_asm;
|
||||
extern cn_mainloop_fun cn_tlo_mainloop_bulldozer_asm;
|
||||
#endif
|
||||
extern cn_mainloop_fun cn_tlo_double_mainloop_sandybridge_asm;
|
||||
|
||||
extern cn_mainloop_fun cn_zls_mainloop_ivybridge_asm;
|
||||
#ifdef XMRIG_FEATURE_ASM_AMD
|
||||
extern cn_mainloop_fun cn_zls_mainloop_ryzen_asm;
|
||||
extern cn_mainloop_fun cn_zls_mainloop_bulldozer_asm;
|
||||
#endif
|
||||
extern cn_mainloop_fun cn_zls_double_mainloop_sandybridge_asm;
|
||||
|
||||
extern cn_mainloop_fun cn_double_mainloop_ivybridge_asm;
|
||||
#ifdef XMRIG_FEATURE_ASM_AMD
|
||||
extern cn_mainloop_fun cn_double_mainloop_ryzen_asm;
|
||||
extern cn_mainloop_fun cn_double_mainloop_bulldozer_asm;
|
||||
#endif
|
||||
extern cn_mainloop_fun cn_double_double_mainloop_sandybridge_asm;
|
||||
|
||||
extern cn_mainloop_fun cn_upx2_mainloop_asm;
|
||||
@@ -964,46 +978,54 @@ inline void cryptonight_single_hash_asm(const uint8_t *__restrict__ input, size_
|
||||
if (ASM == Assembly::INTEL) {
|
||||
cnv2_mainloop_ivybridge_asm(ctx);
|
||||
}
|
||||
# ifdef XMRIG_FEATURE_ASM_AMD
|
||||
else if (ASM == Assembly::RYZEN) {
|
||||
cnv2_mainloop_ryzen_asm(ctx);
|
||||
}
|
||||
else {
|
||||
cnv2_mainloop_bulldozer_asm(ctx);
|
||||
}
|
||||
# endif
|
||||
}
|
||||
else if (ALGO == Algorithm::CN_HALF) {
|
||||
if (ASM == Assembly::INTEL) {
|
||||
cn_half_mainloop_ivybridge_asm(ctx);
|
||||
}
|
||||
# ifdef XMRIG_FEATURE_ASM_AMD
|
||||
else if (ASM == Assembly::RYZEN) {
|
||||
cn_half_mainloop_ryzen_asm(ctx);
|
||||
}
|
||||
else {
|
||||
cn_half_mainloop_bulldozer_asm(ctx);
|
||||
}
|
||||
# endif
|
||||
}
|
||||
# ifdef XMRIG_ALGO_CN_PICO
|
||||
else if (ALGO == Algorithm::CN_PICO_0) {
|
||||
if (ASM == Assembly::INTEL) {
|
||||
cn_trtl_mainloop_ivybridge_asm(ctx);
|
||||
}
|
||||
# ifdef XMRIG_FEATURE_ASM_AMD
|
||||
else if (ASM == Assembly::RYZEN) {
|
||||
cn_trtl_mainloop_ryzen_asm(ctx);
|
||||
}
|
||||
else {
|
||||
cn_trtl_mainloop_bulldozer_asm(ctx);
|
||||
}
|
||||
# endif
|
||||
}
|
||||
else if (ALGO == Algorithm::CN_PICO_TLO) {
|
||||
if (ASM == Assembly::INTEL) {
|
||||
cn_tlo_mainloop_ivybridge_asm(ctx);
|
||||
}
|
||||
# ifdef XMRIG_FEATURE_ASM_AMD
|
||||
else if (ASM == Assembly::RYZEN) {
|
||||
cn_tlo_mainloop_ryzen_asm(ctx);
|
||||
}
|
||||
else {
|
||||
cn_tlo_mainloop_bulldozer_asm(ctx);
|
||||
}
|
||||
# endif
|
||||
}
|
||||
# endif
|
||||
else if (ALGO == Algorithm::CN_RWZ) {
|
||||
@@ -1013,23 +1035,27 @@ inline void cryptonight_single_hash_asm(const uint8_t *__restrict__ input, size_
|
||||
if (ASM == Assembly::INTEL) {
|
||||
cn_zls_mainloop_ivybridge_asm(ctx);
|
||||
}
|
||||
# ifdef XMRIG_FEATURE_ASM_AMD
|
||||
else if (ASM == Assembly::RYZEN) {
|
||||
cn_zls_mainloop_ryzen_asm(ctx);
|
||||
}
|
||||
else {
|
||||
cn_zls_mainloop_bulldozer_asm(ctx);
|
||||
}
|
||||
# endif
|
||||
}
|
||||
else if (ALGO == Algorithm::CN_DOUBLE) {
|
||||
if (ASM == Assembly::INTEL) {
|
||||
cn_double_mainloop_ivybridge_asm(ctx);
|
||||
}
|
||||
# ifdef XMRIG_FEATURE_ASM_AMD
|
||||
else if (ASM == Assembly::RYZEN) {
|
||||
cn_double_mainloop_ryzen_asm(ctx);
|
||||
}
|
||||
else {
|
||||
cn_double_mainloop_bulldozer_asm(ctx);
|
||||
}
|
||||
# endif
|
||||
}
|
||||
# ifdef XMRIG_ALGO_CN_FEMTO
|
||||
else if (ALGO == Algorithm::CN_UPX2) {
|
||||
@@ -1094,12 +1120,16 @@ inline void cryptonight_double_hash_asm(const uint8_t *__restrict__ input, size_
|
||||
# endif
|
||||
# ifdef XMRIG_ALGO_CN_FEMTO
|
||||
else if (ALGO == Algorithm::CN_UPX2) {
|
||||
# ifdef XMRIG_FEATURE_ASM_AMD
|
||||
if (Cpu::info()->arch() == ICpuInfo::ARCH_ZEN3) {
|
||||
cnv2_upx_double_mainloop_zen3_asm(ctx);
|
||||
}
|
||||
else {
|
||||
cn_upx2_double_mainloop_asm(ctx);
|
||||
}
|
||||
# else
|
||||
cn_upx2_double_mainloop_asm(ctx);
|
||||
# endif
|
||||
}
|
||||
# endif
|
||||
else if (ALGO == Algorithm::CN_RWZ) {
|
||||
|
||||
@@ -15,12 +15,16 @@
|
||||
.global FN_PREFIX(cnv1_double_mainloop_asm)
|
||||
.global FN_PREFIX(cnv1_quad_mainloop_asm)
|
||||
.global FN_PREFIX(cnv2_mainloop_ivybridge_asm)
|
||||
#ifdef XMRIG_FEATURE_ASM_AMD
|
||||
.global FN_PREFIX(cnv2_mainloop_ryzen_asm)
|
||||
.global FN_PREFIX(cnv2_mainloop_bulldozer_asm)
|
||||
#endif
|
||||
.global FN_PREFIX(cnv2_double_mainloop_sandybridge_asm)
|
||||
.global FN_PREFIX(cnv2_rwz_mainloop_asm)
|
||||
.global FN_PREFIX(cnv2_rwz_double_mainloop_asm)
|
||||
#ifdef XMRIG_FEATURE_ASM_AMD
|
||||
.global FN_PREFIX(cnv2_upx_double_mainloop_zen3_asm)
|
||||
#endif
|
||||
|
||||
ALIGN(64)
|
||||
FN_PREFIX(cnv1_single_mainloop_asm):
|
||||
@@ -58,6 +62,7 @@ FN_PREFIX(cnv2_mainloop_ivybridge_asm):
|
||||
ret 0
|
||||
mov eax, 3735929054
|
||||
|
||||
#ifdef XMRIG_FEATURE_ASM_AMD
|
||||
ALIGN(64)
|
||||
FN_PREFIX(cnv2_mainloop_ryzen_asm):
|
||||
sub rsp, 48
|
||||
@@ -75,6 +80,7 @@ FN_PREFIX(cnv2_mainloop_bulldozer_asm):
|
||||
add rsp, 48
|
||||
ret 0
|
||||
mov eax, 3735929054
|
||||
#endif
|
||||
|
||||
ALIGN(64)
|
||||
FN_PREFIX(cnv2_double_mainloop_sandybridge_asm):
|
||||
@@ -103,6 +109,7 @@ FN_PREFIX(cnv2_rwz_double_mainloop_asm):
|
||||
ret 0
|
||||
mov eax, 3735929054
|
||||
|
||||
#ifdef XMRIG_FEATURE_ASM_AMD
|
||||
ALIGN(64)
|
||||
FN_PREFIX(cnv2_upx_double_mainloop_zen3_asm):
|
||||
sub rsp, 48
|
||||
@@ -111,6 +118,7 @@ FN_PREFIX(cnv2_upx_double_mainloop_zen3_asm):
|
||||
add rsp, 48
|
||||
ret 0
|
||||
mov eax, 3735929054
|
||||
#endif
|
||||
|
||||
#if defined(__linux__) && defined(__ELF__)
|
||||
.section .note.GNU-stack,"",%progbits
|
||||
|
||||
@@ -5,12 +5,16 @@
|
||||
.global cnv1_double_mainloop_asm
|
||||
.global cnv1_quad_mainloop_asm
|
||||
.global cnv2_mainloop_ivybridge_asm
|
||||
#ifdef XMRIG_FEATURE_ASM_AMD
|
||||
.global cnv2_mainloop_ryzen_asm
|
||||
.global cnv2_mainloop_bulldozer_asm
|
||||
#endif
|
||||
.global cnv2_double_mainloop_sandybridge_asm
|
||||
.global cnv2_rwz_mainloop_asm
|
||||
.global cnv2_rwz_double_mainloop_asm
|
||||
#ifdef XMRIG_FEATURE_ASM_AMD
|
||||
.global cnv2_upx_double_mainloop_zen3_asm
|
||||
#endif
|
||||
|
||||
ALIGN(64)
|
||||
cnv1_single_mainloop_asm:
|
||||
@@ -36,6 +40,7 @@ cnv2_mainloop_ivybridge_asm:
|
||||
ret 0
|
||||
mov eax, 3735929054
|
||||
|
||||
#ifdef XMRIG_FEATURE_ASM_AMD
|
||||
ALIGN(64)
|
||||
cnv2_mainloop_ryzen_asm:
|
||||
#include "../cn2/cnv2_main_loop_ryzen.inc"
|
||||
@@ -47,6 +52,7 @@ cnv2_mainloop_bulldozer_asm:
|
||||
#include "../cn2/cnv2_main_loop_bulldozer.inc"
|
||||
ret 0
|
||||
mov eax, 3735929054
|
||||
#endif
|
||||
|
||||
ALIGN(64)
|
||||
cnv2_double_mainloop_sandybridge_asm:
|
||||
@@ -66,8 +72,10 @@ cnv2_rwz_double_mainloop_asm:
|
||||
ret 0
|
||||
mov eax, 3735929054
|
||||
|
||||
#ifdef XMRIG_FEATURE_ASM_AMD
|
||||
ALIGN(64)
|
||||
cnv2_upx_double_mainloop_zen3_asm:
|
||||
#include "cn2/cnv2_upx_double_mainloop_zen3.inc"
|
||||
ret 0
|
||||
mov eax, 3735929054
|
||||
#endif
|
||||
|
||||
@@ -1,7 +1,7 @@
|
||||
/* XMRig
|
||||
* Copyright (c) 2018-2019 tevador <tevador@gmail.com>
|
||||
* Copyright (c) 2018-2024 SChernykh <https://github.com/SChernykh>
|
||||
* Copyright (c) 2016-2024 XMRig <https://github.com/xmrig>, <support@xmrig.com>
|
||||
* Copyright (c) 2018-2020 SChernykh <https://github.com/SChernykh>
|
||||
* Copyright (c) 2016-2020 XMRig <https://github.com/xmrig>, <support@xmrig.com>
|
||||
*
|
||||
* This program is free software: you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
@@ -17,7 +17,9 @@
|
||||
* along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
*/
|
||||
|
||||
|
||||
#include "crypto/rx/RxBasicStorage.h"
|
||||
#include "backend/common/Tags.h"
|
||||
#include "base/io/log/Log.h"
|
||||
#include "base/io/log/Tags.h"
|
||||
#include "base/tools/Chrono.h"
|
||||
|
||||
@@ -41,10 +41,12 @@ randomx_vm *xmrig::RxVm::create(RxDataset *dataset, uint8_t *scratchpad, bool so
|
||||
flags |= RANDOMX_FLAG_JIT;
|
||||
}
|
||||
|
||||
# ifdef XMRIG_FEATURE_ASM_AMD
|
||||
const auto asmId = assembly == Assembly::AUTO ? Cpu::info()->assembly() : assembly.id();
|
||||
if ((asmId == Assembly::RYZEN) || (asmId == Assembly::BULLDOZER)) {
|
||||
flags |= RANDOMX_FLAG_AMD;
|
||||
}
|
||||
# endif
|
||||
|
||||
return randomx_create_vm(static_cast<randomx_flags>(flags), !dataset->get() ? dataset->cache()->get() : nullptr, dataset->get(), scratchpad, node);
|
||||
}
|
||||
|
||||
@@ -1,6 +1,6 @@
|
||||
/* XMRig
|
||||
* Copyright (c) 2018-2025 SChernykh <https://github.com/SChernykh>
|
||||
* Copyright (c) 2016-2025 XMRig <https://github.com/xmrig>, <support@xmrig.com>
|
||||
* Copyright (c) 2018-2024 SChernykh <https://github.com/SChernykh>
|
||||
* Copyright (c) 2016-2024 XMRig <https://github.com/xmrig>, <support@xmrig.com>
|
||||
*
|
||||
* This program is free software: you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
@@ -22,10 +22,10 @@
|
||||
#define APP_ID "xmrig"
|
||||
#define APP_NAME "XMRig"
|
||||
#define APP_DESC "XMRig miner"
|
||||
#define APP_VERSION "6.22.3"
|
||||
#define APP_VERSION "6.22.3-dev"
|
||||
#define APP_DOMAIN "xmrig.com"
|
||||
#define APP_SITE "www.xmrig.com"
|
||||
#define APP_COPYRIGHT "Copyright (C) 2016-2025 xmrig.com"
|
||||
#define APP_COPYRIGHT "Copyright (C) 2016-2024 xmrig.com"
|
||||
#define APP_KIND "miner"
|
||||
|
||||
#define APP_VER_MAJOR 6
|
||||
|
||||
Reference in New Issue
Block a user