Merged xmrig v6.20.0

Zephyr solo mining: fix for blocks with transactions

.github/workflows/deploy.yml

@@ -0,0 +1,208 @@
+on:
+  push:
+    tags:
+    - 'v*'
+
+name: Create release and build artifacts
+
+jobs:
+  build_win:
+    name: Build Windows artifacts
+    runs-on: windows-latest
+    steps:
+      - name: Checkout code
+        uses: actions/checkout@master
+      - name: Checkout deps
+        run:  git clone https://github.com/xmrig/xmrig-deps.git
+      - name: Build project on Windows
+        run: |
+          cmake . -G "MinGW Makefiles" -DXMRIG_DEPS=xmrig-deps\gcc\x64
+          make -j2
+          copy src\config.json .
+          copy bin\WinRing0\WinRing0x64.sys .
+          7z a -tzip -mx windows_build.zip xmrig.exe config.json WinRing0x64.sys
+      - name: Upload Windows build artifacts
+        uses: actions/upload-artifact@v1
+        with:
+          name: windows_build
+          path: windows_build.zip
+
+  build_lin:
+    name: Build Ubuntu artifacts
+    runs-on: ubuntu-20.04
+    steps:
+      - name: Prepare Ubuntu tools
+        run: |
+          sudo apt update
+          sudo apt install -y git build-essential cmake libuv1-dev libssl-dev libhwloc-dev
+      - name: Checkout code
+        uses: actions/checkout@master
+      - name: Build project on Ubuntu
+        run: |
+          cmake .
+          make -j$(nproc)
+          cp src/config.json .
+          tar cfz ubuntu_build.tar.gz xmrig config.json
+      - name: Upload Ubuntu build artifacts
+        uses: actions/upload-artifact@v1
+        with:
+          name: ubuntu_build
+          path: ubuntu_build.tar.gz
+
+  build_macos:
+    name: Build MacOS artifacts
+    runs-on: macos-latest
+    steps:
+      - name: Prepare MacOS tools
+        run: |
+          brew install cmake libuv openssl hwloc
+      - name: Checkout code
+        uses: actions/checkout@master
+      - name: Build hwloc on MacOS
+        run: |
+          curl -O https://download.open-mpi.org/release/hwloc/v2.1/hwloc-2.1.0.tar.bz2
+          tar xjf hwloc-2.1.0.tar.bz2
+          cd hwloc-2.1.0
+          ./configure --disable-shared --enable-static --disable-io --disable-libxml2
+          make -j$(sysctl -n hw.logicalcpu)
+          cd ..
+      - name: Build project on MacOS
+        run: |
+          cmake . -DOPENSSL_ROOT_DIR=/usr/local/opt/openssl -DHWLOC_INCLUDE_DIR=hwloc-2.1.0/include -DHWLOC_LIBRARY=hwloc-2.1.0/hwloc/.libs/libhwloc.a
+          make -j$(sysctl -n hw.logicalcpu)
+          cp src/config.json .
+          tar cfz macos_build.tar.gz xmrig config.json
+      - name: Upload MacOS build artifacts
+        uses: actions/upload-artifact@v1
+        with:
+          name: macos_build
+          path: macos_build.tar.gz
+
+  build_lin_rh7:
+    name: Build CentOS 7 artifacts
+    runs-on: ubuntu-latest
+    container: centos:7
+    steps:
+      - name: Prepare CentOS 7 tools
+        run: |
+          yum install -y centos-release-scl epel-release
+          yum install -y devtoolset-9
+          yum install -y wget git cmake3 automake libtool autoconf libstdc++-static glibc-static
+      - name: Checkout code
+        run: |
+          git clone https://github.com/MoneroOcean/xmrig.git .
+          git checkout ${GITHUB_REF:10}
+      - name: Build project on CentOS 7
+        run: |
+          source /opt/rh/devtoolset-9/enable
+          cd scripts
+          ./build_deps.sh
+          cd ..
+          cmake3 . -DXMRIG_DEPS=scripts/deps
+          make -j$(nproc)
+          cp src/config.json .
+          tar cfz centos7_build.tar.gz xmrig config.json
+      - name: Upload CentOS 7 build artifacts
+        uses: actions/upload-artifact@v1
+        with:
+          name: centos7_build
+          path: centos7_build.tar.gz
+
+  deploy:
+    needs: [build_win, build_lin, build_macos, build_lin_rh7]
+    name: Create release and upload artifacts
+    runs-on: ubuntu-latest
+    steps:
+      - name: Create Release
+        id: create_release
+        uses: actions/create-release@v1.0.0
+        env:
+          GITHUB_TOKEN: ${{ secrets.GITHUB_TOKEN }}
+        with:
+          tag_name: ${{ github.ref }}
+          release_name: Release ${{ github.ref }}
+          draft: false
+          prerelease: false
+      - name: Set version
+        id: version
+        run: echo ::set-output name=VERSION::${GITHUB_REF:10}
+      - name: Download Windows build artifacts
+        uses: actions/download-artifact@v1
+        with:
+          name: windows_build
+      - name: Download Ubuntu build artifacts
+        uses: actions/download-artifact@v1
+        with:
+          name: ubuntu_build
+      - name: Download MacOS build artifacts
+        uses: actions/download-artifact@v1
+        with:
+          name: macos_build
+      - name: Download CentOS 7 build artifacts
+        uses: actions/download-artifact@v1
+        with:
+          name: centos7_build
+      - name: Upload Windows build release asset
+        uses: actions/upload-release-asset@v1.0.1
+        env:
+          GITHUB_TOKEN: ${{ secrets.GITHUB_TOKEN }}
+        with:
+          upload_url: ${{ steps.create_release.outputs.upload_url }}
+          asset_path: windows_build/windows_build.zip
+          asset_name: xmrig-${{steps.version.outputs.VERSION}}-win64.zip
+          asset_content_type: application/zip
+      - name: Upload Ubuntu build release asset
+        uses: actions/upload-release-asset@v1.0.1
+        env:
+          GITHUB_TOKEN: ${{ secrets.GITHUB_TOKEN }}
+        with:
+          upload_url: ${{ steps.create_release.outputs.upload_url }}
+          asset_path: ubuntu_build/ubuntu_build.tar.gz
+          asset_name: xmrig-${{steps.version.outputs.VERSION}}-lin64.tar.gz
+          asset_content_type: application/zip
+      - name: Upload MacOS build release asset
+        uses: actions/upload-release-asset@v1.0.1
+        env:
+          GITHUB_TOKEN: ${{ secrets.GITHUB_TOKEN }}
+        with:
+          upload_url: ${{ steps.create_release.outputs.upload_url }}
+          asset_path: macos_build/macos_build.tar.gz
+          asset_name: xmrig-${{steps.version.outputs.VERSION}}-mac64.tar.gz
+          asset_content_type: application/zip
+      - name: Upload CentOS 7 build release asset
+        uses: actions/upload-release-asset@v1.0.1
+        env:
+          GITHUB_TOKEN: ${{ secrets.GITHUB_TOKEN }}
+        with:
+          upload_url: ${{ steps.create_release.outputs.upload_url }}
+          asset_path: centos7_build/centos7_build.tar.gz
+          asset_name: xmrig-${{steps.version.outputs.VERSION}}-lin64-compat.tar.gz
+          asset_content_type: application/zip
+      - name: Update xmrig_setup repo
+        run: |
+          git clone https://$GITHUB_ACTOR:${{secrets.xmrig_setup_key}}@github.com/MoneroOcean/xmrig_setup.git
+          cd xmrig_setup
+          git config user.name  MoneroOcean
+          git config user.email support@moneroocean.stream
+          cp ../centos7_build/centos7_build.tar.gz xmrig.tar.gz
+          cp ../windows_build/windows_build.zip xmrig.zip
+          unzip xmrig.zip
+          zip -u offline_miner_setup.zip xmrig.exe config.json WinRing0x64.sys
+          git commit -m "xmrig "${GITHUB_REF:10}" based release" xmrig.tar.gz xmrig.zip offline_miner_setup.zip
+          git push
+          cd ..
+      - name: Update hiveos repo
+        run: |
+          git clone https://$GITHUB_ACTOR:${{secrets.xmrig_setup_key}}@github.com/MoneroOcean/hiveos.git
+          cd hiveos
+          git config user.name  MoneroOcean
+          git config user.email support@moneroocean.stream
+          tar xf ../centos7_build/centos7_build.tar.gz
+          mv xmrig mo_xmrig/xmrig
+          mv config.json mo_xmrig/config_global.json
+          export VER=${GITHUB_REF:10}
+          export VER=${VER//-/_}
+          tar -zcvf mo_xmrig-$VER.tar.gz mo_xmrig
+          git add mo_xmrig-$VER.tar.gz mo_xmrig/xmrig mo_xmrig/config_global.json
+          git commit -m "xmrig "${GITHUB_REF:10}" based release" mo_xmrig-$VER.tar.gz
+          git push

.github/workflows/test.yml

@@ -0,0 +1,32 @@
+on: push
+
+name: Test builds
+
+jobs:
+  build_win:
+    name: Windows build
+    runs-on: windows-latest
+    steps:
+      - name: Checkout code
+        uses: actions/checkout@master
+      - name: Checkout deps
+        run:  git clone https://github.com/xmrig/xmrig-deps.git
+      - name: Build project on Windows
+        run: |
+          cmake . -G "MinGW Makefiles" -DXMRIG_DEPS=xmrig-deps\gcc\x64
+          make -j2
+
+  build_lin:
+    name: Ubuntu build
+    runs-on: ubuntu-latest
+    steps:
+      - name: Prepare Ubuntu tools
+        run: |
+          sudo apt update
+          sudo apt install -y git build-essential cmake libuv1-dev libssl-dev libhwloc-dev
+      - name: Checkout code
+        uses: actions/checkout@master
+      - name: Build project on Ubuntu
+        run: |
+          cmake .
+          make -j$(nproc)

CHANGELOG.md

@@ -1,3 +1,77 @@
+# v6.20.0
+- Added new ARM CPU names.
+- [#2394](https://github.com/xmrig/xmrig/pull/2394) Added new CMake options `ARM_V8` and `ARM_V7`.
+- [#2830](https://github.com/xmrig/xmrig/pull/2830) Added API rebind polling.
+- [#2927](https://github.com/xmrig/xmrig/pull/2927) Fixed compatibility with hwloc 1.11.x.
+- [#3060](https://github.com/xmrig/xmrig/pull/3060) Added x86 to `README.md`.
+- [#3236](https://github.com/xmrig/xmrig/pull/3236) Fixed: receive CUDA loader error on Linux too.
+- [#3290](https://github.com/xmrig/xmrig/pull/3290) Added [Zephyr](https://www.zephyrprotocol.com/) coin support for solo mining.
+
+# v6.19.3
+- [#3245](https://github.com/xmrig/xmrig/issues/3245) Improved algorithm negotiation for donation rounds by sending extra information about current mining job.
+- [#3254](https://github.com/xmrig/xmrig/pull/3254) Tweaked auto-tuning for Intel CPUs.
+- [#3271](https://github.com/xmrig/xmrig/pull/3271) RandomX: optimized program generation.
+- [#3273](https://github.com/xmrig/xmrig/pull/3273) RandomX: fixed undefined behavior.
+- [#3275](https://github.com/xmrig/xmrig/pull/3275) RandomX: fixed `jccErratum` list.
+- [#3280](https://github.com/xmrig/xmrig/pull/3280) Updated example scripts.
+
+# v6.19.2
+- [#3230](https://github.com/xmrig/xmrig/pull/3230) Fixed parsing of `TX_EXTRA_MERGE_MINING_TAG`.
+- [#3232](https://github.com/xmrig/xmrig/pull/3232) Added new `X-Hash-Difficulty` HTTP header.
+- [#3240](https://github.com/xmrig/xmrig/pull/3240) Improved .cmd files when run by shortcuts on another drive.
+- [#3241](https://github.com/xmrig/xmrig/pull/3241) Added view tag calculation (fixes Wownero solo mining issue).
+
+# v6.19.1
+- Resolved deprecated methods warnings with OpenSSL 3.0.
+- [#3213](https://github.com/xmrig/xmrig/pull/3213) Fixed build with 32-bit clang 15.
+- [#3218](https://github.com/xmrig/xmrig/pull/3218) Fixed: `--randomx-wrmsr=-1` worked only on Intel.
+- [#3228](https://github.com/xmrig/xmrig/pull/3228) Fixed build with gcc 13.
+
+# v6.19.0
+- [#3144](https://github.com/xmrig/xmrig/pull/3144) Update to latest `sse2neon.h`.
+- [#3161](https://github.com/xmrig/xmrig/pull/3161) MSVC build: enabled parallel compilation.
+- [#3163](https://github.com/xmrig/xmrig/pull/3163) Improved Zen 3 MSR mod.
+- [#3176](https://github.com/xmrig/xmrig/pull/3176) Update cmake required version to 3.1.
+- [#3182](https://github.com/xmrig/xmrig/pull/3182) DragonflyBSD compilation fixes.
+- [#3196](https://github.com/xmrig/xmrig/pull/3196) Show IP address for failed connections.
+- [#3185](https://github.com/xmrig/xmrig/issues/3185) Fixed macOS DMI reader.
+- [#3198](https://github.com/xmrig/xmrig/pull/3198) Fixed broken RandomX light mode mining.
+- [#3202](https://github.com/xmrig/xmrig/pull/3202) Solo mining: added job timeout (default is 15 seconds).
+
+# v6.18.1
+- [#3129](https://github.com/xmrig/xmrig/pull/3129) Fix: protectRX flushed CPU cache only on MacOS/iOS.
+- [#3126](https://github.com/xmrig/xmrig/pull/3126) Don't reset when pool sends the same job blob.
+- [#3120](https://github.com/xmrig/xmrig/pull/3120) RandomX: optimized `CFROUND` elimination.
+- [#3109](https://github.com/xmrig/xmrig/pull/3109) RandomX: added Blake2 AVX2 version.
+- [#3082](https://github.com/xmrig/xmrig/pull/3082) Fixed GCC 12 warnings.
+- [#3075](https://github.com/xmrig/xmrig/pull/3075) Recognize `armv7ve` as valid ARMv7 target.
+- [#3132](https://github.com/xmrig/xmrig/pull/3132) RandomX: added MSR mod for Zen 4.
+- [#3134](https://github.com/xmrig/xmrig/pull/3134) Added Zen4 to `randomx_boost.sh`.
+
+# v6.18.0
+- [#3067](https://github.com/xmrig/xmrig/pull/3067) Monero v15 network upgrade support and more house keeping.
+  - Removed deprecated AstroBWTv1 and v2.
+  - Fixed debug GhostRider build.
+  - Monero v15 network upgrade support.
+  - Fixed ZMQ debug log.
+  - Improved daemon ZMQ mining stability.
+- [#3054](https://github.com/xmrig/xmrig/pull/3054) Fixes for 32-bit ARM.
+- [#3042](https://github.com/xmrig/xmrig/pull/3042) Fixed being unable to resume from `pause-on-battery`.
+- [#3031](https://github.com/xmrig/xmrig/pull/3031) Fixed `--cpu-priority` not working sometimes.
+- [#3020](https://github.com/xmrig/xmrig/pull/3020) Removed old AstroBWT algorithm.
+
+# v6.17.0
+- [#2954](https://github.com/xmrig/xmrig/pull/2954) **Dero HE fork support (`astrobwt/v2` algorithm).**
+  - [#2961](https://github.com/xmrig/xmrig/pull/2961) Dero HE (`astrobwt/v2`) CUDA config generator.
+  - [#2969](https://github.com/xmrig/xmrig/pull/2969) Dero HE (`astrobwt/v2`) OpenCL support.
+- Fixed displayed DMI memory information for empty slots.
+- [#2932](https://github.com/xmrig/xmrig/pull/2932) Fixed GhostRider with hwloc disabled.
+
+# v6.16.4
+- [#2904](https://github.com/xmrig/xmrig/pull/2904) Fixed unaligned memory accesses.
+- [#2908](https://github.com/xmrig/xmrig/pull/2908) Added MSVC/2022 to `version.h`.
+- [#2910](https://github.com/xmrig/xmrig/issues/2910) Fixed donation for GhostRider/RTM.
+
 # v6.16.3
 - [#2778](https://github.com/xmrig/xmrig/pull/2778) Fixed `READY threads X/X` display after algorithm switching.
 - [#2782](https://github.com/xmrig/xmrig/pull/2782) Updated GhostRider documentation.

CMakeLists.txt

@@ -1,4 +1,4 @@
-cmake_minimum_required(VERSION 2.8.12)
+cmake_minimum_required(VERSION 3.1)
 project(xmrig)
 
 option(WITH_HWLOC           "Enable hwloc support" ON)
@@ -6,9 +6,9 @@ option(WITH_CN_LITE         "Enable CryptoNight-Lite algorithms family" ON)
 option(WITH_CN_HEAVY        "Enable CryptoNight-Heavy algorithms family" ON)
 option(WITH_CN_PICO         "Enable CryptoNight-Pico algorithm" ON)
 option(WITH_CN_FEMTO        "Enable CryptoNight-UPX2 algorithm" ON)
+option(WITH_CN_GPU          "Enable CryptoNight-GPU algorithm" ON)
 option(WITH_RANDOMX         "Enable RandomX algorithms family" ON)
 option(WITH_ARGON2          "Enable Argon2 algorithms family" ON)
-option(WITH_ASTROBWT        "Enable AstroBWT algorithms family" ON)
 option(WITH_KAWPOW          "Enable KawPow algorithms family" ON)
 option(WITH_GHOSTRIDER      "Enable GhostRider algorithm" ON)
 option(WITH_HTTP            "Enable HTTP protocol support (client/server)" ON)
@@ -26,15 +26,18 @@ option(WITH_NVML            "Enable NVML (NVIDIA Management Library) support (on
 option(WITH_ADL             "Enable ADL (AMD Display Library) or sysfs support (only if OpenCL backend enabled)" ON)
 option(WITH_STRICT_CACHE    "Enable strict checks for OpenCL cache" ON)
 option(WITH_INTERLEAVE_DEBUG_LOG "Enable debug log for threads interleave" OFF)
+option(WITH_MO_BENCHMARK    "Enable Benchmark module and algo-perf feature (for MoneroOcean)" ON)
 option(WITH_PROFILING       "Enable profiling for developers" OFF)
 option(WITH_SSE4_1          "Enable SSE 4.1 for Blake2" ON)
+option(WITH_AVX2            "Enable AVX2 for Blake2" ON)
 option(WITH_VAES            "Enable VAES instructions for Cryptonight" ON)
 option(WITH_BENCHMARK       "Enable builtin RandomX benchmark and stress test" ON)
 option(WITH_SECURE_JIT      "Enable secure access to JIT memory" OFF)
 option(WITH_DMI             "Enable DMI/SMBIOS reader" ON)
 
 option(BUILD_STATIC         "Build static binary" OFF)
-option(ARM_TARGET           "Force use specific ARM target 8 or 7" 0)
+option(ARM_V8               "Force ARMv8 (64 bit) architecture, use with caution if automatic detection fails, but you sure it may work" OFF)
+option(ARM_V7               "Force ARMv7 (32 bit) architecture, use with caution if automatic detection fails, but you sure it may work" OFF)
 option(HWLOC_DEBUG          "Enable hwloc debug helpers and log" OFF)
 
 
@@ -130,6 +133,13 @@ set(SOURCES_CRYPTO
     src/crypto/common/VirtualMemory.cpp
    )
 
+if (WITH_MO_BENCHMARK)
+    list(APPEND SOURCES
+        src/core/MoBenchmark.cpp
+        )
+    add_definitions(/DXMRIG_FEATURE_MO_BENCHMARK)
+endif()
+
 if (CMAKE_C_COMPILER_ID MATCHES GNU)
     set_source_files_properties(src/crypto/cn/CnHash.cpp PROPERTIES COMPILE_FLAGS "-Ofast -fno-tree-vectorize")
 endif()
@@ -197,9 +207,9 @@ add_definitions(-D__STDC_FORMAT_MACROS -DUNICODE -D_FILE_OFFSET_BITS=64)
 find_package(UV REQUIRED)
 
 include(cmake/flags.cmake)
+include(cmake/cn-gpu.cmake)
 include(cmake/randomx.cmake)
 include(cmake/argon2.cmake)
-include(cmake/astrobwt.cmake)
 include(cmake/kawpow.cmake)
 include(cmake/ghostrider.cmake)
 include(cmake/OpenSSL.cmake)

README.md

@@ -1,21 +1,21 @@
 # XMRig
 
-[![Github All Releases](https://img.shields.io/github/downloads/xmrig/xmrig/total.svg)](https://github.com/xmrig/xmrig/releases)
-[![GitHub release](https://img.shields.io/github/release/xmrig/xmrig/all.svg)](https://github.com/xmrig/xmrig/releases)
-[![GitHub Release Date](https://img.shields.io/github/release-date/xmrig/xmrig.svg)](https://github.com/xmrig/xmrig/releases)
-[![GitHub license](https://img.shields.io/github/license/xmrig/xmrig.svg)](https://github.com/xmrig/xmrig/blob/master/LICENSE)
-[![GitHub stars](https://img.shields.io/github/stars/xmrig/xmrig.svg)](https://github.com/xmrig/xmrig/stargazers)
-[![GitHub forks](https://img.shields.io/github/forks/xmrig/xmrig.svg)](https://github.com/xmrig/xmrig/network)
+[![Github All Releases](https://img.shields.io/github/downloads/xmrig/xmrig/total.svg)](https://github.com/MoneroOcean/xmrig/releases)
+[![GitHub release](https://img.shields.io/github/release/xmrig/xmrig/all.svg)](https://github.com/MoneroOcean/xmrig/releases)
+[![GitHub Release Date](https://img.shields.io/github/release-date/xmrig/xmrig.svg)](https://github.com/MoneroOcean/xmrig/releases)
+[![GitHub license](https://img.shields.io/github/license/xmrig/xmrig.svg)](https://github.com/MoneroOcean/xmrig/blob/master/LICENSE)
+[![GitHub stars](https://img.shields.io/github/stars/xmrig/xmrig.svg)](https://github.com/MoneroOcean/xmrig/stargazers)
+[![GitHub forks](https://img.shields.io/github/forks/xmrig/xmrig.svg)](https://github.com/MoneroOcean/xmrig/network)
 
-XMRig is a high performance, open source, cross platform RandomX, KawPow, CryptoNight, AstroBWT and [GhostRider](https://github.com/xmrig/xmrig/tree/master/src/crypto/ghostrider#readme) unified CPU/GPU miner and [RandomX benchmark](https://xmrig.com/benchmark). Official binaries are available for Windows, Linux, macOS and FreeBSD.
+XMRig is a high performance, open source, cross platform RandomX, KawPow, CryptoNight and [GhostRider](https://github.com/xmrig/xmrig/tree/master/src/crypto/ghostrider#readme) unified CPU/GPU miner and [RandomX benchmark](https://xmrig.com/benchmark). Official binaries are available for Windows, Linux, macOS and FreeBSD.
 
 ## Mining backends
-- **CPU** (x64/ARMv8)
+- **CPU** (x86/x64/ARMv7/ARMv8)
 - **OpenCL** for AMD GPUs.
-- **CUDA** for NVIDIA GPUs via external [CUDA plugin](https://github.com/xmrig/xmrig-cuda).
+- **CUDA** for NVIDIA GPUs via external [CUDA plugin](https://github.com/MoneroOcean/xmrig-cuda).
 
 ## Download
-* **[Binary releases](https://github.com/xmrig/xmrig/releases)**
+* **[Binary releases](https://github.com/MoneroOcean/xmrig/releases)**
 * **[Build from source](https://xmrig.com/docs/miner/build)**
 
 ## Usage

cmake/astrobwt.cmake

@@ -1,51 +0,0 @@
-if (WITH_ASTROBWT)
-    add_definitions(/DXMRIG_ALGO_ASTROBWT)
-
-    list(APPEND HEADERS_CRYPTO
-        src/crypto/astrobwt/AstroBWT.h
-    )
-
-    list(APPEND SOURCES_CRYPTO
-        src/crypto/astrobwt/AstroBWT.cpp
-    )
-
-    if (XMRIG_ARM)
-        list(APPEND HEADERS_CRYPTO
-            src/crypto/astrobwt/salsa20_ref/ecrypt-config.h
-            src/crypto/astrobwt/salsa20_ref/ecrypt-machine.h
-            src/crypto/astrobwt/salsa20_ref/ecrypt-portable.h
-            src/crypto/astrobwt/salsa20_ref/ecrypt-sync.h
-        )
-
-        list(APPEND SOURCES_CRYPTO
-            src/crypto/astrobwt/salsa20_ref/salsa20.c
-        )
-    else()
-        if (CMAKE_SIZEOF_VOID_P EQUAL 8)
-            add_definitions(/DASTROBWT_AVX2)
-            list(APPEND SOURCES_CRYPTO src/crypto/astrobwt/xmm6int/salsa20_xmm6int-avx2.c)
-
-            if (CMAKE_C_COMPILER_ID MATCHES GNU OR CMAKE_C_COMPILER_ID MATCHES Clang)
-                set_source_files_properties(src/crypto/astrobwt/xmm6int/salsa20_xmm6int-avx2.c PROPERTIES COMPILE_FLAGS -mavx2)
-            endif()
-
-            if (CMAKE_C_COMPILER_ID MATCHES MSVC)
-                enable_language(ASM_MASM)
-                list(APPEND SOURCES_CRYPTO src/crypto/astrobwt/sha3_256_avx2.asm)
-            else()
-                enable_language(ASM)
-                list(APPEND SOURCES_CRYPTO src/crypto/astrobwt/sha3_256_avx2.S)
-            endif()
-        endif()
-
-        list(APPEND HEADERS_CRYPTO
-            src/crypto/astrobwt/Salsa20.hpp
-        )
-
-        list(APPEND SOURCES_CRYPTO
-            src/crypto/astrobwt/Salsa20.cpp
-        )
-    endif()
-else()
-    remove_definitions(/DXMRIG_ALGO_ASTROBWT)
-endif()

cmake/cn-gpu.cmake

@@ -0,0 +1,31 @@
+if (WITH_CN_GPU AND CMAKE_SIZEOF_VOID_P EQUAL 8)
+    add_definitions(/DXMRIG_ALGO_CN_GPU)
+
+    if (XMRIG_ARM)
+        list(APPEND SOURCES_CRYPTO
+            src/crypto/cn/gpu/cn_gpu_arm.cpp
+        )
+
+        if (CMAKE_CXX_COMPILER_ID MATCHES GNU OR CMAKE_CXX_COMPILER_ID MATCHES Clang)
+            set_source_files_properties(src/crypto/cn/gpu/cn_gpu_arm.cpp PROPERTIES COMPILE_FLAGS "-O3")
+        endif()
+    else()
+        list(APPEND SOURCES_CRYPTO
+            src/crypto/cn/gpu/cn_gpu_avx.cpp
+            src/crypto/cn/gpu/cn_gpu_ssse3.cpp
+        )
+
+        if (CMAKE_CXX_COMPILER_ID MATCHES GNU OR CMAKE_CXX_COMPILER_ID MATCHES Clang)
+            set_source_files_properties(src/crypto/cn/gpu/cn_gpu_avx.cpp PROPERTIES COMPILE_FLAGS "-O3 -mavx2")
+            set_source_files_properties(src/crypto/cn/gpu/cn_gpu_ssse3.cpp PROPERTIES COMPILE_FLAGS "-O3")
+        elseif (CMAKE_CXX_COMPILER_ID MATCHES Intel)
+            set_source_files_properties(src/crypto/cn/gpu/cn_gpu_avx.cpp PROPERTIES COMPILE_FLAGS "-O3 -mavx2")
+            set_source_files_properties(src/crypto/cn/gpu/cn_gpu_ssse3.cpp PROPERTIES COMPILE_FLAGS "-O1")
+        elseif (CMAKE_CXX_COMPILER_ID MATCHES MSVC)
+            set_source_files_properties(src/crypto/cn/gpu/cn_gpu_avx.cpp PROPERTIES COMPILE_FLAGS "/arch:AVX")
+        endif()
+    endif()
+
+else()
+    remove_definitions(/DXMRIG_ALGO_CN_GPU)
+endif()

cmake/cpu.cmake

@@ -25,13 +25,20 @@ if (XMRIG_64_BIT AND CMAKE_SYSTEM_PROCESSOR MATCHES "^(x86_64|AMD64)$")
     add_definitions(-DRAPIDJSON_SSE2)
 else()
     set(WITH_SSE4_1 OFF)
+    set(WITH_AVX2 OFF)
     set(WITH_VAES OFF)
 endif()
 
+if (ARM_V8)
+    set(ARM_TARGET 8)
+elseif (ARM_V7)
+    set(ARM_TARGET 7)
+endif()
+
 if (NOT ARM_TARGET)
     if (CMAKE_SYSTEM_PROCESSOR MATCHES "^(aarch64|arm64|armv8-a)$")
         set(ARM_TARGET 8)
-    elseif (CMAKE_SYSTEM_PROCESSOR MATCHES "^(armv7|armv7f|armv7s|armv7k|armv7-a|armv7l)$")
+    elseif (CMAKE_SYSTEM_PROCESSOR MATCHES "^(armv7|armv7f|armv7s|armv7k|armv7-a|armv7l|armv7ve)$")
         set(ARM_TARGET 7)
     endif()
 endif()
@@ -57,3 +64,7 @@ endif()
 if (WITH_SSE4_1)
     add_definitions(-DXMRIG_FEATURE_SSE4_1)
 endif()
+
+if (WITH_AVX2)
+    add_definitions(-DXMRIG_FEATURE_AVX2)
+endif()

cmake/flags.cmake

@@ -10,7 +10,7 @@ if ("${CMAKE_BUILD_TYPE}" STREQUAL "")
 endif()
 
 if (CMAKE_BUILD_TYPE STREQUAL "Release")
-    add_definitions(/DNDEBUG)
+    add_definitions(-DNDEBUG)
 endif()
 
 include(CheckSymbolExists)
@@ -26,13 +26,13 @@ if (CMAKE_CXX_COMPILER_ID MATCHES GNU)
         set(CMAKE_C_FLAGS "${CMAKE_C_FLAGS} ${ARM8_CXX_FLAGS}")
         set(CMAKE_CXX_FLAGS "${CMAKE_CXX_FLAGS} ${ARM8_CXX_FLAGS} -flax-vector-conversions")
     elseif (ARM_TARGET EQUAL 7)
-        set(CMAKE_C_FLAGS "${CMAKE_C_FLAGS} -mfpu=neon")
-        set(CMAKE_CXX_FLAGS "${CMAKE_CXX_FLAGS} -mfpu=neon -flax-vector-conversions")
+        set(CMAKE_C_FLAGS "${CMAKE_C_FLAGS} -march=armv7-a -mfpu=neon")
+        set(CMAKE_CXX_FLAGS "${CMAKE_CXX_FLAGS} -march=armv7-a -mfpu=neon -flax-vector-conversions")
     else()
         set(CMAKE_C_FLAGS "${CMAKE_C_FLAGS} -maes")
         set(CMAKE_CXX_FLAGS "${CMAKE_CXX_FLAGS} -maes")
 
-        add_definitions(/DHAVE_ROTR)
+        add_definitions(-DHAVE_ROTR)
     endif()
 
     if (WIN32)
@@ -49,28 +49,16 @@ if (CMAKE_CXX_COMPILER_ID MATCHES GNU)
         set(CMAKE_EXE_LINKER_FLAGS "${CMAKE_EXE_LINKER_FLAGS} -static")
     endif()
 
-    add_definitions(/D_GNU_SOURCE)
-
-    if (${CMAKE_VERSION} VERSION_LESS "3.1.0")
-        set(CMAKE_C_FLAGS "${CMAKE_C_FLAGS} -std=c99")
-        set(CMAKE_CXX_FLAGS "${CMAKE_CXX_FLAGS} -std=c++11")
-    endif()
-
-    #set(CMAKE_C_FLAGS_RELEASE "${CMAKE_CXX_FLAGS_RELEASE} -gdwarf-2")
-
-    add_definitions(/DHAVE_BUILTIN_CLEAR_CACHE)
+    add_definitions(-D_GNU_SOURCE -DHAVE_BUILTIN_CLEAR_CACHE)
 
 elseif (CMAKE_CXX_COMPILER_ID MATCHES MSVC)
-    set(CMAKE_C_FLAGS_RELEASE "/MT /O2 /Oi /DNDEBUG /GL")
-    set(CMAKE_CXX_FLAGS_RELEASE "/MT /O2 /Oi /DNDEBUG /GL")
+    set(CMAKE_C_FLAGS_RELEASE "/MP /MT /O2 /Oi /DNDEBUG /GL")
+    set(CMAKE_CXX_FLAGS_RELEASE "/MP /MT /O2 /Oi /DNDEBUG /GL")
 
-    set(CMAKE_C_FLAGS_RELWITHDEBINFO "/Ob1 /Zi /DRELWITHDEBINFO")
-    set(CMAKE_CXX_FLAGS_RELWITHDEBINFO "/Ob1 /Zi /DRELWITHDEBINFO")
+    set(CMAKE_C_FLAGS_RELWITHDEBINFO "/MP /Ob1 /Zi /DRELWITHDEBINFO")
+    set(CMAKE_CXX_FLAGS_RELWITHDEBINFO "/MP /Ob1 /Zi /DRELWITHDEBINFO")
 
-    add_definitions(/D_CRT_SECURE_NO_WARNINGS)
-    add_definitions(/D_CRT_NONSTDC_NO_WARNINGS)
-    add_definitions(/DNOMINMAX)
-    add_definitions(/DHAVE_ROTR)
+    add_definitions(-D_CRT_SECURE_NO_WARNINGS -D_CRT_NONSTDC_NO_WARNINGS -DNOMINMAX -DHAVE_ROTR)
 
 elseif (CMAKE_CXX_COMPILER_ID MATCHES Clang)
 
@@ -92,7 +80,7 @@ elseif (CMAKE_CXX_COMPILER_ID MATCHES Clang)
 
         check_symbol_exists("_rotr" "x86intrin.h" HAVE_ROTR)
         if (HAVE_ROTR)
-            add_definitions(/DHAVE_ROTR)
+            add_definitions(-DHAVE_ROTR)
         endif()
     endif()
 
@@ -105,6 +93,6 @@ endif()
 if (NOT WIN32)
     check_symbol_exists("__builtin___clear_cache" "stdlib.h" HAVE_BUILTIN_CLEAR_CACHE)
     if (HAVE_BUILTIN_CLEAR_CACHE)
-        add_definitions(/DHAVE_BUILTIN_CLEAR_CACHE)
+        add_definitions(-DHAVE_BUILTIN_CLEAR_CACHE)
     endif()
 endif()

cmake/os.cmake

@@ -15,7 +15,7 @@ else()
         set(XMRIG_OS_ANDROID ON)
     elseif(CMAKE_SYSTEM_NAME MATCHES "Linux")
         set(XMRIG_OS_LINUX ON)
-    elseif(CMAKE_SYSTEM_NAME STREQUAL FreeBSD)
+    elseif(CMAKE_SYSTEM_NAME STREQUAL FreeBSD OR CMAKE_SYSTEM_NAME STREQUAL DragonFly)
         set(XMRIG_OS_FREEBSD ON)
     endif()
 endif()

cmake/randomx.cmake

@@ -40,6 +40,13 @@ if (WITH_RANDOMX)
         src/crypto/rx/RxDataset.cpp
         src/crypto/rx/RxQueue.cpp
         src/crypto/rx/RxVm.cpp
+		
+		### Removed useless includes		
+		src/crypto/randomx/panthera/sha256.c
+		src/crypto/randomx/panthera/KangarooTwelve.c
+		src/crypto/randomx/panthera/KeccakP-1600-reference.c
+		src/crypto/randomx/panthera/KeccakSpongeWidth1600.c
+		src/crypto/randomx/panthera/yespower-opt.c
     )
 
     if (WITH_ASM AND CMAKE_C_COMPILER_ID MATCHES MSVC)
@@ -76,7 +83,15 @@ if (WITH_RANDOMX)
         list(APPEND SOURCES_CRYPTO src/crypto/randomx/blake2/blake2b_sse41.c)
 
         if (CMAKE_C_COMPILER_ID MATCHES GNU OR CMAKE_C_COMPILER_ID MATCHES Clang)
-            set_source_files_properties(src/crypto/randomx/blake2/blake2b_sse41.c PROPERTIES COMPILE_FLAGS -msse4.1)
+            set_source_files_properties(src/crypto/randomx/blake2/blake2b_sse41.c PROPERTIES COMPILE_FLAGS "-Ofast -msse4.1")
+        endif()
+    endif()
+
+    if (WITH_AVX2)
+        list(APPEND SOURCES_CRYPTO src/crypto/randomx/blake2/avx2/blake2b_avx2.c)
+
+        if (CMAKE_C_COMPILER_ID MATCHES GNU OR CMAKE_C_COMPILER_ID MATCHES Clang)
+            set_source_files_properties(src/crypto/randomx/blake2/avx2/blake2b_avx2.c PROPERTIES COMPILE_FLAGS "-Ofast -mavx2")
         endif()
     endif()
 

doc/ALGORITHMS.md

@@ -28,6 +28,7 @@ Option `coin` useful for pools without [algorithm negotiation](https://xmrig.com
 | `cn/zls` | 2 MB | 2.14.0+ | CryptoNight variant 2 with 3/4 iterations. |  |
 | `cn/double` | 2 MB | 2.14.0+ | CryptoNight variant 2 with double iterations. |  |
 | `cn/r` | 2 MB | 2.13.0+ | CryptoNightR (Monero's variant 4). |  |
+| `cn/gpu` | 2 MB | 2.11.0+ | CryptoNight-GPU. |  |
 | `cn-pico` | 256 KB | 2.10.0+ | CryptoNight-Pico. |  |
 | `cn/half` | 2 MB | 2.9.0+ | CryptoNight variant 2 with half iterations. |  |
 | `cn/2` | 2 MB | 2.8.0+ | CryptoNight variant 2. |  |

doc/build/CMAKE_OPTIONS.md

@@ -6,6 +6,7 @@
 * **`-DWITH_CN_LITE=OFF`** disable all CryptoNight-Lite algorithms (`cn-lite/0`, `cn-lite/1`).
 * **`-DWITH_CN_HEAVY=OFF`** disable all CryptoNight-Heavy algorithms (`cn-heavy/0`, `cn-heavy/xhv`, `cn-heavy/tube`).
 * **`-DWITH_CN_PICO=OFF`** disable CryptoNight-Pico algorithm (`cn-pico`).
+* **`-DWITH_CN_GPU=OFF`** disable CryptoNight-GPU algorithm (`cn/gpu`).
 * **`-DWITH_RANDOMX=OFF`** disable RandomX algorithms (`rx/loki`, `rx/wow`).
 * **`-DWITH_ARGON2=OFF`** disable Argon2 algorithms (`argon2/chukwa`, `argon2/wrkz`).
 

scripts/benchmark_10M.cmd

@@ -1,4 +1,4 @@
 @echo off
-cd %~dp0
+cd /d "%~dp0"
 xmrig.exe --bench=10M --submit
 pause

scripts/benchmark_1M.cmd

@@ -1,4 +1,4 @@
 @echo off
-cd %~dp0
+cd /d "%~dp0"
 xmrig.exe --bench=1M --submit
 pause

scripts/build.hwloc.sh

@@ -1,6 +1,10 @@
 #!/bin/bash -e
 
-HWLOC_VERSION="2.5.0"
+HWLOC_VERSION_MAJOR="2"
+HWLOC_VERSION_MINOR="9"
+HWLOC_VERSION_PATCH="0"
+
+HWLOC_VERSION="${HWLOC_VERSION_MAJOR}.${HWLOC_VERSION_MINOR}.${HWLOC_VERSION_PATCH}"
 
 mkdir -p deps
 mkdir -p deps/include
@@ -8,7 +12,7 @@ mkdir -p deps/lib
 
 mkdir -p build && cd build
 
-wget https://download.open-mpi.org/release/hwloc/v2.5/hwloc-${HWLOC_VERSION}.tar.gz -O hwloc-${HWLOC_VERSION}.tar.gz
+wget https://download.open-mpi.org/release/hwloc/v${HWLOC_VERSION_MAJOR}.${HWLOC_VERSION_MINOR}/hwloc-${HWLOC_VERSION}.tar.gz -O hwloc-${HWLOC_VERSION}.tar.gz
 tar -xzf hwloc-${HWLOC_VERSION}.tar.gz
 
 cd hwloc-${HWLOC_VERSION}
@@ -16,4 +20,4 @@ cd hwloc-${HWLOC_VERSION}
 make -j$(nproc || sysctl -n hw.ncpu || sysctl -n hw.logicalcpu)
 cp -fr include ../../deps
 cp hwloc/.libs/libhwloc.a ../../deps/lib
-cd ..
+cd ..

scripts/build.libressl.sh

@@ -1,6 +1,6 @@
 #!/bin/bash -e
 
-LIBRESSL_VERSION="3.0.2"
+LIBRESSL_VERSION="3.5.2"
 
 mkdir -p deps
 mkdir -p deps/include
@@ -17,4 +17,4 @@ make -j$(nproc || sysctl -n hw.ncpu || sysctl -n hw.logicalcpu)
 cp -fr include ../../deps
 cp crypto/.libs/libcrypto.a ../../deps/lib
 cp ssl/.libs/libssl.a ../../deps/lib
-cd ..
+cd ..

scripts/build.openssl.sh

@@ -1,6 +1,6 @@
 #!/bin/bash -e
 
-OPENSSL_VERSION="1.1.1l"
+OPENSSL_VERSION="1.1.1s"
 
 mkdir -p deps
 mkdir -p deps/include
@@ -8,7 +8,7 @@ mkdir -p deps/lib
 
 mkdir -p build && cd build
 
-wget https://www.openssl.org/source/openssl-${OPENSSL_VERSION}.tar.gz -O openssl-${OPENSSL_VERSION}.tar.gz
+wget --no-check-certificate https://www.openssl.org/source/openssl-${OPENSSL_VERSION}.tar.gz -O openssl-${OPENSSL_VERSION}.tar.gz
 tar -xzf openssl-${OPENSSL_VERSION}.tar.gz
 
 cd openssl-${OPENSSL_VERSION}

scripts/build.openssl3.sh

@@ -0,0 +1,20 @@
+#!/bin/bash -e
+
+OPENSSL_VERSION="3.0.7"
+
+mkdir -p deps
+mkdir -p deps/include
+mkdir -p deps/lib
+
+mkdir -p build && cd build
+
+wget https://www.openssl.org/source/openssl-${OPENSSL_VERSION}.tar.gz -O openssl-${OPENSSL_VERSION}.tar.gz
+tar -xzf openssl-${OPENSSL_VERSION}.tar.gz
+
+cd openssl-${OPENSSL_VERSION}
+./config -no-shared -no-asm -no-zlib -no-comp -no-dgram -no-filenames -no-cms
+make -j$(nproc || sysctl -n hw.ncpu || sysctl -n hw.logicalcpu)
+cp -fr include ../../deps
+cp libcrypto.a ../../deps/lib
+cp libssl.a ../../deps/lib
+cd ..

scripts/build.uv.sh

@@ -1,6 +1,6 @@
 #!/bin/bash -e
 
-UV_VERSION="1.42.0"
+UV_VERSION="1.44.2"
 
 mkdir -p deps
 mkdir -p deps/include
@@ -17,4 +17,4 @@ sh autogen.sh
 make -j$(nproc || sysctl -n hw.ncpu || sysctl -n hw.logicalcpu)
 cp -fr include ../../deps
 cp .libs/libuv.a ../../deps/lib
-cd ..
+cd ..

scripts/generate_cl.js

@@ -67,15 +67,6 @@ function rx()
 }
 
 
-function astrobwt()
-{
-    const astrobwt = opencl_minify(addIncludes('astrobwt.cl', [ 'BWT.cl', 'salsa20.cl', 'sha3.cl' ]));
-
-    // fs.writeFileSync('astrobwt_gen.cl', astrobwt);
-    fs.writeFileSync('astrobwt_cl.h', text2h(astrobwt, 'xmrig', 'astrobwt_cl'));
-}
-
-
 function kawpow()
 {
     const kawpow = opencl_minify(addIncludes('kawpow.cl', [ 'defs.h' ]));
@@ -87,21 +78,26 @@ function kawpow()
 }
 
 
+function cn_gpu()
+{
+    const cn_gpu = opencl_minify(addIncludes('cryptonight_gpu.cl', [ 'wolf-aes.cl', 'keccak.cl' ]));
+
+    // fs.writeFileSync('cryptonight_gpu_gen.cl', cn_gpu);
+    fs.writeFileSync('cryptonight_gpu_cl.h', text2h(cn_gpu, 'xmrig', 'cryptonight_gpu_cl'));
+}
+
+
 process.chdir(path.resolve('src/backend/opencl/cl/cn'));
 
 cn();
 cn_r();
+cn_gpu();
 
 process.chdir(cwd);
 process.chdir(path.resolve('src/backend/opencl/cl/rx'));
 
 rx();
 
-process.chdir(cwd);
-process.chdir(path.resolve('src/backend/opencl/cl/astrobwt'));
-
-astrobwt();
-
 process.chdir(cwd);
 process.chdir(path.resolve('src/backend/opencl/cl/kawpow'));
 

scripts/pool_mine_example.cmd

@@ -15,6 +15,6 @@
 :: Choose pools outside of top 5 to help Monero network be more decentralized!
 :: Smaller pools also often have smaller fees/payout limits.
 
-cd %~dp0
-xmrig.exe -o pool.hashvault.pro:3333 -u 48edfHu7V9Z84YzzMa6fUueoELZ9ZRXq9VetWzYGzKt52XU5xvqgzYnDK9URnRoJMk1j8nLwEVsaSWJ4fhdUyZijBGUicoD -p x
+cd /d "%~dp0"
+xmrig.exe -o xmrpool.eu:3333 -u 48edfHu7V9Z84YzzMa6fUueoELZ9ZRXq9VetWzYGzKt52XU5xvqgzYnDK9URnRoJMk1j8nLwEVsaSWJ4fhdUyZijBGUicoD -p x
 pause

scripts/randomx_boost.sh

@@ -10,14 +10,24 @@ fi
 
 if grep -E 'AMD Ryzen|AMD EPYC' /proc/cpuinfo > /dev/null;
 	then
-	if grep "cpu family[[:space:]]:[[:space:]]25" /proc/cpuinfo > /dev/null;
+	if grep "cpu family[[:space:]]\{1,\}:[[:space:]]25" /proc/cpuinfo > /dev/null;
 		then
-			echo "Detected Zen3 CPU"
-			wrmsr -a 0xc0011020 0x4480000000000
-			wrmsr -a 0xc0011021 0x1c000200000040
-			wrmsr -a 0xc0011022 0xc000000401500000
-			wrmsr -a 0xc001102b 0x2000cc14
-			echo "MSR register values for Zen3 applied"
+			if grep "model[[:space:]]\{1,\}:[[:space:]]97" /proc/cpuinfo > /dev/null;
+				then
+					echo "Detected Zen4 CPU"
+					wrmsr -a 0xc0011020 0x4400000000000
+					wrmsr -a 0xc0011021 0x4000000000040
+					wrmsr -a 0xc0011022 0x8680000401570000
+					wrmsr -a 0xc001102b 0x2040cc10
+					echo "MSR register values for Zen4 applied"
+				else
+					echo "Detected Zen3 CPU"
+					wrmsr -a 0xc0011020 0x4480000000000
+					wrmsr -a 0xc0011021 0x1c000200000040
+					wrmsr -a 0xc0011022 0xc000000401570000
+					wrmsr -a 0xc001102b 0x2000cc10
+					echo "MSR register values for Zen3 applied"
+				fi
 		else
 			echo "Detected Zen1/Zen2 CPU"
 			wrmsr -a 0xc0011020 0

scripts/rtm_ghostrider_example.cmd

@@ -15,7 +15,7 @@
 :: Choose pools outside of top 5 to help Raptoreum network be more decentralized!
 :: Smaller pools also often have smaller fees/payout limits.
 
-cd %~dp0
+cd /d "%~dp0"
 :: Use this command line to connect to non-SSL port
 xmrig.exe -a gr -o raptoreumemporium.com:3008 -u WALLET_ADDRESS -p x
 :: Or use this command line to connect to an SSL port

scripts/solo_mine_example.cmd

@@ -11,6 +11,6 @@
 :: Mining solo is the best way to help Monero network be more decentralized!
 :: But you will only get a payout when you find a block which can take more than a year for a single low-end PC.
 
-cd %~dp0
-xmrig.exe -o node.xmr.to:18081 -a rx/0 -u 48edfHu7V9Z84YzzMa6fUueoELZ9ZRXq9VetWzYGzKt52XU5xvqgzYnDK9URnRoJMk1j8nLwEVsaSWJ4fhdUyZijBGUicoD --daemon
+cd /d "%~dp0"
+xmrig.exe -o YOUR_NODE_IP:18081 -a rx/0 -u 48edfHu7V9Z84YzzMa6fUueoELZ9ZRXq9VetWzYGzKt52XU5xvqgzYnDK9URnRoJMk1j8nLwEVsaSWJ4fhdUyZijBGUicoD --daemon
 pause

src/3rdparty/argon2/CMakeLists.txt

@@ -1,4 +1,4 @@
-cmake_minimum_required(VERSION 2.8.12)
+cmake_minimum_required(VERSION 3.1)
 
 project(argon2 C)
 set(CMAKE_C_STANDARD 99)

src/3rdparty/hwloc/CMakeLists.txt

@@ -1,4 +1,4 @@
-cmake_minimum_required (VERSION  2.8.12)
+cmake_minimum_required(VERSION 3.1)
 project (hwloc C)
 
 include_directories(include)

src/3rdparty/hwloc/NEWS

@@ -1,5 +1,5 @@
 Copyright © 2009 CNRS
-Copyright © 2009-2021 Inria.  All rights reserved.
+Copyright © 2009-2022 Inria.  All rights reserved.
 Copyright © 2009-2013 Université Bordeaux
 Copyright © 2009-2011 Cisco Systems, Inc.  All rights reserved.
 Copyright © 2020 Hewlett Packard Enterprise.  All rights reserved.
@@ -17,6 +17,132 @@ bug fixes (and other actions) for each version of hwloc since version
 0.9.
 
 
+Version 2.9.0
+-------------
+* Backends
+  + Expose the memory size of CXL memory devices (Type 3) on Linux.
+  + The LevelZero backend now reports the "XeLinkBandwidth" distance
+    matrix between L0 devices (and subdevices) when available.
+  + Add support for CUDA compute capability up to 9.0.
+* Tools
+  + lstopo now switches to console mode when its output is redirected.
+    Graphical window mode may be forced back with --of window.
+  + hwloc-calc now accepts "numa" in -H, and I/O subtypes such as "gpu"
+    in -I and -N.
+
+
+Version 2.8.0
+-------------
+* API
+  + Add HWLOC_TOPOLOGY_FLAG_NO_DISTANCES, _NO_MEMATTRS and _NO_CPUKINDS
+    to reduce the overhead when unneeded.
+  + Add separate Read/Write Bandwidth/Latency memory attributes and
+    implement them on Linux.
+* Backends
+  + NUMA nodes may now have a subtype such as DRAM, HBM, SPM, or NVM
+    on heterogeneous memory platforms on Linux.
+    - Add DAXType and DAXParent attributes on Linux to tell where a
+      DAX device or its corresponding NUMA node come from (SPM for
+      Specific-Purpose or NVM for Non-Volatile Memory).
+  + Detect heterogeneous caches in hybrid CPUs on MacOS X,
+    thanks to Paul Bone for the help.
+  + Max frequencies are not ignored in Linux cpukinds anymore (they were
+    ignored in hwloc 2.7.0), but they may be slightly adjusted to avoid
+    reporting hybrid CPUs because Intel Turbo Boost Max 3.0.
+    - See the documentation of environment variable HWLOC_CPUKINDS_MAXFREQ.
+  + Hardwire the PCI locality of HPE Cray EX235a nodes.
+* Tools
+  + lstopo and other tools may now load Linux and x86 cpuid topology files
+    from a tarball.
+  + lstopo may now replace the P# and L# index prefixes with custom strings
+    thanks to --os-index-prefix and --logical-index-prefix options.
+* Misc
+  + Add --disable-readme to avoid regenerating the top-level hwloc README
+    file from the documentation.
+
+
+Version 2.7.1
+-------------
+* Workaround crashes when virtual machines report incoherent x86 CPUID
+  information about numbers of cores and threads.
+  Thanks to Peter Bense for the report.
+* Use setenv() instead of putenv() when trying to force enable oneAPI L0
+  support, to avoid issues with applications that touch the environment,
+  thanks to Josh Hursey for the patch.
+* Add some warnings at the end of configure when GPU libraries are
+  missing on the system or their path is missing in the environment.
+
+
+Version 2.7.0
+-------------
+* Backends
+  + Add support for NUMA nodes and caches with more than 64 PUs across
+    multiple processor groups on Windows 11 and Windows Server 2022.
+  + Group objects are not created for Windows processor groups anymore,
+    except if HWLOC_WINDOWS_PROCESSOR_GROUP_OBJS=1 in the environment.
+  + Expose "Cluster" group objects on Linux kernel 5.16+ for CPUs
+    that share some internal cache or bus. This can be equivalent
+    to the L2 Cache level on some platforms (e.g. x86) or a specific
+    level between L2 and L3 on others (e.g. ARM Kungpeng 920).
+    Thanks to Jonathan Cameron for the help.
+    - HWLOC_DONT_MERGE_CLUSTER_GROUPS=1 may be set in the environment
+      to prevent these groups from being merged with identical caches, etc.
+  + Improve the oneAPI LevelZero backend:
+    - Expose subdevices such as "ze0.1" inside root OS devices ("ze0")
+      when the hardware contains multiple subdevices.
+    - Add many new attributes to describe device type, and the
+      numbers of slices, subslices, execution units and threads.
+    - Expose the memory information as LevelZeroHBM/DDR/MemorySize infos.
+  + Ignore the max frequencies of cores in Linux cpukinds when the
+    base frequencies are available (to avoid exposing hybrid CPUs
+    when Intel Turbo Boost Max 3.0 gives slightly different max
+    frequencies to CPU cores).
+    - May be reverted by setting HWLOC_CPUKINDS_MAXFREQ=1 in the environment.
+* Tools
+  + Add --grey and --palette options to switch lstopo to greyscale or
+    white-background-only graphics, or to tune individual colors.
+* Build
+  + Windows CMake builds now support non-MSVC compilers, detect several
+    features at build time, can build/run tests, etc.
+    Thanks to Michael Hirsch and Alexander Neumann .
+
+
+Version 2.6.0
+-------------
+* Backends
+  + Expose two cpukinds for energy-efficient cores (icestorm) and
+    high-performance cores (firestorm) on Apple M1 on Mac OS X.
+  + Use sysfs CPU "capacity" to rank hybrid cores by efficiency
+    on Linux when available (mostly on recent ARM platforms for now).
+  + Improve HWLOC_MEMBIND_BIND (without the STRICT flag) on Linux kernel
+    >= 5.15: If more than one node is given, the kernel may now use all
+    of them instead of only the first one before falling back to others.
+  + Expose cache os_index when available on Linux, it may be needed
+    when using resctrl to configure cache partitioning, memory bandwidth
+    monitoring, etc.
+  + Add a "XGMIHops" distances matrix in the RSMI backend for AMD GPU
+    interconnected through XGMI links.
+  + Expose AMD GPU memory information (VRAM and GTT) in the RSMI backend.
+  + Add OS devices such as "bxi0" for Atos/Bull BXI HCAs on Linux.
+* Tools
+  + lstopo has a better placement algorithm with respect to I/O
+    objects, see --children-order in the manpage for details.
+  + hwloc-annotate may now change object subtypes and cache or memory
+    sizes.
+* Build
+  + Allow to specify the ROCm installation for building the RSMI backend:
+    - Use a custom installation path if specified with --with-rocm=<dir>.
+    - Use /opt/rocm-<version> if specified with --with-rocm-version=<version>
+      or the ROCM_VERSION environment variable.
+    - Try /opt/rocm if it exists.
+    - See "How do I enable ROCm SMI and select which version to use?"
+      in the FAQ for details.
+  + Add a CMakeLists for Windows under contrib/windows-cmake/ .
+* Documentation
+  + Add FAQ entry "How do I create a custom heterogeneous and
+     asymmetric topology?"
+
+
 Version 2.5.0
 -------------
 * API

src/3rdparty/hwloc/README

@@ -78,7 +78,7 @@ debug and report issues.
 Questions may be sent to the users or developers mailing lists (https://
 www.open-mpi.org/community/lists/hwloc.php).
 
-There is also a #hwloc IRC channel on Freenode (irc.freenode.net).
+There is also a #hwloc IRC channel on Libera Chat (irc.libera.chat).
 
 
 

src/3rdparty/hwloc/VERSION

@@ -8,7 +8,7 @@
 # Please update HWLOC_VERSION* in contrib/windows/hwloc_config.h too.
 
 major=2
-minor=5
+minor=9
 release=0
 
 # greek is used for alpha or beta release tags.  If it is non-empty,
@@ -22,7 +22,7 @@ greek=
 
 # The date when this release was created
 
-date="Jun 14, 2021"
+date="Dec 14, 2022"
 
 # If snapshot=1, then use the value from snapshot_version as the
 # entire hwloc version (i.e., ignore major, minor, release, and
@@ -41,7 +41,7 @@ snapshot_version=${major}.${minor}.${release}${greek}-git
 # 2. Version numbers are described in the Libtool current:revision:age
 # format.
 
-libhwloc_so_version=20:0:5
+libhwloc_so_version=21:1:6
 libnetloc_so_version=0:0:0
 
 # Please also update the <TargetName> lines in contrib/windows/libhwloc.vcxproj

src/3rdparty/hwloc/include/hwloc.h

@@ -1,6 +1,6 @@
 /*
  * Copyright © 2009 CNRS
- * Copyright © 2009-2021 Inria.  All rights reserved.
+ * Copyright © 2009-2022 Inria.  All rights reserved.
  * Copyright © 2009-2012 Université Bordeaux
  * Copyright © 2009-2020 Cisco Systems, Inc.  All rights reserved.
  * See COPYING in top-level directory.
@@ -29,7 +29,7 @@
  * THAT IS IN THE PDF/HTML THAT IS ***NOT*** IN hwloc.h!
  *
  * There are entire paragraph-length descriptions, discussions, and
- * pretty prictures to explain subtle corner cases, provide concrete
+ * pretty pictures to explain subtle corner cases, provide concrete
  * examples, etc.
  *
  * Please, go read the documentation.  :-)
@@ -93,7 +93,7 @@ extern "C" {
  * Two stable releases of the same series usually have the same ::HWLOC_API_VERSION
  * even if their HWLOC_VERSION are different.
  */
-#define HWLOC_API_VERSION 0x00020500
+#define HWLOC_API_VERSION 0x00020800
 
 /** \brief Indicate at runtime which hwloc API version was used at build time.
  *
@@ -346,7 +346,8 @@ typedef enum hwloc_obj_osdev_type_e {
 				  * For instance the "eth0" interface on Linux. */
   HWLOC_OBJ_OSDEV_OPENFABRICS,	/**< \brief Operating system openfabrics device.
 				  * For instance the "mlx4_0" InfiniBand HCA,
-				  * or "hfi1_0" Omni-Path interface on Linux. */
+				  * "hfi1_0" Omni-Path interface,
+				  * or "bxi0" Atos/Bull BXI HCA on Linux. */
   HWLOC_OBJ_OSDEV_DMA,		/**< \brief Operating system dma engine device.
 				  * For instance the "dma0chan0" DMA channel on Linux. */
   HWLOC_OBJ_OSDEV_COPROC	/**< \brief Operating system co-processor device.
@@ -516,7 +517,7 @@ struct hwloc_obj {
                                           * objects).
                                           *
                                           * If the ::HWLOC_TOPOLOGY_FLAG_INCLUDE_DISALLOWED configuration flag is set,
-                                          * some of these CPUs may not be allowed for binding,
+                                          * some of these CPUs may be online but not allowed for binding,
                                           * see hwloc_topology_get_allowed_cpuset().
                                           *
 					  * \note All objects have non-NULL CPU and node sets except Misc and I/O objects.
@@ -548,7 +549,7 @@ struct hwloc_obj {
                                           * nodes more precisely.
                                           *
                                           * If the ::HWLOC_TOPOLOGY_FLAG_INCLUDE_DISALLOWED configuration flag is set,
-                                          * some of these nodes may not be allowed for allocation,
+                                          * some of these nodes may be online but not allowed for allocation,
                                           * see hwloc_topology_get_allowed_nodeset().
                                           *
                                           * If there are no NUMA nodes in the machine, all the memory is close to this
@@ -641,7 +642,7 @@ union hwloc_obj_attr_u {
     unsigned char revision;
     float linkspeed; /* in GB/s */
   } pcidev;
-  /** \brief Bridge specific Object Attribues */
+  /** \brief Bridge specific Object Attributes */
   struct hwloc_bridge_attr_s {
     union {
       struct hwloc_pcidev_attr_s pci;
@@ -970,7 +971,7 @@ HWLOC_DECLSPEC const char * hwloc_obj_type_string (hwloc_obj_type_t type) __hwlo
  *
  * If \p size is 0, \p string may safely be \c NULL.
  *
- * \return the number of character that were actually written if not truncating,
+ * \return the number of characters that were actually written if not truncating,
  * or that would have been written (not including the ending \\0).
  */
 HWLOC_DECLSPEC int hwloc_obj_type_snprintf(char * __hwloc_restrict string, size_t size,
@@ -985,7 +986,7 @@ HWLOC_DECLSPEC int hwloc_obj_type_snprintf(char * __hwloc_restrict string, size_
  *
  * If \p size is 0, \p string may safely be \c NULL.
  *
- * \return the number of character that were actually written if not truncating,
+ * \return the number of characters that were actually written if not truncating,
  * or that would have been written (not including the ending \\0).
  */
 HWLOC_DECLSPEC int hwloc_obj_attr_snprintf(char * __hwloc_restrict string, size_t size,
@@ -1088,7 +1089,7 @@ HWLOC_DECLSPEC int hwloc_obj_add_info(hwloc_obj_t obj, const char *name, const c
  *
  * Some operating systems only support binding threads or processes to a single PU.
  * Others allow binding to larger sets such as entire Cores or Packages or
- * even random sets of invididual PUs. In such operating system, the scheduler
+ * even random sets of individual PUs. In such operating system, the scheduler
  * is free to run the task on one of these PU, then migrate it to another PU, etc.
  * It is often useful to call hwloc_bitmap_singlify() on the target CPU set before
  * passing it to the binding function to avoid these expensive migrations.
@@ -1166,7 +1167,7 @@ typedef enum {
    * CPUs are idle, operating systems may execute the thread/process
    * on those other CPUs instead of the designated CPUs, to let them
    * progress anyway.  Strict binding means that the thread/process
-   * will _never_ execute on other cpus than the designated CPUs, even
+   * will _never_ execute on other CPUs than the designated CPUs, even
    * when those are busy with other tasks and other CPUs are idle.
    *
    * \note Depending on the operating system, strict binding may not
@@ -1203,7 +1204,7 @@ typedef enum {
   HWLOC_CPUBIND_NOMEMBIND = (1<<3)
 } hwloc_cpubind_flags_t;
 
-/** \brief Bind current process or thread on cpus given in physical bitmap \p set.
+/** \brief Bind current process or thread on CPUs given in physical bitmap \p set.
  *
  * \return -1 with errno set to ENOSYS if the action is not supported
  * \return -1 with errno set to EXDEV if the binding cannot be enforced
@@ -1212,12 +1213,13 @@ HWLOC_DECLSPEC int hwloc_set_cpubind(hwloc_topology_t topology, hwloc_const_cpus
 
 /** \brief Get current process or thread binding.
  *
- * Writes into \p set the physical cpuset which the process or thread (according to \e
- * flags) was last bound to.
+ * The CPU-set \p set (previously allocated by the caller)
+ * is filled with the list of PUs which the process or
+ * thread (according to \e flags) was last bound to.
  */
 HWLOC_DECLSPEC int hwloc_get_cpubind(hwloc_topology_t topology, hwloc_cpuset_t set, int flags);
 
-/** \brief Bind a process \p pid on cpus given in physical bitmap \p set.
+/** \brief Bind a process \p pid on CPUs given in physical bitmap \p set.
  *
  * \note \p hwloc_pid_t is \p pid_t on Unix platforms,
  * and \p HANDLE on native Windows platforms.
@@ -1231,6 +1233,10 @@ HWLOC_DECLSPEC int hwloc_get_cpubind(hwloc_topology_t topology, hwloc_cpuset_t s
 HWLOC_DECLSPEC int hwloc_set_proc_cpubind(hwloc_topology_t topology, hwloc_pid_t pid, hwloc_const_cpuset_t set, int flags);
 
 /** \brief Get the current physical binding of process \p pid.
+ *
+ * The CPU-set \p set (previously allocated by the caller)
+ * is filled with the list of PUs which the process
+ * was last bound to.
  *
  * \note \p hwloc_pid_t is \p pid_t on Unix platforms,
  * and \p HANDLE on native Windows platforms.
@@ -1244,7 +1250,7 @@ HWLOC_DECLSPEC int hwloc_set_proc_cpubind(hwloc_topology_t topology, hwloc_pid_t
 HWLOC_DECLSPEC int hwloc_get_proc_cpubind(hwloc_topology_t topology, hwloc_pid_t pid, hwloc_cpuset_t set, int flags);
 
 #ifdef hwloc_thread_t
-/** \brief Bind a thread \p thread on cpus given in physical bitmap \p set.
+/** \brief Bind a thread \p thread on CPUs given in physical bitmap \p set.
  *
  * \note \p hwloc_thread_t is \p pthread_t on Unix platforms,
  * and \p HANDLE on native Windows platforms.
@@ -1256,6 +1262,10 @@ HWLOC_DECLSPEC int hwloc_set_thread_cpubind(hwloc_topology_t topology, hwloc_thr
 
 #ifdef hwloc_thread_t
 /** \brief Get the current physical binding of thread \p tid.
+ *
+ * The CPU-set \p set (previously allocated by the caller)
+ * is filled with the list of PUs which the thread
+ * was last bound to.
  *
  * \note \p hwloc_thread_t is \p pthread_t on Unix platforms,
  * and \p HANDLE on native Windows platforms.
@@ -1266,6 +1276,10 @@ HWLOC_DECLSPEC int hwloc_get_thread_cpubind(hwloc_topology_t topology, hwloc_thr
 #endif
 
 /** \brief Get the last physical CPU where the current process or thread ran.
+ *
+ * The CPU-set \p set (previously allocated by the caller)
+ * is filled with the list of PUs which the process or
+ * thread (according to \e flags) last ran on.
  *
  * The operating system may move some tasks from one processor
  * to another at any time according to their binding,
@@ -1281,6 +1295,10 @@ HWLOC_DECLSPEC int hwloc_get_thread_cpubind(hwloc_topology_t topology, hwloc_thr
 HWLOC_DECLSPEC int hwloc_get_last_cpu_location(hwloc_topology_t topology, hwloc_cpuset_t set, int flags);
 
 /** \brief Get the last physical CPU where a process ran.
+ *
+ * The CPU-set \p set (previously allocated by the caller)
+ * is filled with the list of PUs which the process
+ * last ran on.
  *
  * The operating system may move some tasks from one processor
  * to another at any time according to their binding,
@@ -1511,6 +1529,9 @@ HWLOC_DECLSPEC int hwloc_set_membind(hwloc_topology_t topology, hwloc_const_bitm
 /** \brief Query the default memory binding policy and physical locality of the
  * current process or thread.
  *
+ * The bitmap \p set (previously allocated by the caller)
+ * is filled with the process or thread memory binding.
+ *
  * This function has two output parameters: \p set and \p policy.
  * The values returned in these parameters depend on both the \p flags
  * passed in and the current memory binding policies and nodesets in
@@ -1571,6 +1592,9 @@ HWLOC_DECLSPEC int hwloc_set_proc_membind(hwloc_topology_t topology, hwloc_pid_t
 /** \brief Query the default memory binding policy and physical locality of the
  * specified process.
  *
+ * The bitmap \p set (previously allocated by the caller)
+ * is filled with the process memory binding.
+ *
  * This function has two output parameters: \p set and \p policy.
  * The values returned in these parameters depend on both the \p flags
  * passed in and the current memory binding policies and nodesets in
@@ -1624,6 +1648,9 @@ HWLOC_DECLSPEC int hwloc_set_area_membind(hwloc_topology_t topology, const void
 /** \brief Query the CPUs near the physical NUMA node(s) and binding policy of
  * the memory identified by (\p addr, \p len ).
  *
+ * The bitmap \p set (previously allocated by the caller)
+ * is filled with the memory area binding.
+ *
  * This function has two output parameters: \p set and \p policy.
  * The values returned in these parameters depend on both the \p flags
  * passed in and the memory binding policies and nodesets of the pages
@@ -1652,7 +1679,8 @@ HWLOC_DECLSPEC int hwloc_get_area_membind(hwloc_topology_t topology, const void
 
 /** \brief Get the NUMA nodes where memory identified by (\p addr, \p len ) is physically allocated.
  *
- * Fills \p set according to the NUMA nodes where the memory area pages
+ * The bitmap \p set (previously allocated by the caller)
+ * is filled according to the NUMA nodes where the memory area pages
  * are physically allocated. If no page is actually allocated yet,
  * \p set may be empty.
  *
@@ -1698,9 +1726,12 @@ HWLOC_DECLSPEC void *hwloc_alloc_membind(hwloc_topology_t topology, size_t len,
 
 /** \brief Allocate some memory on NUMA memory nodes specified by \p set
  *
- * This is similar to hwloc_alloc_membind_nodeset() except that it is allowed to change
- * the current memory binding policy, thus providing more binding support, at
- * the expense of changing the current state.
+ * First, try to allocate properly with hwloc_alloc_membind().
+ * On failure, the current process or thread memory binding policy
+ * is changed with hwloc_set_membind() before allocating memory.
+ * Thus this function works in more cases, at the expense of changing
+ * the current state (possibly affecting future allocations that
+ * would not specify any policy).
  *
  * If ::HWLOC_MEMBIND_BYNODESET is specified, set is considered a nodeset.
  * Otherwise it's a cpuset.
@@ -1883,8 +1914,9 @@ HWLOC_DECLSPEC int hwloc_topology_set_components(hwloc_topology_t __hwloc_restri
 enum hwloc_topology_flags_e {
  /** \brief Detect the whole system, ignore reservations, include disallowed objects.
    *
-   * Gather all resources, even if some were disabled by the administrator.
+   * Gather all online resources, even if some were disabled by the administrator.
    * For instance, ignore Linux Cgroup/Cpusets and gather all processors and memory nodes.
+   * However offline PUs and NUMA nodes are still ignored.
    *
    * When this flag is not set, PUs and NUMA nodes that are disallowed are not added to the topology.
    * Parent objects (package, core, cache, etc.) are added only if some of their children are allowed.
@@ -2028,17 +2060,38 @@ enum hwloc_topology_flags_e {
    * not change to due thread binding changes on Windows
    * (see ::HWLOC_TOPOLOGY_FLAG_RESTRICT_TO_CPUBINDING).
    */
-  HWLOC_TOPOLOGY_FLAG_DONT_CHANGE_BINDING = (1UL<<6)
+  HWLOC_TOPOLOGY_FLAG_DONT_CHANGE_BINDING = (1UL<<6),
+
+  /** \brief Ignore distances.
+   *
+   * Ignore distance information from the operating systems (and from XML)
+   * and hence do not use distances for grouping.
+   */
+  HWLOC_TOPOLOGY_FLAG_NO_DISTANCES = (1UL<<7),
+
+  /** \brief Ignore memory attributes.
+   *
+   * Ignore memory attribues from the operating systems (and from XML).
+   */
+  HWLOC_TOPOLOGY_FLAG_NO_MEMATTRS = (1UL<<8),
+
+  /** \brief Ignore CPU Kinds.
+   *
+   * Ignore CPU kind information from the operating systems (and from XML).
+   */
+  HWLOC_TOPOLOGY_FLAG_NO_CPUKINDS = (1UL<<9)
 };
 
 /** \brief Set OR'ed flags to non-yet-loaded topology.
  *
  * Set a OR'ed set of ::hwloc_topology_flags_e onto a topology that was not yet loaded.
  *
- * If this function is called multiple times, the last invokation will erase
+ * If this function is called multiple times, the last invocation will erase
  * and replace the set of flags that was previously set.
  *
- * The flags set in a topology may be retrieved with hwloc_topology_get_flags()
+ * By default, no flags are set (\c 0).
+ *
+ * The flags set in a topology may be retrieved with hwloc_topology_get_flags().
  */
 HWLOC_DECLSPEC int hwloc_topology_set_flags (hwloc_topology_t topology, unsigned long flags);
 
@@ -2046,6 +2099,9 @@ HWLOC_DECLSPEC int hwloc_topology_set_flags (hwloc_topology_t topology, unsigned
  *
  * Get the OR'ed set of ::hwloc_topology_flags_e of a topology.
  *
+ * If hwloc_topology_set_flags() was not called earlier,
+ * no flags are set (\c 0 is returned).
+ *
  * \return the flags previously set with hwloc_topology_set_flags().
  */
 HWLOC_DECLSPEC unsigned long hwloc_topology_get_flags (hwloc_topology_t topology);

src/3rdparty/hwloc/include/hwloc/autogen/config.h

@@ -1,6 +1,6 @@
 /*
  * Copyright © 2009 CNRS
- * Copyright © 2009-2020 Inria.  All rights reserved.
+ * Copyright © 2009-2022 Inria.  All rights reserved.
  * Copyright © 2009-2012 Université Bordeaux
  * Copyright © 2009-2011 Cisco Systems, Inc.  All rights reserved.
  * See COPYING in top-level directory.
@@ -11,9 +11,9 @@
 #ifndef HWLOC_CONFIG_H
 #define HWLOC_CONFIG_H
 
-#define HWLOC_VERSION "2.5.0"
+#define HWLOC_VERSION "2.9.0"
 #define HWLOC_VERSION_MAJOR 2
-#define HWLOC_VERSION_MINOR 5
+#define HWLOC_VERSION_MINOR 9
 #define HWLOC_VERSION_RELEASE 0
 #define HWLOC_VERSION_GREEK ""
 

src/3rdparty/hwloc/include/hwloc/bitmap.h

@@ -1,6 +1,6 @@
 /*
  * Copyright © 2009 CNRS
- * Copyright © 2009-2020 Inria.  All rights reserved.
+ * Copyright © 2009-2022 Inria.  All rights reserved.
  * Copyright © 2009-2012 Université Bordeaux
  * Copyright © 2009-2011 Cisco Systems, Inc.  All rights reserved.
  * See COPYING in top-level directory.
@@ -112,7 +112,7 @@ HWLOC_DECLSPEC int hwloc_bitmap_copy(hwloc_bitmap_t dst, hwloc_const_bitmap_t sr
  *
  * If \p buflen is 0, \p buf may safely be \c NULL.
  *
- * \return the number of character that were actually written if not truncating,
+ * \return the number of characters that were actually written if not truncating,
  * or that would have been written (not including the ending \\0).
  */
 HWLOC_DECLSPEC int hwloc_bitmap_snprintf(char * __hwloc_restrict buf, size_t buflen, hwloc_const_bitmap_t bitmap);
@@ -137,7 +137,7 @@ HWLOC_DECLSPEC int hwloc_bitmap_sscanf(hwloc_bitmap_t bitmap, const char * __hwl
  *
  * If \p buflen is 0, \p buf may safely be \c NULL.
  *
- * \return the number of character that were actually written if not truncating,
+ * \return the number of characters that were actually written if not truncating,
  * or that would have been written (not including the ending \\0).
  */
 HWLOC_DECLSPEC int hwloc_bitmap_list_snprintf(char * __hwloc_restrict buf, size_t buflen, hwloc_const_bitmap_t bitmap);
@@ -161,7 +161,7 @@ HWLOC_DECLSPEC int hwloc_bitmap_list_sscanf(hwloc_bitmap_t bitmap, const char *
  *
  * If \p buflen is 0, \p buf may safely be \c NULL.
  *
- * \return the number of character that were actually written if not truncating,
+ * \return the number of characters that were actually written if not truncating,
  * or that would have been written (not including the ending \\0).
  */
 HWLOC_DECLSPEC int hwloc_bitmap_taskset_snprintf(char * __hwloc_restrict buf, size_t buflen, hwloc_const_bitmap_t bitmap);
@@ -357,11 +357,11 @@ HWLOC_DECLSPEC int hwloc_bitmap_last_unset(hwloc_const_bitmap_t bitmap) __hwloc_
  * The loop must start with hwloc_bitmap_foreach_begin() and end
  * with hwloc_bitmap_foreach_end() followed by a terminating ';'.
  *
- * \p index is the loop variable; it should be an unsigned int.  The
- * first iteration will set \p index to the lowest index in the bitmap.
+ * \p id is the loop variable; it should be an unsigned int.  The
+ * first iteration will set \p id to the lowest index in the bitmap.
  * Successive iterations will iterate through, in order, all remaining
  * indexes set in the bitmap.  To be specific: each iteration will return a
- * value for \p index such that hwloc_bitmap_isset(bitmap, index) is true.
+ * value for \p id such that hwloc_bitmap_isset(bitmap, id) is true.
  *
  * The assert prevents the loop from being infinite if the bitmap is infinitely set.
  *

src/3rdparty/hwloc/include/hwloc/cpukinds.h

@@ -1,5 +1,5 @@
 /*
- * Copyright © 2020 Inria.  All rights reserved.
+ * Copyright © 2020-2021 Inria.  All rights reserved.
  * See COPYING in top-level directory.
  */
 
@@ -42,18 +42,23 @@ extern "C" {
  * (for instance the "CoreType" and "FrequencyMaxMHz",
  *  see \ref topoattrs_cpukinds).
  *
- * A higher efficiency value means intrinsic greater performance
+ * A higher efficiency value means greater intrinsic performance
  * (and possibly less performance/power efficiency).
- * Kinds with lower efficiency are ranked first:
+ * Kinds with lower efficiency values are ranked first:
  * Passing 0 as \p kind_index to hwloc_cpukinds_get_info() will
- * return information about the less efficient CPU kind.
+ * return information about the CPU kind with lower performance
+ * but higher energy-efficiency.
+ * Higher \p kind_index values would rather return information
+ * about power-hungry high-performance cores.
  *
- * When available, efficiency values are gathered from the operating
- * system (when \p cpukind_efficiency is set in the
- * struct hwloc_topology_discovery_support array, only on Windows 10 for now).
- * Otherwise hwloc tries to compute efficiencies
- * by comparing CPU kinds using frequencies (on ARM),
- * or core types and frequencies (on other architectures).
+ * When available, efficiency values are gathered from the operating system.
+ * If so, \p cpukind_efficiency is set in the struct hwloc_topology_discovery_support array.
+ * This is currently available on Windows 10, Mac OS X (Darwin),
+ * and on some Linux platforms where core "capacity" is exposed in sysfs.
+ *
+ * If the operating system does not expose core efficiencies natively,
+ * hwloc tries to compute efficiencies by comparing CPU kinds using
+ * frequencies (on ARM), or core types and frequencies (on other architectures).
  * The environment variable HWLOC_CPUKINDS_RANKING may be used
  * to change this heuristics, see \ref envvar.
  *

src/3rdparty/hwloc/include/hwloc/deprecated.h

@@ -1,6 +1,6 @@
 /*
  * Copyright © 2009 CNRS
- * Copyright © 2009-2021 Inria.  All rights reserved.
+ * Copyright © 2009-2022 Inria.  All rights reserved.
  * Copyright © 2009-2012 Université Bordeaux
  * Copyright © 2009-2010 Cisco Systems, Inc.  All rights reserved.
  * See COPYING in top-level directory.
@@ -55,7 +55,7 @@ hwloc_topology_insert_misc_object_by_parent(hwloc_topology_t topology, hwloc_obj
  *
  * If \p size is 0, \p string may safely be \c NULL.
  *
- * \return the number of character that were actually written if not truncating,
+ * \return the number of characters that were actually written if not truncating,
  * or that would have been written (not including the ending \\0).
  */
 static __hwloc_inline int

src/3rdparty/hwloc/include/hwloc/distances.h

@@ -1,5 +1,5 @@
 /*
- * Copyright © 2010-2021 Inria.  All rights reserved.
+ * Copyright © 2010-2022 Inria.  All rights reserved.
  * See COPYING in top-level directory.
  */
 
@@ -35,7 +35,8 @@ extern "C" {
  * from a core in another node.
  * The corresponding kind is ::HWLOC_DISTANCES_KIND_FROM_OS | ::HWLOC_DISTANCES_KIND_FROM_USER.
  * The name of this distances structure is "NUMALatency".
- * Others distance structures include and "XGMIBandwidth" and "NVLinkBandwidth".
+ * Others distance structures include and "XGMIBandwidth", "XGMIHops",
+ * "XeLinkBandwidth" and "NVLinkBandwidth".
  *
  * The matrix may also contain bandwidths between random sets of objects,
  * possibly provided by the user, as specified in the \p kind attribute.
@@ -159,7 +160,8 @@ hwloc_distances_get_by_type(hwloc_topology_t topology, hwloc_obj_type_t type,
  * Usually only one distances structure may match a given name.
  *
  * The name of the most common structure is "NUMALatency".
- * Others include "XGMIBandwidth" and "NVLinkBandwidth".
+ * Others include "XGMIBandwidth", "XGMIHops", "XeLinkBandwidth",
+ * and "NVLinkBandwidth".
  */
 HWLOC_DECLSPEC int
 hwloc_distances_get_by_name(hwloc_topology_t topology, const char *name,

src/3rdparty/hwloc/include/hwloc/helper.h

@@ -1,6 +1,6 @@
 /*
  * Copyright © 2009 CNRS
- * Copyright © 2009-2021 Inria.  All rights reserved.
+ * Copyright © 2009-2022 Inria.  All rights reserved.
  * Copyright © 2009-2012 Université Bordeaux
  * Copyright © 2009-2010 Cisco Systems, Inc.  All rights reserved.
  * See COPYING in top-level directory.
@@ -886,9 +886,6 @@ enum hwloc_distrib_flags_e {
  * \p flags should be 0 or a OR'ed set of ::hwloc_distrib_flags_e.
  *
  * \note This function requires the \p roots objects to have a CPU set.
- *
- * \note This function replaces the now deprecated hwloc_distribute()
- * and hwloc_distributev() functions.
  */
 static __hwloc_inline int
 hwloc_distrib(hwloc_topology_t topology,

src/3rdparty/hwloc/include/hwloc/intel-mic.h

@@ -1,136 +0,0 @@
-/*
- * Copyright © 2013-2016 Inria.  All rights reserved.
- * See COPYING in top-level directory.
- */
-
-/** \file
- * \brief Macros to help interaction between hwloc and Intel Xeon Phi (MIC).
- *
- * Applications that use both hwloc and Intel Xeon Phi (MIC) may want to
- * include this file so as to get topology information for MIC devices.
- */
-
-#ifndef HWLOC_INTEL_MIC_H
-#define HWLOC_INTEL_MIC_H
-
-#include "hwloc.h"
-#include "hwloc/autogen/config.h"
-#include "hwloc/helper.h"
-
-#ifdef HWLOC_LINUX_SYS
-#include "hwloc/linux.h"
-
-#include <dirent.h>
-#include <string.h>
-#endif
-
-#include <stdio.h>
-#include <stdlib.h>
-
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-
-/** \defgroup hwlocality_intel_mic Interoperability with Intel Xeon Phi (MIC)
- *
- * This interface offers ways to retrieve topology information about
- * Intel Xeon Phi (MIC) devices.
- *
- * @{
- */
-
-/** \brief Get the CPU set of logical processors that are physically
- * close to MIC device whose index is \p idx.
- *
- * Return the CPU set describing the locality of the MIC device whose index is \p idx.
- *
- * Topology \p topology and device index \p idx must match the local machine.
- * I/O devices detection is not needed in the topology.
- *
- * The function only returns the locality of the device.
- * If more information about the device is needed, OS objects should
- * be used instead, see hwloc_intel_mic_get_device_osdev_by_index().
- *
- * This function is currently only implemented in a meaningful way for
- * Linux; other systems will simply get a full cpuset.
- */
-static __hwloc_inline int
-hwloc_intel_mic_get_device_cpuset(hwloc_topology_t topology __hwloc_attribute_unused,
-				  int idx __hwloc_attribute_unused,
-				  hwloc_cpuset_t set)
-{
-#ifdef HWLOC_LINUX_SYS
-	/* If we're on Linux, use the sysfs mechanism to get the local cpus */
-#define HWLOC_INTEL_MIC_DEVICE_SYSFS_PATH_MAX 128
-	char path[HWLOC_INTEL_MIC_DEVICE_SYSFS_PATH_MAX];
-	DIR *sysdir = NULL;
-	struct dirent *dirent;
-	unsigned pcibus, pcidev, pcifunc;
-
-	if (!hwloc_topology_is_thissystem(topology)) {
-		errno = EINVAL;
-		return -1;
-	}
-
-	sprintf(path, "/sys/class/mic/mic%d", idx);
-	sysdir = opendir(path);
-	if (!sysdir)
-		return -1;
-
-	while ((dirent = readdir(sysdir)) != NULL) {
-		if (sscanf(dirent->d_name, "pci_%02x:%02x.%02x", &pcibus, &pcidev, &pcifunc) == 3) {
-			sprintf(path, "/sys/class/mic/mic%d/pci_%02x:%02x.%02x/local_cpus", idx, pcibus, pcidev, pcifunc);
-			if (hwloc_linux_read_path_as_cpumask(path, set) < 0
-			    || hwloc_bitmap_iszero(set))
-				hwloc_bitmap_copy(set, hwloc_topology_get_complete_cpuset(topology));
-			break;
-		}
-	}
-
-	closedir(sysdir);
-#else
-	/* Non-Linux systems simply get a full cpuset */
-	hwloc_bitmap_copy(set, hwloc_topology_get_complete_cpuset(topology));
-#endif
-	return 0;
-}
-
-/** \brief Get the hwloc OS device object corresponding to the
- * MIC device for the given index.
- *
- * Return the OS device object describing the MIC device whose index is \p idx.
- * Return NULL if there is none.
- *
- * The topology \p topology does not necessarily have to match the current
- * machine. For instance the topology may be an XML import of a remote host.
- * I/O devices detection must be enabled in the topology.
- *
- * \note The corresponding PCI device object can be obtained by looking
- * at the OS device parent object.
- */
-static __hwloc_inline hwloc_obj_t
-hwloc_intel_mic_get_device_osdev_by_index(hwloc_topology_t topology,
-					  unsigned idx)
-{
-	hwloc_obj_t osdev = NULL;
-	while ((osdev = hwloc_get_next_osdev(topology, osdev)) != NULL) {
-		if (HWLOC_OBJ_OSDEV_COPROC == osdev->attr->osdev.type
-                    && osdev->name
-		    && !strncmp("mic", osdev->name, 3)
-		    && atoi(osdev->name + 3) == (int) idx)
-                        return osdev;
-        }
-        return NULL;
-}
-
-/** @} */
-
-
-#ifdef __cplusplus
-} /* extern "C" */
-#endif
-
-
-#endif /* HWLOC_INTEL_MIC_H */

src/3rdparty/hwloc/include/hwloc/linux.h

@@ -1,6 +1,6 @@
 /*
  * Copyright © 2009 CNRS
- * Copyright © 2009-2016 Inria.  All rights reserved.
+ * Copyright © 2009-2021 Inria.  All rights reserved.
  * Copyright © 2009-2011 Université Bordeaux
  * See COPYING in top-level directory.
  */
@@ -44,6 +44,10 @@ extern "C" {
 HWLOC_DECLSPEC int hwloc_linux_set_tid_cpubind(hwloc_topology_t topology, pid_t tid, hwloc_const_cpuset_t set);
 
 /** \brief Get the current binding of thread \p tid
+ *
+ * The CPU-set \p set (previously allocated by the caller)
+ * is filled with the list of PUs which the thread
+ * was last bound to.
  *
  * The behavior is exactly the same as the Linux sched_getaffinity system call,
  * but uses a hwloc cpuset.
@@ -54,6 +58,9 @@ HWLOC_DECLSPEC int hwloc_linux_set_tid_cpubind(hwloc_topology_t topology, pid_t
 HWLOC_DECLSPEC int hwloc_linux_get_tid_cpubind(hwloc_topology_t topology, pid_t tid, hwloc_cpuset_t set);
 
 /** \brief Get the last physical CPU where thread \p tid ran.
+ *
+ * The CPU-set \p set (previously allocated by the caller)
+ * is filled with the PU which the thread last ran on.
  *
  * \note This is equivalent to calling hwloc_get_proc_last_cpu_location() with
  * ::HWLOC_CPUBIND_THREAD as flags.

src/3rdparty/hwloc/include/hwloc/memattrs.h

@@ -1,5 +1,5 @@
 /*
- * Copyright © 2019-2020 Inria.  All rights reserved.
+ * Copyright © 2019-2022 Inria.  All rights reserved.
  * See COPYING in top-level directory.
  */
 
@@ -54,6 +54,8 @@ extern "C" {
  * Attribute values for these nodes, if any, may then be obtained with
  * hwloc_memattr_get_value() and manually compared with the desired criteria.
  *
+ * \sa An example is available in doc/examples/memory-attributes.c in the source tree.
+ *
  * \note The API also supports specific objects as initiator,
  * but it is currently not used internally by hwloc.
  * Users may for instance use it to provide custom performance
@@ -65,19 +67,19 @@ extern "C" {
 
 /** \brief Memory node attributes. */
 enum hwloc_memattr_id_e {
-  /** \brief "Capacity".
-   * The capacity is returned in bytes
-   * (local_memory attribute in objects).
+  /** \brief
+   * The \"Capacity\" is returned in bytes (local_memory attribute in objects).
    *
    * Best capacity nodes are nodes with <b>higher capacity</b>.
    *
    * No initiator is involved when looking at this attribute.
    * The corresponding attribute flags are ::HWLOC_MEMATTR_FLAG_HIGHER_FIRST.
+   * \hideinitializer
    */
   HWLOC_MEMATTR_ID_CAPACITY = 0,
 
-  /** \brief "Locality".
-   * The locality is returned as the number of PUs in that locality
+  /** \brief
+   * The \"Locality\" is returned as the number of PUs in that locality
    * (e.g. the weight of its cpuset).
    *
    * Best locality nodes are nodes with <b>smaller locality</b>
@@ -87,26 +89,87 @@ enum hwloc_memattr_id_e {
    *
    * No initiator is involved when looking at this attribute.
    * The corresponding attribute flags are ::HWLOC_MEMATTR_FLAG_HIGHER_FIRST.
+   * \hideinitializer
    */
   HWLOC_MEMATTR_ID_LOCALITY = 1,
 
-  /** \brief "Bandwidth".
-   * The bandwidth is returned in MiB/s, as seen from the given initiator location.
+  /** \brief
+   * The \"Bandwidth\" is returned in MiB/s, as seen from the given initiator location.
+   *
    * Best bandwidth nodes are nodes with <b>higher bandwidth</b>.
+   *
    * The corresponding attribute flags are ::HWLOC_MEMATTR_FLAG_HIGHER_FIRST
    * and ::HWLOC_MEMATTR_FLAG_NEED_INITIATOR.
+   *
+   * This is the average bandwidth for read and write accesses. If the platform
+   * provides individual read and write bandwidths but no explicit average value,
+   * hwloc computes and returns the average.
+   * \hideinitializer
    */
   HWLOC_MEMATTR_ID_BANDWIDTH = 2,
 
-  /** \brief "Latency".
-   * The latency is returned as nanoseconds, as seen from the given initiator location.
+  /** \brief
+   * The \"ReadBandwidth\" is returned in MiB/s, as seen from the given initiator location.
+   *
+   * Best bandwidth nodes are nodes with <b>higher bandwidth</b>.
+   *
+   * The corresponding attribute flags are ::HWLOC_MEMATTR_FLAG_HIGHER_FIRST
+   * and ::HWLOC_MEMATTR_FLAG_NEED_INITIATOR.
+   * \hideinitializer
+   */
+  HWLOC_MEMATTR_ID_READ_BANDWIDTH = 4,
+
+  /** \brief
+   * The \"WriteBandwidth\" is returned in MiB/s, as seen from the given initiator location.
+   *
+   * Best bandwidth nodes are nodes with <b>higher bandwidth</b>.
+   *
+   * The corresponding attribute flags are ::HWLOC_MEMATTR_FLAG_HIGHER_FIRST
+   * and ::HWLOC_MEMATTR_FLAG_NEED_INITIATOR.
+   * \hideinitializer
+   */
+  HWLOC_MEMATTR_ID_WRITE_BANDWIDTH = 5,
+
+  /** \brief
+   * The \"Latency\" is returned as nanoseconds, as seen from the given initiator location.
+   *
    * Best latency nodes are nodes with <b>smaller latency</b>.
+   *
    * The corresponding attribute flags are ::HWLOC_MEMATTR_FLAG_LOWER_FIRST
    * and ::HWLOC_MEMATTR_FLAG_NEED_INITIATOR.
+   *
+   * This is the average latency for read and write accesses. If the platform
+   * provides individual read and write latencies but no explicit average value,
+   * hwloc computes and returns the average.
+   * \hideinitializer
    */
-  HWLOC_MEMATTR_ID_LATENCY = 3
+  HWLOC_MEMATTR_ID_LATENCY = 3,
 
-  /* TODO read vs write, persistence? */
+  /** \brief
+   * The \"ReadLatency\" is returned as nanoseconds, as seen from the given initiator location.
+   *
+   * Best latency nodes are nodes with <b>smaller latency</b>.
+   *
+   * The corresponding attribute flags are ::HWLOC_MEMATTR_FLAG_LOWER_FIRST
+   * and ::HWLOC_MEMATTR_FLAG_NEED_INITIATOR.
+   * \hideinitializer
+   */
+  HWLOC_MEMATTR_ID_READ_LATENCY = 6,
+
+  /** \brief
+   * The \"WriteLatency\" is returned as nanoseconds, as seen from the given initiator location.
+   *
+   * Best latency nodes are nodes with <b>smaller latency</b>.
+   *
+   * The corresponding attribute flags are ::HWLOC_MEMATTR_FLAG_LOWER_FIRST
+   * and ::HWLOC_MEMATTR_FLAG_NEED_INITIATOR.
+   * \hideinitializer
+   */
+  HWLOC_MEMATTR_ID_WRITE_LATENCY = 7,
+
+  /* TODO persistence? */
+
+  HWLOC_MEMATTR_ID_MAX /**< \private Sentinel value */
 };
 
 /** \brief A memory attribute identifier.
@@ -354,7 +417,7 @@ hwloc_memattr_register(hwloc_topology_t topology,
  * \p flags must be \c 0 for now.
  *
  * \note The initiator \p initiator should be of type ::HWLOC_LOCATION_TYPE_CPUSET
- * when refering to accesses performed by CPU cores.
+ * when referring to accesses performed by CPU cores.
  * ::HWLOC_LOCATION_TYPE_OBJECT is currently unused internally by hwloc,
  * but users may for instance use it to provide custom information about
  * host memory accesses performed by GPUs.
@@ -398,7 +461,7 @@ hwloc_memattr_set_value(hwloc_topology_t topology,
  * values.
  *
  * \note The initiator \p initiator should be of type ::HWLOC_LOCATION_TYPE_CPUSET
- * when refering to accesses performed by CPU cores.
+ * when referring to accesses performed by CPU cores.
  * ::HWLOC_LOCATION_TYPE_OBJECT is currently unused internally by hwloc,
  * but users may for instance use it to provide custom information about
  * host memory accesses performed by GPUs.
@@ -408,7 +471,7 @@ hwloc_memattr_get_targets(hwloc_topology_t topology,
                           hwloc_memattr_id_t attribute,
                           struct hwloc_location *initiator,
                           unsigned long flags,
-                          unsigned *nrp, hwloc_obj_t *targets, hwloc_uint64_t *values);
+                          unsigned *nr, hwloc_obj_t *targets, hwloc_uint64_t *values);
 
 /** \brief Return the initiators that have values for a given attribute for a specific target NUMA node.
  *

src/3rdparty/hwloc/include/hwloc/plugins.h

@@ -1,5 +1,5 @@
 /*
- * Copyright © 2013-2021 Inria.  All rights reserved.
+ * Copyright © 2013-2022 Inria.  All rights reserved.
  * Copyright © 2016 Cisco Systems, Inc.  All rights reserved.
  * See COPYING in top-level directory.
  */
@@ -338,9 +338,15 @@ struct hwloc_component {
  * This function return 1 by default (show critical only),
  * 0 in lstopo (show all),
  * or anything set in HWLOC_HIDE_ERRORS in the environment.
+ *
+ * Use macros HWLOC_SHOW_CRITICAL_ERRORS() and HWLOC_SHOW_ALL_ERRORS()
+ * for clarity.
  */
 HWLOC_DECLSPEC int hwloc_hide_errors(void);
 
+#define HWLOC_SHOW_CRITICAL_ERRORS() (hwloc_hide_errors() < 2)
+#define HWLOC_SHOW_ALL_ERRORS() (hwloc_hide_errors() == 0)
+
 /** \brief Add an object to the topology.
  *
  * Insert new object \p obj in the topology starting under existing object \p root
@@ -497,9 +503,11 @@ hwloc_filter_check_pcidev_subtype_important(unsigned classid)
   return (baseclass == 0x03 /* PCI_BASE_CLASS_DISPLAY */
 	  || baseclass == 0x02 /* PCI_BASE_CLASS_NETWORK */
 	  || baseclass == 0x01 /* PCI_BASE_CLASS_STORAGE */
+	  || baseclass == 0x00 /* Unclassified, for Atos/Bull BXI */
 	  || baseclass == 0x0b /* PCI_BASE_CLASS_PROCESSOR */
 	  || classid == 0x0c04 /* PCI_CLASS_SERIAL_FIBER */
 	  || classid == 0x0c06 /* PCI_CLASS_SERIAL_INFINIBAND */
+          || classid == 0x0502 /* PCI_CLASS_MEMORY_CXL */
           || baseclass == 0x06 /* PCI_BASE_CLASS_BRIDGE with non-PCI downstream. the core will drop the useless ones later */
 	  || baseclass == 0x12 /* Processing Accelerators */);
 }

src/3rdparty/hwloc/include/hwloc/rename.h

@@ -1,6 +1,6 @@
 /*
  * Copyright © 2009-2011 Cisco Systems, Inc.  All rights reserved.
- * Copyright © 2010-2021 Inria.  All rights reserved.
+ * Copyright © 2010-2022 Inria.  All rights reserved.
  * See COPYING in top-level directory.
  */
 
@@ -123,6 +123,9 @@ extern "C" {
 #define HWLOC_TOPOLOGY_FLAG_RESTRICT_TO_CPUBINDING HWLOC_NAME_CAPS(TOPOLOGY_FLAG_RESTRICT_TO_CPUBINDING)
 #define HWLOC_TOPOLOGY_FLAG_RESTRICT_TO_MEMBINDING HWLOC_NAME_CAPS(TOPOLOGY_FLAG_RESTRICT_TO_MEMBINDING)
 #define HWLOC_TOPOLOGY_FLAG_DONT_CHANGE_BINDING HWLOC_NAME_CAPS(TOPOLOGY_FLAG_DONT_CHANGE_BINDING)
+#define HWLOC_TOPOLOGY_FLAG_NO_DISTANCES HWLOC_NAME_CAPS(TOPOLOGY_FLAG_NO_DISTANCES)
+#define HWLOC_TOPOLOGY_FLAG_NO_MEMATTRS HWLOC_NAME_CAPS(TOPOLOGY_FLAG_NO_MEMATTRS)
+#define HWLOC_TOPOLOGY_FLAG_NO_CPUKINDS HWLOC_NAME_CAPS(TOPOLOGY_FLAG_NO_CPUKINDS)
 
 #define hwloc_topology_set_pid HWLOC_NAME(topology_set_pid)
 #define hwloc_topology_set_synthetic HWLOC_NAME(topology_set_synthetic)
@@ -381,6 +384,11 @@ extern "C" {
 #define HWLOC_MEMATTR_ID_LOCALITY HWLOC_NAME_CAPS(MEMATTR_ID_LOCALITY)
 #define HWLOC_MEMATTR_ID_BANDWIDTH HWLOC_NAME_CAPS(MEMATTR_ID_BANDWIDTH)
 #define HWLOC_MEMATTR_ID_LATENCY HWLOC_NAME_CAPS(MEMATTR_ID_LATENCY)
+#define HWLOC_MEMATTR_ID_READ_BANDWIDTH HWLOC_NAME_CAPS(MEMATTR_ID_READ_BANDWIDTH)
+#define HWLOC_MEMATTR_ID_WRITE_BANDWIDTH HWLOC_NAME_CAPS(MEMATTR_ID_WRITE_BANDWIDTH)
+#define HWLOC_MEMATTR_ID_READ_LATENCY HWLOC_NAME_CAPS(MEMATTR_ID_READ_LATENCY)
+#define HWLOC_MEMATTR_ID_WRITE_LATENCY HWLOC_NAME_CAPS(MEMATTR_ID_WRITE_LATENCY)
+#define HWLOC_MEMATTR_ID_MAX HWLOC_NAME_CAPS(MEMATTR_ID_MAX)
 
 #define hwloc_memattr_id_t HWLOC_NAME(memattr_id_t)
 #define hwloc_memattr_get_by_name HWLOC_NAME(memattr_get_by_name)
@@ -862,6 +870,7 @@ extern "C" {
 #define hwloc_internal_memattrs_destroy HWLOC_NAME(internal_memattrs_destroy)
 #define hwloc_internal_memattrs_need_refresh HWLOC_NAME(internal_memattrs_need_refresh)
 #define hwloc_internal_memattrs_refresh HWLOC_NAME(internal_memattrs_refresh)
+#define hwloc_internal_memattrs_guess_memory_tiers HWLOC_NAME(internal_memattrs_guess_memory_tiers)
 
 #define hwloc_internal_cpukind_s HWLOC_NAME(internal_cpukind_s)
 #define hwloc_internal_cpukinds_init HWLOC_NAME(internal_cpukinds_init)

src/3rdparty/hwloc/include/private/autogen/config.h

@@ -1,6 +1,6 @@
 /*
  * Copyright © 2009, 2011, 2012 CNRS.  All rights reserved.
- * Copyright © 2009-2020 Inria.  All rights reserved.
+ * Copyright © 2009-2021 Inria.  All rights reserved.
  * Copyright © 2009, 2011, 2012, 2015 Université Bordeaux.  All rights reserved.
  * Copyright © 2009-2020 Cisco Systems, Inc.  All rights reserved.
  * $COPYRIGHT$
@@ -290,10 +290,6 @@
 /* Define to '1' if sysctlbyname is present and usable */
 /* #undef HAVE_SYSCTLBYNAME */
 
-/* Define to 1 if the system has the type
-   `SYSTEM_LOGICAL_PROCESSOR_INFORMATION'. */
-#define HAVE_SYSTEM_LOGICAL_PROCESSOR_INFORMATION 1
-
 /* Define to 1 if the system has the type
    `SYSTEM_LOGICAL_PROCESSOR_INFORMATION_EX'. */
 #define HAVE_SYSTEM_LOGICAL_PROCESSOR_INFORMATION_EX 1

src/3rdparty/hwloc/include/private/misc.h

@@ -504,7 +504,7 @@ hwloc__obj_type_is_icache(hwloc_obj_type_t type)
   }                                    \
 } while(0)
 #else /* HAVE_USELOCALE */
-#if __HWLOC_HAVE_ATTRIBUTE_UNUSED
+#if HWLOC_HAVE_ATTRIBUTE_UNUSED
 #define hwloc_localeswitch_declare int __dummy_nolocale __hwloc_attribute_unused
 #define hwloc_localeswitch_init()
 #else

src/3rdparty/hwloc/include/private/private.h

@@ -1,6 +1,6 @@
 /*
  * Copyright © 2009      CNRS
- * Copyright © 2009-2021 Inria.  All rights reserved.
+ * Copyright © 2009-2022 Inria.  All rights reserved.
  * Copyright © 2009-2012, 2020 Université Bordeaux
  * Copyright © 2009-2011 Cisco Systems, Inc.  All rights reserved.
  *
@@ -259,6 +259,7 @@ struct hwloc_topology {
     unsigned bus_first, bus_last;
     hwloc_bitmap_t cpuset;
   } * pci_forced_locality;
+  hwloc_uint64_t pci_locality_quirks;
 
   /* component blacklisting */
   unsigned nr_blacklisted_components;
@@ -419,6 +420,7 @@ extern void hwloc_internal_memattrs_need_refresh(hwloc_topology_t topology);
 extern void hwloc_internal_memattrs_refresh(hwloc_topology_t topology);
 extern int hwloc_internal_memattrs_dup(hwloc_topology_t new, hwloc_topology_t old);
 extern int hwloc_internal_memattr_set_value(hwloc_topology_t topology, hwloc_memattr_id_t id, hwloc_obj_type_t target_type, hwloc_uint64_t target_gp_index, unsigned target_os_index, struct hwloc_internal_location_s *initiator, hwloc_uint64_t value);
+extern int hwloc_internal_memattrs_guess_memory_tiers(hwloc_topology_t topology);
 
 extern void hwloc_internal_cpukinds_init(hwloc_topology_t topology);
 extern int hwloc_internal_cpukinds_rank(hwloc_topology_t topology);
@@ -480,6 +482,7 @@ extern char * hwloc_progname(struct hwloc_topology *topology);
 #define HWLOC_GROUP_KIND_AIX_SDL_UNKNOWN		210	/* subkind is SDL level */
 #define HWLOC_GROUP_KIND_WINDOWS_PROCESSOR_GROUP	220	/* no subkind */
 #define HWLOC_GROUP_KIND_WINDOWS_RELATIONSHIP_UNKNOWN	221	/* no subkind */
+#define HWLOC_GROUP_KIND_LINUX_CLUSTER                  222     /* no subkind */
 /* distance groups */
 #define HWLOC_GROUP_KIND_DISTANCE			900	/* subkind is round of adding these groups during distance based grouping */
 /* finally, hwloc-specific groups required to insert something else, should disappear as soon as possible */

src/3rdparty/hwloc/include/private/windows.h

@@ -0,0 +1,30 @@
+/*
+ * Copyright © 2009 Université Bordeaux
+ * Copyright © 2020-2022 Inria.  All rights reserved.
+ *
+ * See COPYING in top-level directory.
+ */
+
+#ifndef HWLOC_PRIVATE_WINDOWS_H
+#define HWLOC_PRIVATE_WINDOWS_H
+
+#ifndef _ANONYMOUS_UNION
+#ifdef __GNUC__
+#define _ANONYMOUS_UNION __extension__
+#else
+#define _ANONYMOUS_UNION
+#endif /* __GNUC__ */
+#endif /* _ANONYMOUS_UNION */
+
+#ifndef _ANONYMOUS_STRUCT
+#ifdef __GNUC__
+#define _ANONYMOUS_STRUCT __extension__
+#else
+#define _ANONYMOUS_STRUCT
+#endif /* __GNUC__ */
+#endif /* _ANONYMOUS_STRUCT */
+
+#define DUMMYUNIONNAME
+#define DUMMYSTRUCTNAME
+
+#endif /* HWLOC_PRIVATE_WINDOWS_H */

src/3rdparty/hwloc/src/components.c

@@ -1,5 +1,5 @@
 /*
- * Copyright © 2009-2021 Inria.  All rights reserved.
+ * Copyright © 2009-2022 Inria.  All rights reserved.
  * Copyright © 2012 Université Bordeaux
  * See COPYING in top-level directory.
  */
@@ -386,7 +386,7 @@ hwloc_disc_component_register(struct hwloc_disc_component *component,
 				   |HWLOC_DISC_PHASE_MISC
 				   |HWLOC_DISC_PHASE_ANNOTATE
 				   |HWLOC_DISC_PHASE_TWEAK))) {
-    if (hwloc_hide_errors() < 2)
+    if (HWLOC_SHOW_CRITICAL_ERRORS())
       fprintf(stderr, "hwloc: Cannot register discovery component `%s' with invalid phases 0x%x\n",
               component->name, component->phases);
     return -1;
@@ -476,7 +476,7 @@ hwloc_components_init(void)
   /* hwloc_static_components is created by configure in static-components.h */
   for(i=0; NULL != hwloc_static_components[i]; i++) {
     if (hwloc_static_components[i]->flags) {
-      if (hwloc_hide_errors() < 2)
+      if (HWLOC_SHOW_CRITICAL_ERRORS())
         fprintf(stderr, "hwloc: Ignoring static component with invalid flags %lx\n",
                 hwloc_static_components[i]->flags);
       continue;
@@ -505,7 +505,7 @@ hwloc_components_init(void)
 #ifdef HWLOC_HAVE_PLUGINS
   for(desc = hwloc_plugins; NULL != desc; desc = desc->next) {
     if (desc->component->flags) {
-      if (hwloc_hide_errors() < 2)
+      if (HWLOC_SHOW_CRITICAL_ERRORS())
         fprintf(stderr, "hwloc: Ignoring plugin `%s' component with invalid flags %lx\n",
                 desc->name, desc->component->flags);
       continue;
@@ -738,7 +738,7 @@ hwloc_disc_component_try_enable(struct hwloc_topology *topology,
   backend = comp->instantiate(topology, comp, topology->backend_excluded_phases | blacklisted_phases,
 			      NULL, NULL, NULL);
   if (!backend) {
-    if (hwloc_components_verbose || (envvar_forced && hwloc_hide_errors() < 2))
+    if (hwloc_components_verbose || (envvar_forced && HWLOC_SHOW_CRITICAL_ERRORS()))
       fprintf(stderr, "hwloc: Failed to instantiate discovery component `%s'\n", comp->name);
     return -1;
   }
@@ -835,7 +835,7 @@ hwloc_disc_components_enable_others(struct hwloc_topology *topology)
 	  if (comp->phases & ~blacklisted_phases)
 	    hwloc_disc_component_try_enable(topology, comp, 1 /* envvar forced */, blacklisted_phases);
 	} else {
-          if (hwloc_hide_errors() < 2)
+          if (HWLOC_SHOW_CRITICAL_ERRORS())
             fprintf(stderr, "hwloc: Cannot find discovery component `%s'\n", name);
 	}
 
@@ -967,7 +967,7 @@ hwloc_backend_enable(struct hwloc_backend *backend)
 
   /* check backend flags */
   if (backend->flags) {
-    if (hwloc_hide_errors() < 2)
+    if (HWLOC_SHOW_CRITICAL_ERRORS())
       fprintf(stderr, "hwloc: Cannot enable discovery component `%s' phases 0x%x with unknown flags %lx\n",
               backend->component->name, backend->component->phases, backend->flags);
     return -1;

src/3rdparty/hwloc/src/cpukinds.c

@@ -1,5 +1,5 @@
 /*
- * Copyright © 2020-2021 Inria.  All rights reserved.
+ * Copyright © 2020-2022 Inria.  All rights reserved.
  * See COPYING in top-level directory.
  */
 
@@ -42,6 +42,9 @@ hwloc_internal_cpukinds_dup(hwloc_topology_t new, hwloc_topology_t old)
   struct hwloc_internal_cpukind_s *kinds;
   unsigned i;
 
+  if (!old->nr_cpukinds)
+    return 0;
+
   kinds = hwloc_tma_malloc(tma, old->nr_cpukinds * sizeof(*kinds));
   if (!kinds)
     return -1;
@@ -445,7 +448,9 @@ static int hwloc__cpukinds_compare_ranking_values(const void *_a, const void *_b
 {
   const struct hwloc_internal_cpukind_s *a = _a;
   const struct hwloc_internal_cpukind_s *b = _b;
-  return a->ranking_value - b->ranking_value;
+  uint64_t arv = a->ranking_value;
+  uint64_t brv = b->ranking_value;
+  return arv < brv ? -1 : arv > brv ? 1 : 0;
 }
 
 /* this function requires ranking values to be unique */
@@ -499,7 +504,7 @@ hwloc_internal_cpukinds_rank(struct hwloc_topology *topology)
       heuristics = HWLOC_CPUKINDS_RANKING_FORCED_EFFICIENCY;
     else if (!strcmp(env, "no_forced_efficiency"))
       heuristics = HWLOC_CPUKINDS_RANKING_NO_FORCED_EFFICIENCY;
-    else if (hwloc_hide_errors() < 2)
+    else if (HWLOC_SHOW_CRITICAL_ERRORS())
       fprintf(stderr, "hwloc: Failed to recognize HWLOC_CPUKINDS_RANKING value %s\n", env);
   }
 

src/3rdparty/hwloc/src/diff.c

@@ -1,5 +1,5 @@
 /*
- * Copyright © 2013-2020 Inria.  All rights reserved.
+ * Copyright © 2013-2022 Inria.  All rights reserved.
  * See COPYING in top-level directory.
  */
 
@@ -218,7 +218,7 @@ hwloc_diff_trees(hwloc_topology_t topo1, hwloc_obj_t obj1,
 		struct hwloc_info_s *info1 = &obj1->infos[i], *info2 = &obj2->infos[i];
 		if (strcmp(info1->name, info2->name))
 			goto out_too_complex;
-		if (strcmp(obj1->infos[i].value, obj2->infos[i].value)) {
+		if (strcmp(info1->value, info2->value)) {
 			err = hwloc_append_diff_obj_attr_string(obj1,
 								HWLOC_TOPOLOGY_DIFF_OBJ_ATTR_INFO,
 								info1->name,

src/3rdparty/hwloc/src/distances.c

@@ -1,5 +1,5 @@
 /*
- * Copyright © 2010-2021 Inria.  All rights reserved.
+ * Copyright © 2010-2022 Inria.  All rights reserved.
  * Copyright © 2011-2012 Université Bordeaux
  * Copyright © 2011 Cisco Systems, Inc.  All rights reserved.
  * See COPYING in top-level directory.
@@ -860,7 +860,7 @@ struct hwloc_distances_container_s {
   struct hwloc_distances_s distances;
 };
 
-#define HWLOC_DISTANCES_CONTAINER_OFFSET ((char*)&((struct hwloc_distances_container_s*)NULL)->distances - (char*)NULL)
+#define HWLOC_DISTANCES_CONTAINER_OFFSET ((uintptr_t)(&((struct hwloc_distances_container_s*)NULL)->distances) - (uintptr_t)NULL)
 #define HWLOC_DISTANCES_CONTAINER(_d) (struct hwloc_distances_container_s *) ( ((char*)_d) - HWLOC_DISTANCES_CONTAINER_OFFSET )
 
 static struct hwloc_internal_distances_s *

src/3rdparty/hwloc/src/memattrs.c

@@ -1,11 +1,12 @@
 /*
- * Copyright © 2020 Inria.  All rights reserved.
+ * Copyright © 2020-2022 Inria.  All rights reserved.
  * See COPYING in top-level directory.
  */
 
 #include "private/autogen/config.h"
 #include "hwloc.h"
 #include "private/private.h"
+#include "private/debug.h"
 
 
 /*****************************
@@ -49,36 +50,51 @@ hwloc__setup_memattr(struct hwloc_internal_memattr_s *imattr,
 void
 hwloc_internal_memattrs_prepare(struct hwloc_topology *topology)
 {
-#define NR_DEFAULT_MEMATTRS 4
-  topology->memattrs = malloc(NR_DEFAULT_MEMATTRS * sizeof(*topology->memattrs));
+  topology->memattrs = malloc(HWLOC_MEMATTR_ID_MAX * sizeof(*topology->memattrs));
   if (!topology->memattrs)
     return;
 
-  assert(HWLOC_MEMATTR_ID_CAPACITY < NR_DEFAULT_MEMATTRS);
   hwloc__setup_memattr(&topology->memattrs[HWLOC_MEMATTR_ID_CAPACITY],
                        (char *) "Capacity",
                        HWLOC_MEMATTR_FLAG_HIGHER_FIRST,
                        HWLOC_IMATTR_FLAG_STATIC_NAME|HWLOC_IMATTR_FLAG_CONVENIENCE);
 
-  assert(HWLOC_MEMATTR_ID_LOCALITY < NR_DEFAULT_MEMATTRS);
   hwloc__setup_memattr(&topology->memattrs[HWLOC_MEMATTR_ID_LOCALITY],
                        (char *) "Locality",
                        HWLOC_MEMATTR_FLAG_LOWER_FIRST,
                        HWLOC_IMATTR_FLAG_STATIC_NAME|HWLOC_IMATTR_FLAG_CONVENIENCE);
 
-  assert(HWLOC_MEMATTR_ID_BANDWIDTH < NR_DEFAULT_MEMATTRS);
   hwloc__setup_memattr(&topology->memattrs[HWLOC_MEMATTR_ID_BANDWIDTH],
                        (char *) "Bandwidth",
                        HWLOC_MEMATTR_FLAG_HIGHER_FIRST|HWLOC_MEMATTR_FLAG_NEED_INITIATOR,
                        HWLOC_IMATTR_FLAG_STATIC_NAME);
 
-  assert(HWLOC_MEMATTR_ID_LATENCY < NR_DEFAULT_MEMATTRS);
+  hwloc__setup_memattr(&topology->memattrs[HWLOC_MEMATTR_ID_READ_BANDWIDTH],
+                       (char *) "ReadBandwidth",
+                       HWLOC_MEMATTR_FLAG_HIGHER_FIRST|HWLOC_MEMATTR_FLAG_NEED_INITIATOR,
+                       HWLOC_IMATTR_FLAG_STATIC_NAME);
+
+  hwloc__setup_memattr(&topology->memattrs[HWLOC_MEMATTR_ID_WRITE_BANDWIDTH],
+                       (char *) "WriteBandwidth",
+                       HWLOC_MEMATTR_FLAG_HIGHER_FIRST|HWLOC_MEMATTR_FLAG_NEED_INITIATOR,
+                       HWLOC_IMATTR_FLAG_STATIC_NAME);
+
   hwloc__setup_memattr(&topology->memattrs[HWLOC_MEMATTR_ID_LATENCY],
                        (char *) "Latency",
                        HWLOC_MEMATTR_FLAG_LOWER_FIRST|HWLOC_MEMATTR_FLAG_NEED_INITIATOR,
                        HWLOC_IMATTR_FLAG_STATIC_NAME);
 
-  topology->nr_memattrs = NR_DEFAULT_MEMATTRS;
+  hwloc__setup_memattr(&topology->memattrs[HWLOC_MEMATTR_ID_READ_LATENCY],
+                       (char *) "ReadLatency",
+                       HWLOC_MEMATTR_FLAG_LOWER_FIRST|HWLOC_MEMATTR_FLAG_NEED_INITIATOR,
+                       HWLOC_IMATTR_FLAG_STATIC_NAME);
+
+  hwloc__setup_memattr(&topology->memattrs[HWLOC_MEMATTR_ID_WRITE_LATENCY],
+                       (char *) "WriteLatency",
+                       HWLOC_MEMATTR_FLAG_LOWER_FIRST|HWLOC_MEMATTR_FLAG_NEED_INITIATOR,
+                       HWLOC_IMATTR_FLAG_STATIC_NAME);
+
+  topology->nr_memattrs = HWLOC_MEMATTR_ID_MAX;
 }
 
 static void
@@ -127,6 +143,8 @@ hwloc_internal_memattrs_dup(struct hwloc_topology *new, struct hwloc_topology *o
   struct hwloc_internal_memattr_s *imattrs;
   hwloc_memattr_id_t id;
 
+  /* old->nr_memattrs is always > 0 thanks to default memattrs */
+
   imattrs = hwloc_tma_malloc(tma, old->nr_memattrs * sizeof(*imattrs));
   if (!imattrs)
     return -1;
@@ -1195,3 +1213,214 @@ hwloc_get_local_numanode_objs(hwloc_topology_t topology,
   *nrp = i;
   return 0;
 }
+
+
+/**************************************
+ * Using memattrs to identify HBM/DRAM
+ */
+
+struct hwloc_memory_tier_s {
+  hwloc_obj_t node;
+  uint64_t local_bw;
+  enum hwloc_memory_tier_type_e {
+    /* warning the order is important for guess_memory_tiers() after qsort() */
+    HWLOC_MEMORY_TIER_UNKNOWN,
+    HWLOC_MEMORY_TIER_DRAM,
+    HWLOC_MEMORY_TIER_HBM,
+    HWLOC_MEMORY_TIER_SPM, /* Specific-Purpose Memory is usually HBM, we'll use BW to confirm */
+    HWLOC_MEMORY_TIER_NVM,
+    HWLOC_MEMORY_TIER_GPU,
+  } type;
+};
+
+static int compare_tiers(const void *_a, const void *_b)
+{
+  const struct hwloc_memory_tier_s *a = _a, *b = _b;
+  /* sort by type of tier first */
+  if (a->type != b->type)
+    return a->type - b->type;
+  /* then by bandwidth */
+  if (a->local_bw > b->local_bw)
+    return -1;
+  else if (a->local_bw < b->local_bw)
+    return 1;
+  return 0;
+}
+
+int
+hwloc_internal_memattrs_guess_memory_tiers(hwloc_topology_t topology)
+{
+  struct hwloc_internal_memattr_s *imattr;
+  struct hwloc_memory_tier_s *tiers;
+  unsigned i, j, n;
+  const char *env;
+  int spm_is_hbm = -1; /* -1 will guess from BW, 0 no, 1 forced */
+  int mark_dram = 1;
+  unsigned first_spm, first_nvm;
+  hwloc_uint64_t max_unknown_bw, min_spm_bw;
+
+  env = getenv("HWLOC_MEMTIERS_GUESS");
+  if (env) {
+    if (!strcmp(env, "none")) {
+      return 0;
+    } else if (!strcmp(env, "default")) {
+      /* nothing */
+    } else if (!strcmp(env, "spm_is_hbm")) {
+      hwloc_debug("Assuming SPM-tier is HBM, ignore bandwidth\n");
+      spm_is_hbm = 1;
+    } else if (HWLOC_SHOW_CRITICAL_ERRORS()) {
+      fprintf(stderr, "hwloc: Failed to recognize HWLOC_MEMTIERS_GUESS value %s\n", env);
+    }
+  }
+
+  imattr = &topology->memattrs[HWLOC_MEMATTR_ID_BANDWIDTH];
+
+  if (!(imattr->iflags & HWLOC_IMATTR_FLAG_CACHE_VALID))
+    hwloc__imattr_refresh(topology, imattr);
+
+  n = hwloc_get_nbobjs_by_depth(topology, HWLOC_TYPE_DEPTH_NUMANODE);
+  assert(n);
+
+  tiers = malloc(n * sizeof(*tiers));
+  if (!tiers)
+    return -1;
+
+  for(i=0; i<n; i++) {
+    hwloc_obj_t node;
+    const char *daxtype;
+    struct hwloc_internal_location_s iloc;
+    struct hwloc_internal_memattr_target_s *imtg = NULL;
+    struct hwloc_internal_memattr_initiator_s *imi;
+
+    node = hwloc_get_obj_by_depth(topology, HWLOC_TYPE_DEPTH_NUMANODE, i);
+    assert(node);
+    tiers[i].node = node;
+
+    /* defaults */
+    tiers[i].type = HWLOC_MEMORY_TIER_UNKNOWN;
+    tiers[i].local_bw = 0; /* unknown */
+
+    daxtype = hwloc_obj_get_info_by_name(node, "DAXType");
+    /* mark NVM, SPM and GPU nodes */
+    if (daxtype && !strcmp(daxtype, "NVM"))
+      tiers[i].type = HWLOC_MEMORY_TIER_NVM;
+    if (daxtype && !strcmp(daxtype, "SPM"))
+      tiers[i].type = HWLOC_MEMORY_TIER_SPM;
+    if (node->subtype && !strcmp(node->subtype, "GPUMemory"))
+      tiers[i].type = HWLOC_MEMORY_TIER_GPU;
+
+    if (spm_is_hbm == -1) {
+      for(j=0; j<imattr->nr_targets; j++)
+        if (imattr->targets[j].obj == node) {
+          imtg = &imattr->targets[j];
+          break;
+        }
+      if (imtg && !hwloc_bitmap_iszero(node->cpuset)) {
+        iloc.type = HWLOC_LOCATION_TYPE_CPUSET;
+        iloc.location.cpuset = node->cpuset;
+        imi = hwloc__memattr_target_get_initiator(imtg, &iloc, 0);
+        if (imi)
+          tiers[i].local_bw = imi->value;
+      }
+    }
+  }
+
+  /* sort tiers */
+  qsort(tiers, n, sizeof(*tiers), compare_tiers);
+  hwloc_debug("Sorting memory tiers...\n");
+  for(i=0; i<n; i++)
+    hwloc_debug("  tier %u = node L#%u P#%u with tier type %d and local BW #%llu\n",
+                i,
+                tiers[i].node->logical_index, tiers[i].node->os_index,
+                tiers[i].type, (unsigned long long) tiers[i].local_bw);
+
+  /* now we have UNKNOWN tiers (sorted by BW), then SPM tiers (sorted by BW), then NVM, then GPU */
+
+  /* iterate over UNKNOWN tiers, and find their BW */
+  for(i=0; i<n; i++) {
+    if (tiers[i].type > HWLOC_MEMORY_TIER_UNKNOWN)
+      break;
+  }
+  first_spm = i;
+  /* get max BW from first */
+  if (first_spm > 0)
+    max_unknown_bw = tiers[0].local_bw;
+  else
+    max_unknown_bw = 0;
+
+  /* there are no DRAM or HBM tiers yet */
+
+  /* iterate over SPM tiers, and find their BW */
+  for(i=first_spm; i<n; i++) {
+    if (tiers[i].type > HWLOC_MEMORY_TIER_SPM)
+      break;
+  }
+  first_nvm = i;
+  /* get min BW from last */
+  if (first_nvm > first_spm)
+    min_spm_bw = tiers[first_nvm-1].local_bw;
+  else
+    min_spm_bw = 0;
+
+  /* FIXME: if there's more than 10% between some sets of nodes inside a tier, split it? */
+  /* FIXME: if there are cpuset-intersecting nodes in same tier, abort? */
+
+  if (spm_is_hbm == -1) {
+    /* if we have BW for all SPM and UNKNOWN
+     * and all SPM BW are 2x superior to all UNKNOWN BW
+     */
+    hwloc_debug("UNKNOWN-memory-tier max bandwidth %llu\n", (unsigned long long) max_unknown_bw);
+    hwloc_debug("SPM-memory-tier min bandwidth %llu\n", (unsigned long long) min_spm_bw);
+    if (max_unknown_bw > 0 && min_spm_bw > 0 && max_unknown_bw*2 < min_spm_bw) {
+      hwloc_debug("assuming SPM means HBM and !SPM means DRAM since bandwidths are very different\n");
+      spm_is_hbm = 1;
+    } else {
+      hwloc_debug("cannot assume SPM means HBM\n");
+      spm_is_hbm = 0;
+    }
+  }
+
+  if (spm_is_hbm) {
+    for(i=0; i<first_spm; i++)
+      tiers[i].type = HWLOC_MEMORY_TIER_DRAM;
+    for(i=first_spm; i<first_nvm; i++)
+      tiers[i].type = HWLOC_MEMORY_TIER_HBM;
+  }
+
+  if (first_spm == n)
+    mark_dram = 0;
+
+    /* now apply subtypes */
+  for(i=0; i<n; i++) {
+    const char *type = NULL;
+    if (tiers[i].node->subtype) /* don't overwrite the existing subtype */
+      continue;
+    switch (tiers[i].type) {
+    case HWLOC_MEMORY_TIER_DRAM:
+      if (mark_dram)
+        type = "DRAM";
+      break;
+    case HWLOC_MEMORY_TIER_HBM:
+      type = "HBM";
+      break;
+    case HWLOC_MEMORY_TIER_SPM:
+      type = "SPM";
+      break;
+    case HWLOC_MEMORY_TIER_NVM:
+      type = "NVM";
+      break;
+    default:
+      /* GPU memory is already marked with subtype="GPUMemory",
+       * UNKNOWN doesn't deserve any subtype
+       */
+      break;
+    }
+    if (type) {
+      hwloc_debug("Marking node L#%u P#%u as %s\n", tiers[i].node->logical_index, tiers[i].node->os_index, type);
+      tiers[i].node->subtype = strdup(type);
+    }
+  }
+
+  free(tiers);
+  return 0;
+}

src/3rdparty/hwloc/src/pci-common.c

@@ -1,5 +1,5 @@
 /*
- * Copyright © 2009-2021 Inria.  All rights reserved.
+ * Copyright © 2009-2022 Inria.  All rights reserved.
  * See COPYING in top-level directory.
  */
 
@@ -119,6 +119,13 @@ hwloc_pci_discovery_init(struct hwloc_topology *topology)
   topology->pci_forced_locality = NULL;
 
   topology->first_pci_locality = topology->last_pci_locality = NULL;
+
+#define HWLOC_PCI_LOCALITY_QUIRK_CRAY_EX235A (1ULL<<0)
+#define HWLOC_PCI_LOCALITY_QUIRK_FAKE (1ULL<<62)
+  topology->pci_locality_quirks = (uint64_t) -1;
+  /* -1 is unknown, 0 is disabled, >0 is bitmask of enabled quirks.
+   * bit 63 should remain unused so that -1 is unaccessible as a bitmask.
+   */
 }
 
 void
@@ -146,7 +153,7 @@ hwloc_pci_discovery_prepare(struct hwloc_topology *topology)
 	  }
 	  free(buffer);
 	} else {
-          if (hwloc_hide_errors() < 2)
+          if (HWLOC_SHOW_CRITICAL_ERRORS())
             fprintf(stderr, "hwloc/pci: Ignoring HWLOC_PCI_LOCALITY file `%s' too large (%lu bytes)\n",
                     env, (unsigned long) st.st_size);
 	}
@@ -333,7 +340,7 @@ hwloc_pci_add_object(struct hwloc_obj *parent, struct hwloc_obj **parent_io_firs
     }
     case HWLOC_PCI_BUSID_EQUAL: {
       static int reported = 0;
-      if (!reported && hwloc_hide_errors() < 2) {
+      if (!reported && HWLOC_SHOW_CRITICAL_ERRORS()) {
         fprintf(stderr, "*********************************************************\n");
         fprintf(stderr, "* hwloc %s received invalid PCI information.\n", HWLOC_VERSION);
         fprintf(stderr, "*\n");
@@ -442,13 +449,90 @@ hwloc_pcidisc_add_hostbridges(struct hwloc_topology *topology,
   return new;
 }
 
-static struct hwloc_obj *
-hwloc_pci_fixup_busid_parent(struct hwloc_topology *topology __hwloc_attribute_unused,
-			     struct hwloc_pcidev_attr_s *busid __hwloc_attribute_unused,
-			     struct hwloc_obj *parent __hwloc_attribute_unused)
+/* return 1 if a quirk was applied */
+static int
+hwloc__pci_find_busid_parent_quirk(struct hwloc_topology *topology,
+                                   struct hwloc_pcidev_attr_s *busid,
+                                   hwloc_cpuset_t cpuset)
 {
-  /* no quirk for now */
-  return parent;
+  if (topology->pci_locality_quirks == (uint64_t)-1 /* unknown */) {
+    const char *dmi_board_name, *env;
+
+    /* first invokation, detect which quirks are needed */
+    topology->pci_locality_quirks = 0; /* no quirk yet */
+
+    dmi_board_name = hwloc_obj_get_info_by_name(hwloc_get_root_obj(topology), "DMIBoardName");
+    if (dmi_board_name && !strcmp(dmi_board_name, "HPE CRAY EX235A")) {
+      hwloc_debug("enabling for PCI locality quirk for HPE Cray EX235A\n");
+      topology->pci_locality_quirks |= HWLOC_PCI_LOCALITY_QUIRK_CRAY_EX235A;
+    }
+
+    env = getenv("HWLOC_PCI_LOCALITY_QUIRK_FAKE");
+    if (env && atoi(env)) {
+      hwloc_debug("enabling for PCI locality fake quirk (attaching everything to last PU)\n");
+      topology->pci_locality_quirks |= HWLOC_PCI_LOCALITY_QUIRK_FAKE;
+    }
+  }
+
+  if (topology->pci_locality_quirks & HWLOC_PCI_LOCALITY_QUIRK_FAKE) {
+    unsigned last = hwloc_bitmap_last(hwloc_topology_get_topology_cpuset(topology));
+    hwloc_bitmap_set(cpuset, last);
+    return 1;
+  }
+
+  if (topology->pci_locality_quirks & HWLOC_PCI_LOCALITY_QUIRK_CRAY_EX235A) {
+    /* AMD Trento has xGMI ports connected to individual CCDs (8 cores + L3)
+     * instead of NUMA nodes (pairs of CCDs within Trento) as is usual in AMD EPYC CPUs.
+     * This is not described by the ACPI tables, hence we need to manually hardwire
+     * the xGMI locality for the (currently single) server that currently uses that CPU.
+     * It's not clear if ACPI tables can/will ever be fixed (would require one initiator
+     * proximity domain per CCD), or if Linux can/will work around the issue.
+     */
+    if (busid->domain == 0) {
+      if (busid->bus >= 0xd0 && busid->bus <= 0xd1) {
+        hwloc_bitmap_set_range(cpuset, 0, 7);
+        hwloc_bitmap_set_range(cpuset, 64, 71);
+        return 1;
+      }
+      if (busid->bus >= 0xd4 && busid->bus <= 0xd6) {
+        hwloc_bitmap_set_range(cpuset, 8, 15);
+        hwloc_bitmap_set_range(cpuset, 72, 79);
+        return 1;
+      }
+      if (busid->bus >= 0xc8 && busid->bus <= 0xc9) {
+        hwloc_bitmap_set_range(cpuset, 16, 23);
+        hwloc_bitmap_set_range(cpuset, 80, 87);
+        return 1;
+      }
+      if (busid->bus >= 0xcc && busid->bus <= 0xce) {
+        hwloc_bitmap_set_range(cpuset, 24, 31);
+        hwloc_bitmap_set_range(cpuset, 88, 95);
+        return 1;
+      }
+      if (busid->bus >= 0xd8 && busid->bus <= 0xd9) {
+        hwloc_bitmap_set_range(cpuset, 32, 39);
+        hwloc_bitmap_set_range(cpuset, 96, 103);
+        return 1;
+      }
+      if (busid->bus >= 0xdc && busid->bus <= 0xde) {
+        hwloc_bitmap_set_range(cpuset, 40, 47);
+        hwloc_bitmap_set_range(cpuset, 104, 111);
+        return 1;
+      }
+      if (busid->bus >= 0xc0 && busid->bus <= 0xc1) {
+        hwloc_bitmap_set_range(cpuset, 48, 55);
+        hwloc_bitmap_set_range(cpuset, 112, 119);
+        return 1;
+      }
+      if (busid->bus >= 0xc4 && busid->bus <= 0xc6) {
+        hwloc_bitmap_set_range(cpuset, 56, 63);
+        hwloc_bitmap_set_range(cpuset, 120, 127);
+        return 1;
+      }
+    }
+  }
+
+  return 0;
 }
 
 static struct hwloc_obj *
@@ -457,7 +541,7 @@ hwloc__pci_find_busid_parent(struct hwloc_topology *topology, struct hwloc_pcide
   hwloc_bitmap_t cpuset = hwloc_bitmap_alloc();
   hwloc_obj_t parent;
   int forced = 0;
-  int noquirks = 0;
+  int noquirks = 0, got_quirked = 0;
   unsigned i;
   int err;
 
@@ -490,7 +574,7 @@ hwloc__pci_find_busid_parent(struct hwloc_topology *topology, struct hwloc_pcide
     if (env) {
       static int reported = 0;
       if (!topology->pci_has_forced_locality && !reported) {
-        if (!hwloc_hide_errors())
+        if (HWLOC_SHOW_ALL_ERRORS())
           fprintf(stderr, "hwloc/pci: Environment variable %s is deprecated, please use HWLOC_PCI_LOCALITY instead.\n", env);
 	reported = 1;
       }
@@ -505,7 +589,13 @@ hwloc__pci_find_busid_parent(struct hwloc_topology *topology, struct hwloc_pcide
     }
   }
 
-  if (!forced) {
+  if (!forced && !noquirks && topology->pci_locality_quirks /* either quirks are unknown yet, or some are enabled */) {
+    err = hwloc__pci_find_busid_parent_quirk(topology, busid, cpuset);
+    if (err > 0)
+      got_quirked = 1;
+  }
+
+  if (!forced && !got_quirked) {
     /* get the cpuset by asking the backend that provides the relevant hook, if any. */
     struct hwloc_backend *backend = topology->get_pci_busid_cpuset_backend;
     if (backend)
@@ -520,11 +610,7 @@ hwloc__pci_find_busid_parent(struct hwloc_topology *topology, struct hwloc_pcide
   hwloc_debug_bitmap("  will attach PCI bus to cpuset %s\n", cpuset);
 
   parent = hwloc_find_insert_io_parent_by_complete_cpuset(topology, cpuset);
-  if (parent) {
-    if (!noquirks)
-      /* We found a valid parent. Check that the OS didn't report invalid locality */
-      parent = hwloc_pci_fixup_busid_parent(topology, busid, parent);
-  } else {
+  if (!parent) {
     /* Fallback to root */
     parent = hwloc_get_root_obj(topology);
   }
@@ -805,18 +891,28 @@ hwloc_pcidisc_find_linkspeed(const unsigned char *config,
   memcpy(&linksta, &config[offset + HWLOC_PCI_EXP_LNKSTA], 4);
   speed = linksta & HWLOC_PCI_EXP_LNKSTA_SPEED; /* PCIe generation */
   width = (linksta & HWLOC_PCI_EXP_LNKSTA_WIDTH) >> 4; /* how many lanes */
-  /* PCIe Gen1 = 2.5GT/s signal-rate per lane with 8/10 encoding    = 0.25GB/s data-rate per lane
-   * PCIe Gen2 = 5  GT/s signal-rate per lane with 8/10 encoding    = 0.5 GB/s data-rate per lane
-   * PCIe Gen3 = 8  GT/s signal-rate per lane with 128/130 encoding = 1   GB/s data-rate per lane
-   * PCIe Gen4 = 16 GT/s signal-rate per lane with 128/130 encoding = 2   GB/s data-rate per lane
-   * PCIe Gen5 = 32 GT/s signal-rate per lane with 128/130 encoding = 4   GB/s data-rate per lane
+  /*
+   * These are single-direction bandwidths only.
+   *
+   * Gen1 used NRZ with 8/10 encoding.
+   * PCIe Gen1 = 2.5GT/s signal-rate per lane x 8/10    =  0.25GB/s data-rate per lane
+   * PCIe Gen2 = 5  GT/s signal-rate per lane x 8/10    =  0.5 GB/s data-rate per lane
+   * Gen3 switched to NRZ with 128/130 encoding.
+   * PCIe Gen3 = 8  GT/s signal-rate per lane x 128/130 =  1   GB/s data-rate per lane
+   * PCIe Gen4 = 16 GT/s signal-rate per lane x 128/130 =  2   GB/s data-rate per lane
+   * PCIe Gen5 = 32 GT/s signal-rate per lane x 128/130 =  4   GB/s data-rate per lane
+   * Gen6 switched to PAM with with 242/256 FLIT (242B payload protected by 8B CRC + 6B FEC).
+   * PCIe Gen6 = 64 GT/s signal-rate per lane x 242/256 =  8   GB/s data-rate per lane
+   * PCIe Gen7 = 128GT/s signal-rate per lane x 242/256 = 16   GB/s data-rate per lane
    */
 
   /* lanespeed in Gbit/s */
   if (speed <= 2)
     lanespeed = 2.5f * speed * 0.8f;
+  else if (speed <= 5)
+    lanespeed = 8.0f * (1<<(speed-3)) * 128/130;
   else
-    lanespeed = 8.0f * (1<<(speed-3)) * 128/130; /* assume Gen6 will be 64 GT/s and so on */
+    lanespeed = 8.0f * (1<<(speed-3)) * 242/256; /* assume Gen8 will be 256 GT/s and so on */
 
   /* linkspeed in GB/s */
   *linkspeed = lanespeed * width / 8;
@@ -943,6 +1039,7 @@ hwloc_pci_class_string(unsigned short class_id)
       switch (class_id) {
 	case 0x0500: return "RAM";
 	case 0x0501: return "Flash";
+        case 0x0502: return "CXLMem";
       }
       return "Memory";
     case 0x06:

src/3rdparty/hwloc/src/topology-synthetic.c

@@ -1,6 +1,6 @@
 /*
  * Copyright © 2009 CNRS
- * Copyright © 2009-2020 Inria.  All rights reserved.
+ * Copyright © 2009-2022 Inria.  All rights reserved.
  * Copyright © 2009-2010 Université Bordeaux
  * Copyright © 2009-2011 Cisco Systems, Inc.  All rights reserved.
  * See COPYING in top-level directory.
@@ -323,17 +323,29 @@ hwloc_synthetic_parse_memory_attr(const char *attr, const char **endp)
   hwloc_uint64_t size;
   size = strtoull(attr, (char **) &endptr, 0);
   if (!hwloc_strncasecmp(endptr, "TB", 2)) {
+    size *= 1000ULL*1000ULL*1000ULL*1000ULL;
+    endptr += 2;
+  } else if (!hwloc_strncasecmp(endptr, "TiB", 3)) {
     size <<= 40;
-    endptr += 2;
+    endptr += 3;
   } else if (!hwloc_strncasecmp(endptr, "GB", 2)) {
+    size *= 1000ULL*1000ULL*1000ULL;
+    endptr += 2;
+  } else if (!hwloc_strncasecmp(endptr, "GiB", 3)) {
     size <<= 30;
-    endptr += 2;
+    endptr += 3;
   } else if (!hwloc_strncasecmp(endptr, "MB", 2)) {
+    size *= 1000ULL*1000ULL;
+    endptr += 2;
+  } else if (!hwloc_strncasecmp(endptr, "MiB", 3)) {
     size <<= 20;
-    endptr += 2;
+    endptr += 3;
   } else if (!hwloc_strncasecmp(endptr, "kB", 2)) {
-    size <<= 10;
+    size *= 1000ULL;
     endptr += 2;
+  } else if (!hwloc_strncasecmp(endptr, "kiB", 3)) {
+    size <<= 10;
+    endptr += 3;
   }
   *endp = endptr;
   return size;
@@ -802,15 +814,15 @@ hwloc_backend_synthetic_init(struct hwloc_synthetic_backend_data_s *data,
     } else if (hwloc__obj_type_is_cache(type)) {
       if (!curlevel->attr.memorysize) {
 	if (1 == curlevel->attr.depth)
-	  /* 32Kb in L1 */
+	  /* 32KiB in L1 */
 	  curlevel->attr.memorysize = 32*1024;
 	else
-	  /* *4 at each level, starting from 1MB for L2, unified */
+	  /* *4 at each level, starting from 1MiB for L2, unified */
 	  curlevel->attr.memorysize = 256ULL*1024 << (2*curlevel->attr.depth);
       }
 
     } else if (type == HWLOC_OBJ_NUMANODE && !curlevel->attr.memorysize) {
-      /* 1GB in memory nodes. */
+      /* 1GiB in memory nodes. */
       curlevel->attr.memorysize = 1024*1024*1024;
     }
 

src/3rdparty/hwloc/src/topology-windows.c

@@ -1,6 +1,6 @@
 /*
  * Copyright © 2009 CNRS
- * Copyright © 2009-2021 Inria.  All rights reserved.
+ * Copyright © 2009-2022 Inria.  All rights reserved.
  * Copyright © 2009-2012, 2020 Université Bordeaux
  * Copyright © 2011 Cisco Systems, Inc.  All rights reserved.
  * See COPYING in top-level directory.
@@ -13,6 +13,7 @@
 #include "hwloc.h"
 #include "hwloc/windows.h"
 #include "private/private.h"
+#include "private/windows.h" /* must be before windows.h */
 #include "private/debug.h"
 
 #include <windows.h>
@@ -65,26 +66,6 @@ typedef enum _LOGICAL_PROCESSOR_RELATIONSHIP {
 #  endif /* HAVE_RELATIONPROCESSORPACKAGE */
 #endif /* HAVE_LOGICAL_PROCESSOR_RELATIONSHIP */
 
-#ifndef HAVE_SYSTEM_LOGICAL_PROCESSOR_INFORMATION
-typedef struct _SYSTEM_LOGICAL_PROCESSOR_INFORMATION {
-  ULONG_PTR ProcessorMask;
-  LOGICAL_PROCESSOR_RELATIONSHIP Relationship;
-  _ANONYMOUS_UNION
-  union {
-    struct {
-      BYTE flags;
-    } ProcessorCore;
-    struct {
-      DWORD NodeNumber;
-    } NumaNode;
-    CACHE_DESCRIPTOR Cache;
-    ULONGLONG Reserved[2];
-  } DUMMYUNIONNAME;
-} SYSTEM_LOGICAL_PROCESSOR_INFORMATION, *PSYSTEM_LOGICAL_PROCESSOR_INFORMATION;
-#endif
-
-/* Extended interface, for group support */
-
 #ifndef HAVE_GROUP_AFFINITY
 typedef struct _GROUP_AFFINITY {
   KAFFINITY Mask;
@@ -93,35 +74,40 @@ typedef struct _GROUP_AFFINITY {
 } GROUP_AFFINITY, *PGROUP_AFFINITY;
 #endif
 
-#ifndef HAVE_PROCESSOR_RELATIONSHIP
+/* always use our own structure because the EfficiencyClass field didn't exist before Win10 */
 typedef struct HWLOC_PROCESSOR_RELATIONSHIP {
   BYTE Flags;
-  BYTE EfficiencyClass; /* for RelationProcessorCore, higher means greater performance but less efficiency, only available in Win10+ */
+  BYTE EfficiencyClass; /* for RelationProcessorCore, higher means greater performance but less efficiency */
   BYTE Reserved[20];
   WORD GroupCount;
   GROUP_AFFINITY GroupMask[ANYSIZE_ARRAY];
-} PROCESSOR_RELATIONSHIP, *PPROCESSOR_RELATIONSHIP;
-#endif
+} HWLOC_PROCESSOR_RELATIONSHIP;
 
-#ifndef HAVE_NUMA_NODE_RELATIONSHIP
-typedef struct _NUMA_NODE_RELATIONSHIP {
+/* always use our own structure because the GroupCount and GroupMasks fields didn't exist in some Win10 */
+typedef struct HWLOC_NUMA_NODE_RELATIONSHIP {
   DWORD NodeNumber;
-  BYTE Reserved[20];
-  GROUP_AFFINITY GroupMask;
-} NUMA_NODE_RELATIONSHIP, *PNUMA_NODE_RELATIONSHIP;
-#endif
+  BYTE Reserved[18];
+  WORD GroupCount;
+  _ANONYMOUS_UNION
+  union {
+    GROUP_AFFINITY GroupMask;
+    GROUP_AFFINITY GroupMasks[ANYSIZE_ARRAY];
+  } DUMMYUNIONNAME;
+} HWLOC_NUMA_NODE_RELATIONSHIP;
 
-#ifndef HAVE_CACHE_RELATIONSHIP
-typedef struct _CACHE_RELATIONSHIP {
+typedef struct HWLOC_CACHE_RELATIONSHIP {
   BYTE Level;
   BYTE Associativity;
   WORD LineSize;
   DWORD CacheSize;
   PROCESSOR_CACHE_TYPE Type;
-  BYTE Reserved[20];
-  GROUP_AFFINITY GroupMask;
-} CACHE_RELATIONSHIP, *PCACHE_RELATIONSHIP;
-#endif
+  BYTE Reserved[18];
+  WORD GroupCount;
+  union {
+    GROUP_AFFINITY GroupMask;
+    GROUP_AFFINITY GroupMasks[ANYSIZE_ARRAY];
+  } DUMMYUNIONNAME;
+} HWLOC_CACHE_RELATIONSHIP;
 
 #ifndef HAVE_PROCESSOR_GROUP_INFO
 typedef struct _PROCESSOR_GROUP_INFO {
@@ -141,20 +127,19 @@ typedef struct _GROUP_RELATIONSHIP {
 } GROUP_RELATIONSHIP, *PGROUP_RELATIONSHIP;
 #endif
 
-#ifndef HAVE_SYSTEM_LOGICAL_PROCESSOR_INFORMATION_EX
-typedef struct _SYSTEM_LOGICAL_PROCESSOR_INFORMATION_EX {
+/* always use our own structure because we need our own HWLOC_PROCESSOR/CACHE/NUMA_NODE_RELATIONSHIP */
+typedef struct HWLOC_SYSTEM_LOGICAL_PROCESSOR_INFORMATION_EX {
   LOGICAL_PROCESSOR_RELATIONSHIP Relationship;
   DWORD Size;
   _ANONYMOUS_UNION
   union {
-    PROCESSOR_RELATIONSHIP Processor;
-    NUMA_NODE_RELATIONSHIP NumaNode;
-    CACHE_RELATIONSHIP Cache;
+    HWLOC_PROCESSOR_RELATIONSHIP Processor;
+    HWLOC_NUMA_NODE_RELATIONSHIP NumaNode;
+    HWLOC_CACHE_RELATIONSHIP Cache;
     GROUP_RELATIONSHIP Group;
     /* Odd: no member to tell the cpu mask of the package... */
   } DUMMYUNIONNAME;
-} SYSTEM_LOGICAL_PROCESSOR_INFORMATION_EX, *PSYSTEM_LOGICAL_PROCESSOR_INFORMATION_EX;
-#endif
+} HWLOC_SYSTEM_LOGICAL_PROCESSOR_INFORMATION_EX;
 
 #ifndef HAVE_PSAPI_WORKING_SET_EX_BLOCK
 typedef union _PSAPI_WORKING_SET_EX_BLOCK {
@@ -200,10 +185,7 @@ static PFN_GETCURRENTPROCESSORNUMBER GetCurrentProcessorNumberProc;
 typedef VOID (WINAPI *PFN_GETCURRENTPROCESSORNUMBEREX)(PPROCESSOR_NUMBER);
 static PFN_GETCURRENTPROCESSORNUMBEREX GetCurrentProcessorNumberExProc;
 
-typedef BOOL (WINAPI *PFN_GETLOGICALPROCESSORINFORMATION)(PSYSTEM_LOGICAL_PROCESSOR_INFORMATION Buffer, PDWORD ReturnLength);
-static PFN_GETLOGICALPROCESSORINFORMATION GetLogicalProcessorInformationProc;
-
-typedef BOOL (WINAPI *PFN_GETLOGICALPROCESSORINFORMATIONEX)(LOGICAL_PROCESSOR_RELATIONSHIP relationship, PSYSTEM_LOGICAL_PROCESSOR_INFORMATION_EX Buffer, PDWORD ReturnLength);
+typedef BOOL (WINAPI *PFN_GETLOGICALPROCESSORINFORMATIONEX)(LOGICAL_PROCESSOR_RELATIONSHIP relationship, HWLOC_SYSTEM_LOGICAL_PROCESSOR_INFORMATION_EX *Buffer, PDWORD ReturnLength);
 static PFN_GETLOGICALPROCESSORINFORMATIONEX GetLogicalProcessorInformationExProc;
 
 typedef BOOL (WINAPI *PFN_SETTHREADGROUPAFFINITY)(HANDLE hThread, const GROUP_AFFINITY *GroupAffinity, PGROUP_AFFINITY PreviousGroupAffinity);
@@ -244,8 +226,6 @@ static void hwloc_win_get_function_ptrs(void)
 	(PFN_GETACTIVEPROCESSORGROUPCOUNT) GetProcAddress(kernel32, "GetActiveProcessorGroupCount");
       GetActiveProcessorCountProc =
 	(PFN_GETACTIVEPROCESSORCOUNT) GetProcAddress(kernel32, "GetActiveProcessorCount");
-      GetLogicalProcessorInformationProc =
-	(PFN_GETLOGICALPROCESSORINFORMATION) GetProcAddress(kernel32, "GetLogicalProcessorInformation");
       GetCurrentProcessorNumberProc =
 	(PFN_GETCURRENTPROCESSORNUMBER) GetProcAddress(kernel32, "GetCurrentProcessorNumber");
       GetCurrentProcessorNumberExProc =
@@ -370,13 +350,13 @@ static hwloc_cpuset_t * processor_group_cpusets = NULL;
 static void
 hwloc_win_get_processor_groups(void)
 {
-  PSYSTEM_LOGICAL_PROCESSOR_INFORMATION_EX procInfoTotal, tmpprocInfoTotal, procInfo;
+  HWLOC_SYSTEM_LOGICAL_PROCESSOR_INFORMATION_EX *procInfoTotal, *tmpprocInfoTotal, *procInfo;
   DWORD length;
   unsigned i;
 
   hwloc_debug("querying windows processor groups\n");
 
-  if (!GetActiveProcessorGroupCountProc || !GetLogicalProcessorInformationExProc)
+  if (!GetLogicalProcessorInformationExProc)
     goto error;
 
   nr_processor_groups = GetActiveProcessorGroupCountProc();
@@ -386,7 +366,7 @@ hwloc_win_get_processor_groups(void)
   hwloc_debug("found %lu windows processor groups\n", nr_processor_groups);
 
   if (nr_processor_groups > 1 && SIZEOF_VOID_P == 4) {
-    if (!hwloc_hide_errors())
+    if (HWLOC_SHOW_ALL_ERRORS())
       fprintf(stderr, "hwloc: multiple processor groups found on 32bits Windows, topology may be invalid/incomplete.\n");
   }
 
@@ -415,6 +395,8 @@ hwloc_win_get_processor_groups(void)
 
     assert(procInfo->Relationship == RelationGroup);
 
+    hwloc_debug("Found %u active windows processor groups\n",
+                (unsigned) procInfo->Group.ActiveGroupCount);
     for (id = 0; id < procInfo->Group.ActiveGroupCount; id++) {
       KAFFINITY mask;
       hwloc_bitmap_t set;
@@ -424,8 +406,8 @@ hwloc_win_get_processor_groups(void)
         goto error_with_cpusets;
 
       mask = procInfo->Group.GroupInfo[id].ActiveProcessorMask;
-      hwloc_debug("group %u %d cpus mask %lx\n", id,
-                  procInfo->Group.GroupInfo[id].ActiveProcessorCount, mask);
+      hwloc_debug("group %u with %u cpus mask 0x%llx\n", id,
+                  (unsigned) procInfo->Group.GroupInfo[id].ActiveProcessorCount, (unsigned long long) mask);
       /* KAFFINITY is ULONG_PTR */
       hwloc_bitmap_set_ith_ULONG_PTR(set, id, mask);
       /* FIXME: what if running 32bits on a 64bits windows with 64-processor groups?
@@ -1008,6 +990,8 @@ hwloc_look_windows(struct hwloc_backend *backend, struct hwloc_disc_status *dsta
   unsigned hostname_size = sizeof(hostname);
   int has_efficiencyclass = 0;
   struct hwloc_win_efficiency_classes eclasses;
+  char *env = getenv("HWLOC_WINDOWS_PROCESSOR_GROUP_OBJS");
+  int keep_pgroup_objs = (env && atoi(env));
 
   assert(dstatus->phase == HWLOC_DISC_PHASE_CPU);
 
@@ -1038,137 +1022,8 @@ hwloc_look_windows(struct hwloc_backend *backend, struct hwloc_disc_status *dsta
 
   GetSystemInfo(&SystemInfo);
 
-  if (!GetLogicalProcessorInformationExProc && GetLogicalProcessorInformationProc) {
-      PSYSTEM_LOGICAL_PROCESSOR_INFORMATION procInfo, tmpprocInfo;
-      unsigned id;
-      unsigned i;
-      struct hwloc_obj *obj;
-      hwloc_obj_type_t type;
-
-      length = 0;
-      procInfo = NULL;
-
-      while (1) {
-	if (GetLogicalProcessorInformationProc(procInfo, &length))
-	  break;
-	if (GetLastError() != ERROR_INSUFFICIENT_BUFFER)
-	  return -1;
-	tmpprocInfo = realloc(procInfo, length);
-	if (!tmpprocInfo) {
-	  free(procInfo);
-	  goto out;
-	}
-	procInfo = tmpprocInfo;
-      }
-
-      assert(!length || procInfo);
-
-      for (i = 0; i < length / sizeof(*procInfo); i++) {
-
-        /* Ignore unknown caches */
-	if (procInfo->Relationship == RelationCache
-		&& procInfo->Cache.Type != CacheUnified
-		&& procInfo->Cache.Type != CacheData
-		&& procInfo->Cache.Type != CacheInstruction)
-	  continue;
-
-	id = HWLOC_UNKNOWN_INDEX;
-	switch (procInfo[i].Relationship) {
-	  case RelationNumaNode:
-	    type = HWLOC_OBJ_NUMANODE;
-	    id = procInfo[i].NumaNode.NodeNumber;
-	    gotnuma++;
-	    if (id > max_numanode_index)
-	      max_numanode_index = id;
-	    break;
-	  case RelationProcessorPackage:
-	    type = HWLOC_OBJ_PACKAGE;
-	    break;
-	  case RelationCache:
-	    type = (procInfo[i].Cache.Type == CacheInstruction ? HWLOC_OBJ_L1ICACHE : HWLOC_OBJ_L1CACHE) + procInfo[i].Cache.Level - 1;
-	    break;
-	  case RelationProcessorCore:
-	    type = HWLOC_OBJ_CORE;
-	    break;
-	  case RelationGroup:
-	  default:
-	    type = HWLOC_OBJ_GROUP;
-	    break;
-	}
-
-	if (!hwloc_filter_check_keep_object_type(topology, type))
-	  continue;
-
-	obj = hwloc_alloc_setup_object(topology, type, id);
-        obj->cpuset = hwloc_bitmap_alloc();
-	hwloc_debug("%s#%u mask %llx\n", hwloc_obj_type_string(type), id, (unsigned long long) procInfo[i].ProcessorMask);
-	/* ProcessorMask is a ULONG_PTR */
-	hwloc_bitmap_set_ith_ULONG_PTR(obj->cpuset, 0, procInfo[i].ProcessorMask);
-	hwloc_debug_2args_bitmap("%s#%u bitmap %s\n", hwloc_obj_type_string(type), id, obj->cpuset);
-
-	switch (type) {
-	  case HWLOC_OBJ_NUMANODE:
-	    {
-	      ULONGLONG avail;
-	      obj->nodeset = hwloc_bitmap_alloc();
-	      hwloc_bitmap_set(obj->nodeset, id);
-	      if ((GetNumaAvailableMemoryNodeExProc && GetNumaAvailableMemoryNodeExProc(id, &avail))
-		  || (GetNumaAvailableMemoryNodeProc && GetNumaAvailableMemoryNodeProc(id, &avail))) {
-		obj->attr->numanode.local_memory = avail;
-		gotnumamemory++;
-	      }
-	      obj->attr->numanode.page_types_len = 2;
-	      obj->attr->numanode.page_types = malloc(2 * sizeof(*obj->attr->numanode.page_types));
-	      memset(obj->attr->numanode.page_types, 0, 2 * sizeof(*obj->attr->numanode.page_types));
-	      obj->attr->numanode.page_types_len = 1;
-	      obj->attr->numanode.page_types[0].size = SystemInfo.dwPageSize;
-#if HAVE_DECL__SC_LARGE_PAGESIZE
-	      obj->attr->numanode.page_types_len++;
-	      obj->attr->numanode.page_types[1].size = sysconf(_SC_LARGE_PAGESIZE);
-#endif
-	      break;
-	    }
-	  case HWLOC_OBJ_L1CACHE:
-	  case HWLOC_OBJ_L2CACHE:
-	  case HWLOC_OBJ_L3CACHE:
-	  case HWLOC_OBJ_L4CACHE:
-	  case HWLOC_OBJ_L5CACHE:
-	  case HWLOC_OBJ_L1ICACHE:
-	  case HWLOC_OBJ_L2ICACHE:
-	  case HWLOC_OBJ_L3ICACHE:
-	    obj->attr->cache.size = procInfo[i].Cache.Size;
-	    obj->attr->cache.associativity = procInfo[i].Cache.Associativity == CACHE_FULLY_ASSOCIATIVE ? -1 : procInfo[i].Cache.Associativity ;
-	    obj->attr->cache.linesize = procInfo[i].Cache.LineSize;
-	    obj->attr->cache.depth = procInfo[i].Cache.Level;
-	    switch (procInfo->Cache.Type) {
-	      case CacheUnified:
-		obj->attr->cache.type = HWLOC_OBJ_CACHE_UNIFIED;
-		break;
-	      case CacheData:
-		obj->attr->cache.type = HWLOC_OBJ_CACHE_DATA;
-		break;
-	      case CacheInstruction:
-		obj->attr->cache.type = HWLOC_OBJ_CACHE_INSTRUCTION;
-		break;
-	      default:
-		hwloc_free_unlinked_object(obj);
-		continue;
-	    }
-	    break;
-	  case HWLOC_OBJ_GROUP:
-	    obj->attr->group.kind = procInfo[i].Relationship == RelationGroup ? HWLOC_GROUP_KIND_WINDOWS_PROCESSOR_GROUP : HWLOC_GROUP_KIND_WINDOWS_RELATIONSHIP_UNKNOWN;
-	    break;
-	  default:
-	    break;
-	}
-	hwloc__insert_object_by_cpuset(topology, NULL, obj, "windows:GetLogicalProcessorInformation");
-      }
-
-      free(procInfo);
-  }
-
   if (GetLogicalProcessorInformationExProc) {
-      PSYSTEM_LOGICAL_PROCESSOR_INFORMATION_EX procInfoTotal, tmpprocInfoTotal, procInfo;
+      HWLOC_SYSTEM_LOGICAL_PROCESSOR_INFORMATION_EX *procInfoTotal, *tmpprocInfoTotal, *procInfo;
       unsigned id;
       struct hwloc_obj *obj;
       hwloc_obj_type_t type;
@@ -1207,8 +1062,16 @@ hwloc_look_windows(struct hwloc_backend *backend, struct hwloc_disc_status *dsta
 	switch (procInfo->Relationship) {
 	  case RelationNumaNode:
 	    type = HWLOC_OBJ_NUMANODE;
-            num = 1;
-            GroupMask = &procInfo->NumaNode.GroupMask;
+            /* Starting with Windows 11 and Server 2022, the GroupCount field is valid and >=1
+             * and we may read GroupMasks[]. Older releases have GroupCount==0 and we must read GroupMask.
+             */
+            if (procInfo->NumaNode.GroupCount) {
+              num = procInfo->NumaNode.GroupCount;
+              GroupMask = procInfo->NumaNode.GroupMasks;
+            } else {
+              num = 1;
+              GroupMask = &procInfo->NumaNode.GroupMask;
+            }
 	    id = procInfo->NumaNode.NodeNumber;
 	    gotnuma++;
 	    if (id > max_numanode_index)
@@ -1221,18 +1084,20 @@ hwloc_look_windows(struct hwloc_backend *backend, struct hwloc_disc_status *dsta
 	    break;
 	  case RelationCache:
 	    type = (procInfo->Cache.Type == CacheInstruction ? HWLOC_OBJ_L1ICACHE : HWLOC_OBJ_L1CACHE) + procInfo->Cache.Level - 1;
-            num = 1;
-            GroupMask = &procInfo->Cache.GroupMask;
+            /* GroupCount added approximately with NumaNode.GroupCount above */
+            if (procInfo->Cache.GroupCount) {
+              num = procInfo->Cache.GroupCount;
+              GroupMask = procInfo->Cache.GroupMasks;
+            } else {
+              num = 1;
+              GroupMask = &procInfo->Cache.GroupMask;
+            }
 	    break;
 	  case RelationProcessorCore:
 	    type = HWLOC_OBJ_CORE;
             num = procInfo->Processor.GroupCount;
             GroupMask = procInfo->Processor.GroupMask;
-            if (has_efficiencyclass)
-              /* the EfficiencyClass field didn't exist before Windows10 and recent MSVC headers,
-               * so just access it manually instead of trying to detect it.
-               */
-              efficiency_class = * ((&procInfo->Processor.Flags) + 1);
+            efficiency_class = procInfo->Processor.EfficiencyClass;
 	    break;
 	  case RelationGroup:
 	    /* So strange an interface... */
@@ -1257,11 +1122,12 @@ hwloc_look_windows(struct hwloc_backend *backend, struct hwloc_disc_status *dsta
 		groups_pu_set = hwloc_bitmap_alloc();
 	      hwloc_bitmap_or(groups_pu_set, groups_pu_set, set);
 
-	      if (hwloc_filter_check_keep_object_type(topology, HWLOC_OBJ_GROUP)) {
+              /* Ignore processor groups unless requested and filtered-in */
+              if (keep_pgroup_objs && hwloc_filter_check_keep_object_type(topology, HWLOC_OBJ_GROUP)) {
 		obj = hwloc_alloc_setup_object(topology, HWLOC_OBJ_GROUP, id);
 		obj->cpuset = set;
 		obj->attr->group.kind = HWLOC_GROUP_KIND_WINDOWS_PROCESSOR_GROUP;
-		hwloc__insert_object_by_cpuset(topology, NULL, obj, "windows:GetLogicalProcessorInformation:ProcessorGroup");
+		hwloc__insert_object_by_cpuset(topology, NULL, obj, "windows:GetLogicalProcessorInformationEx:ProcessorGroup");
 	      } else
 		hwloc_bitmap_free(set);
 	    }

src/3rdparty/hwloc/src/topology-x86.c

@@ -1,5 +1,5 @@
 /*
- * Copyright © 2010-2021 Inria.  All rights reserved.
+ * Copyright © 2010-2022 Inria.  All rights reserved.
  * Copyright © 2010-2013 Université Bordeaux
  * Copyright © 2010-2011 Cisco Systems, Inc.  All rights reserved.
  * See COPYING in top-level directory.
@@ -500,7 +500,8 @@ static void read_amd_cores_topoext(struct procinfo *infos, unsigned long flags,
       nodes_per_proc = ((ecx >> 8) & 7) + 1;
     }
     if ((infos->cpufamilynumber == 0x15 && nodes_per_proc > 2)
-	|| ((infos->cpufamilynumber == 0x17 || infos->cpufamilynumber == 0x18) && nodes_per_proc > 4)) {
+	|| ((infos->cpufamilynumber == 0x17 || infos->cpufamilynumber == 0x18) && nodes_per_proc > 4)
+        || (infos->cpufamilynumber == 0x19 && nodes_per_proc > 1)) {
       hwloc_debug("warning: undefined nodes_per_proc value %u, assuming it means %u\n", nodes_per_proc, nodes_per_proc);
     }
   }
@@ -613,10 +614,13 @@ static void look_proc(struct hwloc_backend *backend, struct procinfo *infos, uns
   eax = 0x01;
   cpuid_or_from_dump(&eax, &ebx, &ecx, &edx, src_cpuiddump);
   infos->apicid = ebx >> 24;
-  if (edx & (1 << 28))
+  if (edx & (1 << 28)) {
     legacy_max_log_proc = 1 << hwloc_flsl(((ebx >> 16) & 0xff) - 1);
-  else
+  } else {
+    hwloc_debug("HTT bit not set in CPUID 0x01.edx, assuming legacy_max_log_proc = 1\n");
     legacy_max_log_proc = 1;
+  }
+
   hwloc_debug("APIC ID 0x%02x legacy_max_log_proc %u\n", infos->apicid, legacy_max_log_proc);
   infos->ids[PKG] = infos->apicid / legacy_max_log_proc;
   legacy_log_proc_id = infos->apicid % legacy_max_log_proc;
@@ -679,12 +683,23 @@ static void look_proc(struct hwloc_backend *backend, struct procinfo *infos, uns
       unsigned max_nbcores;
       unsigned max_nbthreads;
       unsigned threadid __hwloc_attribute_unused;
+      hwloc_debug("Trying to get core/thread IDs from 0x04...\n");
       max_nbcores = ((eax >> 26) & 0x3f) + 1;
-      max_nbthreads = legacy_max_log_proc / max_nbcores;
-      hwloc_debug("thus %u threads\n", max_nbthreads);
-      threadid = legacy_log_proc_id % max_nbthreads;
-      infos->ids[CORE] = legacy_log_proc_id / max_nbthreads;
-      hwloc_debug("this is thread %u of core %u\n", threadid, infos->ids[CORE]);
+      hwloc_debug("found %u cores max\n", max_nbcores);
+      /* some VMs (e.g. issue#525) don't report valid information, check things before dividing by 0. */
+      if (!max_nbcores) {
+        hwloc_debug("cannot detect core/thread IDs from 0x04 without a valid max of cores\n");
+      } else {
+        max_nbthreads = legacy_max_log_proc / max_nbcores;
+        hwloc_debug("found %u threads max\n", max_nbthreads);
+        if (!max_nbthreads) {
+          hwloc_debug("cannot detect core/thread IDs from 0x04 without a valid max of threads\n");
+        } else {
+          threadid = legacy_log_proc_id % max_nbthreads;
+          infos->ids[CORE] = legacy_log_proc_id / max_nbthreads;
+          hwloc_debug("this is thread %u of core %u\n", threadid, infos->ids[CORE]);
+        }
+      }
     }
   }
 
@@ -775,13 +790,19 @@ static void look_proc(struct hwloc_backend *backend, struct procinfo *infos, uns
 
     } else if (cpuid_type == amd) {
       /* AMD quirks */
-      if (infos->cpufamilynumber == 0x17
-	  && cache->level == 3 && cache->nbthreads_sharing == 6) {
-	/* AMD family 0x17 always shares L3 between 8 APIC ids,
-	 * even when only 6 APIC ids are enabled and reported in nbthreads_sharing
-	 * (on 24-core CPUs).
+      if (infos->cpufamilynumber >= 0x17 && cache->level == 3) {
+	/* AMD family 0x19 always shares L3 between 16 APIC ids (8 HT cores).
+         * while Family 0x17 shares between 8 APIC ids (4 HT cores).
+         * But many models have less APIC ids enabled and reported in nbthreads_sharing.
+         * It means we must round-up nbthreads_sharing to the nearest power of 2
+         * before computing cacheid.
 	 */
-	cache->cacheid = infos->apicid / 8;
+        unsigned nbapics_sharing = cache->nbthreads_sharing;
+        if (nbapics_sharing & (nbapics_sharing-1))
+          /* not a power of two, round-up */
+          nbapics_sharing = 1U<<(1+hwloc_ffsl(nbapics_sharing));
+
+	cache->cacheid = infos->apicid / nbapics_sharing;
 
       } else if (infos->cpufamilynumber== 0x10 && infos->cpumodelnumber == 0x9
 	  && cache->level == 3
@@ -807,7 +828,7 @@ static void look_proc(struct hwloc_backend *backend, struct procinfo *infos, uns
       } else if (infos->cpufamilynumber == 0x15
 		 && (infos->cpumodelnumber == 0x1 /* Bulldozer */ || infos->cpumodelnumber == 0x2 /* Piledriver */)
 		 && cache->level == 3 && cache->nbthreads_sharing == 6) {
-	/* AMD Bulldozer and Piledriver 12-core processors have same APIC ids as Magny-Cours below,
+	/* AMD Bulldozer and Piledriver 12-core processors have same APIC ids as Magny-Cours above,
 	 * but we can't merge the checks because the original nbthreads_sharing must be exactly 6 here.
 	 */
 	cache->cacheid = (infos->apicid % legacy_max_log_proc) / cache->nbthreads_sharing /* cacheid within the package */
@@ -1231,6 +1252,18 @@ static void summarize(struct hwloc_backend *backend, struct procinfo *infos, uns
 	    }
 	  }
 	  cache = hwloc_alloc_setup_object(topology, otype, HWLOC_UNKNOWN_INDEX);
+          /* We don't specify the os_index of caches because we want to be
+           * 100% sure they are identical to what the Linux kernel reports
+           * (so that things like resctrl work).
+           * However, vendor/model-specific quirks in the x86 code above
+           * make this difficult.
+           *
+           * Caveat: if the x86 backend is used on Linux to avoid kernel bugs,
+           * IDs won't be available to resctrl users. But resctrl heavily
+           * relies on the kernel x86 discovery being non-buggy anyway.
+           *
+           * TODO: make this optional? or only disable it on Linux?
+           */
 	  cache->attr->cache.depth = level;
 	  cache->attr->cache.size = infos[i].cache[l].size;
 	  cache->attr->cache.linesize = infos[i].cache[l].linesize;
@@ -1316,7 +1349,7 @@ look_procs(struct hwloc_backend *backend, struct procinfo *infos, unsigned long
   if (data->apicid_unique) {
     summarize(backend, infos, flags);
 
-    if (has_hybrid(features)) {
+    if (has_hybrid(features) && !(topology->flags & HWLOC_TOPOLOGY_FLAG_NO_CPUKINDS)) {
       /* use hybrid info for cpukinds */
       hwloc_bitmap_t atomset = hwloc_bitmap_alloc();
       hwloc_bitmap_t coreset = hwloc_bitmap_alloc();
@@ -1688,7 +1721,7 @@ hwloc_x86_check_cpuiddump_input(const char *src_cpuiddump_path, hwloc_bitmap_t s
   char line [32];
 
   dir = opendir(src_cpuiddump_path);
-  if (!dir)
+  if (!dir) 
     return -1;
 
   path = malloc(strlen(src_cpuiddump_path) + strlen("/hwloc-cpuid-info") + 1);

src/3rdparty/hwloc/src/topology-xml.c

@@ -1,6 +1,6 @@
 /*
  * Copyright © 2009 CNRS
- * Copyright © 2009-2021 Inria.  All rights reserved.
+ * Copyright © 2009-2022 Inria.  All rights reserved.
  * Copyright © 2009-2011, 2020 Université Bordeaux
  * Copyright © 2009-2018 Cisco Systems, Inc.  All rights reserved.
  * See COPYING in top-level directory.
@@ -123,6 +123,17 @@ hwloc__xml_import_object_attr(struct hwloc_topology *topology,
       fprintf(stderr, "%s: unexpected zero gp_index, topology may be invalid\n", state->global->msgprefix);
     if (obj->gp_index >= topology->next_gp_index)
       topology->next_gp_index = obj->gp_index + 1;
+  } else if (!strcmp(name, "id")) { /* forward compat */
+    if (!strncmp(value, "obj", 3)) {
+      obj->gp_index = strtoull(value+3, NULL, 10);
+      if (!obj->gp_index && hwloc__xml_verbose())
+        fprintf(stderr, "%s: unexpected zero id, topology may be invalid\n", state->global->msgprefix);
+      if (obj->gp_index >= topology->next_gp_index)
+        topology->next_gp_index = obj->gp_index + 1;
+    } else {
+      if (hwloc__xml_verbose())
+        fprintf(stderr, "%s: unexpected id `%s' not-starting with `obj', ignoring\n", state->global->msgprefix, value);
+    }
   } else if (!strcmp(name, "cpuset")) {
     if (!obj->cpuset)
       obj->cpuset = hwloc_bitmap_alloc();
@@ -243,7 +254,7 @@ hwloc__xml_import_object_attr(struct hwloc_topology *topology,
   else if (!strcmp(name, "dont_merge")) {
     unsigned long lvalue = strtoul(value, NULL, 10);
     if (obj->type == HWLOC_OBJ_GROUP)
-      obj->attr->group.dont_merge = lvalue;
+      obj->attr->group.dont_merge = (unsigned char) lvalue;
     else if (hwloc__xml_verbose())
       fprintf(stderr, "%s: ignoring dont_merge attribute for non-group object type\n",
 	      state->global->msgprefix);
@@ -263,7 +274,7 @@ hwloc__xml_import_object_attr(struct hwloc_topology *topology,
 #ifndef HWLOC_HAVE_32BITS_PCI_DOMAIN
       } else if (domain > 0xffff) {
 	static int warned = 0;
-	if (!warned && hwloc_hide_errors() < 2)
+	if (!warned && HWLOC_SHOW_ALL_ERRORS())
 	  fprintf(stderr, "hwloc/xml: Ignoring PCI device with non-16bit domain.\nPass --enable-32bits-pci-domain to configure to support such devices\n(warning: it would break the library ABI, don't enable unless really needed).\n");
 	warned = 1;
 	*ignore = 1;
@@ -363,7 +374,7 @@ hwloc__xml_import_object_attr(struct hwloc_topology *topology,
 #ifndef HWLOC_HAVE_32BITS_PCI_DOMAIN
       } else if (domain > 0xffff) {
 	static int warned = 0;
-	if (!warned && hwloc_hide_errors() < 2)
+	if (!warned && HWLOC_SHOW_ALL_ERRORS())
 	  fprintf(stderr, "hwloc/xml: Ignoring bridge to PCI with non-16bit domain.\nPass --enable-32bits-pci-domain to configure to support such devices\n(warning: it would break the library ABI, don't enable unless really needed).\n");
 	warned = 1;
 	*ignore = 1;
@@ -1235,7 +1246,7 @@ hwloc__xml_import_object(hwloc_topology_t topology,
 	/* next should be before cur */
 	if (!childrengotignored) {
 	  static int reported = 0;
-	  if (!reported && hwloc_hide_errors() < 2) {
+	  if (!reported && HWLOC_SHOW_CRITICAL_ERRORS()) {
 	    hwloc__xml_import_report_outoforder(topology, next, cur);
 	    reported = 1;
 	  }
@@ -1568,6 +1579,9 @@ hwloc__xml_v2import_distances(hwloc_topology_t topology,
     }
   }
 
+  if (topology->flags & HWLOC_TOPOLOGY_FLAG_NO_DISTANCES)
+    goto out_ignore;
+
   hwloc_internal_distances_add_by_index(topology, name, unique_type, different_types, nbobjs, indexes, u64values, kind, 0 /* assume grouping was applied when this matrix was discovered before exporting to XML */);
 
   /* prevent freeing below */
@@ -1722,7 +1736,8 @@ hwloc__xml_import_memattr(hwloc_topology_t topology,
     }
   }
 
-  if (name && flags != (unsigned long) -1) {
+  if (name && flags != (unsigned long) -1
+      && !(topology->flags & HWLOC_TOPOLOGY_FLAG_NO_MEMATTRS)) {
     hwloc_memattr_id_t _id;
 
     ret = hwloc_memattr_get_by_name(topology, name, &_id);
@@ -1833,7 +1848,13 @@ hwloc__xml_import_cpukind(hwloc_topology_t topology,
     goto error;
   }
 
-  hwloc_internal_cpukinds_register(topology, cpuset, forced_efficiency, infos, nr_infos, HWLOC_CPUKINDS_REGISTER_FLAG_OVERWRITE_FORCED_EFFICIENCY);
+  if (topology->flags & HWLOC_TOPOLOGY_FLAG_NO_CPUKINDS) {
+    hwloc__free_infos(infos, nr_infos);
+    hwloc_bitmap_free(cpuset);
+  } else {
+    hwloc_internal_cpukinds_register(topology, cpuset, forced_efficiency, infos, nr_infos, HWLOC_CPUKINDS_REGISTER_FLAG_OVERWRITE_FORCED_EFFICIENCY);
+    hwloc__free_infos(infos, nr_infos);
+  }
 
   return state->global->close_tag(state);
 
@@ -2168,7 +2189,8 @@ done:
        * but it would require to have those objects in the original XML order (like the first_numanode cousin-list).
        * because the topology order can be different if some parents are ignored during load.
        */
-      if (nbobjs == data->nbnumanodes) {
+      if (nbobjs == data->nbnumanodes
+          && !(topology->flags & HWLOC_TOPOLOGY_FLAG_NO_DISTANCES)) {
 	hwloc_obj_t *objs = malloc(nbobjs*sizeof(hwloc_obj_t));
 	uint64_t *values = malloc(nbobjs*nbobjs*sizeof(*values));
         assert(data->nbnumanodes > 0); /* v1dist->nbobjs is >0 after import */
@@ -2650,7 +2672,7 @@ hwloc__xml_export_object_contents (hwloc__xml_export_state_t state, hwloc_topolo
 
       logical_to_v2array = malloc(nbobjs * sizeof(*logical_to_v2array));
       if (!logical_to_v2array) {
-        if (!hwloc_hide_errors())
+        if (HWLOC_SHOW_ALL_ERRORS())
           fprintf(stderr, "hwloc/xml/export/v1: failed to allocated logical_to_v2array\n");
 	continue;
       }
@@ -2825,6 +2847,7 @@ hwloc__xml_v1export_object_with_memory(hwloc__xml_export_state_t parentstate, hw
     /* child has sibling, we must add a Group around those memory children */
     hwloc_obj_t group = parentstate->global->v1_memory_group;
     parentstate->new_child(parentstate, &gstate, "object");
+    group->parent = obj->parent;
     group->cpuset = obj->cpuset;
     group->complete_cpuset = obj->complete_cpuset;
     group->nodeset = obj->nodeset;
@@ -3123,9 +3146,11 @@ hwloc__xml_export_memattrs(hwloc__xml_export_state_t state, hwloc_topology_t top
       continue;
 
     imattr = &topology->memattrs[id];
-    if ((id == HWLOC_MEMATTR_ID_LATENCY || id == HWLOC_MEMATTR_ID_BANDWIDTH)
-        && !imattr->nr_targets)
-      /* no need to export target-less attributes for initial attributes, no release support attributes without those definitions */
+    if (id < HWLOC_MEMATTR_ID_MAX && !imattr->nr_targets)
+      /* no need to export standard attributes without any target,
+       * their definition is now standardized,
+       * the old hwloc importing this XML may recreate these attributes just like it would for a non-imported topology.
+       */
       continue;
 
     state->new_child(state, &mstate, "memattr");

src/3rdparty/hwloc/src/topology.c

@@ -1,8 +1,9 @@
 /*
  * Copyright © 2009 CNRS
- * Copyright © 2009-2021 Inria.  All rights reserved.
+ * Copyright © 2009-2022 Inria.  All rights reserved.
  * Copyright © 2009-2012, 2020 Université Bordeaux
  * Copyright © 2009-2011 Cisco Systems, Inc.  All rights reserved.
+ * Copyright © 2022 IBM Corporation.  All rights reserved.
  * See COPYING in top-level directory.
  */
 
@@ -52,29 +53,41 @@
 #include <windows.h>
 #endif
 
+
+#ifdef HWLOC_HAVE_LEVELZERO
 /*
  * Define ZES_ENABLE_SYSMAN=1 early so that the LevelZero backend gets Sysman enabled.
+ *
+ * Only if the levelzero was enabled in this build so that we don't enable sysman
+ * for external levelzero users when hwloc doesn't need it. If somebody ever loads
+ * an external levelzero plugin in a hwloc library built without levelzero (unlikely),
+ * he may have to manually set ZES_ENABLE_SYSMAN=1.
+ *
  * Use the constructor if supported and/or the Windows DllMain callback.
  * Do it in the main hwloc library instead of the levelzero component because
  * the latter could be loaded later as a plugin.
  *
  * L0 seems to be using getenv() to check this variable on Windows
  * (at least in the Intel Compute-Runtime of March 2021),
- * so use putenv() to set the variable.
+ * but setenv() doesn't seem to exist on Windows, hence use putenv() to set the variable.
  *
  * For the record, Get/SetEnvironmentVariable() is not exactly the same as getenv/putenv():
  * - getenv() doesn't see what was set with SetEnvironmentVariable()
  * - GetEnvironmentVariable() doesn't see putenv() in cygwin (while it does in MSVC and MinGW).
  * Hence, if L0 ever switches from getenv() to GetEnvironmentVariable(),
  * it will break in cygwin, we'll have to use both putenv() and SetEnvironmentVariable().
- * Hopefully L0 will be provide a way to enable Sysman without env vars before it happens.
+ * Hopefully L0 will provide a way to enable Sysman without env vars before it happens.
  */
-#ifdef HWLOC_HAVE_ATTRIBUTE_CONSTRUCTOR
+#if HWLOC_HAVE_ATTRIBUTE_CONSTRUCTOR
 static void hwloc_constructor(void) __attribute__((constructor));
 static void hwloc_constructor(void)
 {
   if (!getenv("ZES_ENABLE_SYSMAN"))
-    putenv((char *) "ZES_ENABLE_SYSMAN=1");
+#ifdef HWLOC_WIN_SYS
+    putenv("ZES_ENABLE_SYSMAN=1");
+#else
+    setenv("ZES_ENABLE_SYSMAN", "1", 1);
+#endif
 }
 #endif
 #ifdef HWLOC_WIN_SYS
@@ -82,11 +95,14 @@ BOOL WINAPI DllMain(HINSTANCE hinstDLL, DWORD fdwReason, LPVOID lpReserved)
 {
   if (fdwReason == DLL_PROCESS_ATTACH) {
     if (!getenv("ZES_ENABLE_SYSMAN"))
+      /* Windows does not have a setenv, so use putenv. */
       putenv((char *) "ZES_ENABLE_SYSMAN=1");
   }
   return TRUE;
 }
 #endif
+#endif /* HWLOC_HAVE_LEVELZERO */
+
 
 unsigned hwloc_get_api_version(void)
 {
@@ -98,14 +114,25 @@ int hwloc_topology_abi_check(hwloc_topology_t topology)
   return topology->topology_abi != HWLOC_TOPOLOGY_ABI ? -1 : 0;
 }
 
+/* callers should rather use wrappers HWLOC_SHOW_ALL_ERRORS() and HWLOC_SHOW_CRITICAL_ERRORS() for clarity */
 int hwloc_hide_errors(void)
 {
   static int hide = 1; /* only show critical errors by default. lstopo will show others */
   static int checked = 0;
   if (!checked) {
     const char *envvar = getenv("HWLOC_HIDE_ERRORS");
-    if (envvar)
+    if (envvar) {
       hide = atoi(envvar);
+#ifdef HWLOC_DEBUG
+    } else {
+      /* if debug is enabled and HWLOC_DEBUG_VERBOSE isn't forced to 0,
+       * show all errors jus like we show all debug messages.
+       */
+      envvar = getenv("HWLOC_DEBUG_VERBOSE");
+      if (!envvar || atoi(envvar))
+        hide = 0;
+#endif
+    }
     checked = 1;
   }
   return hide;
@@ -142,7 +169,7 @@ static void report_insert_error(hwloc_obj_t new, hwloc_obj_t old, const char *ms
 {
   static int reported = 0;
 
-  if (reason && !reported && hwloc_hide_errors() < 2) {
+  if (reason && !reported && HWLOC_SHOW_CRITICAL_ERRORS()) {
     char newstr[512];
     char oldstr[512];
     report_insert_error_format_obj(newstr, sizeof(newstr), new);
@@ -1901,6 +1928,9 @@ hwloc_topology_alloc_group_object(struct hwloc_topology *topology)
 static void hwloc_propagate_symmetric_subtree(hwloc_topology_t topology, hwloc_obj_t root);
 static void propagate_total_memory(hwloc_obj_t obj);
 static void hwloc_set_group_depth(hwloc_topology_t topology);
+static void hwloc_connect_children(hwloc_obj_t parent);
+static int hwloc_connect_levels(hwloc_topology_t topology);
+static int hwloc_connect_special_levels(hwloc_topology_t topology);
 
 hwloc_obj_t
 hwloc_topology_insert_group_object(struct hwloc_topology *topology, hwloc_obj_t obj)
@@ -2474,13 +2504,26 @@ hwloc_compare_levels_structure(hwloc_topology_t topology, unsigned i)
   return 0;
 }
 
-/* return > 0 if any level was removed, which means reconnect is needed */
-static void
+/* return > 0 if any level was removed.
+ * performs its own reconnect internally if needed
+ */
+static int
 hwloc_filter_levels_keep_structure(hwloc_topology_t topology)
 {
   unsigned i, j;
   int res = 0;
 
+  if (topology->modified) {
+    /* WARNING: hwloc_topology_reconnect() is duplicated partially here
+     * and at the end of this function:
+     * - we need normal levels before merging.
+     * - and we'll need to update special levels after merging.
+     */
+    hwloc_connect_children(topology->levels[0][0]);
+    if (hwloc_connect_levels(topology) < 0)
+      return -1;
+  }
+
   /* start from the bottom since we'll remove intermediate levels */
   for(i=topology->nb_levels-1; i>0; i--) {
     int replacechild = 0, replaceparent = 0;
@@ -2646,6 +2689,22 @@ hwloc_filter_levels_keep_structure(hwloc_topology_t topology)
 	topology->type_depth[type] = HWLOC_TYPE_DEPTH_MULTIPLE;
     }
   }
+
+
+  if (res > 0 || topology-> modified) {
+    /* WARNING: hwloc_topology_reconnect() is duplicated partially here
+     * and at the beginning of this function.
+     * If we merged some levels, some child+parent special children lisst
+     * may have been merged, hence specials level might need reordering,
+     * So reconnect special levels only here at the end
+     * (it's not needed at the beginning of this function).
+     */
+    if (hwloc_connect_special_levels(topology) < 0)
+      return -1;
+    topology->modified = 0;
+  }
+
+  return 0;
 }
 
 static void
@@ -2963,9 +3022,9 @@ hwloc_list_special_objects(hwloc_topology_t topology, hwloc_obj_t obj)
   }
 }
 
-/* Build I/O levels */
+/* Build Memory, I/O and Misc levels */
 static int
-hwloc_connect_io_misc_levels(hwloc_topology_t topology)
+hwloc_connect_special_levels(hwloc_topology_t topology)
 {
   unsigned i;
 
@@ -3130,7 +3189,7 @@ hwloc_connect_levels(hwloc_topology_t topology)
       tmpnbobjs = realloc(topology->level_nbobjects,
 			  2 * topology->nb_levels_allocated * sizeof(*topology->level_nbobjects));
       if (!tmplevels || !tmpnbobjs) {
-        if (hwloc_hide_errors() < 2)
+        if (HWLOC_SHOW_CRITICAL_ERRORS())
           fprintf(stderr, "hwloc: failed to realloc level arrays to %u\n", topology->nb_levels_allocated * 2);
 
 	/* if one realloc succeeded, make sure the caller will free the new buffer */
@@ -3176,6 +3235,10 @@ hwloc_connect_levels(hwloc_topology_t topology)
 int
 hwloc_topology_reconnect(struct hwloc_topology *topology, unsigned long flags)
 {
+  /* WARNING: when updating this function, the replicated code must
+   * also be updated inside hwloc_filter_levels_keep_structure()
+   */
+
   if (flags) {
     errno = EINVAL;
     return -1;
@@ -3188,7 +3251,7 @@ hwloc_topology_reconnect(struct hwloc_topology *topology, unsigned long flags)
   if (hwloc_connect_levels(topology) < 0)
     return -1;
 
-  if (hwloc_connect_io_misc_levels(topology) < 0)
+  if (hwloc_connect_special_levels(topology) < 0)
     return -1;
 
   topology->modified = 0;
@@ -3484,6 +3547,8 @@ hwloc_discover(struct hwloc_topology *topology,
   /*
    * Additional discovery
    */
+  hwloc_pci_discovery_prepare(topology);
+
   if (topology->backend_phases & HWLOC_DISC_PHASE_PCI) {
     dstatus->phase = HWLOC_DISC_PHASE_PCI;
     hwloc_discover_by_phase(topology, dstatus, "PCI");
@@ -3501,6 +3566,8 @@ hwloc_discover(struct hwloc_topology *topology,
     hwloc_discover_by_phase(topology, dstatus, "ANNOTATE");
   }
 
+  hwloc_pci_discovery_exit(topology); /* pci needed up to annotate */
+
   if (getenv("HWLOC_DEBUG_SORT_CHILDREN"))
     hwloc_debug_sort_children(topology->levels[0][0]);
 
@@ -3513,31 +3580,28 @@ hwloc_discover(struct hwloc_topology *topology,
   hwloc_debug("%s", "\nRemoving empty objects\n");
   remove_empty(topology, &topology->levels[0][0]);
   if (!topology->levels[0][0]) {
-    if (hwloc_hide_errors() < 2)
+    if (HWLOC_SHOW_CRITICAL_ERRORS())
       fprintf(stderr, "hwloc: Topology became empty, aborting!\n");
     return -1;
   }
   if (hwloc_bitmap_iszero(topology->levels[0][0]->cpuset)) {
-    if (hwloc_hide_errors() < 2)
+    if (HWLOC_SHOW_CRITICAL_ERRORS())
       fprintf(stderr, "hwloc: Topology does not contain any PU, aborting!\n");
     return -1;
   }
   if (hwloc_bitmap_iszero(topology->levels[0][0]->nodeset)) {
-    if (hwloc_hide_errors() < 2)
+    if (HWLOC_SHOW_CRITICAL_ERRORS())
       fprintf(stderr, "hwloc: Topology does not contain any NUMA node, aborting!\n");
     return -1;
   }
   hwloc_debug_print_objects(0, topology->levels[0][0]);
 
-  /* Reconnect things after all these changes.
-   * Often needed because of Groups inserted for I/Os.
-   * And required for KEEP_STRUCTURE below.
-   */
-  if (hwloc_topology_reconnect(topology, 0) < 0)
-    return -1;
-
   hwloc_debug("%s", "\nRemoving levels with HWLOC_TYPE_FILTER_KEEP_STRUCTURE\n");
-  hwloc_filter_levels_keep_structure(topology);
+  if (hwloc_filter_levels_keep_structure(topology) < 0)
+    return -1;
+  /* takes care of reconnecting children/levels internally,
+   * because it needs normal levels.
+   * and it's often needed below because of Groups inserted for I/Os anyway */
   hwloc_debug_print_objects(0, topology->levels[0][0]);
 
   /* accumulate children memory in total_memory fields (only once parent is set) */
@@ -3762,7 +3826,16 @@ hwloc_topology_set_flags (struct hwloc_topology *topology, unsigned long flags)
     return -1;
   }
 
-  if (flags & ~(HWLOC_TOPOLOGY_FLAG_INCLUDE_DISALLOWED|HWLOC_TOPOLOGY_FLAG_IS_THISSYSTEM|HWLOC_TOPOLOGY_FLAG_THISSYSTEM_ALLOWED_RESOURCES|HWLOC_TOPOLOGY_FLAG_IMPORT_SUPPORT|HWLOC_TOPOLOGY_FLAG_RESTRICT_TO_CPUBINDING|HWLOC_TOPOLOGY_FLAG_RESTRICT_TO_MEMBINDING|HWLOC_TOPOLOGY_FLAG_DONT_CHANGE_BINDING)) {
+  if (flags & ~(HWLOC_TOPOLOGY_FLAG_INCLUDE_DISALLOWED
+                |HWLOC_TOPOLOGY_FLAG_IS_THISSYSTEM
+                |HWLOC_TOPOLOGY_FLAG_THISSYSTEM_ALLOWED_RESOURCES
+                |HWLOC_TOPOLOGY_FLAG_IMPORT_SUPPORT
+                |HWLOC_TOPOLOGY_FLAG_RESTRICT_TO_CPUBINDING
+                |HWLOC_TOPOLOGY_FLAG_RESTRICT_TO_MEMBINDING
+                |HWLOC_TOPOLOGY_FLAG_DONT_CHANGE_BINDING
+                |HWLOC_TOPOLOGY_FLAG_NO_DISTANCES
+                |HWLOC_TOPOLOGY_FLAG_NO_MEMATTRS
+                |HWLOC_TOPOLOGY_FLAG_NO_CPUKINDS)) {
     errno = EINVAL;
     return -1;
   }
@@ -4027,15 +4100,11 @@ hwloc_topology_load (struct hwloc_topology *topology)
    */
   hwloc_set_binding_hooks(topology);
 
-  hwloc_pci_discovery_prepare(topology);
-
   /* actual topology discovery */
   err = hwloc_discover(topology, &dstatus);
   if (err < 0)
     goto out;
 
-  hwloc_pci_discovery_exit(topology);
-
 #ifndef HWLOC_DEBUG
   if (getenv("HWLOC_DEBUG_CHECK"))
 #endif
@@ -4057,6 +4126,7 @@ hwloc_topology_load (struct hwloc_topology *topology)
   /* Same for memattrs */
   hwloc_internal_memattrs_need_refresh(topology);
   hwloc_internal_memattrs_refresh(topology);
+  hwloc_internal_memattrs_guess_memory_tiers(topology);
 
   topology->is_loaded = 1;
 
@@ -4360,14 +4430,13 @@ hwloc_topology_restrict(struct hwloc_topology *topology, hwloc_const_bitmap_t se
   hwloc_bitmap_free(droppedcpuset);
   hwloc_bitmap_free(droppednodeset);
 
-  if (hwloc_topology_reconnect(topology, 0) < 0)
+  if (hwloc_filter_levels_keep_structure(topology) < 0) /* takes care of reconnecting internally */
     goto out;
 
   /* some objects may have disappeared, we need to update distances objs arrays */
   hwloc_internal_distances_invalidate_cached_objs(topology);
   hwloc_internal_memattrs_need_refresh(topology);
 
-  hwloc_filter_levels_keep_structure(topology);
   hwloc_propagate_symmetric_subtree(topology, topology->levels[0][0]);
   propagate_total_memory(topology->levels[0][0]);
   hwloc_internal_cpukinds_restrict(topology);

src/3rdparty/libethash/CMakeLists.txt

@@ -1,4 +1,4 @@
-cmake_minimum_required (VERSION 2.8.12)
+cmake_minimum_required(VERSION 3.1)
 project (ethash C)
 
 set(CMAKE_C_FLAGS_RELEASE "${CMAKE_C_FLAGS_RELEASE} -Os")

src/App.cpp

@@ -85,6 +85,22 @@ int xmrig::App::exec()
         return 0;
     }
 
+#   ifdef XMRIG_FEATURE_MO_BENCHMARK
+    const std::vector<Pool>& pools = m_controller->config()->pools().data();
+    if (pools.size() != 1 || pools[0].mode() != Pool::MODE_BENCHMARK) {
+        m_controller->pre_start();
+        m_controller->config()->benchmark().set_controller(m_controller);
+
+        if (m_controller->config()->benchmark().isNewBenchRun() || m_controller->config()->isRebenchAlgo()) {
+            if (m_controller->config()->isShouldSave()) {
+                m_controller->config()->save();
+            }
+            m_controller->config()->benchmark().start();
+        } else {
+            m_controller->start();
+        }
+    } else
+#   endif
     m_controller->start();
 
     rc = uv_run(uv_default_loop(), UV_RUN_DEFAULT);

src/Summary.cpp

@@ -1,12 +1,6 @@
 /* XMRig
- * Copyright 2010      Jeff Garzik <jgarzik@pobox.com>
- * Copyright 2012-2014 pooler      <pooler@litecoinpool.org>
- * Copyright 2014      Lucas Jones <https://github.com/lucasjones>
- * Copyright 2014-2016 Wolf9466    <https://github.com/OhGodAPet>
- * Copyright 2016      Jay D Dee   <jayddee246@gmail.com>
- * Copyright 2017-2019 XMR-Stak    <https://github.com/fireice-uk>, <https://github.com/psychocrypt>
- * Copyright 2018-2021 SChernykh   <https://github.com/SChernykh>
- * Copyright 2016-2021 XMRig       <support@xmrig.com>
+ * Copyright (c) 2018-2022 SChernykh   <https://github.com/SChernykh>
+ * Copyright (c) 2016-2022 XMRig       <support@xmrig.com>
  *
  *   This program is free software: you can redistribute it and/or modify
  *   it under the terms of the GNU General Public License as published by
@@ -22,7 +16,6 @@
  *   along with this program. If not, see <http://www.gnu.org/licenses/>.
  */
 
-
 #include <cinttypes>
 #include <cstdio>
 #include <uv.h>
@@ -158,7 +151,7 @@ static void print_memory(const Config *config)
                        "", memory.id().data(), memory.size() / oneGiB, memory.type(), memory.speed() / 1000000ULL, memory.product().data());
         }
         else if (printEmpty) {
-            Log::print(WHITE_BOLD("   %-13s") "%s: " BLACK_BOLD("<empty>"), "", memory.slot().data());
+            Log::print(WHITE_BOLD("   %-13s") "%s: " BLACK_BOLD("<empty>"), "", memory.id().data());
         }
     }
 

src/Summary.h

@@ -1,12 +1,6 @@
 /* XMRig
- * Copyright 2010      Jeff Garzik <jgarzik@pobox.com>
- * Copyright 2012-2014 pooler      <pooler@litecoinpool.org>
- * Copyright 2014      Lucas Jones <https://github.com/lucasjones>
- * Copyright 2014-2016 Wolf9466    <https://github.com/OhGodAPet>
- * Copyright 2016      Jay D Dee   <jayddee246@gmail.com>
- * Copyright 2017-2018 XMR-Stak    <https://github.com/fireice-uk>, <https://github.com/psychocrypt>
- * Copyright 2018-2021 SChernykh   <https://github.com/SChernykh>
- * Copyright 2016-2021 XMRig       <https://github.com/xmrig>, <support@xmrig.com>
+ * Copyright (c) 2018-2022 SChernykh   <https://github.com/SChernykh>
+ * Copyright (c) 2016-2022 XMRig       <support@xmrig.com>
  *
  *   This program is free software: you can redistribute it and/or modify
  *   it under the terms of the GNU General Public License as published by

src/backend/common/Tags.h

@@ -46,6 +46,10 @@ const char *ocl_tag();
 const char *cuda_tag();
 #endif
 
+#ifdef XMRIG_FEATURE_MO_BENCHMARK
+const char *bm_tag();
+#endif
+
 
 } // namespace xmrig
 

src/backend/common/Threads.cpp

@@ -128,6 +128,8 @@ xmrig::String xmrig::Threads<T>::profileName(const Algorithm &algorithm, bool st
         }
     }
 
+    if (std::is_same<T, CpuThreads>::value && (name == "defyx" || name == "panthera") && has("rx")) return "rx";
+
     if (has(kAsterisk)) {
         return kAsterisk;
     }

src/backend/common/WorkerJob.h

@@ -30,6 +30,7 @@
 
 
 #include "base/net/stratum/Job.h"
+#include "base/tools/Alignment.h"
 #include "crypto/common/Nonce.h"
 
 
@@ -77,7 +78,7 @@ public:
         }
         else {
             for (size_t i = 0; i < N; ++i) {
-                *nonce(i) += roundSize;
+                writeUnaligned(nonce(i), readUnaligned(nonce(i)) + roundSize);
             }
         }
 
@@ -108,7 +109,7 @@ private:
     }
 
 
-    alignas(16) uint8_t m_blobs[2][Job::kMaxBlobSize * N]{};
+    alignas(8) uint8_t m_blobs[2][Job::kMaxBlobSize * N]{};
     Job m_jobs[2];
     uint32_t m_rounds[2] = { 0, 0 };
     uint64_t m_nonce_mask[2] = { 0, 0 };
@@ -136,11 +137,11 @@ inline bool xmrig::WorkerJob<1>::nextRound(uint32_t rounds, uint32_t roundSize)
             return false;
         }
         if (nonceSize() == sizeof(uint64_t)) {
-            m_jobs[index()].nonce()[1] = n[1];
+            writeUnaligned(m_jobs[index()].nonce() + 1, readUnaligned(n + 1));
         }
     }
     else {
-        *n += roundSize;
+        writeUnaligned(n, readUnaligned(n) + roundSize);
     }
 
     return true;

src/backend/cpu/Cpu.h

@@ -1,6 +1,6 @@
 /* XMRig
- * Copyright (c) 2018-2020 SChernykh   <https://github.com/SChernykh>
- * Copyright (c) 2016-2020 XMRig       <https://github.com/xmrig>, <support@xmrig.com>
+ * Copyright (c) 2018-2023 SChernykh   <https://github.com/SChernykh>
+ * Copyright (c) 2016-2023 XMRig       <https://github.com/xmrig>, <support@xmrig.com>
  *
  *   This program is free software: you can redistribute it and/or modify
  *   it under the terms of the GNU General Public License as published by
@@ -37,7 +37,7 @@ public:
 };
 
 
-} /* namespace xmrig */
+} // namespace xmrig
 
 
-#endif /* XMRIG_CPU_H */
+#endif // XMRIG_CPU_H

src/backend/cpu/CpuBackend.cpp

@@ -262,7 +262,7 @@ bool xmrig::CpuBackend::isEnabled() const
 
 bool xmrig::CpuBackend::isEnabled(const Algorithm &algorithm) const
 {
-    return !d_ptr->controller->config()->cpu().threads().get(algorithm).isEmpty();
+    return algorithm.isValid() && !d_ptr->controller->config()->cpu().threads().get(algorithm).isEmpty();
 }
 
 
@@ -436,10 +436,6 @@ rapidjson::Value xmrig::CpuBackend::toJSON(rapidjson::Document &doc) const
     out.AddMember("argon2-impl", argon2::Impl::name().toJSON(), allocator);
 #   endif
 
-#   ifdef XMRIG_ALGO_ASTROBWT
-    out.AddMember("astrobwt-max-size", cpu.astrobwtMaxSize(), allocator);
-#   endif
-
     out.AddMember("hugepages", d_ptr->hugePages(2, doc), allocator);
     out.AddMember("memory",    static_cast<uint64_t>(d_ptr->algo.isValid() ? (d_ptr->ways() * d_ptr->algo.l3()) : 0), allocator);
 

src/backend/cpu/CpuConfig.cpp

@@ -45,11 +45,6 @@ const char *CpuConfig::kAsm                 = "asm";
 const char *CpuConfig::kArgon2Impl          = "argon2-impl";
 #endif
 
-#ifdef XMRIG_ALGO_ASTROBWT
-const char *CpuConfig::kAstroBWTMaxSize     = "astrobwt-max-size";
-const char *CpuConfig::kAstroBWTAVX2        = "astrobwt-avx2";
-#endif
-
 
 extern template class Threads<CpuThreads>;
 
@@ -89,11 +84,6 @@ rapidjson::Value xmrig::CpuConfig::toJSON(rapidjson::Document &doc) const
     obj.AddMember(StringRef(kArgon2Impl), m_argon2Impl.toJSON(), allocator);
 #   endif
 
-#   ifdef XMRIG_ALGO_ASTROBWT
-    obj.AddMember(StringRef(kAstroBWTMaxSize),  m_astrobwtMaxSize, allocator);
-    obj.AddMember(StringRef(kAstroBWTAVX2),     m_astrobwtAVX2, allocator);
-#   endif
-
     m_threads.toJSON(obj, doc);
 
     return obj;
@@ -158,24 +148,6 @@ void xmrig::CpuConfig::read(const rapidjson::Value &value)
         m_argon2Impl = Json::getString(value, kArgon2Impl);
 #       endif
 
-#       ifdef XMRIG_ALGO_ASTROBWT
-        const auto& astroBWTMaxSize = Json::getValue(value, kAstroBWTMaxSize);
-        if (astroBWTMaxSize.IsNull() || !astroBWTMaxSize.IsInt()) {
-            m_shouldSave = true;
-        }
-        else {
-            m_astrobwtMaxSize = std::min(std::max(astroBWTMaxSize.GetInt(), 400), 1200);
-        }
-
-        const auto& astroBWTAVX2 = Json::getValue(value, kAstroBWTAVX2);
-        if (astroBWTAVX2.IsNull() || !astroBWTAVX2.IsBool()) {
-            m_shouldSave = true;
-        }
-        else {
-            m_astrobwtAVX2 = astroBWTAVX2.GetBool();
-        }
-#       endif
-
         m_threads.read(value);
 
         generate();
@@ -206,7 +178,6 @@ void xmrig::CpuConfig::generate()
     count += xmrig::generate<Algorithm::CN_FEMTO>(m_threads, m_limit);
     count += xmrig::generate<Algorithm::RANDOM_X>(m_threads, m_limit);
     count += xmrig::generate<Algorithm::ARGON2>(m_threads, m_limit);
-    count += xmrig::generate<Algorithm::ASTROBWT>(m_threads, m_limit);
     count += xmrig::generate<Algorithm::GHOSTRIDER>(m_threads, m_limit);
 
     m_shouldSave |= count > 0;

src/backend/cpu/CpuConfig.h

@@ -56,11 +56,6 @@ public:
     static const char *kArgon2Impl;
 #   endif
 
-#   ifdef XMRIG_ALGO_ASTROBWT
-    static const char *kAstroBWTMaxSize;
-    static const char *kAstroBWTAVX2;
-#   endif
-
     CpuConfig() = default;
 
     bool isHwAES() const;
@@ -69,7 +64,6 @@ public:
     std::vector<CpuLaunchData> get(const Miner *miner, const Algorithm &algorithm) const;
     void read(const rapidjson::Value &value);
 
-    inline bool astrobwtAVX2() const                    { return m_astrobwtAVX2; }
     inline bool isEnabled() const                       { return m_enabled; }
     inline bool isHugePages() const                     { return m_hugePageSize > 0; }
     inline bool isHugePagesJit() const                  { return m_hugePagesJit; }
@@ -78,7 +72,6 @@ public:
     inline const Assembly &assembly() const             { return m_assembly; }
     inline const String &argon2Impl() const             { return m_argon2Impl; }
     inline const Threads<CpuThreads> &threads() const   { return m_threads; }
-    inline int astrobwtMaxSize() const                  { return m_astrobwtMaxSize; }
     inline int priority() const                         { return m_priority; }
     inline size_t hugePageSize() const                  { return m_hugePageSize * 1024U; }
     inline uint32_t limit() const                       { return m_limit; }
@@ -96,12 +89,10 @@ private:
 
     AesMode m_aes           = AES_AUTO;
     Assembly m_assembly;
-    bool m_astrobwtAVX2     = false;
     bool m_enabled          = true;
     bool m_hugePagesJit     = false;
     bool m_shouldSave       = false;
     bool m_yield            = true;
-    int m_astrobwtMaxSize   = 550;
     int m_memoryPool        = 0;
     int m_priority          = -1;
     size_t m_hugePageSize   = kDefaultHugePageSizeKb;

src/backend/cpu/CpuConfig_gen.h

@@ -48,6 +48,10 @@ size_t inline generate<Algorithm::CN>(Threads<CpuThreads> &threads, uint32_t lim
     size_t count = 0;
 
     count += generate(Algorithm::kCN, threads, Algorithm::CN_1, limit);
+    count += generate(Algorithm::kCN_2, threads, Algorithm::CN_2, limit);
+#   ifdef XMRIG_ALGO_CN_GPU
+    count += generate(Algorithm::kCN_GPU, threads, Algorithm::CN_GPU, limit);
+#   endif
 
     if (!threads.isExist(Algorithm::CN_0)) {
         threads.disable(Algorithm::CN_0);
@@ -137,6 +141,10 @@ size_t inline generate<Algorithm::RANDOM_X>(Threads<CpuThreads> &threads, uint32
         count += threads.move(Algorithm::kRX_WOW, std::move(wow));
     }
 
+    if (!threads.isExist(Algorithm::RX_XLA)) {
+        count += generate(Algorithm::kRX_XLA, threads, Algorithm::RX_XLA, limit);
+    }
+
     count += generate(Algorithm::kRX, threads, Algorithm::RX_0, limit);
 
     return count;
@@ -153,14 +161,6 @@ size_t inline generate<Algorithm::ARGON2>(Threads<CpuThreads> &threads, uint32_t
 #endif
 
 
-#ifdef XMRIG_ALGO_ASTROBWT
-template<>
-size_t inline generate<Algorithm::ASTROBWT>(Threads<CpuThreads>& threads, uint32_t limit)
-{
-    return generate(Algorithm::kASTROBWT, threads, Algorithm::ASTROBWT_DERO, limit);
-}
-#endif
-
 #ifdef XMRIG_ALGO_GHOSTRIDER
 template<>
 size_t inline generate<Algorithm::GHOSTRIDER>(Threads<CpuThreads>& threads, uint32_t limit)

src/backend/cpu/CpuLaunchData.cpp

@@ -35,11 +35,9 @@
 xmrig::CpuLaunchData::CpuLaunchData(const Miner *miner, const Algorithm &algorithm, const CpuConfig &config, const CpuThread &thread, size_t threads, const std::vector<int64_t>& affinities) :
     algorithm(algorithm),
     assembly(config.assembly()),
-    astrobwtAVX2(config.astrobwtAVX2()),
     hugePages(config.isHugePages()),
     hwAES(config.isHwAES()),
     yield(config.isYield()),
-    astrobwtMaxSize(config.astrobwtMaxSize()),
     priority(config.priority()),
     affinity(thread.affinity()),
     miner(miner),

src/backend/cpu/CpuLaunchData.h

@@ -58,11 +58,9 @@ public:
 
     const Algorithm algorithm;
     const Assembly assembly;
-    const bool astrobwtAVX2;
     const bool hugePages;
     const bool hwAES;
     const bool yield;
-    const int astrobwtMaxSize;
     const int priority;
     const int64_t affinity;
     const Miner *miner;

src/backend/cpu/CpuWorker.cpp

@@ -23,6 +23,7 @@
 
 #include "backend/cpu/Cpu.h"
 #include "backend/cpu/CpuWorker.h"
+#include "base/tools/Alignment.h"
 #include "base/tools/Chrono.h"
 #include "core/config/Config.h"
 #include "core/Miner.h"
@@ -32,6 +33,7 @@
 #include "crypto/common/Nonce.h"
 #include "crypto/common/VirtualMemory.h"
 #include "crypto/rx/Rx.h"
+#include "crypto/rx/RxCache.h"
 #include "crypto/rx/RxDataset.h"
 #include "crypto/rx/RxVm.h"
 #include "crypto/ghostrider/ghostrider.h"
@@ -43,11 +45,6 @@
 #endif
 
 
-#ifdef XMRIG_ALGO_ASTROBWT
-#   include "crypto/astrobwt/AstroBWT.h"
-#endif
-
-
 #ifdef XMRIG_FEATURE_BENCHMARK
 #   include "backend/common/benchmark/BenchState.h"
 #endif
@@ -72,19 +69,20 @@ xmrig::CpuWorker<N>::CpuWorker(size_t id, const CpuLaunchData &data) :
     Worker(id, data.affinity, data.priority),
     m_algorithm(data.algorithm),
     m_assembly(data.assembly),
-    m_astrobwtAVX2(data.astrobwtAVX2),
     m_hwAES(data.hwAES),
     m_yield(data.yield),
     m_av(data.av()),
-    m_astrobwtMaxSize(data.astrobwtMaxSize * 1000),
     m_miner(data.miner),
     m_threads(data.threads),
     m_ctx()
 {
 #   ifdef XMRIG_ALGO_CN_HEAVY
     // cn-heavy optimization for Zen3 CPUs
-    const bool is_vermeer = (Cpu::info()->arch() == ICpuInfo::ARCH_ZEN3) && (Cpu::info()->model() == 0x21);
-    if ((N == 1) && (m_av == CnHash::AV_SINGLE) && (m_algorithm.family() == Algorithm::CN_HEAVY) && (m_assembly != Assembly::NONE) && is_vermeer) {
+    const auto arch = Cpu::info()->arch();
+    const uint32_t model = Cpu::info()->model();
+    const bool is_vermeer = (arch == ICpuInfo::ARCH_ZEN3) && (model == 0x21);
+    const bool is_raphael = (arch == ICpuInfo::ARCH_ZEN4) && (model == 0x61);
+    if ((N == 1) && (m_av == CnHash::AV_SINGLE) && (m_algorithm.family() == Algorithm::CN_HEAVY) && (m_assembly != Assembly::NONE) && (is_vermeer || is_raphael)) {
         std::lock_guard<std::mutex> lock(cn_heavyZen3MemoryMutex);
         if (!cn_heavyZen3Memory) {
             // Round up number of threads to the multiple of 8
@@ -148,6 +146,11 @@ void xmrig::CpuWorker<N>::allocateRandomX_VM()
         uint8_t* scratchpad = m_memory->isHugePages() ? m_memory->scratchpad() : dataset->tryAllocateScrathpad();
         m_vm = RxVm::create(dataset, scratchpad ? scratchpad : m_memory->scratchpad(), !m_hwAES, m_assembly, node());
     }
+    else if (!dataset->get() && (m_job.currentJob().seed() != m_seed)) {
+        // Update RandomX light VM with the new seed
+        randomx_vm_set_cache(m_vm, dataset->cache()->get());
+    }
+    m_seed = m_job.currentJob().seed();
 }
 #endif
 
@@ -181,8 +184,18 @@ bool xmrig::CpuWorker<N>::selfTest()
                         verify(Algorithm::CN_RWZ,    test_output_rwz)  &&
                         verify(Algorithm::CN_ZLS,    test_output_zls)  &&
                         verify(Algorithm::CN_CCX,    test_output_ccx)  &&
-                        verify(Algorithm::CN_DOUBLE, test_output_double);
+                        verify(Algorithm::CN_DOUBLE, test_output_double)
+#                       ifdef XMRIG_ALGO_CN_GPU
+                        &&
+                        verify(Algorithm::CN_GPU,    test_output_gpu)
+#                       endif
+                        ;
 
+#       ifdef XMRIG_ALGO_CN_GPU
+        if (! (!rc || N > 1)) {
+            return verify(Algorithm::CN_GPU, test_output_gpu);
+        } else
+#       endif
         return rc;
     }
 
@@ -222,12 +235,6 @@ bool xmrig::CpuWorker<N>::selfTest()
     }
 #   endif
 
-#   ifdef XMRIG_ALGO_ASTROBWT
-    if (m_algorithm.family() == Algorithm::ASTROBWT) {
-        return verify(Algorithm::ASTROBWT_DERO, astrobwt_dero_test_out);
-    }
-#   endif
-
     return false;
 }
 
@@ -271,7 +278,7 @@ void xmrig::CpuWorker<N>::start()
 
             uint32_t current_job_nonces[N];
             for (size_t i = 0; i < N; ++i) {
-                current_job_nonces[i] = *m_job.nonce(i);
+                current_job_nonces[i] = readUnaligned(m_job.nonce(i));
             }
 
 #           ifdef XMRIG_FEATURE_BENCHMARK
@@ -294,12 +301,13 @@ void xmrig::CpuWorker<N>::start()
 #           ifdef XMRIG_ALGO_RANDOMX
             uint8_t* miner_signature_ptr = m_job.blob() + m_job.nonceOffset() + m_job.nonceSize();
             if (job.algorithm().family() == Algorithm::RANDOM_X) {
+
                 if (first) {
                     first = false;
                     if (job.hasMinerSignature()) {
                         job.generateMinerSignature(m_job.blob(), job.size(), miner_signature_ptr);
                     }
-                    randomx_calculate_hash_first(m_vm, tempHash, m_job.blob(), job.size());
+                    randomx_calculate_hash_first(m_vm, tempHash, m_job.blob(), job.size(), job.algorithm());
                 }
 
                 if (!nextRound()) {
@@ -310,21 +318,13 @@ void xmrig::CpuWorker<N>::start()
                     memcpy(miner_signature_saved, miner_signature_ptr, sizeof(miner_signature_saved));
                     job.generateMinerSignature(m_job.blob(), job.size(), miner_signature_ptr);
                 }
-                randomx_calculate_hash_next(m_vm, tempHash, m_job.blob(), job.size(), m_hash);
+                randomx_calculate_hash_next(m_vm, tempHash, m_job.blob(), job.size(), m_hash, job.algorithm());
             }
             else
 #           endif
             {
                 switch (job.algorithm().family()) {
 
-#               ifdef XMRIG_ALGO_ASTROBWT
-                case Algorithm::ASTROBWT:
-                    if (!astrobwt::astrobwt_dero(m_job.blob(), job.size(), m_ctx[0]->memory, m_hash, m_astrobwtMaxSize, m_astrobwtAVX2)) {
-                        valid = false;
-                    }
-                    break;
-#               endif
-
 #               ifdef XMRIG_ALGO_GHOSTRIDER
                 case Algorithm::GHOSTRIDER:
                     if (N == 8) {

src/backend/cpu/CpuWorker.h

@@ -83,14 +83,12 @@ private:
     void allocateCnCtx();
     void consumeJob();
 
-    alignas(16) uint8_t m_hash[N * 32]{ 0 };
+    alignas(8) uint8_t m_hash[N * 32]{ 0 };
     const Algorithm m_algorithm;
     const Assembly m_assembly;
-    const bool m_astrobwtAVX2;
     const bool m_hwAES;
     const bool m_yield;
     const CnHash::AlgoVariant m_av;
-    const int m_astrobwtMaxSize;
     const Miner *m_miner;
     const size_t m_threads;
     cryptonight_ctx *m_ctx[N];
@@ -99,6 +97,7 @@ private:
 
 #   ifdef XMRIG_ALGO_RANDOMX
     randomx_vm *m_vm        = nullptr;
+    Buffer m_seed;
 #   endif
 
 #   ifdef XMRIG_ALGO_GHOSTRIDER

src/backend/cpu/interfaces/ICpuInfo.h

@@ -1,6 +1,6 @@
 /* XMRig
- * Copyright (c) 2018-2021 SChernykh   <https://github.com/SChernykh>
- * Copyright (c) 2016-2021 XMRig       <support@xmrig.com>
+ * Copyright (c) 2018-2023 SChernykh   <https://github.com/SChernykh>
+ * Copyright (c) 2016-2023 XMRig       <support@xmrig.com>
  *
  *   This program is free software: you can redistribute it and/or modify
  *   it under the terms of the GNU General Public License as published by
@@ -26,6 +26,12 @@
 #include "crypto/common/Assembly.h"
 
 
+#ifdef XMRIG_FEATURE_HWLOC
+using hwloc_const_bitmap_t  = const struct hwloc_bitmap_s *;
+using hwloc_topology_t      = struct hwloc_topology *;
+#endif
+
+
 namespace xmrig {
 
 
@@ -45,19 +51,21 @@ public:
         ARCH_ZEN,
         ARCH_ZEN_PLUS,
         ARCH_ZEN2,
-        ARCH_ZEN3
+        ARCH_ZEN3,
+        ARCH_ZEN4
     };
 
     enum MsrMod : uint32_t {
         MSR_MOD_NONE,
         MSR_MOD_RYZEN_17H,
         MSR_MOD_RYZEN_19H,
+        MSR_MOD_RYZEN_19H_ZEN4,
         MSR_MOD_INTEL,
         MSR_MOD_CUSTOM,
         MSR_MOD_MAX
     };
 
-#   define MSR_NAMES_LIST "none", "ryzen_17h", "ryzen_19h", "intel", "custom"
+#   define MSR_NAMES_LIST "none", "ryzen_17h", "ryzen_19h", "ryzen_19h_zen4", "intel", "custom"
 
     enum Flag : uint32_t {
         FLAG_AES,
@@ -114,10 +122,16 @@ public:
     virtual size_t threads() const                                                  = 0;
     virtual Vendor vendor() const                                                   = 0;
     virtual uint32_t model() const                                                  = 0;
+
+#   ifdef XMRIG_FEATURE_HWLOC
+    virtual bool membind(hwloc_const_bitmap_t nodeset)                              = 0;
+    virtual const std::vector<uint32_t> &nodeset() const                            = 0;
+    virtual hwloc_topology_t topology() const                                       = 0;
+#   endif
 };
 
 
-} /* namespace xmrig */
+} // namespace xmrig
 
 
 #endif // XMRIG_CPUINFO_H

src/backend/cpu/platform/BasicCpuInfo.cpp

@@ -64,7 +64,7 @@ static_assert(kCpuFlagsSize == ICpuInfo::FLAG_MAX, "kCpuFlagsSize and FLAG_MAX m
 
 
 #ifdef XMRIG_FEATURE_MSR
-constexpr size_t kMsrArraySize                                  = 5;
+constexpr size_t kMsrArraySize                                  = 6;
 static const std::array<const char *, kMsrArraySize> msrNames   = { MSR_NAMES_LIST };
 static_assert(kMsrArraySize == ICpuInfo::MSR_MOD_MAX, "kMsrArraySize and MSR_MOD_MAX mismatch");
 #endif
@@ -250,8 +250,14 @@ xmrig::BasicCpuInfo::BasicCpuInfo() :
                     break;
 
                 case 0x19:
-                    m_arch = ARCH_ZEN3;
-                    m_msrMod = MSR_MOD_RYZEN_19H;
+                    if (m_model == 0x61) {
+                        m_arch = ARCH_ZEN4;
+                        m_msrMod = MSR_MOD_RYZEN_19H_ZEN4;
+                    }
+                    else {
+                        m_arch = ARCH_ZEN3;
+                        m_msrMod = MSR_MOD_RYZEN_19H;
+                    }
                     break;
 
                 default:
@@ -290,7 +296,7 @@ xmrig::BasicCpuInfo::BasicCpuInfo() :
                 // Affected CPU models and stepping numbers are taken from https://www.intel.com/content/dam/support/us/en/documents/processors/mitigations-jump-conditional-code-erratum.pdf
                 m_jccErratum =
                     ((model == 0x4E) && (stepping == 0x3)) ||
-                    ((model == 0x55) && (stepping == 0x4)) ||
+                    ((model == 0x55) && ((stepping == 0x4) || (stepping == 0x7))) ||
                     ((model == 0x5E) && (stepping == 0x3)) ||
                     ((model == 0x8E) && (stepping >= 0x9) && (stepping <= 0xC)) ||
                     ((model == 0x9E) && (stepping >= 0x9) && (stepping <= 0xD)) ||
@@ -312,9 +318,12 @@ const char *xmrig::BasicCpuInfo::backend() const
 }
 
 
-xmrig::CpuThreads xmrig::BasicCpuInfo::threads(const Algorithm &algorithm, uint32_t) const
+xmrig::CpuThreads xmrig::BasicCpuInfo::threads(const Algorithm &algorithm, uint32_t limit) const
 {
-    const size_t count = std::thread::hardware_concurrency();
+    const uint32_t count = std::thread::hardware_concurrency();
+    const uint32_t count_limit  = std::max(static_cast<uint32_t>(count * (limit / 100.0f)), 1U);
+    const uint32_t count_limit2 = std::max(static_cast<uint32_t>(count / 2), count_limit);
+    const uint32_t count_limit4 = std::max(static_cast<uint32_t>(count / 4), count_limit);
 
     if (count == 1) {
         return 1;
@@ -324,13 +333,13 @@ xmrig::CpuThreads xmrig::BasicCpuInfo::threads(const Algorithm &algorithm, uint3
 
 #   ifdef XMRIG_ALGO_CN_LITE
     if (f == Algorithm::CN_LITE) {
-        return CpuThreads(count, 1);
+        return CpuThreads(count_limit, 1);
     }
 #   endif
 
 #   ifdef XMRIG_ALGO_CN_PICO
     if (f == Algorithm::CN_PICO) {
-        return CpuThreads(count, 2);
+        return CpuThreads(count_limit, 2);
     }
 #   endif
 
@@ -342,33 +351,37 @@ xmrig::CpuThreads xmrig::BasicCpuInfo::threads(const Algorithm &algorithm, uint3
 
 #   ifdef XMRIG_ALGO_CN_HEAVY
     if (f == Algorithm::CN_HEAVY) {
-        return CpuThreads(std::max<size_t>(count / 4, 1), 1);
+        return CpuThreads(count_limit4, 1);
+    }
+#   endif
+
+#   ifdef XMRIG_ALGO_CN_GPU
+    if (algorithm == Algorithm::CN_GPU) {
+        return count_limit;
     }
 #   endif
 
 #   ifdef XMRIG_ALGO_RANDOMX
     if (f == Algorithm::RANDOM_X) {
         if (algorithm == Algorithm::RX_WOW) {
-            return count;
+            return count_limit;
         }
 
-        return std::max<size_t>(count / 2, 1);
+        if (algorithm == Algorithm::RX_XLA) {
+            CpuThreads threads;
+            for (size_t i = 0; i < count_limit2; ++i) {
+                threads.add(i, 0);
+            }
+            return threads;
+        }
+
+        return count_limit2;
     }
 #   endif
 
 #   ifdef XMRIG_ALGO_ARGON2
     if (f == Algorithm::ARGON2) {
-        return count;
-    }
-#   endif
-
-#   ifdef XMRIG_ALGO_ASTROBWT
-    if (f == Algorithm::ASTROBWT) {
-        CpuThreads threads;
-        for (size_t i = 0; i < count; ++i) {
-            threads.add(i, 0);
-        }
-        return threads;
+        return count_limit;
     }
 #   endif
 
@@ -378,7 +391,7 @@ xmrig::CpuThreads xmrig::BasicCpuInfo::threads(const Algorithm &algorithm, uint3
     }
 #   endif
 
-    return CpuThreads(std::max<size_t>(count / 2, 1), 1);
+    return CpuThreads(count_limit2, 1);
 }
 
 

src/backend/cpu/platform/BasicCpuInfo.h

@@ -1,7 +1,7 @@
 /* XMRig
  * Copyright (c) 2017-2019 XMR-Stak    <https://github.com/fireice-uk>, <https://github.com/psychocrypt>
- * Copyright (c) 2018-2021 SChernykh   <https://github.com/SChernykh>
- * Copyright (c) 2016-2021 XMRig       <support@xmrig.com>
+ * Copyright (c) 2018-2023 SChernykh   <https://github.com/SChernykh>
+ * Copyright (c) 2016-2023 XMRig       <support@xmrig.com>
  *
  *   This program is free software: you can redistribute it and/or modify
  *   it under the terms of the GNU General Public License as published by
@@ -72,11 +72,10 @@ protected:
 #   endif
     }
 
-protected:
     Arch m_arch             = ARCH_UNKNOWN;
     bool m_jccErratum       = false;
     char m_brand[64 + 6]{};
-    size_t m_threads;
+    size_t m_threads        = 0;
     std::vector<int32_t> m_units;
     Vendor m_vendor         = VENDOR_UNKNOWN;
 
@@ -94,7 +93,7 @@ private:
 };
 
 
-} /* namespace xmrig */
+} // namespace xmrig
 
 
-#endif /* XMRIG_BASICCPUINFO_H */
+#endif // XMRIG_BASICCPUINFO_H

src/backend/cpu/platform/BasicCpuInfo_arm.cpp

@@ -27,7 +27,7 @@
 
 #if __ARM_FEATURE_CRYPTO && !defined(__APPLE__)
 #   include <sys/auxv.h>
-#   ifndef __FreeBSD__
+#   if !defined(XMRIG_OS_FREEBSD)
 #       include <asm/hwcap.h>
 #   else
 #       include <stdint.h>
@@ -71,7 +71,7 @@ xmrig::BasicCpuInfo::BasicCpuInfo() :
 #   if __ARM_FEATURE_CRYPTO
 #   if defined(__APPLE__)
     m_flags.set(FLAG_AES, true);
-#   elif defined(__FreeBSD__)
+#   elif defined(XMRIG_OS_FREEBSD)
     uint64_t isar0 = READ_SPECIALREG(id_aa64isar0_el1);
     m_flags.set(FLAG_AES, ID_AA64ISAR0_AES_VAL(isar0) >= ID_AA64ISAR0_AES_BASE);
 #   else

src/backend/cpu/platform/HwlocCpuInfo.cpp

@@ -1,6 +1,6 @@
 /* XMRig
- * Copyright (c) 2018-2021 SChernykh   <https://github.com/SChernykh>
- * Copyright (c) 2016-2021 XMRig       <support@xmrig.com>
+ * Copyright (c) 2018-2023 SChernykh   <https://github.com/SChernykh>
+ * Copyright (c) 2016-2023 XMRig       <support@xmrig.com>
  *
  *   This program is free software: you can redistribute it and/or modify
  *   it under the terms of the GNU General Public License as published by
@@ -36,27 +36,22 @@
 #include "base/io/log/Log.h"
 
 
-namespace xmrig {
-
-
-uint32_t HwlocCpuInfo::m_features = 0;
-
-
-static inline bool isCacheObject(hwloc_obj_t obj)
+#if HWLOC_API_VERSION < 0x20000
+static inline int hwloc_obj_type_is_cache(hwloc_obj_type_t type)
 {
-#   if HWLOC_API_VERSION >= 0x20000
-    return hwloc_obj_type_is_cache(obj->type);
-#   else
-    return obj->type == HWLOC_OBJ_CACHE;
-#   endif
+    return type == HWLOC_OBJ_CACHE;
 }
+#endif
+
+
+namespace xmrig {
 
 
 template <typename func>
 static inline void findCache(hwloc_obj_t obj, unsigned min, unsigned max, func lambda)
 {
     for (size_t i = 0; i < obj->arity; i++) {
-        if (isCacheObject(obj->children[i])) {
+        if (hwloc_obj_type_is_cache(obj->children[i]->type)) {
             const unsigned depth = obj->children[i]->attr->cache.depth;
             if (depth < min || depth > max) {
                 continue;
@@ -174,10 +169,6 @@ xmrig::HwlocCpuInfo::HwlocCpuInfo()
     m_packages  = countByType(m_topology, HWLOC_OBJ_PACKAGE);
 
     if (m_nodes > 1) {
-        if (hwloc_topology_get_support(m_topology)->membind->set_thisthread_membind) {
-            m_features |= SET_THISTHREAD_MEMBIND;
-        }
-
         m_nodeset.reserve(m_nodes);
         hwloc_obj_t node = nullptr;
 
@@ -298,8 +289,10 @@ void xmrig::HwlocCpuInfo::processTopLevelCache(hwloc_obj_t cache, const Algorith
     cores.reserve(m_cores);
     findByType(cache, HWLOC_OBJ_CORE, [&cores](hwloc_obj_t found) { cores.emplace_back(found); });
 
+    const bool L3_exclusive = isCacheExclusive(cache);
+
 #   ifdef XMRIG_ALGO_GHOSTRIDER
-    if ((algorithm == Algorithm::GHOSTRIDER_RTM) && (PUs > cores.size()) && (PUs < cores.size() * 2)) {
+    if ((algorithm == Algorithm::GHOSTRIDER_RTM) && L3_exclusive && (PUs > cores.size()) && (PUs < cores.size() * 2)) {
         // Don't use E-cores on Alder Lake
         cores.erase(std::remove_if(cores.begin(), cores.end(), [](hwloc_obj_t c) { return hwloc_bitmap_weight(c->cpuset) == 1; }), cores.end());
 
@@ -311,24 +304,16 @@ void xmrig::HwlocCpuInfo::processTopLevelCache(hwloc_obj_t cache, const Algorith
 #   endif
 
     size_t L3               = cache->attr->cache.size;
-    const bool L3_exclusive = isCacheExclusive(cache);
     size_t L2               = 0;
     int L2_associativity    = 0;
     size_t extra            = 0;
     size_t scratchpad       = algorithm.l3();
     uint32_t intensity      = algorithm.maxIntensity() == 1 ? 0 : 1;
 
-#   ifdef XMRIG_ALGO_ASTROBWT
-    if (algorithm == Algorithm::ASTROBWT_DERO) {
-        // Use fake low value to force usage of all available cores for AstroBWT (taking 'limit' into account)
-        scratchpad = 16 * 1024;
-    }
-#   endif
-
     if (cache->attr->cache.depth == 3) {
         for (size_t i = 0; i < cache->arity; ++i) {
             hwloc_obj_t l2 = cache->children[i];
-            if (!isCacheObject(l2) || l2->attr == nullptr) {
+            if (!hwloc_obj_type_is_cache(l2->type) || l2->attr == nullptr) {
                 continue;
             }
 
@@ -355,10 +340,22 @@ void xmrig::HwlocCpuInfo::processTopLevelCache(hwloc_obj_t cache, const Algorith
         intensity = 2;
     }
 
+#   ifdef XMRIG_ALGO_CN_GPU
+    if (algorithm == Algorithm::CN_GPU) {
+        cacheHashes = PUs;
+    }
+#   endif
+
 #   ifdef XMRIG_ALGO_RANDOMX
+    if ((algorithm.family() == Algorithm::RANDOM_X) && L3_exclusive && (PUs > cores.size()) && (PUs < cores.size() * 2)) {
+        // Use all L3+L2 on latest Intel CPUs with P-cores, E-cores and exclusive L3 cache
+        cacheHashes = (L3 + L2) / scratchpad;
+    }
     if (extra == 0 && algorithm.l2() > 0) {
         cacheHashes = std::min<size_t>(std::max<size_t>(L2 / algorithm.l2(), cores.size()), cacheHashes);
     }
+    if (algorithm == Algorithm::RX_XLA) cacheHashes = cores.size();
+
 #   endif
 
     if (limit > 0) {

src/backend/cpu/platform/HwlocCpuInfo.h

@@ -1,6 +1,6 @@
 /* XMRig
- * Copyright (c) 2018-2021 SChernykh   <https://github.com/SChernykh>
- * Copyright (c) 2016-2021 XMRig       <support@xmrig.com>
+ * Copyright (c) 2018-2023 SChernykh   <https://github.com/SChernykh>
+ * Copyright (c) 2016-2023 XMRig       <support@xmrig.com>
  *
  *   This program is free software: you can redistribute it and/or modify
  *   it under the terms of the GNU General Public License as published by
@@ -21,12 +21,9 @@
 
 
 #include "backend/cpu/platform/BasicCpuInfo.h"
-#include "base/tools/Object.h"
 
 
-using hwloc_const_bitmap_t  = const struct hwloc_bitmap_s *;
-using hwloc_obj_t           = struct hwloc_obj *;
-using hwloc_topology_t      = struct hwloc_topology *;
+using hwloc_obj_t = struct hwloc_obj *;
 
 
 namespace xmrig {
@@ -37,39 +34,27 @@ class HwlocCpuInfo : public BasicCpuInfo
 public:
     XMRIG_DISABLE_COPY_MOVE(HwlocCpuInfo)
 
-
-    enum Feature : uint32_t {
-        SET_THISTHREAD_MEMBIND = 1
-    };
-
-
     HwlocCpuInfo();
     ~HwlocCpuInfo() override;
 
-    static inline bool hasFeature(Feature feature)              { return m_features & feature; }
-
-    inline const std::vector<uint32_t> &nodeset() const         { return m_nodeset; }
-    inline hwloc_topology_t topology() const                    { return m_topology; }
-
-    bool membind(hwloc_const_bitmap_t nodeset);
-
 protected:
+    bool membind(hwloc_const_bitmap_t nodeset) override;
     CpuThreads threads(const Algorithm &algorithm, uint32_t limit) const override;
 
-    inline const char *backend() const override     { return m_backend; }
-    inline size_t cores() const override            { return m_cores; }
-    inline size_t L2() const override               { return m_cache[2]; }
-    inline size_t L3() const override               { return m_cache[3]; }
-    inline size_t nodes() const override            { return m_nodes; }
-    inline size_t packages() const override         { return m_packages; }
+    inline const char *backend() const override                     { return m_backend; }
+    inline const std::vector<uint32_t> &nodeset() const override    { return m_nodeset; }
+    inline hwloc_topology_t topology() const override               { return m_topology; }
+    inline size_t cores() const override                            { return m_cores; }
+    inline size_t L2() const override                               { return m_cache[2]; }
+    inline size_t L3() const override                               { return m_cache[3]; }
+    inline size_t nodes() const override                            { return m_nodes; }
+    inline size_t packages() const override                         { return m_packages; }
 
 private:
     CpuThreads allThreads(const Algorithm &algorithm, uint32_t limit) const;
     void processTopLevelCache(hwloc_obj_t cache, const Algorithm &algorithm, CpuThreads &threads, size_t limit) const;
     void setThreads(size_t threads);
 
-    static uint32_t m_features;
-
     char m_backend[20]          = { 0 };
     hwloc_topology_t m_topology = nullptr;
     size_t m_cache[5]           = { 0 };
@@ -80,7 +65,7 @@ private:
 };
 
 
-} /* namespace xmrig */
+} // namespace xmrig
 
 
-#endif /* XMRIG_HWLOCCPUINFO_H */
+#endif // XMRIG_HWLOCCPUINFO_H

src/backend/cpu/platform/lscpu_arm.cpp

@@ -1,7 +1,7 @@
 /* XMRig
  * Copyright (c) 2018      Riku Voipio <riku.voipio@iki.fi>
- * Copyright (c) 2018-2021 SChernykh   <https://github.com/SChernykh>
- * Copyright (c) 2016-2021 XMRig       <support@xmrig.com>
+ * Copyright (c) 2018-2023 SChernykh   <https://github.com/SChernykh>
+ * Copyright (c) 2016-2023 XMRig       <support@xmrig.com>
  *
  *   This program is free software: you can redistribute it and/or modify
  *   it under the terms of the GNU General Public License as published by
@@ -17,7 +17,6 @@
  *   along with this program. If not, see <http://www.gnu.org/licenses/>.
  */
 
-
 #include "base/tools/String.h"
 #include "3rdparty/fmt/core.h"
 
@@ -84,6 +83,7 @@ static const id_part arm_part[] = {
     { 0xc27, "Cortex-M7" },
     { 0xc60, "Cortex-M0+" },
     { 0xd01, "Cortex-A32" },
+    { 0xd02, "Cortex-A34" },
     { 0xd03, "Cortex-A53" },
     { 0xd04, "Cortex-A35" },
     { 0xd05, "Cortex-A55" },
@@ -97,40 +97,60 @@ static const id_part arm_part[] = {
     { 0xd0d, "Cortex-A77" },
     { 0xd0e, "Cortex-A76AE" },
     { 0xd13, "Cortex-R52" },
+    { 0xd15, "Cortex-R82" },
     { 0xd20, "Cortex-M23" },
     { 0xd21, "Cortex-M33" },
+    { 0xd40, "Neoverse-V1" },
     { 0xd41, "Cortex-A78" },
     { 0xd42, "Cortex-A78AE" },
+    { 0xd43, "Cortex-A65AE" },
+    { 0xd44, "Cortex-X1" },
+    { 0xd46, "Cortex-A510" },
+    { 0xd47, "Cortex-A710" },
+    { 0xd48, "Cortex-X2" },
+    { 0xd49, "Neoverse-N2" },
     { 0xd4a, "Neoverse-E1" },
     { 0xd4b, "Cortex-A78C" },
-    { -1, nullptr },
+    { 0xd4c, "Cortex-X1C" },
+    { 0xd4d, "Cortex-A715" },
+    { 0xd4e, "Cortex-X3" },
+    { 0xd4f, "Neoverse-V2" },
+    { -1, nullptr }
 };
 
 static const id_part brcm_part[] = {
-    { 0x0f, "Brahma B15" },
-    { 0x100, "Brahma B53" },
+    { 0x0f, "Brahma-B15" },
+    { 0x100, "Brahma-B53" },
     { 0x516, "ThunderX2" },
-    { -1, nullptr },
+    { -1, nullptr }
 };
 
 static const id_part dec_part[] = {
     { 0xa10, "SA110" },
     { 0xa11, "SA1100" },
-    { -1, nullptr },
+    { -1, nullptr }
 };
 
 static const id_part cavium_part[] = {
     { 0x0a0, "ThunderX" },
-    { 0x0a1, "ThunderX 88XX" },
-    { 0x0a2, "ThunderX 81XX" },
-    { 0x0a3, "ThunderX 83XX" },
-    { 0x0af, "ThunderX2 99xx" },
-    { -1, nullptr },
+    { 0x0a1, "ThunderX-88XX" },
+    { 0x0a2, "ThunderX-81XX" },
+    { 0x0a3, "ThunderX-83XX" },
+    { 0x0af, "ThunderX2-99xx" },
+    { 0x0b0, "OcteonTX2" },
+    { 0x0b1, "OcteonTX2-98XX" },
+    { 0x0b2, "OcteonTX2-96XX" },
+    { 0x0b3, "OcteonTX2-95XX" },
+    { 0x0b4, "OcteonTX2-95XXN" },
+    { 0x0b5, "OcteonTX2-95XXMM" },
+    { 0x0b6, "OcteonTX2-95XXO" },
+    { 0x0b8, "ThunderX3-T110" },
+    { -1, nullptr }
 };
 
 static const id_part apm_part[] = {
     { 0x000, "X-Gene" },
-    { -1, nullptr },
+    { -1, nullptr }
 };
 
 static const id_part qcom_part[] = {
@@ -141,36 +161,43 @@ static const id_part qcom_part[] = {
     { 0x201, "Kryo" },
     { 0x205, "Kryo" },
     { 0x211, "Kryo" },
-    { 0x800, "Falkor V1/Kryo" },
-    { 0x801, "Kryo V2" },
+    { 0x800, "Falkor-V1/Kryo" },
+    { 0x801, "Kryo-V2" },
+    { 0x802, "Kryo-3XX-Gold" },
+    { 0x803, "Kryo-3XX-Silver" },
+    { 0x804, "Kryo-4XX-Gold" },
+    { 0x805, "Kryo-4XX-Silver" },
     { 0xc00, "Falkor" },
     { 0xc01, "Saphira" },
-    { -1, nullptr },
+    { -1, nullptr }
 };
 
 static const id_part samsung_part[] = {
     { 0x001, "exynos-m1" },
-    { -1, nullptr },
+    { 0x002, "exynos-m3" },
+    { 0x003, "exynos-m4" },
+    { 0x004, "exynos-m5" },
+    { -1, nullptr }
 };
 
 static const id_part nvidia_part[] = {
     { 0x000, "Denver" },
     { 0x003, "Denver 2" },
     { 0x004, "Carmel" },
-    { -1, nullptr },
+    { -1, nullptr }
 };
 
 static const id_part marvell_part[] = {
-    { 0x131, "Feroceon 88FR131" },
+    { 0x131, "Feroceon-88FR131" },
     { 0x581, "PJ4/PJ4b" },
     { 0x584, "PJ4B-MP" },
-    { -1, nullptr },
+    { -1, nullptr }
 };
 
 static const id_part faraday_part[] = {
     { 0x526, "FA526" },
     { 0x626, "FA626" },
-    { -1, nullptr },
+    { -1, nullptr }
 };
 
 static const id_part intel_part[] = {
@@ -195,23 +222,50 @@ static const id_part intel_part[] = {
     { 0x689, "PXA31x" },
     { 0xb11, "SA1110" },
     { 0xc12, "IPX1200" },
-    { -1, nullptr },
+    { -1, nullptr }
 };
 
 static const struct id_part fujitsu_part[] = {
     { 0x001, "A64FX" },
-    { -1, "unknown" },
+    { -1, nullptr }
 };
 
 static const id_part hisi_part[] = {
-    { 0xd01, "Kunpeng-920" }, /* aka tsv110 */
-    { -1, nullptr },
+    { 0xd01, "Kunpeng-920" },	/* aka tsv110 */
+    { 0xd40, "Cortex-A76" },	/* HiSilicon uses this ID though advertises A76 */
+    { -1, nullptr }
 };
 
 static const id_part apple_part[] = {
     { 0x022, "M1" },
     { 0x023, "M1" },
-    { -1, nullptr },
+    { 0x024, "M1-Pro" },
+    { 0x025, "M1-Pro" },
+    { 0x028, "M1-Max" },
+    { 0x029, "M1-Max" },
+    { 0x032, "M2" },
+    { 0x033, "M2" },
+    { 0x034, "M2-Pro" },
+    { 0x035, "M2-Pro" },
+    { 0x038, "M2-Max" },
+    { 0x039, "M2-Max" },
+    { -1, nullptr }
+};
+
+
+static const struct id_part ft_part[] = {
+    { 0x660, "FTC660" },
+    { 0x661, "FTC661" },
+    { 0x662, "FTC662" },
+    { 0x663, "FTC663" },
+    { -1, nullptr }
+};
+
+
+static const struct id_part ampere_part[] = {
+    { 0xac3, "Ampere-1" },
+    { 0xac4, "Ampere-1a" },
+    { -1, nullptr }
 };
 
 
@@ -229,7 +283,9 @@ static const hw_impl hw_implementer[] = {
     { 0x56, marvell_part, "Marvell" },
     { 0x61, apple_part,   "Apple" },
     { 0x66, faraday_part, "Faraday" },
-    { 0x69, intel_part,   "Intel" }
+    { 0x69, intel_part,   "Intel" },
+    { 0x70, ft_part,      "Phytium" },
+    { 0xc0, ampere_part,  "Ampere" }
 };
 
 

src/backend/cuda/CudaBackend.cpp

@@ -40,11 +40,6 @@
 #include "core/Controller.h"
 
 
-#ifdef XMRIG_ALGO_ASTROBWT
-#   include "backend/cuda/runners/CudaAstroBWTRunner.h"
-#endif
-
-
 #ifdef XMRIG_ALGO_KAWPOW
 #   include "crypto/kawpow/KPCache.h"
 #   include "crypto/kawpow/KPHash.h"
@@ -220,12 +215,6 @@ public:
 
         size_t algo_l3 = algo.l3();
 
-#       ifdef XMRIG_ALGO_ASTROBWT
-        if (algo.family() == Algorithm::ASTROBWT) {
-            algo_l3 = CudaAstroBWTRunner::BWT_DATA_STRIDE * 17 + 1024;
-        }
-#       endif
-
         size_t i = 0;
         for (const auto &data : threads) {
             size_t mem_used = (data.thread.threads() * data.thread.blocks()) * algo_l3 / oneMiB;

src/backend/cuda/CudaConfig.cpp

@@ -174,7 +174,6 @@ void xmrig::CudaConfig::generate()
     count += xmrig::generate<Algorithm::CN_PICO>(m_threads, devices);
     count += xmrig::generate<Algorithm::CN_FEMTO>(m_threads, devices);
     count += xmrig::generate<Algorithm::RANDOM_X>(m_threads, devices);
-    count += xmrig::generate<Algorithm::ASTROBWT>(m_threads, devices);
     count += xmrig::generate<Algorithm::KAWPOW>(m_threads, devices);
 
     generated    = true;

src/backend/cuda/CudaConfig_gen.h

@@ -52,6 +52,9 @@ size_t inline generate<Algorithm::CN>(Threads<CudaThreads> &threads, const std::
 
     count += generate(Algorithm::kCN, threads, Algorithm::CN_1, devices);
     count += generate(Algorithm::kCN_2, threads, Algorithm::CN_2, devices);
+#   ifdef XMRIG_ALGO_CN_GPU
+    count += generate(Algorithm::kCN_GPU, threads, Algorithm::CN_GPU, devices);
+#   endif
 
     if (!threads.isExist(Algorithm::CN_0)) {
         threads.disable(Algorithm::CN_0);
@@ -135,15 +138,6 @@ size_t inline generate<Algorithm::RANDOM_X>(Threads<CudaThreads> &threads, const
 #endif
 
 
-#ifdef XMRIG_ALGO_ASTROBWT
-template<>
-size_t inline generate<Algorithm::ASTROBWT>(Threads<CudaThreads> &threads, const std::vector<CudaDevice> &devices)
-{
-    return generate(Algorithm::kASTROBWT, threads, Algorithm::ASTROBWT_DERO, devices);
-}
-#endif
-
-
 #ifdef XMRIG_ALGO_KAWPOW
 template<>
 size_t inline generate<Algorithm::KAWPOW>(Threads<CudaThreads> &threads, const std::vector<CudaDevice> &devices)

src/backend/cuda/CudaWorker.cpp

@@ -22,6 +22,7 @@
 #include "backend/cuda/runners/CudaCnRunner.h"
 #include "backend/cuda/wrappers/CudaDevice.h"
 #include "base/io/log/Log.h"
+#include "base/tools/Alignment.h"
 #include "base/tools/Chrono.h"
 #include "core/Miner.h"
 #include "crypto/common/Nonce.h"
@@ -33,11 +34,6 @@
 #endif
 
 
-#ifdef XMRIG_ALGO_ASTROBWT
-#   include "backend/cuda/runners/CudaAstroBWTRunner.h"
-#endif
-
-
 #ifdef XMRIG_ALGO_KAWPOW
 #   include "backend/cuda/runners/CudaKawPowRunner.h"
 #endif
@@ -75,12 +71,6 @@ xmrig::CudaWorker::CudaWorker(size_t id, const CudaLaunchData &data) :
     case Algorithm::ARGON2:
         break;
 
-    case Algorithm::ASTROBWT:
-#       ifdef XMRIG_ALGO_ASTROBWT
-        m_runner = new CudaAstroBWTRunner(id, data);
-#       endif
-        break;
-
     case Algorithm::KAWPOW:
 #       ifdef XMRIG_ALGO_KAWPOW
         m_runner = new CudaKawPowRunner(id, data);
@@ -152,7 +142,7 @@ void xmrig::CudaWorker::start()
             uint32_t foundNonce[16] = { 0 };
             uint32_t foundCount     = 0;
 
-            if (!m_runner->run(*m_job.nonce(), &foundCount, foundNonce)) {
+            if (!m_runner->run(readUnaligned(m_job.nonce()), &foundCount, foundNonce)) {
                 return;
             }
 

src/backend/cuda/cuda.cmake

@@ -54,11 +54,6 @@ if (WITH_CUDA)
        list(APPEND SOURCES_BACKEND_CUDA src/backend/cuda/runners/CudaRxRunner.cpp)
    endif()
 
-   if (WITH_ASTROBWT)
-       list(APPEND HEADERS_BACKEND_CUDA src/backend/cuda/runners/CudaAstroBWTRunner.h)
-       list(APPEND SOURCES_BACKEND_CUDA src/backend/cuda/runners/CudaAstroBWTRunner.cpp)
-   endif()
-
    if (WITH_KAWPOW)
        list(APPEND HEADERS_BACKEND_CUDA src/backend/cuda/runners/CudaKawPowRunner.h)
        list(APPEND SOURCES_BACKEND_CUDA src/backend/cuda/runners/CudaKawPowRunner.cpp)

src/backend/cuda/runners/CudaAstroBWTRunner.cpp

@@ -1,75 +0,0 @@
-/* XMRig
- * Copyright 2010      Jeff Garzik <jgarzik@pobox.com>
- * Copyright 2012-2014 pooler      <pooler@litecoinpool.org>
- * Copyright 2014      Lucas Jones <https://github.com/lucasjones>
- * Copyright 2014-2016 Wolf9466    <https://github.com/OhGodAPet>
- * Copyright 2016      Jay D Dee   <jayddee246@gmail.com>
- * Copyright 2017-2018 XMR-Stak    <https://github.com/fireice-uk>, <https://github.com/psychocrypt>
- * Copyright 2018-2020 SChernykh   <https://github.com/SChernykh>
- * Copyright 2016-2020 XMRig       <https://github.com/xmrig>, <support@xmrig.com>
- *
- *   This program is free software: you can redistribute it and/or modify
- *   it under the terms of the GNU General Public License as published by
- *   the Free Software Foundation, either version 3 of the License, or
- *   (at your option) any later version.
- *
- *   This program is distributed in the hope that it will be useful,
- *   but WITHOUT ANY WARRANTY; without even the implied warranty of
- *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- *   GNU General Public License for more details.
- *
- *   You should have received a copy of the GNU General Public License
- *   along with this program. If not, see <http://www.gnu.org/licenses/>.
- */
-
-
-#include "backend/cuda/runners/CudaAstroBWTRunner.h"
-#include "backend/cuda/CudaLaunchData.h"
-#include "backend/cuda/wrappers/CudaLib.h"
-#include "base/net/stratum/Job.h"
-
-
-constexpr uint32_t xmrig::CudaAstroBWTRunner::BWT_DATA_STRIDE;
-
-
-xmrig::CudaAstroBWTRunner::CudaAstroBWTRunner(size_t index, const CudaLaunchData &data) :
-    CudaBaseRunner(index, data)
-{
-    m_intensity = m_data.thread.threads() * m_data.thread.blocks();
-    m_intensity -= m_intensity % 32;
-}
-
-
-bool xmrig::CudaAstroBWTRunner::run(uint32_t startNonce, uint32_t *rescount, uint32_t *resnonce)
-{
-    return callWrapper(CudaLib::astroBWTHash(m_ctx, startNonce, m_target, rescount, resnonce));
-}
-
-
-bool xmrig::CudaAstroBWTRunner::set(const Job &job, uint8_t *blob)
-{
-    if (!CudaBaseRunner::set(job, blob)) {
-        return false;
-    }
-
-    return callWrapper(CudaLib::astroBWTPrepare(m_ctx, static_cast<uint32_t>(m_intensity)));
-}
-
-
-size_t xmrig::CudaAstroBWTRunner::roundSize() const
-{
-    constexpr uint32_t STAGE1_SIZE = 147253;
-    constexpr uint32_t STAGE1_DATA_STRIDE = (STAGE1_SIZE + 256 + 255) & ~255U;
-
-    const uint32_t BATCH2_SIZE = m_intensity;
-    const uint32_t BWT_ALLOCATION_SIZE = BATCH2_SIZE * BWT_DATA_STRIDE;
-    const uint32_t BATCH1_SIZE = (BWT_ALLOCATION_SIZE / STAGE1_DATA_STRIDE) & ~255U;
-
-    return BATCH1_SIZE;
-}
-
-
-size_t xmrig::CudaAstroBWTRunner::processedHashes() const
-{
-    return CudaLib::deviceInt(m_ctx, CudaLib::DeviceAstroBWTProcessedHashes);
-}

src/backend/cuda/wrappers/CudaLib.cpp

@@ -50,8 +50,6 @@ static String defaultLoader = "libxmrig-cuda.so";
 
 
 static const char *kAlloc                               = "alloc";
-static const char *kAstroBWTHash                        = "astroBWTHash";
-static const char *kAstroBWTPrepare                     = "astroBWTPrepare";
 static const char *kCnHash                              = "cnHash";
 static const char *kDeviceCount                         = "deviceCount";
 static const char *kDeviceInfo                          = "deviceInfo";
@@ -76,8 +74,6 @@ static const char *kVersion                             = "version";
 
 
 using alloc_t                                           = nvid_ctx * (*)(uint32_t, int32_t, int32_t);
-using astroBWTHash_t                                    = bool (*)(nvid_ctx *, uint32_t, uint64_t, uint32_t *, uint32_t *);
-using astroBWTPrepare_t                                 = bool (*)(nvid_ctx *, uint32_t);
 using cnHash_t                                          = bool (*)(nvid_ctx *, uint32_t, uint64_t, uint64_t, uint32_t *, uint32_t *);
 using deviceCount_t                                     = uint32_t (*)();
 using deviceInfo_t                                      = bool (*)(nvid_ctx *, int32_t, int32_t, uint32_t, int32_t);
@@ -102,8 +98,6 @@ using version_t                                         = uint32_t (*)(Version);
 
 
 static alloc_t pAlloc                                   = nullptr;
-static astroBWTHash_t pAstroBWTHash                     = nullptr;
-static astroBWTPrepare_t pAstroBWTPrepare               = nullptr;
 static cnHash_t pCnHash                                 = nullptr;
 static deviceCount_t pDeviceCount                       = nullptr;
 static deviceInfo_t pDeviceInfo                         = nullptr;
@@ -176,18 +170,6 @@ void xmrig::CudaLib::close()
 }
 
 
-bool xmrig::CudaLib::astroBWTHash(nvid_ctx *ctx, uint32_t startNonce, uint64_t target, uint32_t *rescount, uint32_t *resnonce) noexcept
-{
-    return pAstroBWTHash(ctx, startNonce, target, rescount, resnonce);
-}
-
-
-bool xmrig::CudaLib::astroBWTPrepare(nvid_ctx *ctx, uint32_t batchSize) noexcept
-{
-    return pAstroBWTPrepare(ctx, batchSize);
-}
-
-
 bool xmrig::CudaLib::cnHash(nvid_ctx *ctx, uint32_t startNonce, uint64_t height, uint64_t target, uint32_t *rescount, uint32_t *resnonce)
 {
     return pCnHash(ctx, startNonce, height, target, rescount, resnonce);
@@ -371,13 +353,9 @@ bool xmrig::CudaLib::open()
 #   ifdef XMRIG_OS_LINUX
     if (m_loader == defaultLoader) {
         m_loader = Process::location(Process::ExeLocation, m_loader);
-    }
-    else {
-        return false;
-    }
-
-    if (uv_dlopen(m_loader, &cudaLib) == 0) {
-        return true;
+        if (uv_dlopen(m_loader, &cudaLib) == 0) {
+            return true;
+        }
     }
 #   endif
 
@@ -410,8 +388,6 @@ void xmrig::CudaLib::load()
     DLSYM(Release);
     DLSYM(RxHash);
     DLSYM(RxPrepare);
-    DLSYM(AstroBWTHash);
-    DLSYM(AstroBWTPrepare);
     DLSYM(KawPowHash);
     DLSYM(KawPowPrepare_v2);
     DLSYM(KawPowStopHash);

src/backend/cuda/wrappers/CudaLib.h

@@ -56,7 +56,6 @@ public:
         DevicePciDeviceID,
         DevicePciDomainID,
         DeviceDatasetHost,
-        DeviceAstroBWTProcessedHashes,
     };
 
     static bool init(const char *fileName = nullptr);
@@ -67,8 +66,6 @@ public:
     static inline bool isReady() noexcept { return m_ready; }
     static inline const String &loader()  { return m_loader; }
 
-    static bool astroBWTHash(nvid_ctx *ctx, uint32_t startNonce, uint64_t target, uint32_t *rescount, uint32_t *resnonce) noexcept;
-    static bool astroBWTPrepare(nvid_ctx *ctx, uint32_t batchSize) noexcept;
     static bool cnHash(nvid_ctx *ctx, uint32_t startNonce, uint64_t height, uint64_t target, uint32_t *rescount, uint32_t *resnonce);
     static bool deviceInfo(nvid_ctx *ctx, int32_t blocks, int32_t threads, const Algorithm &algorithm, int32_t dataset_host = -1) noexcept;
     static bool deviceInit(nvid_ctx *ctx) noexcept;

src/backend/opencl/OclBackend.cpp

@@ -29,7 +29,6 @@
 #include "backend/opencl/OclConfig.h"
 #include "backend/opencl/OclLaunchData.h"
 #include "backend/opencl/OclWorker.h"
-#include "backend/opencl/runners/OclAstroBWTRunner.h"
 #include "backend/opencl/runners/tools/OclSharedState.h"
 #include "backend/opencl/wrappers/OclContext.h"
 #include "backend/opencl/wrappers/OclLib.h"
@@ -204,12 +203,6 @@ public:
 
         size_t algo_l3 = algo.l3();
 
-#       ifdef XMRIG_ALGO_ASTROBWT
-        if (algo.family() == Algorithm::ASTROBWT) {
-            algo_l3 = OclAstroBWTRunner::BWT_DATA_STRIDE * 17 + 324;
-        }
-#       endif
-
         size_t i = 0;
         for (const auto &data : threads) {
             size_t mem_used = data.thread.intensity() * algo_l3 / oneMiB;

src/backend/opencl/OclConfig.cpp

@@ -214,7 +214,6 @@ void xmrig::OclConfig::generate()
     count += xmrig::generate<Algorithm::CN_PICO>(m_threads, devices);
     count += xmrig::generate<Algorithm::CN_FEMTO>(m_threads, devices);
     count += xmrig::generate<Algorithm::RANDOM_X>(m_threads, devices);
-    count += xmrig::generate<Algorithm::ASTROBWT>(m_threads, devices);
     count += xmrig::generate<Algorithm::KAWPOW>(m_threads, devices);
 
     m_shouldSave = count > 0;

src/backend/opencl/OclConfig_gen.h

@@ -51,6 +51,9 @@ size_t inline generate<Algorithm::CN>(Threads<OclThreads> &threads, const std::v
 
     count += generate(Algorithm::kCN, threads, Algorithm::CN_1, devices);
     count += generate(Algorithm::kCN_2, threads, Algorithm::CN_2, devices);
+#   ifdef XMRIG_ALGO_CN_GPU
+    count += generate(Algorithm::kCN_GPU, threads, Algorithm::CN_GPU, devices);
+#   endif
 
     if (!threads.isExist(Algorithm::CN_0)) {
         threads.disable(Algorithm::CN_0);
@@ -129,15 +132,6 @@ size_t inline generate<Algorithm::RANDOM_X>(Threads<OclThreads> &threads, const
 #endif
 
 
-#ifdef XMRIG_ALGO_ASTROBWT
-template<>
-size_t inline generate<Algorithm::ASTROBWT>(Threads<OclThreads>& threads, const std::vector<OclDevice>& devices)
-{
-    return generate(Algorithm::kASTROBWT, threads, Algorithm::ASTROBWT_DERO, devices);
-}
-#endif
-
-
 #ifdef XMRIG_ALGO_KAWPOW
 template<>
 size_t inline generate<Algorithm::KAWPOW>(Threads<OclThreads>& threads, const std::vector<OclDevice>& devices)

src/backend/opencl/OclThread.cpp

@@ -116,9 +116,7 @@ rapidjson::Value xmrig::OclThread::toJSON(rapidjson::Document &doc) const
 
     out.AddMember(StringRef(kIndex),        index(), allocator);
     out.AddMember(StringRef(kIntensity),    intensity(), allocator);
-    if (!m_fields.test(ASTROBWT_FIELDS)) {
-        out.AddMember(StringRef(kWorksize), worksize(), allocator);
-    }
+    out.AddMember(StringRef(kWorksize),     worksize(), allocator);
 
     if (m_fields.test(STRIDED_INDEX_FIELD)) {
         Value si(kArrayType);
@@ -144,7 +142,7 @@ rapidjson::Value xmrig::OclThread::toJSON(rapidjson::Document &doc) const
         out.AddMember(StringRef(kDatasetHost),  isDatasetHost(), allocator);
 #       endif
     }
-    else if (!m_fields.test(ASTROBWT_FIELDS) && !m_fields.test(KAWPOW_FIELDS)) {
+    else if (!m_fields.test(KAWPOW_FIELDS)) {
         out.AddMember(StringRef(kUnroll), unrollFactor(), allocator);
     }
 

src/backend/opencl/OclThread.h

@@ -45,6 +45,20 @@ public:
         setIntensity(intensity);
     }
 
+#   ifdef XMRIG_ALGO_CN_GPU
+    OclThread(uint32_t index, uint32_t intensity, uint32_t worksize, uint32_t threads, uint32_t unrollFactor) :
+        m_fields(0),
+        m_threads(threads, -1),
+        m_index(index),
+        m_memChunk(0),
+        m_stridedIndex(0),
+        m_unrollFactor(unrollFactor),
+        m_worksize(worksize)
+    {
+        setIntensity(intensity);
+    }
+#   endif
+
 #   ifdef XMRIG_ALGO_RANDOMX
     OclThread(uint32_t index, uint32_t intensity, uint32_t worksize, uint32_t threads, bool gcnAsm, bool datasetHost, uint32_t bfactor) :
         m_datasetHost(datasetHost),
@@ -61,20 +75,6 @@ public:
     }
 #   endif
 
-#   ifdef XMRIG_ALGO_ASTROBWT
-    OclThread(uint32_t index, uint32_t intensity, uint32_t threads) :
-        m_fields(4),
-        m_threads(threads, -1),
-        m_index(index),
-        m_memChunk(0),
-        m_stridedIndex(0),
-        m_unrollFactor(1),
-        m_worksize(1)
-    {
-        setIntensity(intensity);
-    }
-#   endif
-
 #   ifdef XMRIG_ALGO_KAWPOW
     OclThread(uint32_t index, uint32_t intensity, uint32_t worksize, uint32_t threads) :
         m_fields(8),
@@ -113,7 +113,6 @@ private:
     enum Fields {
         STRIDED_INDEX_FIELD,
         RANDOMX_FIELDS,
-        ASTROBWT_FIELDS,
         KAWPOW_FIELDS,
         FIELD_MAX
     };

src/backend/opencl/OclWorker.cpp

@@ -23,21 +23,22 @@
 #include "backend/opencl/runners/tools/OclSharedData.h"
 #include "backend/opencl/runners/tools/OclSharedState.h"
 #include "base/io/log/Log.h"
+#include "base/tools/Alignment.h"
 #include "base/tools/Chrono.h"
 #include "core/Miner.h"
 #include "crypto/common/Nonce.h"
 #include "net/JobResults.h"
 
 
+#ifdef XMRIG_ALGO_CN_GPU
+#   include "backend/opencl/runners/OclRyoRunner.h"
+#endif
+
 #ifdef XMRIG_ALGO_RANDOMX
 #   include "backend/opencl/runners/OclRxJitRunner.h"
 #   include "backend/opencl/runners/OclRxVmRunner.h"
 #endif
 
-#ifdef XMRIG_ALGO_ASTROBWT
-#   include "backend/opencl/runners/OclAstroBWTRunner.h"
-#endif
-
 #ifdef XMRIG_ALGO_KAWPOW
 #   include "backend/opencl/runners/OclKawPowRunner.h"
 #endif
@@ -89,12 +90,6 @@ xmrig::OclWorker::OclWorker(size_t id, const OclLaunchData &data) :
 #       endif
         break;
 
-    case Algorithm::ASTROBWT:
-#       ifdef XMRIG_ALGO_ASTROBWT
-        m_runner = new OclAstroBWTRunner(id, data);
-#       endif
-        break;
-
     case Algorithm::KAWPOW:
 #       ifdef XMRIG_ALGO_KAWPOW
         m_runner = new OclKawPowRunner(id, data);
@@ -102,6 +97,12 @@ xmrig::OclWorker::OclWorker(size_t id, const OclLaunchData &data) :
         break;
 
     default:
+#       ifdef XMRIG_ALGO_CN_GPU
+        if (m_algorithm == Algorithm::CN_GPU) {
+            m_runner = new OclRyoRunner(id, data);
+        }
+        else
+#       endif
         m_runner = new OclCnRunner(id, data);
         break;
     }
@@ -179,7 +180,7 @@ void xmrig::OclWorker::start()
             const uint64_t t = Chrono::steadyMSecs();
 
             try {
-                m_runner->run(*m_job.nonce(), results);
+                m_runner->run(readUnaligned(m_job.nonce()), results);
             }
             catch (std::exception &ex) {
                 printError(id(), ex.what());

src/backend/opencl/cl/OclSource.cpp

@@ -28,12 +28,12 @@
 #include "base/crypto/Algorithm.h"
 
 
-#ifdef XMRIG_ALGO_RANDOMX
-#   include "backend/opencl/cl/rx/randomx_cl.h"
+#ifdef XMRIG_ALGO_CN_GPU
+#   include "backend/opencl/cl/cn/cryptonight_gpu_cl.h"
 #endif
 
-#ifdef XMRIG_ALGO_ASTROBWT
-#   include "backend/opencl/cl/astrobwt/astrobwt_cl.h"
+#ifdef XMRIG_ALGO_RANDOMX
+#   include "backend/opencl/cl/rx/randomx_cl.h"
 #endif
 
 #ifdef XMRIG_ALGO_KAWPOW
@@ -44,15 +44,15 @@
 
 const char *xmrig::OclSource::get(const Algorithm &algorithm)
 {
-#   ifdef XMRIG_ALGO_RANDOMX
-    if (algorithm.family() == Algorithm::RANDOM_X) {
-        return randomx_cl;
+#   ifdef XMRIG_ALGO_CN_GPU
+    if (algorithm == Algorithm::CN_GPU) {
+        return cryptonight_gpu_cl;
     }
 #   endif
 
-#   ifdef XMRIG_ALGO_ASTROBWT
-    if (algorithm.family() == Algorithm::ASTROBWT) {
-        return astrobwt_cl;
+#   ifdef XMRIG_ALGO_RANDOMX
+    if (algorithm.family() == Algorithm::RANDOM_X) {
+        return randomx_cl;
     }
 #   endif
 

src/backend/opencl/cl/astrobwt/BWT.cl

@@ -1,206 +0,0 @@
-/* XMRig
- * Copyright 2010      Jeff Garzik <jgarzik@pobox.com>
- * Copyright 2012-2014 pooler      <pooler@litecoinpool.org>
- * Copyright 2014      Lucas Jones <https://github.com/lucasjones>
- * Copyright 2014-2016 Wolf9466    <https://github.com/OhGodAPet>
- * Copyright 2016      Jay D Dee   <jayddee246@gmail.com>
- * Copyright 2017-2018 XMR-Stak    <https://github.com/fireice-uk>, <https://github.com/psychocrypt>
- * Copyright 2018-2020 SChernykh   <https://github.com/SChernykh>
- * Copyright 2016-2020 XMRig       <https://github.com/xmrig>, <support@xmrig.com>
- *
- *   This program is free software: you can redistribute it and/or modify
- *   it under the terms of the GNU General Public License as published by
- *   the Free Software Foundation, either version 3 of the License, or
- *   (at your option) any later version.
- *
- *   This program is distributed in the hope that it will be useful,
- *   but WITHOUT ANY WARRANTY; without even the implied warranty of
- *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- *   GNU General Public License for more details.
- *
- *   You should have received a copy of the GNU General Public License
- *   along with this program. If not, see <http://www.gnu.org/licenses/>.
- */
-
-#define STAGE1_SIZE 147253
-
-#define COUNTING_SORT_BITS 11
-#define COUNTING_SORT_SIZE (1 << COUNTING_SORT_BITS)
-
-__attribute__((reqd_work_group_size(BWT_GROUP_SIZE, 1, 1)))
-__kernel void BWT(__global uint8_t* datas, __global uint32_t* data_sizes, uint32_t data_stride, __global uint64_t* indices, __global uint64_t* tmp_indices)
-{
-	const uint32_t tid = get_local_id(0);
-	const uint32_t gid = get_group_id(0);
-
-	__local int counters[COUNTING_SORT_SIZE][2];
-
-	for (uint32_t i = tid; i < COUNTING_SORT_SIZE * 2; i += BWT_GROUP_SIZE)
-		((__local int*)counters)[i] = 0;
-
-	barrier(CLK_LOCAL_MEM_FENCE);
-
-	const uint64_t data_offset = (uint64_t)(gid) * data_stride;
-
-	__global uint8_t* input = datas + data_offset + 128;
-	const uint32_t N = data_sizes[gid] + 1;
-
-	__global uint64_t* p = (__global uint64_t*)(input);
-	volatile __local uint8_t* counters_atomic = (volatile __local uint8_t*)(counters);
-
-	indices += data_offset;
-	tmp_indices += data_offset;
-
-	for (uint32_t i = tid; i < N; i += BWT_GROUP_SIZE)
-	{
-		const uint32_t index = i >> 3;
-		const uint32_t bit_offset = (i & 7) << 3;
-
-		const uint64_t a = p[index];
-		uint64_t b = p[index + 1];
-		if (bit_offset == 0)
-			b = 0;
-
-		uint64_t value = (a >> bit_offset) | (b << (64 - bit_offset));
-
-		uint2 tmp;
-		const uchar4 mask = (uchar4)(3, 2, 1, 0);
-
-		tmp.x = as_uint(shuffle(as_uchar4(as_uint2(value).y), mask));
-		tmp.y = as_uint(shuffle(as_uchar4(as_uint2(value).x), mask));
-
-		value = as_ulong(tmp);
-
-		indices[i] = (value & ((uint64_t)(-1) << 21)) | i;
-		atomic_add((volatile __local int*)(counters_atomic + (((value >> (64 - COUNTING_SORT_BITS * 2)) & (COUNTING_SORT_SIZE - 1)) << 3)), 1);
-		atomic_add((volatile __local int*)(counters_atomic + ((value >> (64 - COUNTING_SORT_BITS)) << 3) + 4), 1);
-	}
-
-	barrier(CLK_LOCAL_MEM_FENCE);
-
-	if (tid == 0)
-	{
-		int t0 = counters[0][0];
-		int t1 = counters[0][1];
-		counters[0][0] = t0 - 1;
-		counters[0][1] = t1 - 1;
-		for (uint32_t i = 1; i < COUNTING_SORT_SIZE; ++i)
-		{
-			t0 += counters[i][0];
-			t1 += counters[i][1];
-			counters[i][0] = t0 - 1;
-			counters[i][1] = t1 - 1;
-		}
-	}
-
-	barrier(CLK_LOCAL_MEM_FENCE);
-
-	for (int i = tid; i < N; i += BWT_GROUP_SIZE)
-	{
-		const uint64_t data = indices[i];
-		const int k = atomic_sub((volatile __local int*)(counters_atomic + (((data >> (64 - COUNTING_SORT_BITS * 2)) & (COUNTING_SORT_SIZE - 1)) << 3)), 1);
-		tmp_indices[k] = data;
-	}
-
-	barrier(CLK_GLOBAL_MEM_FENCE);
-
-	if (tid == 0)
-	{
-		for (int i = N - 1; i >= 0; --i)
-		{
-			const uint64_t data = tmp_indices[i];
-			const int k = atomic_sub((volatile __local int*)(counters_atomic + ((data >> (64 - COUNTING_SORT_BITS)) << 3) + 4), 1);
-			indices[k] = data;
-		}
-	}
-
-	barrier(CLK_GLOBAL_MEM_FENCE);
-
-	const uint32_t N1 = N - 1;
-	__global uint32_t* indices32 = (__global uint32_t*)(indices);
-	for (uint32_t i = tid; i < N1; i += BWT_GROUP_SIZE)
-	{
-		const uint32_t value = indices32[i * 2 + 1] >> (32 - COUNTING_SORT_BITS * 2);
-		if (value != (indices32[i * 2 + 3] >> (32 - COUNTING_SORT_BITS * 2)))
-			continue;
-
-		if ((i > 0) && ((indices32[i * 2 - 1] >> (32 - COUNTING_SORT_BITS * 2)) == value))
-			continue;
-
-		uint32_t i1 = i + 2;
-		while ((i1 < N) && ((indices32[i1 * 2 + 1] >> (32 - COUNTING_SORT_BITS * 2)) == value))
-			++i1;
-
-		for (uint32_t j = i; j < i1; ++j)
-		{
-			uint64_t t = indices[j];
-			for (uint32_t k = j + 1; k < i1; ++k)
-			{
-				if (t > indices[k])
-				{
-					const uint64_t t1 = t;
-					t = indices[k];
-					indices[k] = t1;
-				}
-			}
-			indices[j] = t;
-		}
-	}
-
-	barrier(CLK_GLOBAL_MEM_FENCE);
-
-	--input;
-	__global uint8_t* output = (__global uint8_t*)(tmp_indices);
-	for (int i = tid; i <= N; i += BWT_GROUP_SIZE)
-		output[i] = input[indices[i] & ((1 << 21) - 1)];
-}
-
-__kernel void filter(uint32_t nonce, uint32_t bwt_max_size, __global const uint32_t* hashes, __global uint32_t* filtered_hashes)
-{
-	const uint32_t global_id = get_global_id(0);
-
-	__global const uint32_t* hash = hashes + global_id * (32 / sizeof(uint32_t));
-	const uint32_t stage2_size = STAGE1_SIZE + (*hash & 0xfffff);
-
-	if (stage2_size < bwt_max_size)
-	{
-		const int index = atomic_add((volatile __global int*)(filtered_hashes), 1) * (36 / sizeof(uint32_t)) + 1;
-
-		filtered_hashes[index] = nonce + global_id;
-
-		#pragma unroll 8
-		for (uint32_t i = 0; i < 8; ++i)
-			filtered_hashes[index + i + 1] = hash[i];
-	}
-}
-
-__kernel void prepare_batch2(__global uint32_t* hashes, __global uint32_t* filtered_hashes, __global uint32_t* data_sizes)
-{
-	const uint32_t global_id = get_global_id(0);
-	const uint32_t N = filtered_hashes[0] - get_global_size(0);
-
-	if (global_id == 0)
-		filtered_hashes[0] = N;
-
-	__global uint32_t* hash = hashes + global_id * 8;
-	__global uint32_t* filtered_hash = filtered_hashes + (global_id + N) * 9 + 1;
-
-	const uint32_t stage2_size = STAGE1_SIZE + (filtered_hash[1] & 0xfffff);
-	data_sizes[global_id] = stage2_size;
-
-	#pragma unroll 8
-	for (uint32_t i = 0; i < 8; ++i)
-		hash[i] = filtered_hash[i + 1];
-}
-
-__kernel void find_shares(__global const uint64_t* hashes, __global const uint32_t* filtered_hashes, uint64_t target, __global uint32_t* shares)
-{
-	const uint32_t global_index = get_global_id(0);
-
-	if (hashes[global_index * 4 + 3] < target)
-	{
-		const uint32_t idx = atomic_inc(shares + 0xFF);
-		if (idx < 0xFF)
-			shares[idx] = filtered_hashes[(filtered_hashes[0] + global_index) * 9 + 1];
-	}
-}

src/backend/opencl/cl/astrobwt/astrobwt.cl

@@ -1,35 +0,0 @@
-/* XMRig
- * Copyright 2010      Jeff Garzik <jgarzik@pobox.com>
- * Copyright 2012-2014 pooler      <pooler@litecoinpool.org>
- * Copyright 2014      Lucas Jones <https://github.com/lucasjones>
- * Copyright 2014-2016 Wolf9466    <https://github.com/OhGodAPet>
- * Copyright 2016      Jay D Dee   <jayddee246@gmail.com>
- * Copyright 2017-2018 XMR-Stak    <https://github.com/fireice-uk>, <https://github.com/psychocrypt>
- * Copyright 2018-2020 SChernykh   <https://github.com/SChernykh>
- * Copyright 2016-2020 XMRig       <https://github.com/xmrig>, <support@xmrig.com>
- *
- *   This program is free software: you can redistribute it and/or modify
- *   it under the terms of the GNU General Public License as published by
- *   the Free Software Foundation, either version 3 of the License, or
- *   (at your option) any later version.
- *
- *   This program is distributed in the hope that it will be useful,
- *   but WITHOUT ANY WARRANTY; without even the implied warranty of
- *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- *   GNU General Public License for more details.
- *
- *   You should have received a copy of the GNU General Public License
- *   along with this program. If not, see <http://www.gnu.org/licenses/>.
- */
-
-typedef uchar uint8_t;
-typedef ushort uint16_t;
-typedef uint uint32_t;
-typedef ulong uint64_t;
-
-typedef int int32_t;
-typedef long int64_t;
-
-#include "BWT.cl"
-#include "salsa20.cl"
-#include "sha3.cl"

src/backend/opencl/cl/astrobwt/astrobwt_cl.h

@@ -1,399 +0,0 @@
-#pragma once
-
-namespace xmrig {
-
-static const char astrobwt_cl[12489] = {
-    0x74,0x79,0x70,0x65,0x64,0x65,0x66,0x20,0x75,0x63,0x68,0x61,0x72,0x20,0x75,0x69,0x6e,0x74,0x38,0x5f,0x74,0x3b,0x0a,0x74,0x79,0x70,0x65,0x64,0x65,0x66,0x20,0x75,
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-};
-
-} // namespace xmrig

src/backend/opencl/cl/astrobwt/salsa20.cl

@@ -1,153 +0,0 @@
-/* XMRig
- * Copyright 2010      Jeff Garzik <jgarzik@pobox.com>
- * Copyright 2012-2014 pooler      <pooler@litecoinpool.org>
- * Copyright 2014      Lucas Jones <https://github.com/lucasjones>
- * Copyright 2014-2016 Wolf9466    <https://github.com/OhGodAPet>
- * Copyright 2016      Jay D Dee   <jayddee246@gmail.com>
- * Copyright 2017-2018 XMR-Stak    <https://github.com/fireice-uk>, <https://github.com/psychocrypt>
- * Copyright 2018-2020 SChernykh   <https://github.com/SChernykh>
- * Copyright 2016-2020 XMRig       <https://github.com/xmrig>, <support@xmrig.com>
- *
- *   This program is free software: you can redistribute it and/or modify
- *   it under the terms of the GNU General Public License as published by
- *   the Free Software Foundation, either version 3 of the License, or
- *   (at your option) any later version.
- *
- *   This program is distributed in the hope that it will be useful,
- *   but WITHOUT ANY WARRANTY; without even the implied warranty of
- *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- *   GNU General Public License for more details.
- *
- *   You should have received a copy of the GNU General Public License
- *   along with this program. If not, see <http://www.gnu.org/licenses/>.
- */
-
-#define ROTATE(v,c) (rotate(v,(uint32_t)c))
-#define XOR(v,w) ((v) ^ (w))
-#define PLUS(v,w) ((v) + (w))
-
-__attribute__((reqd_work_group_size(SALSA20_GROUP_SIZE, 1, 1)))
-__kernel void Salsa20_XORKeyStream(__global const uint32_t* keys, __global uint32_t* outputs, __global uint32_t* output_sizes, uint32_t output_stride)
-{
-	const uint32_t t = get_local_id(0);
-	const uint32_t g = get_group_id(0);
-
-	// Put zeroes in the beginning
-	const uint64_t output_offset = g * ((uint64_t)output_stride) + 128;
-	{
-		__global uint32_t* p = outputs + (output_offset - 128) / sizeof(uint32_t);
-		for (uint32_t i = t; i < 128 / sizeof(uint32_t); i += SALSA20_GROUP_SIZE)
-			p[i] = 0;
-	}
-	
-	__global const uint32_t* k = keys + g * 8;
-	__global uint32_t* output = outputs + (output_offset + (t * 64)) / sizeof(uint32_t);
-	const uint32_t output_size = output_sizes[g];
-
-	const uint32_t j1 = k[0];
-	const uint32_t j2 = k[1];
-	const uint32_t j3 = k[2];
-	const uint32_t j4 = k[3];
-	const uint32_t j11 = k[4];
-	const uint32_t j12 = k[5];
-	const uint32_t j13 = k[6];
-	const uint32_t j14 = k[7];
-	const uint32_t j0 = 0x61707865U;
-	const uint32_t j5 = 0x3320646EU;
-	const uint32_t j10 = 0x79622D32U;
-	const uint32_t j15 = 0x6B206574U;
-	const uint32_t j6 = 0;
-	const uint32_t j7 = 0;
-	const uint32_t j8 = 0;
-	const uint32_t j9 = 0;
-
-	for (uint32_t i = t * 64; i < output_size; i += SALSA20_GROUP_SIZE * 64)
-	{
-		const uint32_t j8_1 = j8 + (i / 64);
-
-		uint32_t x0 = j0;
-		uint32_t x1 = j1;
-		uint32_t x2 = j2;
-		uint32_t x3 = j3;
-		uint32_t x4 = j4;
-		uint32_t x5 = j5;
-		uint32_t x6 = j6;
-		uint32_t x7 = j7;
-		uint32_t x8 = j8_1;
-		uint32_t x9 = j9;
-		uint32_t x10 = j10;
-		uint32_t x11 = j11;
-		uint32_t x12 = j12;
-		uint32_t x13 = j13;
-		uint32_t x14 = j14;
-		uint32_t x15 = j15;
-
-		#pragma unroll 5
-		for (uint32_t j = 0; j < 10; ++j)
-		{
-			x4  = XOR( x4,ROTATE(PLUS( x0,x12), 7));
-			x8  = XOR( x8,ROTATE(PLUS( x4, x0), 9));
-			x12 = XOR(x12,ROTATE(PLUS( x8, x4),13));
-			x0  = XOR( x0,ROTATE(PLUS(x12, x8),18));
-			x9  = XOR( x9,ROTATE(PLUS( x5, x1), 7));
-			x13 = XOR(x13,ROTATE(PLUS( x9, x5), 9));
-			x1  = XOR( x1,ROTATE(PLUS(x13, x9),13));
-			x5  = XOR( x5,ROTATE(PLUS( x1,x13),18));
-			x14 = XOR(x14,ROTATE(PLUS(x10, x6), 7));
-			x2  = XOR( x2,ROTATE(PLUS(x14,x10), 9));
-			x6  = XOR( x6,ROTATE(PLUS( x2,x14),13));
-			x10 = XOR(x10,ROTATE(PLUS( x6, x2),18));
-			x3  = XOR( x3,ROTATE(PLUS(x15,x11), 7));
-			x7  = XOR( x7,ROTATE(PLUS( x3,x15), 9));
-			x11 = XOR(x11,ROTATE(PLUS( x7, x3),13));
-			x15 = XOR(x15,ROTATE(PLUS(x11, x7),18));
-			x1  = XOR( x1,ROTATE(PLUS( x0, x3), 7));
-			x2  = XOR( x2,ROTATE(PLUS( x1, x0), 9));
-			x3  = XOR( x3,ROTATE(PLUS( x2, x1),13));
-			x0  = XOR( x0,ROTATE(PLUS( x3, x2),18));
-			x6  = XOR( x6,ROTATE(PLUS( x5, x4), 7));
-			x7  = XOR( x7,ROTATE(PLUS( x6, x5), 9));
-			x4  = XOR( x4,ROTATE(PLUS( x7, x6),13));
-			x5  = XOR( x5,ROTATE(PLUS( x4, x7),18));
-			x11 = XOR(x11,ROTATE(PLUS(x10, x9), 7));
-			x8  = XOR( x8,ROTATE(PLUS(x11,x10), 9));
-			x9  = XOR( x9,ROTATE(PLUS( x8,x11),13));
-			x10 = XOR(x10,ROTATE(PLUS( x9, x8),18));
-			x12 = XOR(x12,ROTATE(PLUS(x15,x14), 7));
-			x13 = XOR(x13,ROTATE(PLUS(x12,x15), 9));
-			x14 = XOR(x14,ROTATE(PLUS(x13,x12),13));
-			x15 = XOR(x15,ROTATE(PLUS(x14,x13),18));
-		}
-
-		output[0]  = PLUS(x0, j0);
-		output[1]  = PLUS(x1, j1);
-		output[2]  = PLUS(x2, j2);
-		output[3]  = PLUS(x3, j3);
-		output[4]  = PLUS(x4, j4);
-		output[5]  = PLUS(x5, j5);
-		output[6]  = PLUS(x6, j6);
-		output[7]  = PLUS(x7, j7);
-		output[8]  = PLUS(x8, j8_1);
-		output[9]  = PLUS(x9, j9);
-		output[10] = PLUS(x10,j10);
-		output[11] = PLUS(x11,j11);
-		output[12] = PLUS(x12,j12);
-		output[13] = PLUS(x13,j13);
-		output[14] = PLUS(x14,j14);
-		output[15] = PLUS(x15,j15);
-
-		output += (SALSA20_GROUP_SIZE * 64) / sizeof(uint32_t);
-	}
-
-	barrier(CLK_GLOBAL_MEM_FENCE);
-
-	// Put zeroes after output's end
-	if (t < 16)
-	{
-		__global uint32_t* p = outputs + (output_offset + output_size + 3) / sizeof(uint32_t);
-		p[t] = 0;
-	}
-
-	if ((t == 0) && (output_size & 3))
-		outputs[(output_offset + output_size) / sizeof(uint32_t)] &= 0xFFFFFFFFU >> ((4 - (output_size & 3)) << 3);
-}

src/backend/opencl/cl/astrobwt/sha3.cl

@@ -1,198 +0,0 @@
-/* XMRig
- * Copyright 2010      Jeff Garzik <jgarzik@pobox.com>
- * Copyright 2012-2014 pooler      <pooler@litecoinpool.org>
- * Copyright 2014      Lucas Jones <https://github.com/lucasjones>
- * Copyright 2014-2016 Wolf9466    <https://github.com/OhGodAPet>
- * Copyright 2016      Jay D Dee   <jayddee246@gmail.com>
- * Copyright 2017-2018 XMR-Stak    <https://github.com/fireice-uk>, <https://github.com/psychocrypt>
- * Copyright 2018-2020 SChernykh   <https://github.com/SChernykh>
- * Copyright 2016-2020 XMRig       <https://github.com/xmrig>, <support@xmrig.com>
- *
- *   This program is free software: you can redistribute it and/or modify
- *   it under the terms of the GNU General Public License as published by
- *   the Free Software Foundation, either version 3 of the License, or
- *   (at your option) any later version.
- *
- *   This program is distributed in the hope that it will be useful,
- *   but WITHOUT ANY WARRANTY; without even the implied warranty of
- *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- *   GNU General Public License for more details.
- *
- *   You should have received a copy of the GNU General Public License
- *   along with this program. If not, see <http://www.gnu.org/licenses/>.
- */
-
-#define ROUNDS 24
-#define R64(a,b,c) (((a) << b) | ((a) >> c))
-
-__constant const uint64_t rc[2][ROUNDS] = {
-	{0x0000000000000001UL, 0x0000000000008082UL, 0x800000000000808AUL,
-	0x8000000080008000UL, 0x000000000000808BUL, 0x0000000080000001UL,
-	0x8000000080008081UL, 0x8000000000008009UL, 0x000000000000008AUL,
-	0x0000000000000088UL, 0x0000000080008009UL, 0x000000008000000AUL,
-	0x000000008000808BUL, 0x800000000000008BUL, 0x8000000000008089UL,
-	0x8000000000008003UL, 0x8000000000008002UL, 0x8000000000000080UL,
-	0x000000000000800AUL, 0x800000008000000AUL, 0x8000000080008081UL,
-	0x8000000000008080UL, 0x0000000080000001UL, 0x8000000080008008UL},
-	{0UL, 0UL, 0UL, 0UL, 0UL, 0UL, 0UL, 0UL,
-	0UL, 0UL, 0UL, 0UL, 0UL, 0UL, 0UL, 0UL,
-	0UL, 0UL, 0UL, 0UL, 0UL, 0UL, 0UL, 0UL}
-};
-
-
-__constant const int ro[25][2] = {
-	{ 0,64}, {44,20}, {43,21}, {21,43}, {14,50},
-	{ 1,63}, { 6,58}, {25,39}, { 8,56}, {18,46},
-	{62, 2}, {55, 9}, {39,25}, {41,23}, { 2,62},
-	{28,36}, {20,44}, { 3,61}, {45,19}, {61, 3},
-	{27,37}, {36,28}, {10,54}, {15,49}, {56, 8}
-};
-
-__constant const int a[25] = {
-	0,  6, 12, 18, 24,
-	1,  7, 13, 19, 20,
-	2,  8, 14, 15, 21,
-	3,  9, 10, 16, 22,
-	4,  5, 11, 17, 23
-};
-
-__constant const int b[25] = {
-	0,  1,  2,  3, 4,
-	1,  2,  3,  4, 0,
-	2,  3,  4,  0, 1,
-	3,  4,  0,  1, 2,
-	4,  0,  1,  2, 3
-};
-
-__constant const int c[25][3] = {
-	{ 0, 1, 2}, { 1, 2, 3}, { 2, 3, 4}, { 3, 4, 0}, { 4, 0, 1},
-	{ 5, 6, 7}, { 6, 7, 8}, { 7, 8, 9}, { 8, 9, 5}, { 9, 5, 6},
-	{10,11,12}, {11,12,13}, {12,13,14}, {13,14,10}, {14,10,11},
-	{15,16,17}, {16,17,18}, {17,18,19}, {18,19,15}, {19,15,16},
-	{20,21,22}, {21,22,23}, {22,23,24}, {23,24,20}, {24,20,21}
-};
-
-__constant const int d[25] = {
-	0,  1,  2,  3,  4,
-	10, 11, 12, 13, 14,
-	20, 21, 22, 23, 24,
-	5,  6,  7,  8,  9,
-	15, 16, 17, 18, 19
-};
-
-__attribute__((reqd_work_group_size(32, 1, 1)))
-__kernel void sha3(__global const uint8_t* inputs, __global const uint32_t* input_sizes, uint32_t input_stride, __global uint64_t* hashes)
-{
-	const uint32_t t = get_local_id(0);
-	const uint32_t g = get_group_id(0);
-
-	if (t >= 25)
-		return;
-
-	const uint32_t s = t % 5;
-
-	const uint64_t input_offset = ((uint64_t)input_stride) * g;
-	__global uint64_t* input = (__global uint64_t*)(inputs + input_offset);
-	const uint32_t input_size = input_sizes[g] + 1;
-
-	__local uint64_t A[25];
-	__local uint64_t C[25];
-	__local uint64_t D[25];
-
-	A[t] = 0;
-
-	const uint32_t words = input_size / sizeof(uint64_t);
-	const uint32_t tail_size = input_size % sizeof(uint64_t);
-
-	uint32_t wordIndex = 0;
-	for (uint32_t i = 0; i < words; ++i, ++input)
-	{
-		A[wordIndex] ^= *input;
-		++wordIndex;
-		if (wordIndex == 17)
-		{
-			#pragma unroll ROUNDS
-			for (int i = 0; i < ROUNDS; ++i)
-			{
-				C[t] = A[s] ^ A[s+5] ^ A[s+10] ^ A[s+15] ^ A[s+20];
-				D[t] = C[b[20+s]] ^ R64(C[b[5+s]], 1, 63);
-				C[t] = R64(A[a[t]] ^ D[b[t]], ro[t][0], ro[t][1]);
-				A[d[t]] = C[c[t][0]] ^ ((~C[c[t][1]]) & C[c[t][2]]);
-				A[t] ^= rc[(t == 0) ? 0 : 1][i];
-			}
-			wordIndex = 0;
-		}
-	}
-
-	uint64_t tail = 0;
-	__global const uint8_t* p = (__global const uint8_t*)input;
-	for (uint32_t i = 0; i < tail_size; ++i)
-	{
-		tail |= (uint64_t)(p[i]) << (i * 8);
-	}
-	A[wordIndex] ^= tail ^ ((uint64_t)(((uint64_t)(0x02 | (1 << 2))) << (tail_size * 8)));
-	A[16] ^= 0x8000000000000000UL;
-
-	#pragma unroll 1
-	for (int i = 0; i < ROUNDS; ++i)
-	{
-		C[t] = A[s] ^ A[s+5] ^ A[s+10] ^ A[s+15] ^ A[s+20];
-		D[t] = C[b[20+s]] ^ R64(C[b[5+s]], 1, 63);
-		C[t] = R64(A[a[t]] ^ D[b[t]], ro[t][0], ro[t][1]);
-		A[d[t]] = C[c[t][0]] ^ ((~C[c[t][1]]) & C[c[t][2]]);
-		A[t] ^= rc[(t == 0) ? 0 : 1][i];
-	}
-
-	if (t < 4)
-	{
-		hashes += g * (32 / sizeof(uint64_t));
-		hashes[t] = A[t];
-	}
-}
-
-__attribute__((reqd_work_group_size(32, 1, 1)))
-__kernel void sha3_initial(__global const uint8_t* input_data, uint32_t input_size, uint32_t nonce, __global uint64_t* hashes)
-{
-	const uint32_t t = get_local_id(0);
-	const uint32_t g = get_group_id(0);
-
-	if (t >= 25)
-		return;
-
-	const uint32_t s = t % 5;
-
-	__global uint64_t* input = (__global uint64_t*)(input_data);
-
-	__local uint64_t A[25];
-	__local uint64_t C[25];
-	__local uint64_t D[25];
-
-	A[t] = (t < 16) ? input[t] : 0;
-
-	__local uint32_t* nonce_pos = (__local uint32_t*)(A) + 9;
-	nonce += g;
-	nonce_pos[0] = (nonce_pos[0] & 0xFFFFFFU) | ((nonce & 0xFF) << 24);
-	nonce_pos[1] = (nonce_pos[1] & 0xFF000000U) | (nonce >> 8);
-
-	uint32_t wordIndex = input_size / sizeof(uint64_t);
-	const uint32_t tail_size = input_size % sizeof(uint64_t);
-
-	A[wordIndex] ^= (uint64_t)(((uint64_t)(0x02 | (1 << 2))) << (tail_size * 8));
-	A[16] ^= 0x8000000000000000UL;
-
-	#pragma unroll ROUNDS
-	for (int i = 0; i < ROUNDS; ++i)
-	{
-		C[t] = A[s] ^ A[s+5] ^ A[s+10] ^ A[s+15] ^ A[s+20];
-		D[t] = C[b[20+s]] ^ R64(C[b[5+s]], 1, 63);
-		C[t] = R64(A[a[t]] ^ D[b[t]], ro[t][0], ro[t][1]);
-		A[d[t]] = C[c[t][0]] ^ ((~C[c[t][1]]) & C[c[t][2]]);
-		A[t] ^= rc[(t == 0) ? 0 : 1][i];
-	}
-
-	if (t < 4)
-	{
-		hashes += g * (32 / sizeof(uint64_t));
-		hashes[t] = A[t];
-	}
-}