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25 Commits
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f210708f3b | ||
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f93187b024 |
@@ -1,3 +1,8 @@
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# v2.4.5
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||||
- [#324](https://github.com/xmrig/xmrig/pull/324) Fixed build without libmicrohttpd (CMake cache issue).
|
||||
- [#341](https://github.com/xmrig/xmrig/issues/341) Fixed wrong exit code and added command line option `--dry-run`.
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- [#385](https://github.com/xmrig/xmrig/pull/385) Up to 20% performance increase with for non-AES CPU and fixed Intel Core 2 cache detection.
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# v2.4.4
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- Added libmicrohttpd version to --version output.
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- Fixed bug in singal handler, in some cases miner wasn't shutdown properly.
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||||
@@ -195,6 +195,7 @@ if (WITH_HTTPD)
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message(FATAL_ERROR "microhttpd NOT found: use `-DWITH_HTTPD=OFF` to build without http deamon support")
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||||
endif()
|
||||
else()
|
||||
set(MHD_LIBRARY "")
|
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add_definitions(/DXMRIG_NO_HTTPD)
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add_definitions(/DXMRIG_NO_API)
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endif()
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||||
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||||
18
README.md
18
README.md
@@ -1,4 +1,11 @@
|
||||
# XMRig
|
||||
[](https://github.com/xmrig/xmrig/releases)
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[](https://github.com/xmrig/xmrig/releases)
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||||
[](https://github.com/xmrig/xmrig/releases)
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||||
[](https://github.com/xmrig/xmrig/blob/master/LICENSE)
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||||
[](https://github.com/xmrig/xmrig/stargazers)
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[](https://github.com/xmrig/xmrig/network)
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||||
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||||
XMRig is a high performance Monero (XMR) CPU miner, with official support for Windows.
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Originally based on cpuminer-multi with heavy optimizations/rewrites and removing a lot of legacy code, since version 1.0.0 completely rewritten from scratch on C++.
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|
||||
@@ -37,16 +44,7 @@ Originally based on cpuminer-multi with heavy optimizations/rewrites and removin
|
||||
* Clone with `git clone https://github.com/xmrig/xmrig.git` :hammer: [Build instructions](https://github.com/xmrig/xmrig/wiki/Build).
|
||||
|
||||
## Usage
|
||||
### Basic example
|
||||
```
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||||
xmrig.exe -o pool.monero.hashvault.pro:5555 -u YOUR_WALLET -p x -k
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||||
```
|
||||
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||||
### Failover
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||||
```
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xmrig.exe -o pool.monero.hashvault.pro:5555 -u YOUR_WALLET1 -p x -k -o pool.supportxmr.com:5555 -u YOUR_WALLET2 -p x -k
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```
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For failover you can add multiple pools, maximum count not limited.
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Use [config.xmrig.com](https://config.xmrig.com/xmrig) to generate, edit or share configurations.
|
||||
|
||||
### Options
|
||||
```
|
||||
|
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28
src/App.cpp
28
src/App.cpp
@@ -113,7 +113,7 @@ App::~App()
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int App::exec()
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{
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if (!m_options) {
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return 0;
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||||
return 2;
|
||||
}
|
||||
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||||
uv_signal_start(&m_sigHUP, App::onSignal, SIGHUP);
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@@ -130,6 +130,13 @@ int App::exec()
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Mem::allocate(m_options->algo(), m_options->threads(), m_options->doubleHash(), m_options->hugePages());
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Summary::print();
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||||
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if (m_options->dryRun()) {
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||||
LOG_NOTICE("OK");
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release();
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||||
|
||||
return 0;
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||||
}
|
||||
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||||
# ifndef XMRIG_NO_API
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||||
Api::start();
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||||
# endif
|
||||
@@ -146,12 +153,7 @@ int App::exec()
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const int r = uv_run(uv_default_loop(), UV_RUN_DEFAULT);
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||||
uv_loop_close(uv_default_loop());
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||||
|
||||
delete m_network;
|
||||
|
||||
Options::release();
|
||||
Mem::release();
|
||||
Platform::release();
|
||||
|
||||
release();
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||||
return r;
|
||||
}
|
||||
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||||
@@ -200,6 +202,18 @@ void App::close()
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||||
}
|
||||
|
||||
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||||
void App::release()
|
||||
{
|
||||
if (m_network) {
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||||
delete m_network;
|
||||
}
|
||||
|
||||
Options::release();
|
||||
Mem::release();
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||||
Platform::release();
|
||||
}
|
||||
|
||||
|
||||
void App::onSignal(uv_signal_t *handle, int signum)
|
||||
{
|
||||
switch (signum)
|
||||
|
||||
@@ -51,6 +51,7 @@ protected:
|
||||
private:
|
||||
void background();
|
||||
void close();
|
||||
void release();
|
||||
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||||
static void onSignal(uv_signal_t *handle, int signum);
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||||
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||||
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||||
@@ -100,7 +100,13 @@ void Cpu::initCommon()
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m_l2_cache = data.l2_cache * (m_totalCores / 2) * m_sockets;
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||||
m_l2_exclusive = true;
|
||||
}
|
||||
else {
|
||||
// Workaround for Intel Core Solo, Core Duo, Core 2 Duo, Core 2 Quad and their Xeon homologue
|
||||
// These processors have L2 cache shared by 2 cores.
|
||||
else if (data.vendor == VENDOR_INTEL && data.family == 0x06 && (data.model == 0x0E || data.model == 0x0F || data.model == 0x07)) {
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||||
int l2_count_per_socket = m_totalCores > 1 ? m_totalCores / 2 : 1;
|
||||
m_l2_cache = data.l2_cache > 0 ? data.l2_cache * l2_count_per_socket * m_sockets : 0;
|
||||
}
|
||||
else{
|
||||
m_l2_cache = data.l2_cache > 0 ? data.l2_cache * m_totalCores * m_sockets : 0;
|
||||
}
|
||||
|
||||
|
||||
@@ -101,12 +101,16 @@ static char const short_options[] = "a:c:khBp:Px:r:R:s:t:T:o:u:O:v:Vl:S";
|
||||
|
||||
static struct option const options[] = {
|
||||
{ "algo", 1, nullptr, 'a' },
|
||||
{ "api-access-token", 1, nullptr, 4001 },
|
||||
{ "api-port", 1, nullptr, 4000 },
|
||||
{ "api-worker-id", 1, nullptr, 4002 },
|
||||
{ "av", 1, nullptr, 'v' },
|
||||
{ "background", 0, nullptr, 'B' },
|
||||
{ "config", 1, nullptr, 'c' },
|
||||
{ "cpu-affinity", 1, nullptr, 1020 },
|
||||
{ "cpu-priority", 1, nullptr, 1021 },
|
||||
{ "donate-level", 1, nullptr, 1003 },
|
||||
{ "dry-run", 0, nullptr, 5000 },
|
||||
{ "help", 0, nullptr, 'h' },
|
||||
{ "keepalive", 0, nullptr ,'k' },
|
||||
{ "log-file", 1, nullptr, 'l' },
|
||||
@@ -126,9 +130,6 @@ static struct option const options[] = {
|
||||
{ "user-agent", 1, nullptr, 1008 },
|
||||
{ "userpass", 1, nullptr, 'O' },
|
||||
{ "version", 0, nullptr, 'V' },
|
||||
{ "api-port", 1, nullptr, 4000 },
|
||||
{ "api-access-token", 1, nullptr, 4001 },
|
||||
{ "api-worker-id", 1, nullptr, 4002 },
|
||||
{ 0, 0, 0, 0 }
|
||||
};
|
||||
|
||||
@@ -141,6 +142,7 @@ static struct option const config_options[] = {
|
||||
{ "cpu-affinity", 1, nullptr, 1020 },
|
||||
{ "cpu-priority", 1, nullptr, 1021 },
|
||||
{ "donate-level", 1, nullptr, 1003 },
|
||||
{ "dry-run", 0, nullptr, 5000 },
|
||||
{ "huge-pages", 0, nullptr, 1009 },
|
||||
{ "log-file", 1, nullptr, 'l' },
|
||||
{ "max-cpu-usage", 1, nullptr, 1004 },
|
||||
@@ -205,6 +207,7 @@ Options::Options(int argc, char **argv) :
|
||||
m_background(false),
|
||||
m_colors(true),
|
||||
m_doubleHash(false),
|
||||
m_dryRun(false),
|
||||
m_hugePages(true),
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||||
m_ready(false),
|
||||
m_safe(false),
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||||
@@ -384,6 +387,7 @@ bool Options::parseArg(int key, const char *arg)
|
||||
case 'S': /* --syslog */
|
||||
case 1005: /* --safe */
|
||||
case 1006: /* --nicehash */
|
||||
case 5000: /* --dry-run */
|
||||
return parseBoolean(key, true);
|
||||
|
||||
case 1002: /* --no-color */
|
||||
@@ -557,6 +561,10 @@ bool Options::parseBoolean(int key, bool enable)
|
||||
m_colors = enable;
|
||||
break;
|
||||
|
||||
case 5000: /* --dry-run */
|
||||
m_dryRun = enable;
|
||||
break;
|
||||
|
||||
default:
|
||||
break;
|
||||
}
|
||||
|
||||
@@ -59,6 +59,7 @@ public:
|
||||
inline bool background() const { return m_background; }
|
||||
inline bool colors() const { return m_colors; }
|
||||
inline bool doubleHash() const { return m_doubleHash; }
|
||||
inline bool dryRun() const { return m_dryRun; }
|
||||
inline bool hugePages() const { return m_hugePages; }
|
||||
inline bool syslog() const { return m_syslog; }
|
||||
inline const char *apiToken() const { return m_apiToken; }
|
||||
@@ -110,6 +111,7 @@ private:
|
||||
bool m_background;
|
||||
bool m_colors;
|
||||
bool m_doubleHash;
|
||||
bool m_dryRun;
|
||||
bool m_hugePages;
|
||||
bool m_ready;
|
||||
bool m_safe;
|
||||
|
||||
@@ -46,7 +46,7 @@ NetworkState::NetworkState() :
|
||||
|
||||
int NetworkState::connectionTime() const
|
||||
{
|
||||
return m_active ? ((uv_now(uv_default_loop()) - m_connectionTime) / 1000) : 0;
|
||||
return m_active ? (int)((uv_now(uv_default_loop()) - m_connectionTime) / 1000) : 0;
|
||||
}
|
||||
|
||||
|
||||
@@ -56,7 +56,7 @@ uint32_t NetworkState::avgTime() const
|
||||
return 0;
|
||||
}
|
||||
|
||||
return (uint32_t) connectionTime() / m_latency.size();
|
||||
return connectionTime() / (uint32_t)m_latency.size();
|
||||
}
|
||||
|
||||
|
||||
|
||||
@@ -194,14 +194,14 @@ template<bool SOFT_AES>
|
||||
static inline void aes_round(__m128i key, __m128i* x0, __m128i* x1, __m128i* x2, __m128i* x3, __m128i* x4, __m128i* x5, __m128i* x6, __m128i* x7)
|
||||
{
|
||||
if (SOFT_AES) {
|
||||
*x0 = soft_aesenc(*x0, key);
|
||||
*x1 = soft_aesenc(*x1, key);
|
||||
*x2 = soft_aesenc(*x2, key);
|
||||
*x3 = soft_aesenc(*x3, key);
|
||||
*x4 = soft_aesenc(*x4, key);
|
||||
*x5 = soft_aesenc(*x5, key);
|
||||
*x6 = soft_aesenc(*x6, key);
|
||||
*x7 = soft_aesenc(*x7, key);
|
||||
*x0 = soft_aesenc((uint32_t*)x0, key);
|
||||
*x1 = soft_aesenc((uint32_t*)x1, key);
|
||||
*x2 = soft_aesenc((uint32_t*)x2, key);
|
||||
*x3 = soft_aesenc((uint32_t*)x3, key);
|
||||
*x4 = soft_aesenc((uint32_t*)x4, key);
|
||||
*x5 = soft_aesenc((uint32_t*)x5, key);
|
||||
*x6 = soft_aesenc((uint32_t*)x6, key);
|
||||
*x7 = soft_aesenc((uint32_t*)x7, key);
|
||||
}
|
||||
# ifndef XMRIG_ARMv7
|
||||
else {
|
||||
@@ -361,12 +361,13 @@ inline void cryptonight_hash(const void *__restrict__ input, size_t size, void *
|
||||
uint64_t idx0 = h0[0] ^ h0[4];
|
||||
|
||||
for (size_t i = 0; i < ITERATIONS; i++) {
|
||||
__m128i cx = _mm_load_si128((__m128i *) &l0[idx0 & MASK]);
|
||||
__m128i cx;
|
||||
|
||||
if (SOFT_AES) {
|
||||
cx = soft_aesenc(cx, _mm_set_epi64x(ah0, al0));
|
||||
cx = soft_aesenc((uint32_t*)&l0[idx0 & MASK], _mm_set_epi64x(ah0, al0));
|
||||
}
|
||||
else {
|
||||
cx = _mm_load_si128((__m128i *) &l0[idx0 & MASK]);
|
||||
# ifndef XMRIG_ARMv7
|
||||
cx = vreinterpretq_m128i_u8(vaesmcq_u8(vaeseq_u8(cx, vdupq_n_u8(0)))) ^ _mm_set_epi64x(ah0, al0);
|
||||
# endif
|
||||
@@ -425,14 +426,15 @@ inline void cryptonight_double_hash(const void *__restrict__ input, size_t size,
|
||||
uint64_t idx1 = h1[0] ^ h1[4];
|
||||
|
||||
for (size_t i = 0; i < ITERATIONS; i++) {
|
||||
__m128i cx0 = _mm_load_si128((__m128i *) &l0[idx0 & MASK]);
|
||||
__m128i cx1 = _mm_load_si128((__m128i *) &l1[idx1 & MASK]);
|
||||
__m128i cx0, cx1;
|
||||
|
||||
if (SOFT_AES) {
|
||||
cx0 = soft_aesenc(cx0, _mm_set_epi64x(ah0, al0));
|
||||
cx1 = soft_aesenc(cx1, _mm_set_epi64x(ah1, al1));
|
||||
cx0 = soft_aesenc((uint32_t*)&l0[idx0 & MASK], _mm_set_epi64x(ah0, al0));
|
||||
cx1 = soft_aesenc((uint32_t*)&l1[idx1 & MASK], _mm_set_epi64x(ah1, al1));
|
||||
}
|
||||
else {
|
||||
cx0 = _mm_load_si128((__m128i *) &l0[idx0 & MASK]);
|
||||
cx1 = _mm_load_si128((__m128i *) &l1[idx1 & MASK]);
|
||||
# ifndef XMRIG_ARMv7
|
||||
cx0 = vreinterpretq_m128i_u8(vaesmcq_u8(vaeseq_u8(cx0, vdupq_n_u8(0)))) ^ _mm_set_epi64x(ah0, al0);
|
||||
cx1 = vreinterpretq_m128i_u8(vaesmcq_u8(vaeseq_u8(cx1, vdupq_n_u8(0)))) ^ _mm_set_epi64x(ah1, al1);
|
||||
|
||||
@@ -193,14 +193,14 @@ template<bool SOFT_AES>
|
||||
static inline void aes_round(__m128i key, __m128i* x0, __m128i* x1, __m128i* x2, __m128i* x3, __m128i* x4, __m128i* x5, __m128i* x6, __m128i* x7)
|
||||
{
|
||||
if (SOFT_AES) {
|
||||
*x0 = soft_aesenc(*x0, key);
|
||||
*x1 = soft_aesenc(*x1, key);
|
||||
*x2 = soft_aesenc(*x2, key);
|
||||
*x3 = soft_aesenc(*x3, key);
|
||||
*x4 = soft_aesenc(*x4, key);
|
||||
*x5 = soft_aesenc(*x5, key);
|
||||
*x6 = soft_aesenc(*x6, key);
|
||||
*x7 = soft_aesenc(*x7, key);
|
||||
*x0 = soft_aesenc((uint32_t*)x0, key);
|
||||
*x1 = soft_aesenc((uint32_t*)x1, key);
|
||||
*x2 = soft_aesenc((uint32_t*)x2, key);
|
||||
*x3 = soft_aesenc((uint32_t*)x3, key);
|
||||
*x4 = soft_aesenc((uint32_t*)x4, key);
|
||||
*x5 = soft_aesenc((uint32_t*)x5, key);
|
||||
*x6 = soft_aesenc((uint32_t*)x6, key);
|
||||
*x7 = soft_aesenc((uint32_t*)x7, key);
|
||||
}
|
||||
else {
|
||||
*x0 = _mm_aesenc_si128(*x0, key);
|
||||
@@ -325,15 +325,14 @@ inline void cryptonight_hash(const void *__restrict__ input, size_t size, void *
|
||||
|
||||
for (size_t i = 0; i < ITERATIONS; i++) {
|
||||
__m128i cx;
|
||||
cx = _mm_load_si128((__m128i *) &l0[idx0 & MASK]);
|
||||
|
||||
if (SOFT_AES) {
|
||||
cx = soft_aesenc(cx, _mm_set_epi64x(ah0, al0));
|
||||
cx = soft_aesenc((uint32_t*)&l0[idx0 & MASK], _mm_set_epi64x(ah0, al0));
|
||||
}
|
||||
else {
|
||||
else {
|
||||
cx = _mm_load_si128((__m128i *) &l0[idx0 & MASK]);
|
||||
cx = _mm_aesenc_si128(cx, _mm_set_epi64x(ah0, al0));
|
||||
}
|
||||
|
||||
_mm_store_si128((__m128i *) &l0[idx0 & MASK], _mm_xor_si128(bx0, cx));
|
||||
idx0 = EXTRACT64(cx);
|
||||
bx0 = cx;
|
||||
@@ -387,14 +386,15 @@ inline void cryptonight_double_hash(const void *__restrict__ input, size_t size,
|
||||
uint64_t idx1 = h1[0] ^ h1[4];
|
||||
|
||||
for (size_t i = 0; i < ITERATIONS; i++) {
|
||||
__m128i cx0 = _mm_load_si128((__m128i *) &l0[idx0 & MASK]);
|
||||
__m128i cx1 = _mm_load_si128((__m128i *) &l1[idx1 & MASK]);
|
||||
__m128i cx0, cx1;
|
||||
|
||||
if (SOFT_AES) {
|
||||
cx0 = soft_aesenc(cx0, _mm_set_epi64x(ah0, al0));
|
||||
cx1 = soft_aesenc(cx1, _mm_set_epi64x(ah1, al1));
|
||||
cx0 = soft_aesenc((uint32_t*)&l0[idx0 & MASK], _mm_set_epi64x(ah0, al0));
|
||||
cx1 = soft_aesenc((uint32_t*)&l1[idx1 & MASK], _mm_set_epi64x(ah1, al1));
|
||||
}
|
||||
else {
|
||||
cx0 = _mm_load_si128((__m128i *) &l0[idx0 & MASK]);
|
||||
cx1 = _mm_load_si128((__m128i *) &l1[idx1 & MASK]);
|
||||
cx0 = _mm_aesenc_si128(cx0, _mm_set_epi64x(ah0, al0));
|
||||
cx1 = _mm_aesenc_si128(cx1, _mm_set_epi64x(ah1, al1));
|
||||
}
|
||||
|
||||
@@ -89,34 +89,34 @@
|
||||
alignas(16) const uint32_t saes_table[4][256] = { saes_data(saes_u0), saes_data(saes_u1), saes_data(saes_u2), saes_data(saes_u3) };
|
||||
alignas(16) const uint8_t saes_sbox[256] = saes_data(saes_h0);
|
||||
|
||||
static inline __m128i soft_aesenc(__m128i in, __m128i key)
|
||||
static inline __m128i soft_aesenc(const uint32_t* in, __m128i key)
|
||||
{
|
||||
const uint32_t x0 = _mm_cvtsi128_si32(in);
|
||||
const uint32_t x1 = _mm_cvtsi128_si32(_mm_shuffle_epi32(in, 0x55));
|
||||
const uint32_t x2 = _mm_cvtsi128_si32(_mm_shuffle_epi32(in, 0xAA));
|
||||
const uint32_t x3 = _mm_cvtsi128_si32(_mm_shuffle_epi32(in, 0xFF));
|
||||
const uint32_t x0 = in[0];
|
||||
const uint32_t x1 = in[1];
|
||||
const uint32_t x2 = in[2];
|
||||
const uint32_t x3 = in[3];
|
||||
|
||||
__m128i out = _mm_set_epi32(
|
||||
(saes_table[0][x3 & 0xff] ^ saes_table[1][(x0 >> 8) & 0xff] ^ saes_table[2][(x1 >> 16) & 0xff] ^ saes_table[3][x2 >> 24]),
|
||||
(saes_table[0][x2 & 0xff] ^ saes_table[1][(x3 >> 8) & 0xff] ^ saes_table[2][(x0 >> 16) & 0xff] ^ saes_table[3][x1 >> 24]),
|
||||
(saes_table[0][x1 & 0xff] ^ saes_table[1][(x2 >> 8) & 0xff] ^ saes_table[2][(x3 >> 16) & 0xff] ^ saes_table[3][x0 >> 24]),
|
||||
(saes_table[0][x0 & 0xff] ^ saes_table[1][(x1 >> 8) & 0xff] ^ saes_table[2][(x2 >> 16) & 0xff] ^ saes_table[3][x3 >> 24]));
|
||||
__m128i out = _mm_set_epi32(
|
||||
(saes_table[0][x3 & 0xff] ^ saes_table[1][(x0 >> 8) & 0xff] ^ saes_table[2][(x1 >> 16) & 0xff] ^ saes_table[3][x2 >> 24]),
|
||||
(saes_table[0][x2 & 0xff] ^ saes_table[1][(x3 >> 8) & 0xff] ^ saes_table[2][(x0 >> 16) & 0xff] ^ saes_table[3][x1 >> 24]),
|
||||
(saes_table[0][x1 & 0xff] ^ saes_table[1][(x2 >> 8) & 0xff] ^ saes_table[2][(x3 >> 16) & 0xff] ^ saes_table[3][x0 >> 24]),
|
||||
(saes_table[0][x0 & 0xff] ^ saes_table[1][(x1 >> 8) & 0xff] ^ saes_table[2][(x2 >> 16) & 0xff] ^ saes_table[3][x3 >> 24]));
|
||||
|
||||
return _mm_xor_si128(out, key);
|
||||
return _mm_xor_si128(out, key);
|
||||
}
|
||||
|
||||
static inline uint32_t sub_word(uint32_t key)
|
||||
{
|
||||
return (saes_sbox[key >> 24 ] << 24) |
|
||||
(saes_sbox[(key >> 16) & 0xff] << 16 ) |
|
||||
(saes_sbox[(key >> 8) & 0xff] << 8 ) |
|
||||
saes_sbox[key & 0xff];
|
||||
return (saes_sbox[key >> 24 ] << 24) |
|
||||
(saes_sbox[(key >> 16) & 0xff] << 16 ) |
|
||||
(saes_sbox[(key >> 8) & 0xff] << 8 ) |
|
||||
saes_sbox[key & 0xff];
|
||||
}
|
||||
|
||||
#if defined(__clang__) || defined(XMRIG_ARM)
|
||||
static inline uint32_t _rotr(uint32_t value, uint32_t amount)
|
||||
{
|
||||
return (value >> amount) | (value << ((32 - amount) & 31));
|
||||
return (value >> amount) | (value << ((32 - amount) & 31));
|
||||
}
|
||||
#endif
|
||||
|
||||
|
||||
@@ -532,7 +532,7 @@ void Client::onAllocBuffer(uv_handle_t *handle, size_t suggested_size, uv_buf_t
|
||||
auto client = getClient(handle->data);
|
||||
|
||||
buf->base = &client->m_recvBuf.base[client->m_recvBufPos];
|
||||
buf->len = client->m_recvBuf.len - client->m_recvBufPos;
|
||||
buf->len = client->m_recvBuf.len - (unsigned long)client->m_recvBufPos;
|
||||
}
|
||||
|
||||
|
||||
|
||||
@@ -27,7 +27,7 @@
|
||||
#define APP_ID "xmrig"
|
||||
#define APP_NAME "XMRig"
|
||||
#define APP_DESC "XMRig CPU miner"
|
||||
#define APP_VERSION "2.4.4"
|
||||
#define APP_VERSION "2.4.5"
|
||||
#define APP_DOMAIN "xmrig.com"
|
||||
#define APP_SITE "www.xmrig.com"
|
||||
#define APP_COPYRIGHT "Copyright (C) 2016-2018 xmrig.com"
|
||||
@@ -35,7 +35,7 @@
|
||||
|
||||
#define APP_VER_MAJOR 2
|
||||
#define APP_VER_MINOR 4
|
||||
#define APP_VER_BUILD 4
|
||||
#define APP_VER_BUILD 5
|
||||
#define APP_VER_REV 0
|
||||
|
||||
#ifdef _MSC_VER
|
||||
|
||||
Reference in New Issue
Block a user