25 Commits

Author	SHA1	Message	Date
SChernykh	0da3390d09	More static analysis fixes	2020-12-08 16:05:58 +01:00
XMRig	c8ee6f7db8	Move Profiler and more cleanup.	2020-12-04 09:23:40 +07:00
XMRig	905713f1ca	Merge branch 'feature-bench-submit' into dev	2020-10-30 23:25:09 +07:00
XMRig	4914fefb1f	Added "msr" field for CPU backend.	2020-10-25 16:36:37 +07:00
cohcho	99b58580e9	MSR: supress kernel module warning	2020-10-23 13:09:13 +00:00
SChernykh	1bf159d1e8	Removed cache QoS warning at exit on unsupported CPUs	2020-07-13 20:43:49 +02:00
SChernykh	72c385c870	Cache QoS: fix for seting MSR	2020-07-13 20:30:44 +02:00
SChernykh	c83429c55c	RandomX: added cache QoS support ... False by default. If set to true, all non-mining CPU cores will not have access to L3 cache.	2020-07-13 17:23:18 +02:00
SChernykh	59313d9cc3	Print error message when MSR mod fails ... Make sure user knows that hashrate is worse than it could be.	2020-06-26 19:54:06 +02:00
XMRig	7a3233ab4b	Use long tags.	2020-05-28 20:32:41 +07:00
XMRig	030d6e5962	Update year.	2020-02-01 20:24:00 +07:00
SChernykh	665e43fecc	MSR preset for Bulldozer CPUs ... Also fixed verbose output for MSR presets with masks.	2020-01-14 19:27:34 +01:00
SChernykh	c9f90e6770	Refactor Ryzen fix to fix compilation issues	2019-12-31 11:55:07 +02:00
XMRig	f00769f758	Code style cleanup.	2019-12-28 01:45:54 +07:00
SChernykh	3a2941b719	Fix for 1st-gen Ryzen crashes	2019-12-27 12:40:38 +02:00
XMRig	12fb27e2cf	Use MsrItem::kNoMask.	2019-12-19 03:20:48 +07:00
SChernykh	59e8fdb9ed	Added bit masks for MSR registers	2019-12-17 23:55:22 +01:00
XMRig	f8865b1498	Added "verbose" option.	2019-12-17 21:46:11 +07:00
XMRig	a877b1d269	Added save/restore MSR registers on Linux.	2019-12-17 16:17:11 +07:00
XMRig	8bef964f68	Added support for write custom MSR.	2019-12-17 02:27:07 +07:00
XMRig	5d0fd2dc8e	Unified Linux/Windows MSR log messages.	2019-12-15 01:32:41 +07:00
XMRig	7ff465053b	Added additional MSR registers for Ryzen CPUs.	2019-12-12 14:21:15 +07:00
XMRig	96ee721d21	Fixed MSR.	2019-12-11 20:09:25 +07:00
XMRig	de7ed2b968	Added support for AMD specific MSR registers.	2019-12-11 19:37:13 +07:00
XMRig	96cfdda9a1	Added RandomX option "wrmsr" with command line equivalent --randomx-wrmsr=N.	2019-12-10 23:57:29 +07:00