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Commit Graph

539 Commits

Author SHA1 Message Date
XMRig
db24bf5154 Revert "Merge branch 'pr3764' into dev"
This reverts commit 0d9a372e49, reversing
changes made to 1a04bf2904.
2026-01-21 21:32:51 +07:00
XMRig
c1e3d386fe Merge branch 'master' of https://github.com/oxyzenQ/xmrig into pr3764 2026-01-21 21:27:11 +07:00
rezky_nightky
5ca4828255 feat: stability improvements, see detail below
Key stability improvements made (deterministic + bounded)
1) Bounded memory usage in long-running stats
Fixed unbounded growth in NetworkState latency tracking:
Replaced std::vector<uint16_t> m_latency + push_back() with a fixed-size ring buffer (kLatencyWindow = 1024) and explicit counters.
Median latency computation now operates on at most 1024 samples, preventing memory growth and avoiding performance cliffs from ever-growing copies/sorts.
2) Prevent crash/UAF on shutdown + more predictable teardown
Controller shutdown ordering (Controller::stop()):
Now stops m_miner before destroying m_network.
This reduces chances of worker threads submitting results into a network listener that’s already destroyed.
Thread teardown hardening (backend/common/Thread.h):
Destructor now checks std:🧵:joinable() before join().
Avoids std::terminate() if a thread object exists but never started due to early exit/error paths.
3) Fixed real leaks (including executable memory)
Executable memory leak fixed (crypto/cn/CnCtx.cpp):
CnCtx::create() allocates executable memory for generated_code via VirtualMemory::allocateExecutableMemory(0x4000, ...).
Previously CnCtx::release() only _mm_free()’d the struct, leaking the executable mapping.
Now CnCtx::release() frees generated_code before freeing the ctx.
GPU verification leak fixed (net/JobResults.cpp):
In getResults() (GPU result verification), a cryptonight_ctx was created via CnCtx::create() but never released.
Added CnCtx::release(ctx, 1).
4) JobResults: bounded queues + backpressure + safe shutdown semantics
The old JobResults could:

enqueue unlimited std::list items (m_results, m_bundles) → unbounded RAM,
call uv_queue_work per async batch → unbounded libuv threadpool backlog,
delete handler directly while worker threads might still submit → potential crash/UAF.
Changes made:

Hard queue limits:
kMaxQueuedResults = 4096
kMaxQueuedBundles = 256
Excess is dropped (bounded behavior under load).
Async coalescing:
Only one pending async notification at a time (m_pendingAsync), reducing eventfd/uv wake storms.
Bounded libuv work scheduling:
Only one uv_queue_work is scheduled at a time (m_workScheduled), preventing CPU starvation and unpredictable backlog.
Safe shutdown:
JobResults::stop() now detaches global handler first, then calls handler->stop().
Shutdown detaches m_listener, clears queues, and defers deletion until in-flight work is done.
Defensive bound on GPU result count:
Clamp count to 0xFF inside JobResults as well, not just in the caller, to guard against corrupted kernels/drivers.
5) Idempotent cleanup
VirtualMemory::destroy() now sets pool = nullptr after delete:
prevents accidental double-delete on repeated teardown paths.
Verification performed
codespell . --config ./.codespellrc: clean
CMake configure + build completed successfully (Release build)

Signed-off-by: rezky_nightky <with.rezky@gmail.com>
2026-01-21 21:22:43 +07:00
rezky_nightky
cb7511507f fix: cross typos detail below:
What I did
Repository rules / exclusions
I didn’t find repo-specific spelling tooling already in place (no existing codespell config).
Given this is a C/C++ repo with vendored sources, I treated src/3rdparty/** as third-party and excluded it from typo fixing (and encoded that in the new .codespellrc).
Typos fixed (first-party only)
Docs
CHANGELOG.md: perfomance -> performance
doc/API.md: optionaly -> optionally, Offical -> Official
doc/BENCHMARK.md: parameteres -> parameters
doc/CPU.md: loosing -> losing, instuctions -> instructions
doc/CHANGELOG_OLD.md: multiple obvious text typos like Breaked -> Broken, singal -> signal, previos -> previous, secons -> seconds, automaticaly -> automatically, perfomance -> performance
Code comments / doc comments (safe text-only changes)
src/base/crypto/sha3.cpp: Inteface -> Interface (comment banner)
src/backend/opencl/cl/cn/cryptonight.cl: performe -> perform, crashs -> crashes (comments)
src/backend/opencl/cl/kawpow/kawpow.cl: regsters -> registers, intial -> initial (comments)
src/crypto/randomx/aes_hash.cpp: intial -> initial (comment)
src/crypto/randomx/intrin_portable.h: cant -> can't (comment)
src/crypto/randomx/randomx.h: intialization -> initialization (doc comment)
src/crypto/cn/c_jh.c: intital -> initial (comment)
src/crypto/cn/skein_port.h: varaiable -> variable (comment)
src/backend/opencl/cl/cn/wolf-skein.cl: Build-in -> Built-in (comment)
What I intentionally did NOT change
Anything under src/3rdparty/** (vendored).
A few remaining codespell hits are either:
Upstream/embedded sources we excluded (groestl256.cl, jh.cl contain Projet)
Potentially valid identifier/name (Carmel CPU codename)
Low-risk token in codegen comments (vor inside an instruction comment)
These are handled via ignore rules in .codespellrc instead of modifying code.

Added: .codespellrc
Created /.codespellrc with:

skip entries for vendored / embedded upstream areas:
./src/3rdparty
./src/crypto/ghostrider
./src/crypto/randomx/blake2
./src/crypto/cn/sse2neon.h
./src/backend/opencl/cl/cn/groestl256.cl
./src/backend/opencl/cl/cn/jh.cl
ignore-words-list for:
Carmel
vor
Verification
codespell . --config ./.codespellrc now exits clean (exit code 0).

Signed-off-by: rezky_nightky <with.rezky@gmail.com>
2026-01-21 20:14:59 +07:00
SChernykh
8ccf7de304 RISC-V: use vector hardware AES instead of scalar 2025-12-31 23:37:55 +01:00
SChernykh
d3a84c4b52 RISC-V: detect and use hardware AES 2025-12-29 22:10:07 +01:00
SChernykh
f661e1eb30 RISC-V: vectorized RandomX main loop 2025-12-26 22:11:39 +01:00
SChernykh
482a1f0b40 Linux: added support for transparent huge pages 2025-12-11 11:23:18 +01:00
slayingripper
643b65f2c0 RISC-V Intergration 2025-10-22 18:57:20 +02:00
SChernykh
da5a5674b4 Added Zen4 (Hawk Point) CPUs detection 2025-10-15 08:07:58 +02:00
xmrig
e28d663d80 Merge pull request #3677 from SChernykh/dev
Tweaked autoconfig for AMD CPUs with < 2 MB L3 cache per thread, again (hopefully the last time)
2025-06-19 18:07:54 +07:00
SChernykh
aba1ad8cfc Tweaked autoconfig for AMD CPUs with < 2 MB L3 cache per thread, again (hopefully the last time) 2025-06-19 12:58:31 +02:00
xmrig
48faf0a11b Merge pull request #3671 from SChernykh/dev
Hwloc: fixed detection of L2 cache size for some complex NUMA topologies
2025-06-17 18:52:43 +07:00
SChernykh
d125d22d27 Hwloc: fixed detection of L2 cache size for some complex NUMA topologies 2025-06-17 13:49:02 +02:00
XMRig
fc395a5800 Update ARM CPUs database. 2025-06-16 19:54:08 +07:00
XMRig
9e7cf69ac3 Detect CPU name and AES instructions on Windows ARM64. 2025-06-13 21:02:10 +07:00
XMRig
57a4998ae2 Fix Linux build. 2025-06-13 04:05:30 +07:00
XMRig
34b4448a81 Split BasicCpuInfo_arm. 2025-06-13 03:57:13 +07:00
XMRig
650d794fb1 Initial Windows ARM64 support via MSYS2. 2025-06-13 03:00:34 +07:00
xmrig
2ab7f85ccd Merge pull request #3665 from SChernykh/dev
Tweaked autoconfig for AMD CPUs with < 2 MB L3 cache per thread
2025-06-11 23:40:46 +07:00
SChernykh
e4c30eb0dd Tweaked autoconfig for AMD CPUs with < 2 MB L3 cache per thread 2025-06-11 18:34:50 +02:00
ybh1998
46572dcb3d Fix type of keccak_f800 2025-05-30 01:57:08 +08:00
SChernykh
6cfc02d24f Optimized autoconfig for AMD CPUs with < 2 MB L3 cache per thread 2025-03-22 11:34:23 +01:00
XMRig
16ecb8f085 Allow use of the previous CUDA plugin version with a warning. 2024-12-23 23:14:06 +07:00
SChernykh
4a13a8a75c CUDA backend: update RandomX dataset when it changes 2024-12-18 13:45:10 +01:00
XMRig
cd2fd9d7a6 Simplified getting PCI topology for the OpenCL backend. 2024-11-08 13:03:35 +07:00
XMRig
064cd3ef20 Fixed and simplified OpenCL GPU type detection. 2024-11-08 07:09:35 +07:00
SChernykh
77c14c8362 Fix number of threads on the new Intel Core Ultra CPUs 2024-10-25 13:44:24 +02:00
SChernykh
40949f2767 Fix: don't use NaN in hashrate calculations 2024-10-23 11:40:27 +02:00
SChernykh
20d555668b Fixed threads auto-config on Zen5 2024-08-16 23:36:22 +02:00
SChernykh
17a52fb418 Always reset nonce on RandomX dataset change
Also never get a new job when mining is paused
2024-08-14 16:41:03 +02:00
SChernykh
ecb3ec0317 Added rx/yada OpenCL support 2024-08-07 00:18:51 +02:00
XMRig
98c775703e Don't generate "rx/yada" profile, use the "rx" profile by default. 2024-08-04 20:00:12 +07:00
SChernykh
748365d6e3 Added Zen5 detection
Preliminary Zen5 support, MSR mod is not ready yet.
2024-08-03 11:01:18 +02:00
Matthew Vogel
5342f25fbf update constants for yadacoin 2024-07-31 23:45:34 -07:00
SChernykh
86f5db19d2 Removed rx/keva
Keva coin is too small now.
2024-07-31 08:28:05 +02:00
SChernykh
206295c6cb Fixed Zephyr mining (OpenCL) 2024-01-13 20:14:08 +01:00
SChernykh
d94d052e6c KawPow: fixed data race when building programs
`uv_queue_work` can't be called from other threads, only `uv_async_send` is thread-safe.
2023-06-19 12:32:28 +02:00
XMRig
c7e541d84f Disallow direct use of HwlocCpuInfo class. 2023-06-07 00:32:09 +07:00
XMRig
554b60966b Fixed compatibility with hwloc 1.11. 2023-06-06 02:30:10 +07:00
xmrig
0378aa8df4 Merge pull request #3236 from MrFoxPro/dev
fix(cuda): receive CUDA loader error on linux too.
2023-06-05 23:07:38 +07:00
XMRig
055db83142 Added new ARM CPU names. 2023-06-04 19:36:53 +07:00
SChernykh
826e23b4c4 Fixed jccErratum list 2023-05-26 12:46:59 +02:00
SChernykh
7f7fc363e1 Tweaked auto-tuning for Intel CPUs
Alder Lake and newer CPUs have exclusive L3 cache and benefit from more threads until L3+L2 is filled.
2023-04-18 21:20:45 +02:00
Dmitriy Nikiforov
62a3a98e7d fix(cuda): receive CUDA loader error on linux too. 2023-03-27 18:48:13 +05:00
Matthew Smith
51728b2d55 Fix build with gcc 13
Now some header files are not included transistively with new
libstdc++.

Bug: https://bugs.gentoo.org/895226
2023-03-23 12:01:15 +01:00
SChernykh
64b0d9562e Fixed broken RandomX light mode mining
RandomX VMs didn't get updated properly in light mode.
2023-01-21 16:02:47 +01:00
SChernykh
7d4d48e83b DragonflyBSD compilation fixes 2022-12-17 13:11:14 +01:00
SChernykh
a02afe6d4f Added ifdefs for DragonflyBSD
Possible fix for #3179
2022-12-16 15:26:37 +01:00
SChernykh
7fc45dfb2d RandomX: added MSR mod for Zen 4
+0.8% faster on Ryzen 9 7950X
2022-10-01 18:33:04 +02:00