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3,614 Commits 9 Branches 171 Tags
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Commit Graph

179 Commits

Author SHA1 Message Date
SChernykh
9d71358f46 RandomX v2 + commitments 2026-01-30 16:07:25 +01:00
SChernykh
482a1f0b40 Linux: added support for transparent huge pages 2025-12-11 11:23:18 +01:00
SChernykh
7ef5142a52 RISC-V: added vectorized dataset init (activated by setting init-avx2 to 1 in config.json) 2025-11-30 19:15:15 +01:00
SChernykh
27c8e60919 Removed unused files 2025-10-22 23:31:02 +02:00
slayingripper
643b65f2c0 RISC-V Intergration 2025-10-22 18:57:20 +02:00
XMRig
16ecb8f085 Allow use of the previous CUDA plugin version with a warning. 2024-12-23 23:14:06 +07:00
SChernykh
a411ee3565 RandomX: tweaks for Zen5 2024-08-19 21:01:49 +02:00
SChernykh
748365d6e3 Added Zen5 detection 
Preliminary Zen5 support, MSR mod is not ready yet.
 2024-08-03 11:01:18 +02:00
Matthew Vogel
5342f25fbf update constants for yadacoin 2024-07-31 23:45:34 -07:00
SChernykh
86f5db19d2 Removed rx/keva 
Keva coin is too small now.
 2024-07-31 08:28:05 +02:00
XMRig
c7e541d84f Disallow direct use of HwlocCpuInfo class. 2023-06-07 00:32:09 +07:00
SChernykh
c62622b114 Fix: --randomx-wrmsr=-1 worked only on Intel 2023-02-26 22:31:55 +01:00
SChernykh
3ad6ab56a5 Improved Zen 3 MSR mod 
+0.5% speedup on Ryzen 5 5600X
 2022-11-17 23:32:36 +01:00
SChernykh
7fc45dfb2d RandomX: added MSR mod for Zen 4 
+0.8% faster on Ryzen 9 7950X
 2022-10-01 18:33:04 +02:00
SChernykh
63e21dfe63 RandomX: added Blake2 AVX2 version 
+0.1% speedup on AMD Zen2/Zen3 and Intel CPUs which support AVX2.
 2022-08-25 20:39:54 +02:00
SChernykh
7f2f50a8d9 RandomX: don't restart mining threads when the seed changes 
It helps to not loose huge pages when the seed changes (every 2048 blocks, ~2.8 days).
 2021-12-25 13:39:15 +01:00
SChernykh
ceaebfd877 GhostRider algorithm (Raptoreum) support 2021-11-23 08:14:01 +01:00
XMRig
35acb3f00b Merge branch 'GraftRandomX' of https://github.com/Stardock2018/xmrig into pr2563 2021-08-28 11:50:17 +07:00
Chris
5fdf5516ff Added Graft RandonX 2021-08-27 08:19:54 -06:00
XMRig
c7ac314110 Code cleanup based on Clang-Tidy. 2021-08-25 18:45:15 +07:00
XMRig
9580f5395f Removed shortName. 2021-08-11 22:26:34 +07:00
XMRig
e6332eff2b Implemented stable algorithm ids. 2021-08-11 03:46:34 +07:00
SChernykh
8af8df25aa Optimized cn-heavy for Zen3 
- Uses scratchpad interleaving to access only the closest L3 slice from each CPU core.
- Also activates MSR mod for cn-heavy because CPU prefetchers get confused with interleaving
- 7-8% speedup on Zen3
 2021-02-07 22:05:11 +01:00
SChernykh
4108428872 Fixed crashes on ARM 2021-02-01 17:07:45 +01:00
XMRig
672f6df6c1 Fixed Cache QoS restore on exit where it not supported. 2021-01-24 02:23:27 +07:00
XMRig
9dae559b73 Added RxMsr class. 2021-01-23 23:23:39 +07:00
XMRig
b9d813c403 Move Ryzen related fixes to RxFix class. 2021-01-23 00:27:56 +07:00
XMRig
c48e2e6af8 Added new class Msr. 2021-01-22 23:50:25 +07:00
Richard Mitsuk Lavitt
590252bd5e fixed grammar in a couple of awkward error messages 2021-01-15 14:33:38 -06:00
SChernykh
633aaccd9c Added config option for AVX2 dataset init 
-1 = Auto detect
0 = Always disabled
1 = Enabled if AVX2 is supported
 2020-12-19 16:18:49 +01:00
SChernykh
515a85e66c Dataset initialization with AVX2 (WIP) 2020-12-18 14:53:54 +01:00
SChernykh
0da3390d09 More static analysis fixes 2020-12-08 16:05:58 +01:00
XMRig
c8ee6f7db8 Move Profiler and more cleanup. 2020-12-04 09:23:40 +07:00
XMRig
63bd45c397 Added Cvt class. 2020-12-02 16:31:45 +07:00
SChernykh
d557fe7f39 Fix RandomX init when switching to other algo and back 2020-11-29 22:02:48 +01:00
SChernykh
9a1e867da2 Fixed MSR mod names in JSON API 2020-11-14 19:55:43 +01:00
XMRig
3b6cfd9c4f #1937 Print path to existing WinRing0 service without verbose option. 2020-11-12 23:32:49 +07:00
SChernykh
c8c0abdb00 Separate MSR mod for Zen/Zen2 and Zen3 
Another +0.5% speedup for Zen2
 2020-11-08 19:40:44 +01:00
SChernykh
1e3e8ff8ee Update RxConfig.cpp 2020-11-06 22:59:18 +01:00
SChernykh
d4750239ea New MSR mod for Ryzen 
+3.5% on Zen2, +1-2% on Zen3
 2020-11-06 22:56:09 +01:00
SChernykh
f1a24b7ddd Fix compilation on ARMv8 with GCC 9.3.0 2020-11-02 13:50:10 +01:00
XMRig
905713f1ca Merge branch 'feature-bench-submit' into dev 2020-10-30 23:25:09 +07:00
SChernykh
50bdaba526 Fixed Debug build in Visual Studio 2020-10-27 14:08:36 +01:00
XMRig
4914fefb1f Added "msr" field for CPU backend. 2020-10-25 16:36:37 +07:00
cohcho
99b58580e9 MSR: supress kernel module warning 2020-10-23 13:09:13 +00:00
XMRig
87b4d97798 New Async wrapper. 2020-10-21 08:09:44 +07:00
XMRig
36b1523194 Code cleanup. 2020-10-16 19:35:36 +07:00
cohcho
65fa1d9bf3 uv: fix performance issue 
unix implementation of uv_async_t has been wasting cpu cycles for nothing since 1.29.0 release
implement efficient callback scheduling for linux
 2020-10-12 04:09:09 +00:00
SChernykh
44dcded866 RandomX: added huge-pages-jit config parameter 
Set to false by default, gives 0.2% boost on Ryzen 7 3700X with 16 threads, but hashrate might be unstable on Ryzen between launches. Use with caution.
 2020-10-07 17:42:55 +02:00
SChernykh
a8466a139c RandomX: allocate 2 MB pages for generated code, if possible 
+0.2% boost on Ryzen 7 3700X
 2020-10-07 10:35:10 +02:00