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c1e3d386fe24cfd57fffdd62d996fd89fef3e622
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194 Commits

Author SHA1 Message Date
XMRig
c1e3d386fe Merge branch 'master' of https://github.com/oxyzenQ/xmrig into pr3764 2026-01-21 21:27:11 +07:00
rezky_nightky
cb7511507f fix: cross typos detail below: 
What I did
Repository rules / exclusions
I didn’t find repo-specific spelling tooling already in place (no existing codespell config).
Given this is a C/C++ repo with vendored sources, I treated src/3rdparty/** as third-party and excluded it from typo fixing (and encoded that in the new .codespellrc).
Typos fixed (first-party only)
Docs
CHANGELOG.md: perfomance -> performance
doc/API.md: optionaly -> optionally, Offical -> Official
doc/BENCHMARK.md: parameteres -> parameters
doc/CPU.md: loosing -> losing, instuctions -> instructions
doc/CHANGELOG_OLD.md: multiple obvious text typos like Breaked -> Broken, singal -> signal, previos -> previous, secons -> seconds, automaticaly -> automatically, perfomance -> performance
Code comments / doc comments (safe text-only changes)
src/base/crypto/sha3.cpp: Inteface -> Interface (comment banner)
src/backend/opencl/cl/cn/cryptonight.cl: performe -> perform, crashs -> crashes (comments)
src/backend/opencl/cl/kawpow/kawpow.cl: regsters -> registers, intial -> initial (comments)
src/crypto/randomx/aes_hash.cpp: intial -> initial (comment)
src/crypto/randomx/intrin_portable.h: cant -> can't (comment)
src/crypto/randomx/randomx.h: intialization -> initialization (doc comment)
src/crypto/cn/c_jh.c: intital -> initial (comment)
src/crypto/cn/skein_port.h: varaiable -> variable (comment)
src/backend/opencl/cl/cn/wolf-skein.cl: Build-in -> Built-in (comment)
What I intentionally did NOT change
Anything under src/3rdparty/** (vendored).
A few remaining codespell hits are either:
Upstream/embedded sources we excluded (groestl256.cl, jh.cl contain Projet)
Potentially valid identifier/name (Carmel CPU codename)
Low-risk token in codegen comments (vor inside an instruction comment)
These are handled via ignore rules in .codespellrc instead of modifying code.

Added: .codespellrc
Created /.codespellrc with:

skip entries for vendored / embedded upstream areas:
./src/3rdparty
./src/crypto/ghostrider
./src/crypto/randomx/blake2
./src/crypto/cn/sse2neon.h
./src/backend/opencl/cl/cn/groestl256.cl
./src/backend/opencl/cl/cn/jh.cl
ignore-words-list for:
Carmel
vor
Verification
codespell . --config ./.codespellrc now exits clean (exit code 0).

Signed-off-by: rezky_nightky <with.rezky@gmail.com>
 2026-01-21 20:14:59 +07:00
SChernykh
45d0a15c98 Optimized VAES code 
Use only 1 mask instead of 2
 2026-01-16 20:43:35 +01:00
SChernykh
ed80a8a828 RandomX: added VAES-512 support for Zen5 
+0.1-0.2% hashrate improvement.
 2026-01-16 13:04:40 +01:00
SChernykh
e41b28ef78 Improved RISC-V code 2026-01-15 12:48:55 +01:00
SChernykh
8ccf7de304 RISC-V: use vector hardware AES instead of scalar 2025-12-31 23:37:55 +01:00
SChernykh
d3a84c4b52 RISC-V: detect and use hardware AES 2025-12-29 22:10:07 +01:00
SChernykh
e1efd3dc7f RISC-V: auto-detect and use vector code for all RandomX AES functions 2025-12-27 21:30:14 +01:00
SChernykh
f661e1eb30 RISC-V: vectorized RandomX main loop 2025-12-26 22:11:39 +01:00
SChernykh
23da1a90f5 RISC-V: added vectorized soft AES 2025-12-05 21:09:22 +01:00
SChernykh
7ef5142a52 RISC-V: added vectorized dataset init (activated by setting init-avx2 to 1 in config.json) 2025-11-30 19:15:15 +01:00
SChernykh
985fe06e8d RISC-V: test for instruction extensions 2025-10-22 19:21:26 +02:00
SChernykh
75b63ddde9 RISC-V JIT compiler 2025-10-22 19:00:20 +02:00
Christopher Wright
7abf17cb59 adjust instruction/register suffixes to compile with gcc-based assemblers. 2025-09-21 14:57:42 -04:00
Christopher Wright
eeec5ecd10 undo this change 2025-09-20 08:38:40 -04:00
Christopher Wright
93f5067999 minor Aarch64 JIT changes (better instruction selection, don't emit instructions that add 0, etc) 2025-09-20 08:32:32 -04:00
XMRig
d58061c903 Add detection for _aligned_malloc. 2025-06-15 20:06:19 +07:00
SChernykh
bcc5581535 Better detection of aligned malloc functions 2025-06-14 18:00:27 +02:00
XMRig
650d794fb1 Initial Windows ARM64 support via MSYS2. 2025-06-13 03:00:34 +07:00
SChernykh
a411ee3565 RandomX: tweaks for Zen5 2024-08-19 21:01:49 +02:00
SChernykh
748365d6e3 Added Zen5 detection 
Preliminary Zen5 support, MSR mod is not ready yet.
 2024-08-03 11:01:18 +02:00
SChernykh
ef6fb728b5 Fixed ARMv8 compilation 2024-08-02 17:51:08 +02:00
Matthew Vogel
046b2a17d3 finish updating for yadacoin 2024-08-01 00:01:09 -07:00
Matthew Vogel
5342f25fbf update constants for yadacoin 2024-07-31 23:45:34 -07:00
SChernykh
86f5db19d2 Removed rx/keva 
Keva coin is too small now.
 2024-07-31 08:28:05 +02:00
SChernykh
caae7c64f0 RandomX: correct memcpy size for JIT initialization 
No buffer overflow, better fix for `_FORTIFY_SOURCE`
 2024-04-14 09:13:00 +02:00
SChernykh
c7c26d97fe RandomX: check pointer sizes during JIT initialization 2024-04-13 20:32:16 +02:00
SChernykh
f6c50b5393 Fix RandomX crash when compiled with fortify_source 2024-03-20 21:24:02 +01:00
SChernykh
5e66efabcf ARM64 JIT: don't use x18 register 
From https://developer.apple.com/documentation/xcode/writing-arm64-code-for-apple-platforms
> The platforms reserve register x18. Don’t use this register.

This PR fixes invalid hashes when running on Apple silicon with the latest macOS SDK.
 2023-10-19 17:45:15 +02:00
SChernykh
1252a4710e RandomX: fixed undefined behavior 
Using an inactive member of a `union` is an undefined behavior in C++
 2023-05-23 14:40:12 +02:00
SChernykh
5dcbab7e3a RandomX: optimized program generation 2023-05-21 17:44:20 +02:00
SChernykh
7fc45dfb2d RandomX: added MSR mod for Zen 4 
+0.8% faster on Ryzen 9 7950X
 2022-10-01 18:33:04 +02:00
SChernykh
93c07e1d34 RandomX: optimized CFROUND elimination more 2022-09-16 14:11:27 +02:00
SChernykh
f0e7de8c71 RandomX: optimized CFROUND elimination 2022-09-15 19:57:34 +02:00
SChernykh
63e21dfe63 RandomX: added Blake2 AVX2 version 
+0.1% speedup on AMD Zen2/Zen3 and Intel CPUs which support AVX2.
 2022-08-25 20:39:54 +02:00
SChernykh
e6c81d7166 Fixed GCC 12 warnings 2022-07-03 11:51:46 +02:00
SChernykh
285719cde4 Fixed unaligned memory read in DMI 2022-05-19 20:56:19 +02:00
SChernykh
c2ae625032 Compilationn fixes 2021-12-02 13:34:24 +01:00
SChernykh
efb322df66 Refactored Chrono::highResolutionMSecs() 
Improved precision
 2021-11-30 08:11:09 +01:00
Tony Butler
02240eff8c Slash and burn EOL whitespace everywhere 2021-11-27 17:59:40 -07:00
Tony Butler
f6d45f7990 Fix various memory leaks 2021-10-25 04:06:49 -06:00
Tony Butler
582d17bb84 Fixup RandomX naming consistency 2021-09-16 08:24:37 -06:00
XMRig
b52c289931 Increase RANDOMX_PROGRAM_MAX_SIZE 2021-08-28 12:32:57 +07:00
XMRig
35acb3f00b Merge branch 'GraftRandomX' of https://github.com/Stardock2018/xmrig into pr2563 2021-08-28 11:50:17 +07:00
Chris
5fdf5516ff Added Graft RandonX 2021-08-27 08:19:54 -06:00
XMRig
df4532d9a1 Cleanup ARM code. 2021-08-27 12:36:08 +07:00
SChernykh
b5f1a1feae RandomX: fix broken light mode mining 
It broke after #2395
 2021-05-22 13:49:22 +02:00
SChernykh
94fecb5e92 RandomX ARMv8: optimized dataset read 
Break dependency from readReg2 and readReg3. It should run faster on superscalar and out-of-order CPUs i.e. Apple M1.
 2021-05-20 21:24:28 +02:00
SChernykh
ff82ca57f2 RandomX: rewrote dataset read code 
Unified code for AMD and Intel
1% faster on Intel
0.15% faster on AMD Ryzen
 2021-05-20 12:45:42 +02:00
SChernykh
d443dd86f1 RandomX: added BMI2 version for scratchpad prefetch 
Saves 1 instruction and 1 byte in the main loop.
 2021-05-19 17:52:16 +02:00