2362 Commits

Author	SHA1	Message	Date
SChernykh	482a1f0b40	Linux: added support for transparent huge pages	2025-12-11 11:23:18 +01:00
SChernykh	23da1a90f5	RISC-V: added vectorized soft AES	2025-12-05 21:09:22 +01:00
SChernykh	7ef5142a52	RISC-V: added vectorized dataset init (activated by setting init-avx2 to 1 in config.json)	2025-11-30 19:15:15 +01:00
xmrig	db5c6d9190	Merge pull request #3733 from void-512/master ... Add detection for MSVC/2026	2025-11-13 15:52:43 +07:00
Tony Wang	e88009d575	add detection for MSVC/2026	2025-11-12 17:32:57 -05:00
XMRig	5115597e7f	Improved compatibility for automatically enabling huge pages on Linux systems without NUMA support.	2025-11-07 01:55:00 +07:00
user0-07161	b02519b9f5	feat: initial support for haiku	2025-11-04 13:58:01 +00:00
SChernykh	27c8e60919	Removed unused files	2025-10-22 23:31:02 +02:00
SChernykh	985fe06e8d	RISC-V: test for instruction extensions	2025-10-22 19:21:26 +02:00
SChernykh	75b63ddde9	RISC-V JIT compiler	2025-10-22 19:00:20 +02:00
slayingripper	643b65f2c0	RISC-V Intergration	2025-10-22 18:57:20 +02:00
SChernykh	da5a5674b4	Added Zen4 (Hawk Point) CPUs detection	2025-10-15 08:07:58 +02:00
SChernykh	a659397c41	Fix: correct FCMP++ version number	2025-10-05 13:24:55 +02:00
SChernykh	da683d8c3e	Solo mining: added support for FCMP++ hardfork	2025-10-05 13:00:21 +02:00
XMRig	878e83bf59	Merge branch 'master' of https://github.com/xtophyr/xmrig into xtophyr-master	2025-09-22 21:31:14 +07:00
Christopher Wright	7abf17cb59	adjust instruction/register suffixes to compile with gcc-based assemblers.	2025-09-21 14:57:42 -04:00
Christopher Wright	eeec5ecd10	undo this change	2025-09-20 08:38:40 -04:00
Christopher Wright	93f5067999	minor Aarch64 JIT changes (better instruction selection, don't emit instructions that add 0, etc)	2025-09-20 08:32:32 -04:00
XMRig	a1ee2fd9d2	Improved LibreSSL support.	2025-06-29 12:28:35 +07:00
XMRig	d2363ba28b	v6.24.1-dev	2025-06-23 08:37:15 +07:00
XMRig	6e4a5a6d94	v6.24.0	2025-06-23 07:44:53 +07:00
XMRig	6a690ba1e9	More DNS cleanup.	2025-06-20 23:45:53 +07:00
XMRig	545aef0937	v6.24.0-dev	2025-06-20 08:34:58 +07:00
XMRig	ec286c7fef	Improved IPv6 support.	2025-06-20 07:39:52 +07:00
xmrig	e28d663d80	Merge pull request #3677 from SChernykh/dev ... Tweaked autoconfig for AMD CPUs with < 2 MB L3 cache per thread, again (hopefully the last time)	2025-06-19 18:07:54 +07:00
SChernykh	aba1ad8cfc	Tweaked autoconfig for AMD CPUs with < 2 MB L3 cache per thread, again (hopefully the last time)	2025-06-19 12:58:31 +02:00
xmrig	48faf0a11b	Merge pull request #3671 from SChernykh/dev ... Hwloc: fixed detection of L2 cache size for some complex NUMA topologies	2025-06-17 18:52:43 +07:00
SChernykh	d125d22d27	Hwloc: fixed detection of L2 cache size for some complex NUMA topologies	2025-06-17 13:49:02 +02:00
XMRig	9f3591ae0d	v6.23.1-dev	2025-06-16 21:29:17 +07:00
XMRig	e5a7a69cc0	v6.23.0	2025-06-16 21:00:42 +07:00
XMRig	fc395a5800	Update ARM CPUs database.	2025-06-16 19:54:08 +07:00
XMRig	9138690126	v6.23.0-dev	2025-06-16 02:05:43 +07:00
XMRig	d58061c903	Add detection for _aligned_malloc.	2025-06-15 20:06:19 +07:00
XMRig	3b863cf88f	Fixed __umul128 for MSVC ARM64.	2025-06-15 04:58:03 +07:00
XMRig	9c7468df64	Fixed user agent string.	2025-06-15 00:21:23 +07:00
SChernykh	bcc5581535	Better detection of aligned malloc functions	2025-06-14 18:00:27 +02:00
XMRig	dba336aa04	Update hwloc for MSVC.	2025-06-14 22:11:33 +07:00
XMRig	3ff41f7c94	Fixed UTF-8 paths support for the config file with Clang compiler on Windows ARM64.	2025-06-14 15:38:25 +07:00
XMRig	faa3d55123	Remove deprecated -Ofast for Clang.	2025-06-13 21:53:03 +07:00
XMRig	9e7cf69ac3	Detect CPU name and AES instructions on Windows ARM64.	2025-06-13 21:02:10 +07:00
XMRig	57a4998ae2	Fix Linux build.	2025-06-13 04:05:30 +07:00
XMRig	34b4448a81	Split BasicCpuInfo_arm.	2025-06-13 03:57:13 +07:00
XMRig	650d794fb1	Initial Windows ARM64 support via MSYS2.	2025-06-13 03:00:34 +07:00
xmrig	2ab7f85ccd	Merge pull request #3665 from SChernykh/dev ... Tweaked autoconfig for AMD CPUs with < 2 MB L3 cache per thread	2025-06-11 23:40:46 +07:00
SChernykh	e4c30eb0dd	Tweaked autoconfig for AMD CPUs with < 2 MB L3 cache per thread	2025-06-11 18:34:50 +02:00
XMRig	d4e57d9427	Fix LLHTTP_EXPORT	2025-06-10 03:13:34 +07:00
XMRig	9a71190ca1	Update llhttp to 9.3.0	2025-06-09 03:02:26 +07:00
XMRig	a7dcbb143e	Bump minimum CMake version to 3.10	2025-06-08 23:23:40 +07:00
XMRig	a6a0f80b12	Fix header path.	2025-06-06 14:42:49 +07:00
XMRig	682834b87d	Universal fix for NaN and Infinity in JSON output	2025-06-06 14:36:21 +07:00