 SChernykh
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73722ce186
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JIT compiler: removed unnecessary memcpy from generateProgram()
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2020-01-13 18:00:41 +01:00 |
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SChernykh
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869209389e
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Update MSR preset for Intel
As per https://github.com/xmrig/xmrig/issues/1433#issuecomment-572126184
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2020-01-09 08:10:36 +01:00 |
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SChernykh
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eb20dfbc94
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JIT compiler tweaks
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2020-01-06 13:57:48 +01:00 |
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 XMRig
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88ff807700
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Fix compile warnings.
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2020-01-03 19:11:48 +07:00 |
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SChernykh
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c9f90e6770
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Refactor Ryzen fix to fix compilation issues
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2019-12-31 11:55:07 +02:00 |
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XMRig
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a5b0bc04cc
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Add "cn/ultra" alias for tlo-pool.raasu.org pool.
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2019-12-29 15:36:05 +07:00 |
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XMRig
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402c44b547
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Added "cn-pico/tlo".
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2019-12-29 00:29:19 +07:00 |
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XMRig
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ac4086b273
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Fix build.
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2019-12-28 02:00:08 +07:00 |
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XMRig
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f00769f758
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Code style cleanup.
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2019-12-28 01:45:54 +07:00 |
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SChernykh
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3a2941b719
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Fix for 1st-gen Ryzen crashes
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2019-12-27 12:40:38 +02:00 |
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XMRig
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dbb721cb5e
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Removed "rx/v" algorithm.
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2019-12-26 22:34:19 +07:00 |
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XMRig
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22eca8e0d5
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Fixed memory allocation checks.
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2019-12-25 04:39:21 +07:00 |
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XMRig
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449617d717
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Allow use old CUDA plugin.
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2019-12-20 21:10:13 +07:00 |
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XMRig
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049caabdae
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Add missing algorithm name alias.
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2019-12-20 04:08:47 +07:00 |
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XMRig
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2911bb3a81
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Fix OpenCL.
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2019-12-20 04:05:09 +07:00 |
|
 Tony Butler
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45412a2ace
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Add MoneroV (rx/v) algorithm [based on MoneroOcean/master]
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2019-12-18 16:17:22 -07:00 |
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XMRig
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f4cedd7b63
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Fixed MsrItem serialization.
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2019-12-19 03:49:32 +07:00 |
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XMRig
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3e3d34b3ce
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Allow number value for "wrmsr" option only for Intel.
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2019-12-19 03:28:05 +07:00 |
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XMRig
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12fb27e2cf
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Use MsrItem::kNoMask.
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2019-12-19 03:20:48 +07:00 |
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SChernykh
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c01c035269
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Fixed crash with GCC compiler
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2019-12-18 17:32:57 +01:00 |
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SChernykh
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f85aba5d21
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Fixed AVX detection
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2019-12-18 12:20:21 +01:00 |
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SChernykh
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f8bf8fddd9
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Update jit_compiler_x86_static.S
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2019-12-18 09:13:21 +01:00 |
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SChernykh
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7459677fd5
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Add vzeroupper for processors with AVX
To avoid false dependencies on upper 128 bits of YMM registers.
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2019-12-18 09:12:25 +01:00 |
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SChernykh
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59e8fdb9ed
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Added bit masks for MSR registers
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2019-12-17 23:55:22 +01:00 |
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XMRig
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5142a406b0
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Less error prone log interface.
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2019-12-18 02:20:31 +07:00 |
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XMRig
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f8865b1498
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Added "verbose" option.
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2019-12-17 21:46:11 +07:00 |
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XMRig
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969821296f
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Merge branch 'feature-custom-msr' into dev
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2019-12-17 16:53:28 +07:00 |
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XMRig
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a877b1d269
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Added save/restore MSR registers on Linux.
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2019-12-17 16:17:11 +07:00 |
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XMRig
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9cea70b77c
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Rename Rx_windows.cpp to Rx_win.cpp.
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2019-12-17 15:16:37 +07:00 |
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XMRig
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d2d501c821
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Added RandomX option "rdmsr" and save/restore MSR registers on Windows.
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2019-12-17 14:45:01 +07:00 |
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XMRig
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8bef964f68
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Added support for write custom MSR.
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2019-12-17 02:27:07 +07:00 |
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SChernykh
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4da37baf8c
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RandomSFX (Safex Cash variant) support
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2019-12-16 19:36:29 +01:00 |
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XMRig
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1d4c8dda96
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#1423 Implemented driver reuse.
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2019-12-16 03:41:58 +07:00 |
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XMRig
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b633b593ad
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Strict wrmsr error handling.
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2019-12-16 02:45:07 +07:00 |
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XMRig
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8dbb83f99b
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Revert changes.
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2019-12-16 02:17:57 +07:00 |
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SChernykh
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2e001677df
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Use unique service name for WinRing0 driver
To avoid error 1072
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2019-12-15 19:28:14 +01:00 |
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XMRig
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6adba6dad4
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Removed unnecessary check.
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2019-12-15 12:02:45 +07:00 |
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XMRig
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fb5b873524
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Added missing tag.
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2019-12-15 01:52:20 +07:00 |
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XMRig
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5d0fd2dc8e
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Unified Linux/Windows MSR log messages.
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2019-12-15 01:32:41 +07:00 |
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SChernykh
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222fcfae87
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Fixed thread count for MSR mod
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2019-12-14 16:30:46 +01:00 |
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SChernykh
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2e6523aa10
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MSR mod for Windows
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2019-12-14 16:04:37 +01:00 |
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XMRig
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7ff465053b
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Added additional MSR registers for Ryzen CPUs.
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2019-12-12 14:21:15 +07:00 |
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XMRig
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1c58e28124
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Don't build Rx_linux.cpp on ARM.
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2019-12-11 21:20:37 +07:00 |
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XMRig
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96ee721d21
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Fixed MSR.
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2019-12-11 20:09:25 +07:00 |
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XMRig
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de7ed2b968
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Added support for AMD specific MSR registers.
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2019-12-11 19:37:13 +07:00 |
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XMRig
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4fb3086c1c
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Fixed --randomx-wrmsr option without parameters.
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2019-12-11 19:16:01 +07:00 |
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XMRig
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96cfdda9a1
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Added RandomX option "wrmsr" with command line equivalent --randomx-wrmsr=N.
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2019-12-10 23:57:29 +07:00 |
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SChernykh
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ef522f6404
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Update jit_compiler_x86_static.S
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2019-12-09 20:30:37 +01:00 |
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SChernykh
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763691fa4b
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More optimizations for Ryzen
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2019-12-09 20:29:05 +01:00 |
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SChernykh
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9bc13813ba
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Fixed assembly selection for RandomX when it's on Auto
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2019-12-09 18:59:49 +01:00 |
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