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mirror of https://github.com/xmrig/xmrig.git synced 2026-06-28 13:42:43 -04:00

Merge pull request #3826 from SChernykh/dev

ISUB_R fix for ARM/RISC-V JIT
This commit is contained in:
xmrig
2026-06-27 20:33:57 +07:00
committed by GitHub
4 changed files with 27 additions and 5 deletions
+9
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@@ -726,8 +726,17 @@ void JitCompilerA64::h_ISUB_R(Instruction& instr, uint32_t& codePos)
} }
else else
{ {
const uint32_t imm = instr.getImm32();
if (imm == 0x80000000ul) {
constexpr uint32_t tmp_reg = 20;
emit32(ARMV8A::MOVZ | tmp_reg | (1u << 21) | (0x8000u << 5), code, k);
emit32(ARMV8A::ADD | dst | (dst << 5) | (tmp_reg << 16), code, k);
}
else {
emitAddImmediate(dst, dst, -instr.getImm32(), code, k); emitAddImmediate(dst, dst, -instr.getImm32(), code, k);
} }
}
reg_changed_offset[instr.dst] = k; reg_changed_offset[instr.dst] = k;
codePos = k; codePos = k;
+8 -1
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@@ -814,11 +814,18 @@ namespace randomx {
state.emit(rvi(rv64::SUB, regR(isn.dst), regR(isn.dst), regR(isn.src))); state.emit(rvi(rv64::SUB, regR(isn.dst), regR(isn.dst), regR(isn.src)));
} }
else { else {
int32_t imm = unsigned32ToSigned2sCompl(-isn.getImm32()); //convert to add const uint32_t uimm = isn.getImm32();
if (uimm == 0x80000000ul) {
state.emit(rv64::LUI | (0x80000 << 12) | rvrd(Tmp1Reg));
state.emit(rvi(rv64::SUB, regR(isn.dst), regR(isn.dst), Tmp1Reg));
}
else {
int32_t imm = unsigned32ToSigned2sCompl(-uimm); //convert to add
//x{dst} = x{dst} + {-imm} //x{dst} = x{dst} + {-imm}
emitImm32(state, imm, regR(isn.dst), regR(isn.dst), Tmp1Reg); emitImm32(state, imm, regR(isn.dst), regR(isn.dst), Tmp1Reg);
} }
} }
}
void JitCompilerRV64::v1_ISUB_M(HANDLER_ARGS) { void JitCompilerRV64::v1_ISUB_M(HANDLER_ARGS) {
state.registerUsage[isn.dst] = i; state.registerUsage[isn.dst] = i;
@@ -444,6 +444,12 @@ void* generateProgramVectorRV64(uint8_t* buf, Program& prog, ProgramConfiguratio
// sub x20 + dst, x20 + dst, x20 + src // sub x20 + dst, x20 + dst, x20 + src
emit32(0x414A0A33 + (dst << 7) + (dst << 15) + (src << 20)); emit32(0x414A0A33 + (dst << 7) + (dst << 15) + (src << 20));
} }
else if (imm == 0x80000000U) {
// lui x5, 0x80000000U
emit32(0x800002B7);
// sub x20 + dst, x20 + dst, x5
emit32(0x405A0A33 + (dst << 7) + (dst << 15));
}
else { else {
imm_to_x5(-imm, p); imm_to_x5(-imm, p);
// c.add x20 + dst, x5 // c.add x20 + dst, x5
+1 -1
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@@ -163,7 +163,7 @@ extern RandomX_ConfigurationGraft RandomX_GraftConfig;
extern RandomX_ConfigurationSafex RandomX_SafexConfig; extern RandomX_ConfigurationSafex RandomX_SafexConfig;
extern RandomX_ConfigurationYada RandomX_YadaConfig; extern RandomX_ConfigurationYada RandomX_YadaConfig;
extern RandomX_ConfigurationBase RandomX_CurrentConfig; alignas(64) extern RandomX_ConfigurationBase RandomX_CurrentConfig;
template<typename T> template<typename T>
void randomx_apply_config(const T& config) void randomx_apply_config(const T& config)