SChernykh 7f7fc363e1 Tweaked auto-tuning for Intel CPUs ...

Alder Lake and newer CPUs have exclusive L3 cache and benefit from more threads until L3+L2 is filled.

2023-04-18 21:20:45 +02:00

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BasicCpuInfo_arm.cpp

DragonflyBSD compilation fixes

2022-12-17 13:11:14 +01:00

BasicCpuInfo.cpp

RandomX: added MSR mod for Zen 4

2022-10-01 18:33:04 +02:00

BasicCpuInfo.h

Added VAES support for Cryptonight variants

2021-11-28 20:49:54 +01:00

HwlocCpuInfo.cpp

Tweaked auto-tuning for Intel CPUs

2023-04-18 21:20:45 +02:00

HwlocCpuInfo.h

Code cleanup based on Clang-Tidy.

2021-08-25 18:45:15 +07:00

lscpu_arm.cpp

Detect Apple M1 on Linux.

2021-01-31 05:41:32 +07:00