Merge pull request #3677 from SChernykh/dev

Tweaked autoconfig for AMD CPUs with < 2 MB L3 cache per thread, again (hopefully the last time)

cmake/flags.cmake

@@ -26,7 +26,7 @@ if (CMAKE_CXX_COMPILER_ID MATCHES GNU)
         set(CMAKE_C_FLAGS "${CMAKE_C_FLAGS} ${ARM8_CXX_FLAGS}")
         set(CMAKE_CXX_FLAGS "${CMAKE_CXX_FLAGS} ${ARM8_CXX_FLAGS} -flax-vector-conversions")
     elseif (ARM_TARGET EQUAL 7)
-        set(CMAKE_C_FLAGS "${CMAKE_C_FLAGS} -march=armv7-a -mfpu=neon")
+        set(CMAKE_C_FLAGS "${CMAKE_C_FLAGS} -march=armv7-a -mfpu=neon -flax-vector-conversions")
         set(CMAKE_CXX_FLAGS "${CMAKE_CXX_FLAGS} -march=armv7-a -mfpu=neon -flax-vector-conversions")
     else()
         set(CMAKE_C_FLAGS "${CMAKE_C_FLAGS} -maes")

src/backend/cpu/platform/HwlocCpuInfo.cpp

@@ -311,17 +311,17 @@ void xmrig::HwlocCpuInfo::processTopLevelCache(hwloc_obj_t cache, const Algorith
     uint32_t intensity      = algorithm.maxIntensity() == 1 ? 0 : 1;
 
     if (cache->attr->cache.depth == 3) {
-        for (size_t i = 0; i < cache->arity; ++i) {
+        auto process_L2 = [&L2, &L2_associativity, L3_exclusive, this, &extra, scratchpad](hwloc_obj_t l2) {
-            hwloc_obj_t l2 = cache->children[i];
             if (!hwloc_obj_type_is_cache(l2->type) || l2->attr == nullptr) {
-                continue;
+                return;
             }
 
             L2 += l2->attr->cache.size;
             L2_associativity = l2->attr->cache.associativity;
 
             if (L3_exclusive) {
-                if (vendor() == VENDOR_AMD) {
+                if ((vendor() == VENDOR_AMD) && ((arch() == ARCH_ZEN4) || (arch() == ARCH_ZEN5))) {
+                    // Use extra L2 only on newer CPUs because older CPUs (Zen 3 and older) don't benefit from it.
                     // For some reason, AMD CPUs can use only half of the exclusive L2/L3 cache combo efficiently
                     extra += std::min<size_t>(l2->attr->cache.size / 2, scratchpad);
                 }
@@ -329,6 +329,18 @@ void xmrig::HwlocCpuInfo::processTopLevelCache(hwloc_obj_t cache, const Algorith
                     extra += scratchpad;
                 }
             }
+        };
+
+        for (size_t i = 0; i < cache->arity; ++i) {
+            hwloc_obj_t ch = cache->children[i];
+            if (ch->type == HWLOC_OBJ_GROUP) {
+                for (size_t j = 0; j < ch->arity; ++j) {
+                    process_L2(ch->children[j]);
+                }
+            }
+            else {
+                process_L2(ch);
+            }
         }
     }
 

src/version.h

@@ -22,7 +22,7 @@
 #define APP_ID        "xmrig"
 #define APP_NAME      "XMRig"
 #define APP_DESC      "XMRig miner"
-#define APP_VERSION   "6.23.0"
+#define APP_VERSION   "6.23.1-dev"
 #define APP_DOMAIN    "xmrig.com"
 #define APP_SITE      "www.xmrig.com"
 #define APP_COPYRIGHT "Copyright (C) 2016-2025 xmrig.com"
@@ -30,7 +30,7 @@
 
 #define APP_VER_MAJOR  6
 #define APP_VER_MINOR  23
-#define APP_VER_PATCH  0
+#define APP_VER_PATCH  1
 
 #ifdef _MSC_VER
 #   if (_MSC_VER >= 1930)