Merge 753e63cd96 into 16ecb8f085

CUDA backend: update RandomX dataset when it changes

CHANGELOG.md

@@ -1,3 +1,14 @@
+# v6.22.2
+- [#3569](https://github.com/xmrig/xmrig/pull/3569) Fixed corrupted API output in some rare conditions.
+- [#3571](https://github.com/xmrig/xmrig/pull/3571) Fixed number of threads on the new Intel Core Ultra CPUs.
+
+# v6.22.1
+- [#3531](https://github.com/xmrig/xmrig/pull/3531) Always reset nonce on RandomX dataset change.
+- [#3534](https://github.com/xmrig/xmrig/pull/3534) Fixed threads auto-config on Zen5.
+- [#3535](https://github.com/xmrig/xmrig/pull/3535) RandomX: tweaks for Zen5.
+- [#3539](https://github.com/xmrig/xmrig/pull/3539) Added Zen5 to `randomx_boost.sh`.
+- [#3540](https://github.com/xmrig/xmrig/pull/3540) Detect AMD engineering samples in `randomx_boost.sh`.
+
 # v6.22.0
 - [#2411](https://github.com/xmrig/xmrig/pull/2411) Added support for [Yada](https://yadacoin.io/) (`rx/yada` algorithm).
 - [#3492](https://github.com/xmrig/xmrig/pull/3492) Fixed `--background` option on Unix systems.

doc/API.md

@@ -4,7 +4,7 @@ If you want use HTTP API you need enable it (`"enabled": true,`) then choice `po
 
 Offical HTTP client for API: http://workers.xmrig.info/
 
-Example configuration:
+Example configuration, used in Curl examples below:
 
 ```json
 "api": {
@@ -12,11 +12,11 @@ Example configuration:
 	"worker-id": null,
 },
 "http": {
-	"enabled": false,
+	"enabled": true,
 	"host": "127.0.0.1",
-	"port": 0,
+	"port": 44444,
-	"access-token": null,
+	"access-token": "SECRET",
-	"restricted": true
+	"restricted": false
 }
 ```
 
@@ -37,30 +37,78 @@ Versions before 2.15 was use another options for API https://github.com/xmrig/xm
 
 ## Endpoints
 
-### GET /1/summary
+### APIVersion 2
 
-Get miner summary information. [Example](api/1/summary.json).
+#### GET /2/summary
 
-### GET /1/threads
+Get miner summary information. [Example](api/2/summary.json).
 
-Get detailed information about miner threads. [Example](api/1/threads.json).
+#### GET /2/backends
+
+Get detailed information about miner backends. [Example](api/2/backends.json).
+
+### APIVersion 1 (deprecated)
+
+#### GET /1/summary
+
+Get miner summary information. Currently identical to `GET /2/summary`
+
+#### GET /1/threads
+
+**REMOVED** Get detailed information about miner threads. [Example](api/1/threads.json).
+
+Functionally replaced by `GET /2/backends` which contains a `threads` item per backend.
+
+### APIVersion 0 (deprecated)
+
+#### GET /api.json
+
+Get miner summary information. Currently identical to `GET /2/summary`
 
 
 ## Restricted endpoints
 
 All API endpoints below allow access to sensitive information and remote configure miner. You should set `access-token` and allow unrestricted access (`"restricted": false`).
 
-### GET /1/config
+### JSON-RPC Interface
 
-Get current miner configuration. [Example](api/1/config.json).
+#### POST /json_rpc
 
+Control miner with JSON-RPC. Methods: `pause`, `resume`, `stop`, `start`
 
-### PUT /1/config
+Curl example:
+
+```
+curl -v --data "{\"method\":\"pause\",\"id\":1}" -H "Content-Type: application/json" -H "Authorization: Bearer SECRET" http://127.0.0.1:44444/json_rpc
+```
+
+### APIVersion 2
+
+#### GET /2/config
+
+Get current miner configuration. [Example](api/2/config.json).
+
+#### PUT /2/config
 
 Update current miner configuration. Common use case, get current configuration, make changes, and upload it to miner.
 
 Curl example:
 
 ```
-curl -v --data-binary @config.json -X PUT -H "Content-Type: application/json" -H "Authorization: Bearer SECRET" http://127.0.0.1:44444/1/config
+...GET current config...
+curl -v -H "Content-Type: application/json" -H "Authorization: Bearer SECRET" http://127.0.0.1:44444/2/config > config.json
+...make changes...
+vim config.json
+...PUT changed config...
+curl -v --data-binary @config.json -X PUT -H "Content-Type: application/json" -H "Authorization: Bearer SECRET" http://127.0.0.1:44444/2/config
 ```
+
+### APIVersion 1 (deprecated)
+
+#### GET /1/config
+
+Get current miner configuration. Currently identical to `GET /2/config`
+
+#### PUT /1/config
+
+Update current miner configuration. Currently identical to `PUT /2/config`

doc/api/2/backends.json

@@ -0,0 +1,78 @@
+[
+    {
+        "type": "cpu",
+        "enabled": true,
+        "algo": "rx/0",
+        "profile": "rx",
+        "hw-aes": true,
+        "priority": -1,
+        "msr": true,
+        "asm": "intel",
+        "argon2-impl": "AVX2",
+        "hugepages": [6, 6],
+        "memory": 6291456,
+        "hashrate": [1235.78, 1228.89, null],
+        "threads": [
+            {
+                "intensity": 1,
+                "affinity": 0,
+                "av": 1,
+                "hashrate": [409.75, 406.58, null]
+            },
+            {
+                "intensity": 1,
+                "affinity": 2,
+                "av": 1,
+                "hashrate": [412.9, 411.33, null]
+            },
+            {
+                "intensity": 1,
+                "affinity": 4,
+                "av": 1,
+                "hashrate": [413.11, 410.98, null]
+            }
+        ]
+    },
+    {
+        "type": "cuda",
+        "enabled": true,
+        "algo": "cn-heavy/xhv",
+        "profile": "cn-heavy/xhv",
+        "versions": {
+            "cuda-runtime": "11.6",
+            "cuda-driver": "11.6",
+            "plugin": "6.17.1-dev",
+            "nvml": "11.512.15",
+            "driver": "512.15"
+        },
+        "hashrate": [247.02, 247.34, null],
+        "threads": [
+            {
+                "index": 0,
+                "threads": 32,
+                "blocks": 38,
+                "bfactor": 6,
+                "bsleep": 25,
+                "affinity": -1,
+                "cclock": 0,
+                "mclock": 0,
+                "dataset_host": false,
+                "hashrate": [246.77, 247.26, null],
+                "name": "NVIDIA GeForce GTX 970",
+                "bus_id": "01:00.0",
+                "smx": 13,
+                "arch": 52,
+                "global_mem": 4294836224,
+                "clock": 1177,
+                "memory_clock": 3666,
+                "health": {
+                    "temperature": 69,
+                    "power": 161,
+                    "clock": 1328,
+                    "mem_clock": 3662,
+                    "fan_speed": [100]
+                }
+            }
+        ]
+    }
+]

doc/api/2/config.json

@@ -0,0 +1,136 @@
+{
+    "api": {
+        "id": null,
+        "worker-id": null
+    },
+    "http": {
+        "enabled": true,
+        "host": "127.0.0.1",
+        "port": 44444,
+        "access-token": "SECRET",
+        "restricted": false
+    },
+    "autosave": true,
+    "background": false,
+    "colors": true,
+    "title": true,
+    "randomx": {
+        "init": -1,
+        "init-avx2": -1,
+        "mode": "auto",
+        "1gb-pages": true,
+        "rdmsr": true,
+        "wrmsr": true,
+        "cache_qos": false,
+        "numa": true,
+        "scratchpad_prefetch_mode": 1
+    },
+    "cpu": {
+        "enabled": true,
+        "huge-pages": true,
+        "huge-pages-jit": true,
+        "hw-aes": null,
+        "priority": null,
+        "memory-pool": true,
+        "yield": true,
+        "asm": true,
+        "argon2-impl": null,
+        "argon2": [0, 2, 4, 6, 5, 7],
+        "astrobwt/v2": [1, 2, 3, 4, 5, 6, 7],
+        "cn": [
+            [1, 0],
+            [1, 2],
+            [1, 4]
+        ],
+        "cn-heavy": [
+            [1, 0],
+            [1, 2]
+        ],
+        "cn-lite": [
+            [1, 0],
+            [1, 2],
+            [1, 4],
+            [1, 6],
+            [1, 5],
+            [1, 7]
+        ],
+        "cn-pico": [
+            [2, 1],
+            [2, 2],
+            [2, 3],
+            [2, 4],
+            [2, 5],
+            [2, 6],
+            [2, 7]
+        ],
+        "cn/2": [
+            [1, 0],
+            [1, 2],
+            [1, 4]
+        ],
+        "cn/upx2": [
+            [2, 1],
+            [2, 2],
+            [2, 3],
+            [2, 4],
+            [2, 5],
+            [2, 6],
+            [2, 7]
+        ],
+        "ghostrider": [
+            [8, 0],
+            [8, 2],
+            [8, 4]
+        ],
+        "rx": [0, 2, 4],
+        "rx/arq": [1, 2, 3, 4, 5, 6, 7],
+        "rx/keva": [0, 2, 4, 6, 5, 7],
+        "rx/wow": [0, 2, 4, 6, 5, 7],
+        "cn-lite/0": false,
+        "cn/0": "cn"
+    },
+    "log-file": null,
+    "donate-level": 0,
+    "donate-over-proxy": 0,
+    "pools": [
+        {
+            "algo": null,
+            "coin": null,
+            "url": "some.pool:10064",
+            "user": "4blahblahblahblahblahblahblahblahblahblahblahblahblahblahblahblahblahblahblahblahblahblahblahbl",
+            "pass": "x",
+            "rig-id": null,
+            "nicehash": false,
+            "keepalive": true,
+            "enabled": true,
+            "tls": false,
+            "wss": false,
+            "daemon": false,
+            "socks5": null,
+            "self-select": null,
+            "submit-to-origin": false
+        }
+    ],
+    "retries": 5,
+    "retry-pause": 5,
+    "print-time": 64,
+    "syslog": false,
+    "tls": {
+        "enabled": false,
+        "protocols": null,
+        "cert": null,
+        "cert_key": null,
+        "ciphers": null,
+        "ciphersuites": null,
+        "dhparam": null
+    },
+    "dns": {
+        "ipv6": false,
+        "ttl": 30
+    },
+    "user-agent": null,
+    "verbose": 1,
+    "watch": true,
+    "pause-on-battery": false,
+    "pause-on-active": false
+}

doc/api/2/summary.json

@@ -0,0 +1,76 @@
+{
+    "id": "51aca77da137cb62",
+    "worker_id": "tpad",
+    "uptime": 106,
+    "restricted": false,
+    "resources": {
+        "memory": {
+            "free": 4977348608,
+            "total": 16659546112,
+            "resident_set_memory": 16441344
+        },
+        "load_average": [3.4, 2.7, 2.44],
+        "hardware_concurrency": 8
+    },
+    "features": ["api", "asm", "http", "hwloc", "tls"],
+    "results": {
+        "diff_current": 37638,
+        "shares_good": 3,
+        "shares_total": 3,
+        "avg_time": 35,
+        "avg_time_ms": 35603,
+        "hashes_total": 165638,
+        "best": [358821, 344438, 73371, 0, 0, 0, 0, 0, 0, 0]
+    },
+    "algo": "rx/0",
+    "connection": {
+        "pool": "some.pool:20064",
+        "ip": "127.1.2.3",
+        "uptime": 106,
+        "uptime_ms": 106811,
+        "ping": 405,
+        "failures": 0,
+        "tls": "TLSv1.3",
+        "tls-fingerprint": null,
+        "algo": "rx/0",
+        "diff": 37638,
+        "accepted": 3,
+        "rejected": 0,
+        "avg_time": 35,
+        "avg_time_ms": 35603,
+        "hashes_total": 165638
+    },
+    "version": "6.17.1-dev",
+    "kind": "miner",
+    "ua": "XMRig/6.17.1-dev (Linux x86_64) libuv/1.43.0 gcc/9.4.0",
+    "cpu": {
+        "brand": "Intel(R) Core(TM) i7-4700MQ CPU @ 2.40GHz",
+        "family": 6,
+        "model": 60,
+        "stepping": 3,
+        "proc_info": 198339,
+        "aes": true,
+        "avx2": true,
+        "x64": true,
+        "64_bit": true,
+        "l2": 1048576,
+        "l3": 6291456,
+        "cores": 4,
+        "threads": 8,
+        "packages": 1,
+        "nodes": 1,
+        "backend": "hwloc/2.7.0",
+        "msr": "intel",
+        "assembly": "intel",
+        "arch": "x86_64",
+        "flags": ["aes", "avx", "avx2", "bmi2", "osxsave", "pdpe1gb", "sse2", "ssse3", "sse4.1", "popcnt"]
+    },
+    "donate_level": 0,
+    "paused": false,
+    "algorithms": ["cn/0", "cn/1", "cn/2", "cn/r", "cn/fast", "cn/half", "cn/xao", "cn/rto", "cn/rwz", "cn/zls", "cn/double", "cn/ccx", "cn-lite/1", "cn-heavy/0", "cn-heavy/tube", "cn-heavy/xhv", "cn-pico", "cn-pico/tlo", "cn/upx2", "rx/0", "rx/wow", "rx/arq", "rx/graft", "rx/sfx", "rx/keva", "argon2/chukwa", "argon2/chukwav2", "argon2/ninja", "astrobwt/v2", "ghostrider"],
+    "hashrate": {
+        "total": [1207.19, 1210.82, null],
+        "highest": 1316.85
+    },
+    "hugepages": [6, 6]
+}

scripts/build.hwloc.sh

@@ -1,8 +1,8 @@
 #!/bin/sh -e
 
 HWLOC_VERSION_MAJOR="2"
-HWLOC_VERSION_MINOR="10"
+HWLOC_VERSION_MINOR="11"
-HWLOC_VERSION_PATCH="0"
+HWLOC_VERSION_PATCH="2"
 
 HWLOC_VERSION="${HWLOC_VERSION_MAJOR}.${HWLOC_VERSION_MINOR}.${HWLOC_VERSION_PATCH}"
 

scripts/build.openssl3.sh

@@ -1,6 +1,6 @@
 #!/bin/sh -e
 
-OPENSSL_VERSION="3.0.14"
+OPENSSL_VERSION="3.0.15"
 
 mkdir -p deps
 mkdir -p deps/include

scripts/build.uv.sh

@@ -1,6 +1,6 @@
 #!/bin/sh -e
 
-UV_VERSION="1.48.0"
+UV_VERSION="1.49.2"
 
 mkdir -p deps
 mkdir -p deps/include

scripts/randomx_boost.sh

@@ -8,7 +8,7 @@ else
 	modprobe msr allow_writes=on
 fi
 
-if grep -E 'AMD Ryzen|AMD EPYC' /proc/cpuinfo > /dev/null;
+if grep -E 'AMD Ryzen|AMD EPYC|AuthenticAMD' /proc/cpuinfo > /dev/null;
 	then
 	if grep "cpu family[[:space:]]\{1,\}:[[:space:]]25" /proc/cpuinfo > /dev/null;
 		then
@@ -28,6 +28,14 @@ if grep -E 'AMD Ryzen|AMD EPYC' /proc/cpuinfo > /dev/null;
 					wrmsr -a 0xc001102b 0x2000cc10
 					echo "MSR register values for Zen3 applied"
 				fi
+		elif grep "cpu family[[:space:]]\{1,\}:[[:space:]]26" /proc/cpuinfo > /dev/null;
+			then
+				echo "Detected Zen5 CPU"
+				wrmsr -a 0xc0011020 0x4400000000000
+				wrmsr -a 0xc0011021 0x4000000000040
+				wrmsr -a 0xc0011022 0x8680000401570000
+				wrmsr -a 0xc001102b 0x2040cc10
+				echo "MSR register values for Zen5 applied"
 		else
 			echo "Detected Zen1/Zen2 CPU"
 			wrmsr -a 0xc0011020 0

src/3rdparty/hwloc/NEWS

@@ -1,5 +1,5 @@
 Copyright © 2009 CNRS
-Copyright © 2009-2023 Inria.  All rights reserved.
+Copyright © 2009-2024 Inria.  All rights reserved.
 Copyright © 2009-2013 Université Bordeaux
 Copyright © 2009-2011 Cisco Systems, Inc.  All rights reserved.
 Copyright © 2020 Hewlett Packard Enterprise.  All rights reserved.
@@ -17,6 +17,71 @@ bug fixes (and other actions) for each version of hwloc since version
 0.9.
 
 
+Version 2.11.2
+--------------
+* Add missing CPU info attrs on aarch64 on Linux.
+* Use ACPI CPPC on Linux to get better information about cpukinds,
+  at least on AMD CPUs.
+* Fix crash when manipulating cpukinds after topology
+  duplication, thanks to Hadrien Grasland for the report.
+* Fix missing input target checks in memattr functions,
+  thanks to Hadrien Grasland for the report.
+* Fix a memory leak when ignoring NUMA distances on FreeBSD.
+* Fix build failure on old Linux distributions without accessat().
+* Fix non-Windows importing of XML topologies and CPUID dumps exported
+  on Windows.
+* hwloc-calc --cpuset-output-format systemd-dbus-api now allows
+  to generate AllowedCPUs information for systemd slices.
+  See the hwloc-calc manpage for examples. Thanks to Pierre Neyron.
+* Some fixes in manpage EXAMPLES and split them into subsections.
+
+
+Version 2.11.1
+--------------
+* Fix bash completions, thanks Tavis Rudd.
+
+
+Version 2.11.0
+--------------
+* API
+  + Add HWLOC_MEMBIND_WEIGHTED_INTERLEAVE memory binding policy on
+    Linux 6.9+. Thanks to Honggyu Kim for the patch.
+    - weighted_interleave_membind is added to membind support bits.
+    - The "weighted" policy is added to the hwloc-bind tool.
+  + Add hwloc_obj_set_subtype(). Thanks to Hadrien Grasland for the report.
+* GPU support
+  + Don't hide the GPU NUMA node on NVIDIA Grace Hopper.
+  + Get Intel GPU OpenCL device locality.
+  + Add bandwidths between subdevices in the LevelZero XeLinkBandwidth
+    matrix.
+  + Fix PCI Gen4+ link speed of NVIDIA GPU obtained from NVML,
+    thanks to Akram Sbaih for the report.
+* Windows support
+  + Fix Windows support when UNICODE is enabled, several hwloc features
+    were missing, thanks to Martin for the report.
+  + Fix the enabling of CUDA in Windows CMake build,
+    Thanks to Moritz Kreutzer for the patch.
+  + Fix CUDA/OpenCL test source path in Windows CMake.
+* Tools
+  + Option --best-memattr may now return multiple nodes. Additional
+    configuration flags may be given to tweak its behavior.
+  + hwloc-info has a new --get-attr option to get a single attribute.
+  + hwloc-info now supports "levels", "support" and "topology"
+    special keywords for backward compatibility for hwloc 3.0.
+  + The --taskset command-line option is superseded by the new
+    --cpuset-output-format which also allows to export as list.
+  + hwloc-calc may now import bitmasks described as a list of bits
+    with the new "--cpuset-input-format list".
+* Misc
+  + The MemoryTiersNr info attribute in the root object now says how many
+    memory tiers were built. Thanks to Antoine Morvan for the report.
+  + Fix the management of infinite cpusets in the bitmap printf/sscanf
+    API as well as in command-line tools.
+  + Add section "Compiling software on top of hwloc's C API" in the
+    documentation with examples for GNU Make and CMake,
+    thanks to Florent Pruvost for the help.
+
+
 Version 2.10.0
 --------------
 * Heterogeneous Memory core improvements

src/3rdparty/hwloc/README

@@ -418,14 +418,8 @@ return 0;
 }
 
 hwloc provides a pkg-config executable to obtain relevant compiler and linker
-flags. For example, it can be used thusly to compile applications that utilize
+flags. See Compiling software on top of hwloc's C API for details on building
-the hwloc library (assuming GNU Make):
+program on top of hwloc's API using GNU Make or CMake.
-
-CFLAGS += $(shell pkg-config --cflags hwloc)
-LDLIBS += $(shell pkg-config --libs hwloc)
-
-hwloc-hello: hwloc-hello.c
-     $(CC) hwloc-hello.c $(CFLAGS) -o hwloc-hello $(LDLIBS)
 
 On a machine 2 processor packages -- each package of which has two processing
 cores -- the output from running hwloc-hello could be something like the

src/3rdparty/hwloc/VERSION

@@ -8,8 +8,8 @@
 # Please update HWLOC_VERSION* in contrib/windows/hwloc_config.h too.
 
 major=2
-minor=10
+minor=11
-release=0
+release=2
 
 # greek is used for alpha or beta release tags.  If it is non-empty,
 # it will be appended to the version number.  It does not have to be
@@ -22,7 +22,7 @@ greek=
 
 # The date when this release was created
 
-date="Dec 04, 2023"
+date="Sep 26, 2024"
 
 # If snapshot=1, then use the value from snapshot_version as the
 # entire hwloc version (i.e., ignore major, minor, release, and
@@ -41,6 +41,6 @@ snapshot_version=${major}.${minor}.${release}${greek}-git
 # 2. Version numbers are described in the Libtool current:revision:age
 # format.
 
-libhwloc_so_version=22:0:7
+libhwloc_so_version=23:1:8
 
 # Please also update the <TargetName> lines in contrib/windows/libhwloc.vcxproj

src/3rdparty/hwloc/include/hwloc/autogen/config.h

@@ -1,6 +1,6 @@
 /*
  * Copyright © 2009 CNRS
- * Copyright © 2009-2023 Inria.  All rights reserved.
+ * Copyright © 2009-2024 Inria.  All rights reserved.
  * Copyright © 2009-2012 Université Bordeaux
  * Copyright © 2009-2011 Cisco Systems, Inc.  All rights reserved.
  * See COPYING in top-level directory.
@@ -11,10 +11,10 @@
 #ifndef HWLOC_CONFIG_H
 #define HWLOC_CONFIG_H
 
-#define HWLOC_VERSION "2.10.0"
+#define HWLOC_VERSION "2.11.2"
 #define HWLOC_VERSION_MAJOR 2
-#define HWLOC_VERSION_MINOR 10
+#define HWLOC_VERSION_MINOR 11
-#define HWLOC_VERSION_RELEASE 0
+#define HWLOC_VERSION_RELEASE 2
 #define HWLOC_VERSION_GREEK ""
 
 #define __hwloc_restrict

src/3rdparty/hwloc/include/hwloc/distances.h

@@ -1,5 +1,5 @@
 /*
- * Copyright © 2010-2023 Inria.  All rights reserved.
+ * Copyright © 2010-2024 Inria.  All rights reserved.
  * See COPYING in top-level directory.
  */
 
@@ -28,18 +28,18 @@ extern "C" {
 
 /** \brief Matrix of distances between a set of objects.
  *
- * This matrix often contains latencies between NUMA nodes
+ * The most common matrix contains latencies between NUMA nodes
  * (as reported in the System Locality Distance Information Table (SLIT)
  * in the ACPI specification), which may or may not be physically accurate.
  * It corresponds to the latency for accessing the memory of one node
  * from a core in another node.
- * The corresponding kind is ::HWLOC_DISTANCES_KIND_FROM_OS | ::HWLOC_DISTANCES_KIND_FROM_USER.
+ * The corresponding kind is ::HWLOC_DISTANCES_KIND_MEANS_LATENCY | ::HWLOC_DISTANCES_KIND_FROM_USER.
  * The name of this distances structure is "NUMALatency".
- * Others distance structures include and "XGMIBandwidth", "XGMIHops",
- * "XeLinkBandwidth" and "NVLinkBandwidth".
  *
  * The matrix may also contain bandwidths between random sets of objects,
  * possibly provided by the user, as specified in the \p kind attribute.
+ * Others common distance structures include and "XGMIBandwidth", "XGMIHops",
+ * "XeLinkBandwidth" and "NVLinkBandwidth".
  *
  * Pointers \p objs and \p values should not be replaced, reallocated, freed, etc.
  * However callers are allowed to modify \p kind as well as the contents
@@ -70,11 +70,10 @@ struct hwloc_distances_s {
  * The \p kind attribute of struct hwloc_distances_s is a OR'ed set
  * of kinds.
  *
- * A kind of format HWLOC_DISTANCES_KIND_FROM_* specifies where the
+ * Each distance matrix may have only one kind among HWLOC_DISTANCES_KIND_FROM_*
- * distance information comes from, if known.
+ * specifying where distance information comes from,
- *
+ * and one kind among HWLOC_DISTANCES_KIND_MEANS_* specifying
- * A kind of format HWLOC_DISTANCES_KIND_MEANS_* specifies whether
+ * whether values are latencies or bandwidths.
- * values are latencies or bandwidths, if applicable.
  */
 enum hwloc_distances_kind_e {
   /** \brief These distances were obtained from the operating system or hardware.
@@ -357,6 +356,8 @@ typedef void * hwloc_distances_add_handle_t;
  * Otherwise, it will be copied internally and may later be freed by the caller.
  *
  * \p kind specifies the kind of distance as a OR'ed set of ::hwloc_distances_kind_e.
+ * Only one kind of meaning and one kind of provenance may be given if appropriate
+ * (e.g. ::HWLOC_DISTANCES_KIND_MEANS_BANDWIDTH and ::HWLOC_DISTANCES_KIND_FROM_USER).
  * Kind ::HWLOC_DISTANCES_KIND_HETEROGENEOUS_TYPES will be automatically set
  * according to objects having different types in hwloc_distances_add_values().
  *
@@ -403,7 +404,8 @@ HWLOC_DECLSPEC int hwloc_distances_add_values(hwloc_topology_t topology,
 /** \brief Flags for adding a new distances to a topology. */
 enum hwloc_distances_add_flag_e {
   /** \brief Try to group objects based on the newly provided distance information.
-   * This is ignored for distances between objects of different types.
+   * Grouping is only performed when the distances structure contains latencies,
+   * and when all objects are of the same type.
    * \hideinitializer
    */
   HWLOC_DISTANCES_ADD_FLAG_GROUP = (1UL<<0),

src/3rdparty/hwloc/include/hwloc/helper.h

@@ -1,6 +1,6 @@
 /*
  * Copyright © 2009 CNRS
- * Copyright © 2009-2023 Inria.  All rights reserved.
+ * Copyright © 2009-2024 Inria.  All rights reserved.
  * Copyright © 2009-2012 Université Bordeaux
  * Copyright © 2009-2010 Cisco Systems, Inc.  All rights reserved.
  * See COPYING in top-level directory.
@@ -946,6 +946,14 @@ enum hwloc_distrib_flags_e {
  *
  * \return 0 on success, -1 on error.
  *
+ * \note On hybrid CPUs (or asymmetric platforms), distribution may be suboptimal
+ * since the number of cores or PUs inside packages or below caches may vary
+ * (the top-down recursive partitioning ignores these numbers until reaching their levels).
+ * Hence it is recommended to distribute only inside a single homogeneous domain.
+ * For instance on a CPU with energy-efficient E-cores and high-performance P-cores,
+ * one should distribute separately N tasks on E-cores and M tasks on P-cores
+ * instead of trying to distribute directly M+N tasks on the entire CPUs.
+ *
  * \note This function requires the \p roots objects to have a CPU set.
  */
 static __hwloc_inline int
@@ -960,7 +968,7 @@ hwloc_distrib(hwloc_topology_t topology,
   unsigned given, givenweight;
   hwloc_cpuset_t *cpusetp = set;
 
-  if (flags & ~HWLOC_DISTRIB_FLAG_REVERSE) {
+  if (!n || (flags & ~HWLOC_DISTRIB_FLAG_REVERSE)) {
     errno = EINVAL;
     return -1;
   }

src/3rdparty/hwloc/include/hwloc/memattrs.h

@@ -1,5 +1,5 @@
 /*
- * Copyright © 2019-2023 Inria.  All rights reserved.
+ * Copyright © 2019-2024 Inria.  All rights reserved.
  * See COPYING in top-level directory.
  */
 
@@ -69,7 +69,10 @@ extern "C" {
  * @{
  */
 
-/** \brief Memory node attributes. */
+/** \brief Predefined memory attribute IDs.
+ * See ::hwloc_memattr_id_t for the generic definition of IDs
+ * for predefined or custom attributes.
+ */
 enum hwloc_memattr_id_e {
   /** \brief
    * The \"Capacity\" is returned in bytes (local_memory attribute in objects).
@@ -78,6 +81,8 @@ enum hwloc_memattr_id_e {
    *
    * No initiator is involved when looking at this attribute.
    * The corresponding attribute flags are ::HWLOC_MEMATTR_FLAG_HIGHER_FIRST.
+   *
+   * Capacity values may not be modified using hwloc_memattr_set_value().
    * \hideinitializer
    */
   HWLOC_MEMATTR_ID_CAPACITY = 0,
@@ -93,6 +98,8 @@ enum hwloc_memattr_id_e {
    *
    * No initiator is involved when looking at this attribute.
    * The corresponding attribute flags are ::HWLOC_MEMATTR_FLAG_HIGHER_FIRST.
+
+   * Locality values may not be modified using hwloc_memattr_set_value().
    * \hideinitializer
    */
   HWLOC_MEMATTR_ID_LOCALITY = 1,
@@ -173,11 +180,19 @@ enum hwloc_memattr_id_e {
 
   /* TODO persistence? */
 
-  HWLOC_MEMATTR_ID_MAX /**< \private Sentinel value */
+  HWLOC_MEMATTR_ID_MAX /**< \private
+                        * Sentinel value for predefined attributes.
+                        * Dynamically registered custom attributes start here.
+                        */
 };
 
 /** \brief A memory attribute identifier.
- * May be either one of ::hwloc_memattr_id_e or a new id returned by hwloc_memattr_register().
+ *
+ * hwloc predefines some commonly-used attributes in ::hwloc_memattr_id_e.
+ * One may then dynamically register custom ones with hwloc_memattr_register(),
+ * they will be assigned IDs immediately after the predefined ones.
+ * See \ref hwlocality_memattrs_manage for more information about
+ * existing attribute IDs.
  */
 typedef unsigned hwloc_memattr_id_t;
 
@@ -283,6 +298,10 @@ hwloc_get_local_numanode_objs(hwloc_topology_t topology,
  * (it does not have the flag ::HWLOC_MEMATTR_FLAG_NEED_INITIATOR),
  * location \p initiator is ignored and may be \c NULL.
  *
+ * \p target_node cannot be \c NULL. If \p attribute is ::HWLOC_MEMATTR_ID_CAPACITY,
+ * \p target_node must be a NUMA node. If it is ::HWLOC_MEMATTR_ID_LOCALITY,
+ * \p target_node must have a CPU set.
+ *
  * \p flags must be \c 0 for now.
  *
  * \return 0 on success.
@@ -352,6 +371,8 @@ hwloc_memattr_get_best_target(hwloc_topology_t topology,
  * The returned initiator should not be modified or freed,
  * it belongs to the topology.
  *
+ * \p target_node cannot be \c NULL.
+ *
  * \p flags must be \c 0 for now.
  *
  * \return 0 on success.
@@ -362,100 +383,10 @@ hwloc_memattr_get_best_target(hwloc_topology_t topology,
 HWLOC_DECLSPEC int
 hwloc_memattr_get_best_initiator(hwloc_topology_t topology,
                                  hwloc_memattr_id_t attribute,
-                                 hwloc_obj_t target,
+                                 hwloc_obj_t target_node,
                                  unsigned long flags,
                                  struct hwloc_location *best_initiator, hwloc_uint64_t *value);
 
-/** @} */
-
-
-/** \defgroup hwlocality_memattrs_manage Managing memory attributes
- * @{
- */
-
-/** \brief Return the name of a memory attribute.
- *
- * \return 0 on success.
- * \return -1 with errno set to \c EINVAL if the attribute does not exist.
- */
-HWLOC_DECLSPEC int
-hwloc_memattr_get_name(hwloc_topology_t topology,
-                       hwloc_memattr_id_t attribute,
-                       const char **name);
-
-/** \brief Return the flags of the given attribute.
- *
- * Flags are a OR'ed set of ::hwloc_memattr_flag_e.
- *
- * \return 0 on success.
- * \return -1 with errno set to \c EINVAL if the attribute does not exist.
- */
-HWLOC_DECLSPEC int
-hwloc_memattr_get_flags(hwloc_topology_t topology,
-                        hwloc_memattr_id_t attribute,
-                        unsigned long *flags);
-
-/** \brief Memory attribute flags.
- * Given to hwloc_memattr_register() and returned by hwloc_memattr_get_flags().
- */
-enum hwloc_memattr_flag_e {
-  /** \brief The best nodes for this memory attribute are those with the higher values.
-   * For instance Bandwidth.
-   */
-  HWLOC_MEMATTR_FLAG_HIGHER_FIRST = (1UL<<0),
-  /** \brief The best nodes for this memory attribute are those with the lower values.
-   * For instance Latency.
-   */
-  HWLOC_MEMATTR_FLAG_LOWER_FIRST = (1UL<<1),
-  /** \brief The value returned for this memory attribute depends on the given initiator.
-   * For instance Bandwidth and Latency, but not Capacity.
-   */
-  HWLOC_MEMATTR_FLAG_NEED_INITIATOR = (1UL<<2)
-};
-
-/** \brief Register a new memory attribute.
- *
- * Add a specific memory attribute that is not defined in ::hwloc_memattr_id_e.
- * Flags are a OR'ed set of ::hwloc_memattr_flag_e. It must contain at least
- * one of ::HWLOC_MEMATTR_FLAG_HIGHER_FIRST or ::HWLOC_MEMATTR_FLAG_LOWER_FIRST.
- *
- * \return 0 on success.
- * \return -1 with errno set to \c EBUSY if another attribute already uses this name.
- */
-HWLOC_DECLSPEC int
-hwloc_memattr_register(hwloc_topology_t topology,
-                       const char *name,
-                       unsigned long flags,
-                       hwloc_memattr_id_t *id);
-
-/** \brief Set an attribute value for a specific target NUMA node.
- *
- * If the attribute does not relate to a specific initiator
- * (it does not have the flag ::HWLOC_MEMATTR_FLAG_NEED_INITIATOR),
- * location \p initiator is ignored and may be \c NULL.
- *
- * The initiator will be copied into the topology,
- * the caller should free anything allocated to store the initiator,
- * for instance the cpuset.
- *
- * \p flags must be \c 0 for now.
- *
- * \note The initiator \p initiator should be of type ::HWLOC_LOCATION_TYPE_CPUSET
- * when referring to accesses performed by CPU cores.
- * ::HWLOC_LOCATION_TYPE_OBJECT is currently unused internally by hwloc,
- * but users may for instance use it to provide custom information about
- * host memory accesses performed by GPUs.
- *
- * \return 0 on success or -1 on error.
- */
-HWLOC_DECLSPEC int
-hwloc_memattr_set_value(hwloc_topology_t topology,
-                        hwloc_memattr_id_t attribute,
-                        hwloc_obj_t target_node,
-                        struct hwloc_location *initiator,
-                        unsigned long flags,
-                        hwloc_uint64_t value);
-
 /** \brief Return the target NUMA nodes that have some values for a given attribute.
  *
  * Return targets for the given attribute in the \p targets array
@@ -519,6 +450,8 @@ hwloc_memattr_get_targets(hwloc_topology_t topology,
  * The returned initiators should not be modified or freed,
  * they belong to the topology.
  *
+ * \p target_node cannot be \c NULL.
+ *
  * \p flags must be \c 0 for now.
  *
  * If the attribute does not relate to a specific initiator
@@ -538,6 +471,131 @@ hwloc_memattr_get_initiators(hwloc_topology_t topology,
                              hwloc_obj_t target_node,
                              unsigned long flags,
                              unsigned *nr, struct hwloc_location *initiators, hwloc_uint64_t *values);
+
+/** @} */
+
+
+/** \defgroup hwlocality_memattrs_manage Managing memory attributes
+ *
+ * Memory attribues are identified by an ID (::hwloc_memattr_id_t)
+ * and a name. hwloc_memattr_get_name() and hwloc_memattr_get_by_name()
+ * convert between them (or return error if the attribute does not exist).
+ *
+ * The set of valid ::hwloc_memattr_id_t is a contigous set starting at \c 0.
+ * It first contains predefined attributes, as listed
+ * in ::hwloc_memattr_id_e (from \c 0 to \c HWLOC_MEMATTR_ID_MAX-1).
+ * Then custom attributes may be dynamically registered with
+ * hwloc_memattr_register(). They will get the following IDs
+ * (\c HWLOC_MEMATTR_ID_MAX for the first one, etc.).
+ *
+ * To iterate over all valid attributes
+ * (either predefined or dynamically registered custom ones),
+ * one may iterate over IDs starting from \c 0 until hwloc_memattr_get_name()
+ * or hwloc_memattr_get_flags() returns an error.
+ *
+ * The values for an existing attribute or for custom dynamically registered ones
+ * may be set or modified with hwloc_memattr_set_value().
+ *
+ * @{
+ */
+
+/** \brief Return the name of a memory attribute.
+ *
+ * The output pointer \p name cannot be \c NULL.
+ *
+ * \return 0 on success.
+ * \return -1 with errno set to \c EINVAL if the attribute does not exist.
+ */
+HWLOC_DECLSPEC int
+hwloc_memattr_get_name(hwloc_topology_t topology,
+                       hwloc_memattr_id_t attribute,
+                       const char **name);
+
+/** \brief Return the flags of the given attribute.
+ *
+ * Flags are a OR'ed set of ::hwloc_memattr_flag_e.
+ *
+ * The output pointer \p flags cannot be \c NULL.
+ *
+ * \return 0 on success.
+ * \return -1 with errno set to \c EINVAL if the attribute does not exist.
+ */
+HWLOC_DECLSPEC int
+hwloc_memattr_get_flags(hwloc_topology_t topology,
+                        hwloc_memattr_id_t attribute,
+                        unsigned long *flags);
+
+/** \brief Memory attribute flags.
+ * Given to hwloc_memattr_register() and returned by hwloc_memattr_get_flags().
+ */
+enum hwloc_memattr_flag_e {
+  /** \brief The best nodes for this memory attribute are those with the higher values.
+   * For instance Bandwidth.
+   */
+  HWLOC_MEMATTR_FLAG_HIGHER_FIRST = (1UL<<0),
+  /** \brief The best nodes for this memory attribute are those with the lower values.
+   * For instance Latency.
+   */
+  HWLOC_MEMATTR_FLAG_LOWER_FIRST = (1UL<<1),
+  /** \brief The value returned for this memory attribute depends on the given initiator.
+   * For instance Bandwidth and Latency, but not Capacity.
+   */
+  HWLOC_MEMATTR_FLAG_NEED_INITIATOR = (1UL<<2)
+};
+
+/** \brief Register a new memory attribute.
+ *
+ * Add a new custom memory attribute.
+ * Flags are a OR'ed set of ::hwloc_memattr_flag_e. It must contain one of
+ * ::HWLOC_MEMATTR_FLAG_HIGHER_FIRST or ::HWLOC_MEMATTR_FLAG_LOWER_FIRST but not both.
+ *
+ * The new attribute \p id is immediately after the last existing attribute ID
+ * (which is either the ID of the last registered attribute if any,
+ * or the ID of the last predefined attribute in ::hwloc_memattr_id_e).
+ *
+ * \return 0 on success.
+ * \return -1 with errno set to \c EINVAL if an invalid set of flags is given.
+ * \return -1 with errno set to \c EBUSY if another attribute already uses this name.
+ */
+HWLOC_DECLSPEC int
+hwloc_memattr_register(hwloc_topology_t topology,
+                       const char *name,
+                       unsigned long flags,
+                       hwloc_memattr_id_t *id);
+
+/** \brief Set an attribute value for a specific target NUMA node.
+ *
+ * If the attribute does not relate to a specific initiator
+ * (it does not have the flag ::HWLOC_MEMATTR_FLAG_NEED_INITIATOR),
+ * location \p initiator is ignored and may be \c NULL.
+ *
+ * The initiator will be copied into the topology,
+ * the caller should free anything allocated to store the initiator,
+ * for instance the cpuset.
+ *
+ * \p target_node cannot be \c NULL.
+ *
+ * \p attribute cannot be ::HWLOC_MEMATTR_FLAG_ID_CAPACITY or
+ * ::HWLOC_MEMATTR_FLAG_ID_LOCALITY.
+ *
+ * \p flags must be \c 0 for now.
+ *
+ * \note The initiator \p initiator should be of type ::HWLOC_LOCATION_TYPE_CPUSET
+ * when referring to accesses performed by CPU cores.
+ * ::HWLOC_LOCATION_TYPE_OBJECT is currently unused internally by hwloc,
+ * but users may for instance use it to provide custom information about
+ * host memory accesses performed by GPUs.
+ *
+ * \return 0 on success or -1 on error.
+ */
+HWLOC_DECLSPEC int
+hwloc_memattr_set_value(hwloc_topology_t topology,
+                        hwloc_memattr_id_t attribute,
+                        hwloc_obj_t target_node,
+                        struct hwloc_location *initiator,
+                        unsigned long flags,
+                        hwloc_uint64_t value);
+
 /** @} */
 
 #ifdef __cplusplus

src/3rdparty/hwloc/include/hwloc/opencl.h

@@ -41,6 +41,15 @@ extern "C" {
  */
 /* Copyright (c) 2008-2018 The Khronos Group Inc. */
 
+/* needs "cl_khr_pci_bus_info" device extension, but not strictly required for clGetDeviceInfo() */
+typedef struct {
+    cl_uint pci_domain;
+    cl_uint pci_bus;
+    cl_uint pci_device;
+    cl_uint pci_function;
+} hwloc_cl_device_pci_bus_info_khr;
+#define HWLOC_CL_DEVICE_PCI_BUS_INFO_KHR 0x410F
+
 /* needs "cl_amd_device_attribute_query" device extension, but not strictly required for clGetDeviceInfo() */
 #define HWLOC_CL_DEVICE_TOPOLOGY_AMD 0x4037
 typedef union {
@@ -78,9 +87,19 @@ hwloc_opencl_get_device_pci_busid(cl_device_id device,
                                unsigned *domain, unsigned *bus, unsigned *dev, unsigned *func)
 {
 	hwloc_cl_device_topology_amd amdtopo;
+	hwloc_cl_device_pci_bus_info_khr khrbusinfo;
 	cl_uint nvbus, nvslot, nvdomain;
 	cl_int clret;
 
+	clret = clGetDeviceInfo(device, HWLOC_CL_DEVICE_PCI_BUS_INFO_KHR, sizeof(khrbusinfo), &khrbusinfo, NULL);
+	if (CL_SUCCESS == clret) {
+		*domain = (unsigned) khrbusinfo.pci_domain;
+		*bus = (unsigned) khrbusinfo.pci_bus;
+		*dev = (unsigned) khrbusinfo.pci_device;
+		*func = (unsigned) khrbusinfo.pci_function;
+		return 0;
+	}
+
 	clret = clGetDeviceInfo(device, HWLOC_CL_DEVICE_TOPOLOGY_AMD, sizeof(amdtopo), &amdtopo, NULL);
 	if (CL_SUCCESS == clret
 	    && HWLOC_CL_DEVICE_TOPOLOGY_TYPE_PCIE_AMD == amdtopo.raw.type) {

src/3rdparty/hwloc/include/hwloc/plugins.h

@@ -1,5 +1,5 @@
 /*
- * Copyright © 2013-2022 Inria.  All rights reserved.
+ * Copyright © 2013-2024 Inria.  All rights reserved.
  * Copyright © 2016 Cisco Systems, Inc.  All rights reserved.
  * See COPYING in top-level directory.
  */
@@ -645,6 +645,19 @@ HWLOC_DECLSPEC struct hwloc_obj * hwloc_pci_find_parent_by_busid(struct hwloc_to
  */
 HWLOC_DECLSPEC struct hwloc_obj * hwloc_pci_find_by_busid(struct hwloc_topology *topology, unsigned domain, unsigned bus, unsigned dev, unsigned func);
 
+
+/** @} */
+
+
+
+
+/** \defgroup hwlocality_components_distances Components and Plugins: distances
+ *
+ * \note These structures and functions may change when ::HWLOC_COMPONENT_ABI is modified.
+ *
+ * @{
+ */
+
 /** \brief Handle to a new distances structure during its addition to the topology. */
 typedef void * hwloc_backend_distances_add_handle_t;
 

src/3rdparty/hwloc/include/hwloc/rename.h

@@ -1,6 +1,6 @@
 /*
  * Copyright © 2009-2011 Cisco Systems, Inc.  All rights reserved.
- * Copyright © 2010-2022 Inria.  All rights reserved.
+ * Copyright © 2010-2024 Inria.  All rights reserved.
  * See COPYING in top-level directory.
  */
 
@@ -210,6 +210,7 @@ extern "C" {
 
 #define hwloc_obj_get_info_by_name HWLOC_NAME(obj_get_info_by_name)
 #define hwloc_obj_add_info HWLOC_NAME(obj_add_info)
+#define hwloc_obj_set_subtype HWLOC_NAME(obj_set_subtype)
 
 #define HWLOC_CPUBIND_PROCESS HWLOC_NAME_CAPS(CPUBIND_PROCESS)
 #define HWLOC_CPUBIND_THREAD HWLOC_NAME_CAPS(CPUBIND_THREAD)
@@ -232,6 +233,7 @@ extern "C" {
 #define HWLOC_MEMBIND_FIRSTTOUCH HWLOC_NAME_CAPS(MEMBIND_FIRSTTOUCH)
 #define HWLOC_MEMBIND_BIND HWLOC_NAME_CAPS(MEMBIND_BIND)
 #define HWLOC_MEMBIND_INTERLEAVE HWLOC_NAME_CAPS(MEMBIND_INTERLEAVE)
+#define HWLOC_MEMBIND_WEIGHTED_INTERLEAVE HWLOC_NAME_CAPS(MEMBIND_WEIGHTED_INTERLEAVE)
 #define HWLOC_MEMBIND_NEXTTOUCH HWLOC_NAME_CAPS(MEMBIND_NEXTTOUCH)
 #define HWLOC_MEMBIND_MIXED HWLOC_NAME_CAPS(MEMBIND_MIXED)
 
@@ -560,6 +562,7 @@ extern "C" {
 
 /* opencl.h */
 
+#define hwloc_cl_device_pci_bus_info_khr HWLOC_NAME(cl_device_pci_bus_info_khr)
 #define hwloc_cl_device_topology_amd HWLOC_NAME(cl_device_topology_amd)
 #define hwloc_opencl_get_device_pci_busid HWLOC_NAME(opencl_get_device_pci_ids)
 #define hwloc_opencl_get_device_cpuset HWLOC_NAME(opencl_get_device_cpuset)
@@ -715,6 +718,8 @@ extern "C" {
 #define hwloc__obj_type_is_dcache HWLOC_NAME(_obj_type_is_dcache)
 #define hwloc__obj_type_is_icache HWLOC_NAME(_obj_type_is_icache)
 
+#define hwloc__pci_link_speed HWLOC_NAME(_pci_link_speed)
+
 /* private/cpuid-x86.h */
 
 #define hwloc_have_x86_cpuid HWLOC_NAME(have_x86_cpuid)

src/3rdparty/hwloc/include/private/autogen/config.h

@@ -1,6 +1,6 @@
 /*
  * Copyright © 2009, 2011, 2012 CNRS.  All rights reserved.
- * Copyright © 2009-2021 Inria.  All rights reserved.
+ * Copyright © 2009-2020 Inria.  All rights reserved.
  * Copyright © 2009, 2011, 2012, 2015 Université Bordeaux.  All rights reserved.
  * Copyright © 2009-2020 Cisco Systems, Inc.  All rights reserved.
  * $COPYRIGHT$
@@ -17,6 +17,10 @@
 
 #define HWLOC_HAVE_MSVC_CPUIDEX 1
 
+/* #undef HAVE_MKSTEMP */
+
+#define HWLOC_HAVE_X86_CPUID 1
+
 /* Define to 1 if the system has the type `CACHE_DESCRIPTOR'. */
 #define HAVE_CACHE_DESCRIPTOR 0
 
@@ -128,8 +132,7 @@
 #define HAVE_DECL__SC_PAGE_SIZE 0
 
 /* Define to 1 if you have the <dirent.h> header file. */
-/* #define HAVE_DIRENT_H 1 */
+/* #undef HAVE_DIRENT_H */
-#undef HAVE_DIRENT_H
 
 /* Define to 1 if you have the <dlfcn.h> header file. */
 /* #undef HAVE_DLFCN_H */
@@ -282,7 +285,7 @@
 #define HAVE_STRING_H 1
 
 /* Define to 1 if you have the `strncasecmp' function. */
-#define HAVE_STRNCASECMP 1
+/* #undef HAVE_STRNCASECMP */
 
 /* Define to '1' if sysctl is present and usable */
 /* #undef HAVE_SYSCTL */
@@ -323,8 +326,7 @@
 /* #undef HAVE_UNAME */
 
 /* Define to 1 if you have the <unistd.h> header file. */
-/* #define HAVE_UNISTD_H 1 */
+/* #undef HAVE_UNISTD_H */
-#undef HAVE_UNISTD_H
 
 /* Define to 1 if you have the `uselocale' function. */
 /* #undef HAVE_USELOCALE */
@@ -659,7 +661,7 @@
 #define hwloc_pid_t HANDLE
 
 /* Define this to either strncasecmp or strncmp */
-#define hwloc_strncasecmp strncasecmp
+/* #undef hwloc_strncasecmp */
 
 /* Define this to the thread ID type */
 #define hwloc_thread_t HANDLE

src/3rdparty/hwloc/include/private/cpuid-x86.h

@@ -11,6 +11,22 @@
 #ifndef HWLOC_PRIVATE_CPUID_X86_H
 #define HWLOC_PRIVATE_CPUID_X86_H
 
+/* A macro for annotating memory as uninitialized when building with MSAN
+ * (and otherwise having no effect). See below for why this is used with
+ * our custom assembly.
+ */
+#ifdef __has_feature
+#define HWLOC_HAS_FEATURE(name) __has_feature(name)
+#else
+#define HWLOC_HAS_FEATURE(name) 0
+#endif
+#if HWLOC_HAS_FEATURE(memory_sanitizer) || defined(MEMORY_SANITIZER)
+#include <sanitizer/msan_interface.h>
+#define HWLOC_ANNOTATE_MEMORY_IS_INITIALIZED(ptr, len) __msan_unpoison(ptr, len)
+#else
+#define HWLOC_ANNOTATE_MEMORY_IS_INITIALIZED(ptr, len)
+#endif
+
 #if (defined HWLOC_X86_32_ARCH) && (!defined HWLOC_HAVE_MSVC_CPUIDEX)
 static __hwloc_inline int hwloc_have_x86_cpuid(void)
 {
@@ -71,12 +87,18 @@ static __hwloc_inline void hwloc_x86_cpuid(unsigned *eax, unsigned *ebx, unsigne
   "movl %k2,%1\n\t"
   : "+a" (*eax), "=m" (*ebx), "=&r"(sav_rbx),
     "+c" (*ecx), "=&d" (*edx));
+  /* MSAN does not recognize the effect of the above assembly on the memory operand
+   * (`"=m"(*ebx)`). This may get improved in MSAN at some point in the future, e.g.
+   * see https://github.com/llvm/llvm-project/pull/77393. */
+  HWLOC_ANNOTATE_MEMORY_IS_INITIALIZED(ebx, sizeof *ebx);
 #elif defined(HWLOC_X86_32_ARCH)
   __asm__(
   "mov %%ebx,%1\n\t"
   "cpuid\n\t"
   "xchg %%ebx,%1\n\t"
   : "+a" (*eax), "=&SD" (*ebx), "+c" (*ecx), "=&d" (*edx));
+  /* See above. */
+  HWLOC_ANNOTATE_MEMORY_IS_INITIALIZED(ebx, sizeof *ebx);
 #else
 #error unknown architecture
 #endif

src/3rdparty/hwloc/include/private/misc.h

@@ -1,6 +1,6 @@
 /*
  * Copyright © 2009 CNRS
- * Copyright © 2009-2019 Inria.  All rights reserved.
+ * Copyright © 2009-2024 Inria.  All rights reserved.
  * Copyright © 2009-2012 Université Bordeaux
  * Copyright © 2011 Cisco Systems, Inc.  All rights reserved.
  * See COPYING in top-level directory.
@@ -573,4 +573,35 @@ typedef SSIZE_T ssize_t;
 #  endif
 #endif
 
+static __inline float
+hwloc__pci_link_speed(unsigned generation, unsigned lanes)
+{
+  float lanespeed;
+  /*
+   * These are single-direction bandwidths only.
+   *
+   * Gen1 used NRZ with 8/10 encoding.
+   * PCIe Gen1 = 2.5GT/s signal-rate per lane x 8/10    =  0.25GB/s data-rate per lane
+   * PCIe Gen2 = 5  GT/s signal-rate per lane x 8/10    =  0.5 GB/s data-rate per lane
+   * Gen3 switched to NRZ with 128/130 encoding.
+   * PCIe Gen3 = 8  GT/s signal-rate per lane x 128/130 =  1   GB/s data-rate per lane
+   * PCIe Gen4 = 16 GT/s signal-rate per lane x 128/130 =  2   GB/s data-rate per lane
+   * PCIe Gen5 = 32 GT/s signal-rate per lane x 128/130 =  4   GB/s data-rate per lane
+   * Gen6 switched to PAM with with 242/256 FLIT (242B payload protected by 8B CRC + 6B FEC).
+   * PCIe Gen6 = 64 GT/s signal-rate per lane x 242/256 =  8   GB/s data-rate per lane
+   * PCIe Gen7 = 128GT/s signal-rate per lane x 242/256 = 16   GB/s data-rate per lane
+   */
+
+  /* lanespeed in Gbit/s */
+  if (generation <= 2)
+    lanespeed = 2.5f * generation * 0.8f;
+  else if (generation <= 5)
+    lanespeed = 8.0f * (1<<(generation-3)) * 128/130;
+  else
+    lanespeed = 8.0f * (1<<(generation-3)) * 242/256; /* assume Gen8 will be 256 GT/s and so on */
+
+  /* linkspeed in GB/s */
+  return lanespeed * lanes / 8;
+}
+
 #endif /* HWLOC_PRIVATE_MISC_H */

src/3rdparty/hwloc/src/bind.c

@@ -1,6 +1,6 @@
 /*
  * Copyright © 2009 CNRS
- * Copyright © 2009-2020 Inria.  All rights reserved.
+ * Copyright © 2009-2024 Inria.  All rights reserved.
  * Copyright © 2009-2010, 2012 Université Bordeaux
  * Copyright © 2011-2015 Cisco Systems, Inc.  All rights reserved.
  * See COPYING in top-level directory.
@@ -287,6 +287,7 @@ static __hwloc_inline int hwloc__check_membind_policy(hwloc_membind_policy_t pol
       || policy == HWLOC_MEMBIND_FIRSTTOUCH
       || policy == HWLOC_MEMBIND_BIND
       || policy == HWLOC_MEMBIND_INTERLEAVE
+      || policy == HWLOC_MEMBIND_WEIGHTED_INTERLEAVE
       || policy == HWLOC_MEMBIND_NEXTTOUCH)
     return 0;
   return -1;

src/3rdparty/hwloc/src/bitmap.c

@@ -1,6 +1,6 @@
 /*
  * Copyright © 2009 CNRS
- * Copyright © 2009-2020 Inria.  All rights reserved.
+ * Copyright © 2009-2024 Inria.  All rights reserved.
  * Copyright © 2009-2011 Université Bordeaux
  * Copyright © 2009-2011 Cisco Systems, Inc.  All rights reserved.
  * See COPYING in top-level directory.
@@ -245,6 +245,7 @@ int hwloc_bitmap_copy(struct hwloc_bitmap_s * dst, const struct hwloc_bitmap_s *
 /* Strings always use 32bit groups */
 #define HWLOC_PRIxSUBBITMAP		"%08lx"
 #define HWLOC_BITMAP_SUBSTRING_SIZE	32
+#define HWLOC_BITMAP_SUBSTRING_FULL_VALUE 0xFFFFFFFFUL
 #define HWLOC_BITMAP_SUBSTRING_LENGTH	(HWLOC_BITMAP_SUBSTRING_SIZE/4)
 #define HWLOC_BITMAP_STRING_PER_LONG	(HWLOC_BITS_PER_LONG/HWLOC_BITMAP_SUBSTRING_SIZE)
 
@@ -261,6 +262,7 @@ int hwloc_bitmap_snprintf(char * __hwloc_restrict buf, size_t buflen, const stru
   const unsigned long accum_mask = ~0UL;
 #else /* HWLOC_BITS_PER_LONG != HWLOC_BITMAP_SUBSTRING_SIZE */
   const unsigned long accum_mask = ((1UL << HWLOC_BITMAP_SUBSTRING_SIZE) - 1) << (HWLOC_BITS_PER_LONG - HWLOC_BITMAP_SUBSTRING_SIZE);
+  int merge_with_infinite_prefix = 0;
 #endif /* HWLOC_BITS_PER_LONG != HWLOC_BITMAP_SUBSTRING_SIZE */
 
   HWLOC__BITMAP_CHECK(set);
@@ -279,6 +281,9 @@ int hwloc_bitmap_snprintf(char * __hwloc_restrict buf, size_t buflen, const stru
       res = size>0 ? (int)size - 1 : 0;
     tmp += res;
     size -= res;
+#if HWLOC_BITS_PER_LONG > HWLOC_BITMAP_SUBSTRING_SIZE
+    merge_with_infinite_prefix = 1;
+#endif
   }
 
   i=(int) set->ulongs_count-1;
@@ -294,16 +299,24 @@ int hwloc_bitmap_snprintf(char * __hwloc_restrict buf, size_t buflen, const stru
   }
 
   while (i>=0 || accumed) {
+    unsigned long value;
+
     /* Refill accumulator */
     if (!accumed) {
       accum = set->ulongs[i--];
       accumed = HWLOC_BITS_PER_LONG;
     }
+    value = (accum & accum_mask) >> (HWLOC_BITS_PER_LONG - HWLOC_BITMAP_SUBSTRING_SIZE);
 
-    if (accum & accum_mask) {
+#if HWLOC_BITS_PER_LONG > HWLOC_BITMAP_SUBSTRING_SIZE
+    if (merge_with_infinite_prefix && value == HWLOC_BITMAP_SUBSTRING_FULL_VALUE) {
+      /* first full subbitmap merged with infinite prefix */
+      res = 0;
+    } else
+#endif
+    if (value) {
       /* print the whole subset if not empty */
-        res = hwloc_snprintf(tmp, size, needcomma ? ",0x" HWLOC_PRIxSUBBITMAP : "0x" HWLOC_PRIxSUBBITMAP,
+      res = hwloc_snprintf(tmp, size, needcomma ? ",0x" HWLOC_PRIxSUBBITMAP : "0x" HWLOC_PRIxSUBBITMAP, value);
-		     (accum & accum_mask) >> (HWLOC_BITS_PER_LONG - HWLOC_BITMAP_SUBSTRING_SIZE));
       needcomma = 1;
     } else if (i == -1 && accumed == HWLOC_BITMAP_SUBSTRING_SIZE) {
       /* print a single 0 to mark the last subset */
@@ -323,6 +336,7 @@ int hwloc_bitmap_snprintf(char * __hwloc_restrict buf, size_t buflen, const stru
 #else
     accum <<= HWLOC_BITMAP_SUBSTRING_SIZE;
     accumed -= HWLOC_BITMAP_SUBSTRING_SIZE;
+    merge_with_infinite_prefix = 0;
 #endif
 
     if (res >= size)
@@ -362,7 +376,8 @@ int hwloc_bitmap_sscanf(struct hwloc_bitmap_s *set, const char * __hwloc_restric
 {
   const char * current = string;
   unsigned long accum = 0;
-  int count=0;
+  int count = 0;
+  int ulongcount;
   int infinite = 0;
 
   /* count how many substrings there are */
@@ -383,9 +398,20 @@ int hwloc_bitmap_sscanf(struct hwloc_bitmap_s *set, const char * __hwloc_restric
     count--;
   }
 
-  if (hwloc_bitmap_reset_by_ulongs(set, (count + HWLOC_BITMAP_STRING_PER_LONG - 1) / HWLOC_BITMAP_STRING_PER_LONG) < 0)
+  ulongcount = (count + HWLOC_BITMAP_STRING_PER_LONG - 1) / HWLOC_BITMAP_STRING_PER_LONG;
+  if (hwloc_bitmap_reset_by_ulongs(set, ulongcount) < 0)
     return -1;
-  set->infinite = 0;
+
+  set->infinite = 0; /* will be updated later */
+
+#if HWLOC_BITS_PER_LONG != HWLOC_BITMAP_SUBSTRING_SIZE
+  if (infinite && (count % HWLOC_BITMAP_STRING_PER_LONG) != 0) {
+    /* accumulate substrings of the first ulong that are hidden in the infinite prefix */
+    int i;
+    for(i = (count % HWLOC_BITMAP_STRING_PER_LONG); i < HWLOC_BITMAP_STRING_PER_LONG; i++)
+      accum |= (HWLOC_BITMAP_SUBSTRING_FULL_VALUE << (i*HWLOC_BITMAP_SUBSTRING_SIZE));
+  }
+#endif
 
   while (*current != '\0') {
     unsigned long val;
@@ -544,6 +570,9 @@ int hwloc_bitmap_taskset_snprintf(char * __hwloc_restrict buf, size_t buflen, co
   ssize_t size = buflen;
   char *tmp = buf;
   int res, ret = 0;
+#if HWLOC_BITS_PER_LONG == 64
+  int merge_with_infinite_prefix = 0;
+#endif
   int started = 0;
   int i;
 
@@ -563,6 +592,9 @@ int hwloc_bitmap_taskset_snprintf(char * __hwloc_restrict buf, size_t buflen, co
       res = size>0 ? (int)size - 1 : 0;
     tmp += res;
     size -= res;
+#if HWLOC_BITS_PER_LONG == 64
+    merge_with_infinite_prefix = 1;
+#endif
   }
 
   i=set->ulongs_count-1;
@@ -582,7 +614,11 @@ int hwloc_bitmap_taskset_snprintf(char * __hwloc_restrict buf, size_t buflen, co
     if (started) {
       /* print the whole subset */
 #if HWLOC_BITS_PER_LONG == 64
-      res = hwloc_snprintf(tmp, size, "%016lx", val);
+      if (merge_with_infinite_prefix && (val & 0xffffffff00000000UL) == 0xffffffff00000000UL) {
+        res = hwloc_snprintf(tmp, size, "%08lx", val & 0xffffffffUL);
+      } else  {
+        res = hwloc_snprintf(tmp, size, "%016lx", val);
+      }
 #else
       res = hwloc_snprintf(tmp, size, "%08lx", val);
 #endif
@@ -599,6 +635,9 @@ int hwloc_bitmap_taskset_snprintf(char * __hwloc_restrict buf, size_t buflen, co
       res = size>0 ? (int)size - 1 : 0;
     tmp += res;
     size -= res;
+#if HWLOC_BITS_PER_LONG == 64
+    merge_with_infinite_prefix = 0;
+#endif
   }
 
   /* if didn't display anything, display 0x0 */
@@ -679,6 +718,10 @@ int hwloc_bitmap_taskset_sscanf(struct hwloc_bitmap_s *set, const char * __hwloc
       goto failed;
 
     set->ulongs[count-1] = val;
+    if (infinite && tmpchars != HWLOC_BITS_PER_LONG/4) {
+      /* infinite prefix with partial substring, fill remaining bits */
+      set->ulongs[count-1] |= (~0ULL)<<(4*tmpchars);
+    }
 
     current += tmpchars;
     chars -= tmpchars;

src/3rdparty/hwloc/src/cpukinds.c

@@ -1,5 +1,5 @@
 /*
- * Copyright © 2020-2022 Inria.  All rights reserved.
+ * Copyright © 2020-2024 Inria.  All rights reserved.
  * See COPYING in top-level directory.
  */
 
@@ -50,6 +50,7 @@ hwloc_internal_cpukinds_dup(hwloc_topology_t new, hwloc_topology_t old)
     return -1;
   new->cpukinds = kinds;
   new->nr_cpukinds = old->nr_cpukinds;
+  new->nr_cpukinds_allocated = old->nr_cpukinds;
   memcpy(kinds, old->cpukinds, old->nr_cpukinds * sizeof(*kinds));
 
   for(i=0;i<old->nr_cpukinds; i++) {

src/3rdparty/hwloc/src/distances.c

@@ -1,5 +1,5 @@
 /*
- * Copyright © 2010-2022 Inria.  All rights reserved.
+ * Copyright © 2010-2024 Inria.  All rights reserved.
  * Copyright © 2011-2012 Université Bordeaux
  * Copyright © 2011 Cisco Systems, Inc.  All rights reserved.
  * See COPYING in top-level directory.
@@ -624,8 +624,8 @@ void * hwloc_distances_add_create(hwloc_topology_t topology,
     return NULL;
   }
   if ((kind & ~HWLOC_DISTANCES_KIND_ALL)
-      || hwloc_weight_long(kind & HWLOC_DISTANCES_KIND_FROM_ALL) != 1
+      || hwloc_weight_long(kind & HWLOC_DISTANCES_KIND_FROM_ALL) > 1
-      || hwloc_weight_long(kind & HWLOC_DISTANCES_KIND_MEANS_ALL) != 1) {
+      || hwloc_weight_long(kind & HWLOC_DISTANCES_KIND_MEANS_ALL) > 1) {
     errno = EINVAL;
     return NULL;
   }

src/3rdparty/hwloc/src/memattrs.c

@@ -1,5 +1,5 @@
 /*
- * Copyright © 2020-2023 Inria.  All rights reserved.
+ * Copyright © 2020-2024 Inria.  All rights reserved.
  * See COPYING in top-level directory.
  */
 
@@ -14,13 +14,26 @@
  */
 
 static __hwloc_inline
-hwloc_uint64_t hwloc__memattr_get_convenience_value(hwloc_memattr_id_t id,
+int hwloc__memattr_get_convenience_value(hwloc_memattr_id_t id,
-                                                    hwloc_obj_t node)
+                                         hwloc_obj_t node,
+                                         hwloc_uint64_t *valuep)
 {
-  if (id == HWLOC_MEMATTR_ID_CAPACITY)
+  if (id == HWLOC_MEMATTR_ID_CAPACITY) {
-    return node->attr->numanode.local_memory;
+    if (node->type != HWLOC_OBJ_NUMANODE) {
-  else if (id == HWLOC_MEMATTR_ID_LOCALITY)
+      errno = EINVAL;
-    return hwloc_bitmap_weight(node->cpuset);
+      return -1;
+    }
+    *valuep = node->attr->numanode.local_memory;
+    return 0;
+  }
+  else if (id == HWLOC_MEMATTR_ID_LOCALITY) {
+    if (!node->cpuset) {
+      errno = EINVAL;
+      return -1;
+    }
+    *valuep = hwloc_bitmap_weight(node->cpuset);
+    return 0;
+  }
   else
     assert(0);
   return 0; /* shut up the compiler */
@@ -622,7 +635,7 @@ hwloc_memattr_get_targets(hwloc_topology_t topology,
       if (found<max) {
         targets[found] = node;
         if (values)
-          values[found] = hwloc__memattr_get_convenience_value(id, node);
+          hwloc__memattr_get_convenience_value(id, node, &values[found]);
       }
       found++;
     }
@@ -748,7 +761,7 @@ hwloc_memattr_get_initiators(hwloc_topology_t topology,
   struct hwloc_internal_memattr_target_s *imtg;
   unsigned i, max;
 
-  if (flags) {
+  if (flags || !target_node) {
     errno = EINVAL;
     return -1;
   }
@@ -810,7 +823,7 @@ hwloc_memattr_get_value(hwloc_topology_t topology,
   struct hwloc_internal_memattr_s *imattr;
   struct hwloc_internal_memattr_target_s *imtg;
 
-  if (flags) {
+  if (flags || !target_node) {
     errno = EINVAL;
     return -1;
   }
@@ -823,8 +836,7 @@ hwloc_memattr_get_value(hwloc_topology_t topology,
 
   if (imattr->iflags & HWLOC_IMATTR_FLAG_CONVENIENCE) {
     /* convenience attributes */
-    *valuep = hwloc__memattr_get_convenience_value(id, target_node);
+    return hwloc__memattr_get_convenience_value(id, target_node, valuep);
-    return 0;
   }
 
   /* normal attributes */
@@ -936,7 +948,7 @@ hwloc_memattr_set_value(hwloc_topology_t topology,
 {
   struct hwloc_internal_location_s iloc, *ilocp;
 
-  if (flags) {
+  if (flags || !target_node) {
     errno = EINVAL;
     return -1;
   }
@@ -1007,10 +1019,10 @@ hwloc_memattr_get_best_target(hwloc_topology_t topology,
     /* convenience attributes */
     for(j=0; ; j++) {
       hwloc_obj_t node = hwloc_get_obj_by_type(topology, HWLOC_OBJ_NUMANODE, j);
-      hwloc_uint64_t value;
+      hwloc_uint64_t value = 0;
       if (!node)
         break;
-      value = hwloc__memattr_get_convenience_value(id, node);
+      hwloc__memattr_get_convenience_value(id, node, &value);
       hwloc__update_best_target(&best, &best_value, &found,
                                 node, value,
                                 imattr->flags & HWLOC_MEMATTR_FLAG_HIGHER_FIRST);
@@ -1093,7 +1105,7 @@ hwloc_memattr_get_best_initiator(hwloc_topology_t topology,
   int found;
   unsigned i;
 
-  if (flags) {
+  if (flags || !target_node) {
     errno = EINVAL;
     return -1;
   }
@@ -1806,6 +1818,12 @@ hwloc__apply_memory_tiers_subtypes(hwloc_topology_t topology,
       }
     }
   }
+  if (nr_tiers > 1) {
+    hwloc_obj_t root = hwloc_get_root_obj(topology);
+    char tmp[20];
+    snprintf(tmp, sizeof(tmp), "%u", nr_tiers);
+    hwloc__add_info_nodup(&root->infos, &root->infos_count, "MemoryTiersNr", tmp, 1);
+  }
 }
 
 int

src/3rdparty/hwloc/src/pci-common.c

@@ -1,5 +1,5 @@
 /*
- * Copyright © 2009-2022 Inria.  All rights reserved.
+ * Copyright © 2009-2024 Inria.  All rights reserved.
  * See COPYING in top-level directory.
  */
 
@@ -886,36 +886,12 @@ hwloc_pcidisc_find_linkspeed(const unsigned char *config,
 			     unsigned offset, float *linkspeed)
 {
   unsigned linksta, speed, width;
-  float lanespeed;
 
   memcpy(&linksta, &config[offset + HWLOC_PCI_EXP_LNKSTA], 4);
   speed = linksta & HWLOC_PCI_EXP_LNKSTA_SPEED; /* PCIe generation */
   width = (linksta & HWLOC_PCI_EXP_LNKSTA_WIDTH) >> 4; /* how many lanes */
-  /*
-   * These are single-direction bandwidths only.
-   *
-   * Gen1 used NRZ with 8/10 encoding.
-   * PCIe Gen1 = 2.5GT/s signal-rate per lane x 8/10    =  0.25GB/s data-rate per lane
-   * PCIe Gen2 = 5  GT/s signal-rate per lane x 8/10    =  0.5 GB/s data-rate per lane
-   * Gen3 switched to NRZ with 128/130 encoding.
-   * PCIe Gen3 = 8  GT/s signal-rate per lane x 128/130 =  1   GB/s data-rate per lane
-   * PCIe Gen4 = 16 GT/s signal-rate per lane x 128/130 =  2   GB/s data-rate per lane
-   * PCIe Gen5 = 32 GT/s signal-rate per lane x 128/130 =  4   GB/s data-rate per lane
-   * Gen6 switched to PAM with with 242/256 FLIT (242B payload protected by 8B CRC + 6B FEC).
-   * PCIe Gen6 = 64 GT/s signal-rate per lane x 242/256 =  8   GB/s data-rate per lane
-   * PCIe Gen7 = 128GT/s signal-rate per lane x 242/256 = 16   GB/s data-rate per lane
-   */
 
-  /* lanespeed in Gbit/s */
+  *linkspeed = hwloc__pci_link_speed(speed, width);
-  if (speed <= 2)
-    lanespeed = 2.5f * speed * 0.8f;
-  else if (speed <= 5)
-    lanespeed = 8.0f * (1<<(speed-3)) * 128/130;
-  else
-    lanespeed = 8.0f * (1<<(speed-3)) * 242/256; /* assume Gen8 will be 256 GT/s and so on */
-
-  /* linkspeed in GB/s */
-  *linkspeed = lanespeed * width / 8;
   return 0;
 }
 

src/3rdparty/hwloc/src/topology-windows.c

@@ -1,6 +1,6 @@
 /*
  * Copyright © 2009 CNRS
- * Copyright © 2009-2023 Inria.  All rights reserved.
+ * Copyright © 2009-2024 Inria.  All rights reserved.
  * Copyright © 2009-2012, 2020 Université Bordeaux
  * Copyright © 2011 Cisco Systems, Inc.  All rights reserved.
  * See COPYING in top-level directory.
@@ -220,7 +220,7 @@ static void hwloc_win_get_function_ptrs(void)
 #pragma GCC diagnostic ignored "-Wcast-function-type"
 #endif
 
-    kernel32 = LoadLibrary("kernel32.dll");
+    kernel32 = LoadLibrary(TEXT("kernel32.dll"));
     if (kernel32) {
       GetActiveProcessorGroupCountProc =
 	(PFN_GETACTIVEPROCESSORGROUPCOUNT) GetProcAddress(kernel32, "GetActiveProcessorGroupCount");
@@ -249,12 +249,12 @@ static void hwloc_win_get_function_ptrs(void)
     }
 
     if (!QueryWorkingSetExProc) {
-      HMODULE psapi = LoadLibrary("psapi.dll");
+      HMODULE psapi = LoadLibrary(TEXT("psapi.dll"));
       if (psapi)
         QueryWorkingSetExProc = (PFN_QUERYWORKINGSETEX) GetProcAddress(psapi, "QueryWorkingSetEx");
     }
 
-    ntdll = GetModuleHandle("ntdll");
+    ntdll = GetModuleHandle(TEXT("ntdll"));
     RtlGetVersionProc = (PFN_RTLGETVERSION) GetProcAddress(ntdll, "RtlGetVersion");
 
 #if HWLOC_HAVE_GCC_W_CAST_FUNCTION_TYPE

src/3rdparty/hwloc/src/topology-x86.c

@@ -1,11 +1,11 @@
 /*
- * Copyright © 2010-2023 Inria.  All rights reserved.
+ * Copyright © 2010-2024 Inria.  All rights reserved.
  * Copyright © 2010-2013 Université Bordeaux
  * Copyright © 2010-2011 Cisco Systems, Inc.  All rights reserved.
  * See COPYING in top-level directory.
  *
  *
- * This backend is only used when the operating system does not export
+ * This backend is mostly used when the operating system does not export
  * the necessary hardware topology information to user-space applications.
  * Currently, FreeBSD and NetBSD only add PUs and then fallback to this
  * backend for CPU/Cache discovery.
@@ -15,6 +15,7 @@
  * on various architectures, without having to use this x86-specific code.
  * But this backend is still used after them to annotate some objects with
  * additional details (CPU info in Package, Inclusiveness in Caches).
+ * It may also be enabled manually to work-around bugs in native OS discovery.
  */
 
 #include "private/autogen/config.h"
@@ -487,7 +488,7 @@ static void read_amd_cores_legacy(struct procinfo *infos, struct cpuiddump *src_
 }
 
 /* AMD unit/node from CPUID 0x8000001e leaf (topoext) */
-static void read_amd_cores_topoext(struct hwloc_x86_backend_data_s *data, struct procinfo *infos, unsigned long flags, struct cpuiddump *src_cpuiddump)
+static void read_amd_cores_topoext(struct hwloc_x86_backend_data_s *data, struct procinfo *infos, unsigned long flags __hwloc_attribute_unused, struct cpuiddump *src_cpuiddump)
 {
   unsigned apic_id, nodes_per_proc = 0;
   unsigned eax, ebx, ecx, edx;
@@ -496,7 +497,6 @@ static void read_amd_cores_topoext(struct hwloc_x86_backend_data_s *data, struct
   cpuid_or_from_dump(&eax, &ebx, &ecx, &edx, src_cpuiddump);
   infos->apicid = apic_id = eax;
 
-  if (flags & HWLOC_X86_DISC_FLAG_TOPOEXT_NUMANODES) {
     if (infos->cpufamilynumber == 0x16) {
       /* ecx is reserved */
       infos->ids[NODE] = 0;
@@ -511,7 +511,6 @@ static void read_amd_cores_topoext(struct hwloc_x86_backend_data_s *data, struct
         || (infos->cpufamilynumber == 0x19 && nodes_per_proc > 1)) {
       hwloc_debug("warning: undefined nodes_per_proc value %u, assuming it means %u\n", nodes_per_proc, nodes_per_proc);
     }
-  }
 
   if (infos->cpufamilynumber <= 0x16) { /* topoext appeared in 0x15 and compute-units were only used in 0x15 and 0x16 */
     unsigned cores_per_unit;
@@ -533,9 +532,9 @@ static void read_amd_cores_topoext(struct hwloc_x86_backend_data_s *data, struct
 }
 
 /* Intel core/thread or even die/module/tile from CPUID 0x0b or 0x1f leaves (v1 and v2 extended topology enumeration)
- * or AMD complex/ccd from CPUID 0x80000026 (extended CPU topology)
+ * or AMD core/thread or even complex/ccd from CPUID 0x0b or 0x80000026 (extended CPU topology)
  */
-static void read_extended_topo(struct hwloc_x86_backend_data_s *data, struct procinfo *infos, unsigned leaf, enum cpuid_type cpuid_type, struct cpuiddump *src_cpuiddump)
+static void read_extended_topo(struct hwloc_x86_backend_data_s *data, struct procinfo *infos, unsigned leaf, enum cpuid_type cpuid_type __hwloc_attribute_unused, struct cpuiddump *src_cpuiddump)
 {
   unsigned level, apic_nextshift, apic_type, apic_id = 0, apic_shift = 0, id;
   unsigned threadid __hwloc_attribute_unused = 0; /* shut-up compiler */
@@ -547,20 +546,15 @@ static void read_extended_topo(struct hwloc_x86_backend_data_s *data, struct pro
     eax = leaf;
     cpuid_or_from_dump(&eax, &ebx, &ecx, &edx, src_cpuiddump);
     /* Intel specifies that the 0x0b/0x1f loop should stop when we get "invalid domain" (0 in ecx[8:15])
-     * (if so, we also get 0 in eax/ebx for invalid subleaves).
+     * (if so, we also get 0 in eax/ebx for invalid subleaves). Zhaoxin implements this too.
      * However AMD rather says that the 0x80000026/0x0b loop should stop when we get "no thread at this level" (0 in ebx[0:15]).
-     * Zhaoxin follows the Intel specs but also returns "no thread at this level" for the last *valid* level (at least on KH-4000).
+     *
-     * From the Linux kernel code, it's very likely that AMD also returns "invalid domain"
+     * Linux kernel <= 6.8 used "invalid domain" for both Intel and AMD (in detect_extended_topology())
-     * (because detect_extended_topology() uses that for all x86 CPUs)
+     * but x86 discovery revamp in 6.9 now properly checks both Intel and AMD conditions (in topo_subleaf()).
-     * but keep with the official doc until AMD can clarify that (see #593).
+     * So let's assume we are allowed to break-out once one of the Intel+AMD conditions is met.
      */
-    if (cpuid_type == amd) {
+    if (!(ebx & 0xffff) || !(ecx & 0xff00))
-      if (!(ebx & 0xffff))
+      break;
-        break;
-    } else {
-      if (!(ecx & 0xff00))
-        break;
-    }
     apic_packageshift = eax & 0x1f;
   }
 
@@ -572,13 +566,8 @@ static void read_extended_topo(struct hwloc_x86_backend_data_s *data, struct pro
 	ecx = level;
 	eax = leaf;
 	cpuid_or_from_dump(&eax, &ebx, &ecx, &edx, src_cpuiddump);
-        if (cpuid_type == amd) {
+        if (!(ebx & 0xffff) || !(ecx & 0xff00))
-          if (!(ebx & 0xffff))
+          break;
-            break;
-        } else {
-          if (!(ecx & 0xff00))
-            break;
-        }
 	apic_nextshift = eax & 0x1f;
 	apic_type = (ecx & 0xff00) >> 8;
 	apic_id = edx;
@@ -1825,7 +1814,7 @@ hwloc_x86_check_cpuiddump_input(const char *src_cpuiddump_path, hwloc_bitmap_t s
     goto out_with_path;
   }
   fclose(file);
-  if (strcmp(line, "Architecture: x86\n")) {
+  if (strncmp(line, "Architecture: x86", 17)) {
     fprintf(stderr, "hwloc/x86: Found non-x86 dumped cpuid summary in %s: %s\n", path, line);
     goto out_with_path;
   }

src/3rdparty/hwloc/src/topology-xml-nolibxml.c

@@ -1,6 +1,6 @@
 /*
  * Copyright © 2009 CNRS
- * Copyright © 2009-2020 Inria.  All rights reserved.
+ * Copyright © 2009-2024 Inria.  All rights reserved.
  * Copyright © 2009-2011 Université Bordeaux
  * Copyright © 2009-2011 Cisco Systems, Inc.  All rights reserved.
  * See COPYING in top-level directory.
@@ -41,7 +41,7 @@ typedef struct hwloc__nolibxml_import_state_data_s {
 static char *
 hwloc__nolibxml_import_ignore_spaces(char *buffer)
 {
-  return buffer + strspn(buffer, " \t\n");
+  return buffer + strspn(buffer, " \t\n\r");
 }
 
 static int

src/3rdparty/hwloc/src/topology-xml.c

@@ -1,6 +1,6 @@
 /*
  * Copyright © 2009 CNRS
- * Copyright © 2009-2023 Inria.  All rights reserved.
+ * Copyright © 2009-2024 Inria.  All rights reserved.
  * Copyright © 2009-2011, 2020 Université Bordeaux
  * Copyright © 2009-2018 Cisco Systems, Inc.  All rights reserved.
  * See COPYING in top-level directory.
@@ -872,6 +872,10 @@ hwloc__xml_import_object(hwloc_topology_t topology,
 	  /* deal with possible future type */
 	  obj->type = HWLOC_OBJ_GROUP;
 	  obj->attr->group.kind = HWLOC_GROUP_KIND_INTEL_MODULE;
+	} else if (!strcasecmp(attrvalue, "Cluster")) {
+	  /* deal with possible future type */
+	  obj->type = HWLOC_OBJ_GROUP;
+	  obj->attr->group.kind = HWLOC_GROUP_KIND_LINUX_CLUSTER;
 	} else if (!strcasecmp(attrvalue, "MemCache")) {
 	  /* ignore possible future type */
 	  obj->type = _HWLOC_OBJ_FUTURE;
@@ -1344,7 +1348,7 @@ hwloc__xml_v2import_support(hwloc_topology_t topology,
     HWLOC_BUILD_ASSERT(sizeof(struct hwloc_topology_support) == 4*sizeof(void*));
     HWLOC_BUILD_ASSERT(sizeof(struct hwloc_topology_discovery_support) == 6);
     HWLOC_BUILD_ASSERT(sizeof(struct hwloc_topology_cpubind_support) == 11);
-    HWLOC_BUILD_ASSERT(sizeof(struct hwloc_topology_membind_support) == 15);
+    HWLOC_BUILD_ASSERT(sizeof(struct hwloc_topology_membind_support) == 16);
     HWLOC_BUILD_ASSERT(sizeof(struct hwloc_topology_misc_support) == 1);
 #endif
 
@@ -1378,6 +1382,7 @@ hwloc__xml_v2import_support(hwloc_topology_t topology,
     else DO(membind,firsttouch_membind);
     else DO(membind,bind_membind);
     else DO(membind,interleave_membind);
+    else DO(membind,weighted_interleave_membind);
     else DO(membind,nexttouch_membind);
     else DO(membind,migrate_membind);
     else DO(membind,get_area_memlocation);
@@ -1436,6 +1441,10 @@ hwloc__xml_v2import_distances(hwloc_topology_t topology,
     }
     else if (!strcmp(attrname, "kind")) {
       kind = strtoul(attrvalue, NULL, 10);
+      /* forward compat with "HOPS" kind in v3 */
+      if (kind & (1UL<<5))
+        /* hops becomes latency */
+        kind = (kind & ~(1UL<<5)) | HWLOC_DISTANCES_KIND_MEANS_LATENCY;
     }
     else if (!strcmp(attrname, "name")) {
       name = attrvalue;
@@ -3087,7 +3096,7 @@ hwloc__xml_v2export_support(hwloc__xml_export_state_t parentstate, hwloc_topolog
   HWLOC_BUILD_ASSERT(sizeof(struct hwloc_topology_support) == 4*sizeof(void*));
   HWLOC_BUILD_ASSERT(sizeof(struct hwloc_topology_discovery_support) == 6);
   HWLOC_BUILD_ASSERT(sizeof(struct hwloc_topology_cpubind_support) == 11);
-  HWLOC_BUILD_ASSERT(sizeof(struct hwloc_topology_membind_support) == 15);
+  HWLOC_BUILD_ASSERT(sizeof(struct hwloc_topology_membind_support) == 16);
   HWLOC_BUILD_ASSERT(sizeof(struct hwloc_topology_misc_support) == 1);
 #endif
 
@@ -3132,6 +3141,7 @@ hwloc__xml_v2export_support(hwloc__xml_export_state_t parentstate, hwloc_topolog
   DO(membind,firsttouch_membind);
   DO(membind,bind_membind);
   DO(membind,interleave_membind);
+  DO(membind,weighted_interleave_membind);
   DO(membind,nexttouch_membind);
   DO(membind,migrate_membind);
   DO(membind,get_area_memlocation);

src/3rdparty/hwloc/src/topology.c

@@ -465,6 +465,20 @@ hwloc_debug_print_objects(int indent __hwloc_attribute_unused, hwloc_obj_t obj)
 #define hwloc_debug_print_objects(indent, obj) do { /* nothing */ } while (0)
 #endif /* !HWLOC_DEBUG */
 
+int hwloc_obj_set_subtype(hwloc_topology_t topology __hwloc_attribute_unused, hwloc_obj_t obj, const char *subtype)
+{
+  char *new = NULL;
+  if (subtype) {
+    new = strdup(subtype);
+    if (!new)
+      return -1;
+  }
+  if (obj->subtype)
+    free(obj->subtype);
+  obj->subtype = new;
+  return 0;
+}
+
 void hwloc__free_infos(struct hwloc_info_s *infos, unsigned count)
 {
   unsigned i;

src/backend/common/Hashrate.cpp

@@ -30,10 +30,10 @@
 #include "base/tools/Handle.h"
 
 
-inline static const char *format(double h, char *buf, size_t size)
+inline static const char *format(std::pair<bool, double> h, char *buf, size_t size)
 {
-    if (std::isnormal(h)) {
+    if (h.first) {
-        snprintf(buf, size, (h < 100.0) ? "%04.2f" : "%03.1f", h);
+        snprintf(buf, size, (h.second < 100.0) ? "%04.2f" : "%03.1f", h.second);
         return buf;
     }
 
@@ -80,15 +80,16 @@ double xmrig::Hashrate::average() const
 }
 
 
-const char *xmrig::Hashrate::format(double h, char *buf, size_t size)
+const char *xmrig::Hashrate::format(std::pair<bool, double> h, char *buf, size_t size)
 {
     return ::format(h, buf, size);
 }
 
 
-rapidjson::Value xmrig::Hashrate::normalize(double d)
+rapidjson::Value xmrig::Hashrate::normalize(std::pair<bool, double> d)
 {
-    return Json::normalize(d, false);
+    using namespace rapidjson;
+    return d.first ? Value(floor(d.second * 100.0) / 100.0) : Value(kNullType);
 }
 
 
@@ -122,11 +123,11 @@ rapidjson::Value xmrig::Hashrate::toJSON(size_t threadId, rapidjson::Document &d
 #endif
 
 
-double xmrig::Hashrate::hashrate(size_t index, size_t ms) const
+std::pair<bool, double> xmrig::Hashrate::hashrate(size_t index, size_t ms) const
 {
     assert(index < m_threads);
     if (index >= m_threads) {
-        return nan("");
+        return { false, 0.0 };
     }
 
     uint64_t earliestHashCount = 0;
@@ -157,17 +158,27 @@ double xmrig::Hashrate::hashrate(size_t index, size_t ms) const
     } while (idx != idx_start);
 
     if (!haveFullSet || earliestStamp == 0 || lastestStamp == 0) {
-        return nan("");
+        return { false, 0.0 };
     }
 
-    if (lastestStamp - earliestStamp == 0) {
+    if (lastestHashCnt == earliestHashCount) {
-        return nan("");
+        return { true, 0.0 };
+    }
+
+    if (lastestStamp == earliestStamp) {
+        return { false, 0.0 };
     }
 
     const auto hashes = static_cast<double>(lastestHashCnt - earliestHashCount);
-    const auto time   = static_cast<double>(lastestStamp - earliestStamp) / 1000.0;
+    const auto time   = static_cast<double>(lastestStamp - earliestStamp);
 
-    return hashes / time;
+    const auto hr = hashes * 1000.0 / time;
+
+    if (!std::isnormal(hr)) {
+        return { false, 0.0 };
+    }
+
+    return { true, hr };
 }
 
 

src/backend/common/Hashrate.h

@@ -47,16 +47,16 @@ public:
     Hashrate(size_t threads);
     ~Hashrate();
 
-    inline double calc(size_t ms) const                                     { const double data = hashrate(0U, ms); return std::isnormal(data) ? data : 0.0; }
+    inline std::pair<bool, double> calc(size_t ms) const                    { return hashrate(0U, ms); }
-    inline double calc(size_t threadId, size_t ms) const                    { return hashrate(threadId + 1, ms); }
+    inline std::pair<bool, double> calc(size_t threadId, size_t ms) const   { return hashrate(threadId + 1, ms); }
     inline size_t threads() const                                           { return m_threads > 0U ? m_threads - 1U : 0U; }
     inline void add(size_t threadId, uint64_t count, uint64_t timestamp)    { addData(threadId + 1U, count, timestamp); }
     inline void add(uint64_t count, uint64_t timestamp)                     { addData(0U, count, timestamp); }
 
     double average() const;
 
-    static const char *format(double h, char *buf, size_t size);
+    static const char *format(std::pair<bool, double> h, char *buf, size_t size);
-    static rapidjson::Value normalize(double d);
+    static rapidjson::Value normalize(std::pair<bool, double> d);
 
 #   ifdef XMRIG_FEATURE_API
     rapidjson::Value toJSON(rapidjson::Document &doc) const;
@@ -64,7 +64,7 @@ public:
 #   endif
 
 private:
-    double hashrate(size_t index, size_t ms) const;
+    std::pair<bool, double> hashrate(size_t index, size_t ms) const;
     void addData(size_t index, uint64_t count, uint64_t timestamp);
 
     constexpr static size_t kBucketSize = 2 << 11;

src/backend/common/misc/PciTopology.h

@@ -1,6 +1,6 @@
 /* XMRig
- * Copyright (c) 2018-2021 SChernykh   <https://github.com/SChernykh>
+ * Copyright (c) 2018-2024 SChernykh   <https://github.com/SChernykh>
- * Copyright (c) 2016-2021 XMRig       <https://github.com/xmrig>, <support@xmrig.com>
+ * Copyright (c) 2016-2024 XMRig       <https://github.com/xmrig>, <support@xmrig.com>
  *
  *   This program is free software: you can redistribute it and/or modify
  *   it under the terms of the GNU General Public License as published by
@@ -19,10 +19,8 @@
 #ifndef XMRIG_PCITOPOLOGY_H
 #define XMRIG_PCITOPOLOGY_H
 
-
 #include <cstdio>
 
-
 #include "base/tools/String.h"
 
 
@@ -33,7 +31,14 @@ class PciTopology
 {
 public:
     PciTopology() = default;
-    PciTopology(uint32_t bus, uint32_t device, uint32_t function) : m_valid(true), m_bus(bus), m_device(device), m_function(function) {}
+
+    template<typename T>
+    inline PciTopology(T bus, T device, T function)
+        : m_valid(true),
+          m_bus(static_cast<uint8_t>(bus)),
+          m_device(static_cast<uint8_t>(device)),
+          m_function(static_cast<uint8_t>(function))
+    {}
 
     inline bool isEqual(const PciTopology &other) const     { return m_valid == other.m_valid && toUint32() == other.toUint32(); }
     inline bool isValid() const                             { return m_valid; }
@@ -70,4 +75,4 @@ private:
 } // namespace xmrig
 
 
-#endif /* XMRIG_PCITOPOLOGY_H */
+#endif // XMRIG_PCITOPOLOGY_H

src/backend/cpu/CpuWorker.cpp

@@ -359,7 +359,9 @@ void xmrig::CpuWorker<N>::start()
             }
         }
 
-        consumeJob();
+        if (!Nonce::isPaused()) {
+            consumeJob();
+        }
     }
 }
 

src/backend/cpu/platform/HwlocCpuInfo.cpp

@@ -326,7 +326,8 @@ void xmrig::HwlocCpuInfo::processTopLevelCache(hwloc_obj_t cache, const Algorith
         }
     }
 
-    if (scratchpad == 2 * oneMiB) {
+    // This code is supposed to run only on Intel CPUs
+    if ((vendor() == VENDOR_INTEL) && (scratchpad == 2 * oneMiB)) {
         if (L2 && (cores.size() * oneMiB) == L2 && L2_associativity == 16 && L3 >= L2) {
             L3    = L2;
             extra = L2;
@@ -341,7 +342,7 @@ void xmrig::HwlocCpuInfo::processTopLevelCache(hwloc_obj_t cache, const Algorith
     }
 
 #   ifdef XMRIG_ALGO_RANDOMX
-    if ((algorithm.family() == Algorithm::RANDOM_X) && L3_exclusive && (PUs > cores.size()) && (PUs < cores.size() * 2)) {
+    if ((vendor() == VENDOR_INTEL) && (algorithm.family() == Algorithm::RANDOM_X) && L3_exclusive && (PUs < cores.size() * 2)) {
         // Use all L3+L2 on latest Intel CPUs with P-cores, E-cores and exclusive L3 cache
         cacheHashes = (L3 + L2) / scratchpad;
     }

src/backend/cuda/CudaBackend.cpp

@@ -1,6 +1,6 @@
 /* XMRig
- * Copyright (c) 2018-2021 SChernykh   <https://github.com/SChernykh>
+ * Copyright (c) 2018-2024 SChernykh   <https://github.com/SChernykh>
- * Copyright (c) 2016-2021 XMRig       <https://github.com/xmrig>, <support@xmrig.com>
+ * Copyright (c) 2016-2024 XMRig       <https://github.com/xmrig>, <support@xmrig.com>
  *
  *   This program is free software: you can redistribute it and/or modify
  *   it under the terms of the GNU General Public License as published by
@@ -227,7 +227,7 @@ public:
 #           endif
 
             Log::print("|" CYAN_BOLD("%3zu") " |" CYAN_BOLD("%4u") " |" YELLOW(" %7s") " |" CYAN_BOLD("%10d") " |" CYAN_BOLD("%8d") " |"
-                       CYAN_BOLD("%7d") " |" CYAN_BOLD("%3d") " |" CYAN_BOLD("%4d") " |" CYAN("%7zu") " | " GREEN("%s"),
+                       CYAN_BOLD("%7d") " |" CYAN_BOLD("%3d") " |" CYAN_BOLD("%4d") " |" CYAN("%7zu") " | " GREEN_BOLD("%s"),
                        i,
                        data.thread.index(),
                        data.device.topology().toString().data(),
@@ -372,15 +372,20 @@ void xmrig::CudaBackend::printHashrate(bool details)
 
     char num[16 * 3] = { 0 };
 
-    const double hashrate_short  = hashrate()->calc(Hashrate::ShortInterval);
+    auto hashrate_short  = hashrate()->calc(Hashrate::ShortInterval);
-    const double hashrate_medium = hashrate()->calc(Hashrate::MediumInterval);
+    auto hashrate_medium = hashrate()->calc(Hashrate::MediumInterval);
-    const double hashrate_large  = hashrate()->calc(Hashrate::LargeInterval);
+    auto hashrate_large  = hashrate()->calc(Hashrate::LargeInterval);
 
     double scale = 1.0;
     const char* h = " H/s";
 
-    if ((hashrate_short >= 1e6) || (hashrate_medium >= 1e6) || (hashrate_large >= 1e6)) {
+    if ((hashrate_short.second >= 1e6) || (hashrate_medium.second >= 1e6) || (hashrate_large.second >= 1e6)) {
         scale = 1e-6;
+
+        hashrate_short.second  *= scale;
+        hashrate_medium.second *= scale;
+        hashrate_large.second  *= scale;
+
         h = "MH/s";
     }
 
@@ -388,12 +393,20 @@ void xmrig::CudaBackend::printHashrate(bool details)
 
     size_t i = 0;
     for (const auto& data : d_ptr->threads) {
-         Log::print("| %8zu | %8" PRId64 " | %8s | %8s | %8s |" CYAN_BOLD(" #%u") YELLOW(" %s") GREEN(" %s"),
+        auto h0 = hashrate()->calc(i, Hashrate::ShortInterval);
+        auto h1 = hashrate()->calc(i, Hashrate::MediumInterval);
+        auto h2 = hashrate()->calc(i, Hashrate::LargeInterval);
+
+        h0.second *= scale;
+        h1.second *= scale;
+        h2.second *= scale;
+
+        Log::print("| %8zu | %8" PRId64 " | %8s | %8s | %8s |" CYAN_BOLD(" #%u") YELLOW(" %s") GREEN(" %s"),
                     i,
                     data.thread.affinity(),
-                    Hashrate::format(hashrate()->calc(i, Hashrate::ShortInterval)  * scale, num,          sizeof num / 3),
+                    Hashrate::format(h0, num,          sizeof num / 3),
-                    Hashrate::format(hashrate()->calc(i, Hashrate::MediumInterval) * scale, num + 16,      sizeof num / 3),
+                    Hashrate::format(h1, num + 16,     sizeof num / 3),
-                    Hashrate::format(hashrate()->calc(i, Hashrate::LargeInterval)  * scale, num + 16 * 2, sizeof num / 3),
+                    Hashrate::format(h2, num + 16 * 2, sizeof num / 3),
                     data.device.index(),
                     data.device.topology().toString().data(),
                     data.device.name().data()
@@ -403,9 +416,9 @@ void xmrig::CudaBackend::printHashrate(bool details)
     }
 
     Log::print(WHITE_BOLD_S "|        - |        - | %8s | %8s | %8s |",
-               Hashrate::format(hashrate_short  * scale, num,          sizeof num / 3),
+               Hashrate::format(hashrate_short , num,          sizeof num / 3),
-               Hashrate::format(hashrate_medium * scale, num + 16,     sizeof num / 3),
+               Hashrate::format(hashrate_medium, num + 16,     sizeof num / 3),
-               Hashrate::format(hashrate_large  * scale, num + 16 * 2, sizeof num / 3)
+               Hashrate::format(hashrate_large , num + 16 * 2, sizeof num / 3)
                );
 }
 

src/backend/cuda/CudaWorker.cpp

@@ -158,7 +158,7 @@ void xmrig::CudaWorker::start()
             std::this_thread::yield();
         }
 
-        if (!consumeJob()) {
+        if (isReady() && !consumeJob()) {
             return;
         }
     }

src/backend/cuda/runners/CudaRxRunner.cpp

@@ -5,8 +5,8 @@
  * Copyright 2014-2016 Wolf9466    <https://github.com/OhGodAPet>
  * Copyright 2016      Jay D Dee   <jayddee246@gmail.com>
  * Copyright 2017-2018 XMR-Stak    <https://github.com/fireice-uk>, <https://github.com/psychocrypt>
- * Copyright 2018-2019 SChernykh   <https://github.com/SChernykh>
+ * Copyright 2018-2024 SChernykh   <https://github.com/SChernykh>
- * Copyright 2016-2019 XMRig       <https://github.com/xmrig>, <support@xmrig.com>
+ * Copyright 2016-2024 XMRig       <https://github.com/xmrig>, <support@xmrig.com>
  *
  *   This program is free software: you can redistribute it and/or modify
  *   it under the terms of the GNU General Public License as published by
@@ -22,7 +22,6 @@
  *   along with this program. If not, see <http://www.gnu.org/licenses/>.
  */
 
-
 #include "backend/cuda/runners/CudaRxRunner.h"
 #include "backend/cuda/CudaLaunchData.h"
 #include "backend/cuda/wrappers/CudaLib.h"
@@ -55,12 +54,21 @@ bool xmrig::CudaRxRunner::run(uint32_t startNonce, uint32_t *rescount, uint32_t
 
 bool xmrig::CudaRxRunner::set(const Job &job, uint8_t *blob)
 {
+    if (!m_datasetHost && (m_seed != job.seed())) {
+        m_seed = job.seed();
+
+        if (m_ready) {
+            const auto *dataset = Rx::dataset(job, 0);
+            callWrapper(CudaLib::rxUpdateDataset(m_ctx, dataset->raw(), dataset->size(false)));
+        }
+    }
+
     const bool rc = CudaBaseRunner::set(job, blob);
     if (!rc || m_ready) {
         return rc;
     }
 
-    auto dataset = Rx::dataset(job, 0);
+    const auto *dataset = Rx::dataset(job, 0);
     m_ready = callWrapper(CudaLib::rxPrepare(m_ctx, dataset->raw(), dataset->size(false), m_datasetHost, m_intensity));
 
     return m_ready;

src/backend/cuda/runners/CudaRxRunner.h

@@ -5,8 +5,8 @@
  * Copyright 2014-2016 Wolf9466    <https://github.com/OhGodAPet>
  * Copyright 2016      Jay D Dee   <jayddee246@gmail.com>
  * Copyright 2017-2018 XMR-Stak    <https://github.com/fireice-uk>, <https://github.com/psychocrypt>
- * Copyright 2018-2019 SChernykh   <https://github.com/SChernykh>
+ * Copyright 2018-2024 SChernykh   <https://github.com/SChernykh>
- * Copyright 2016-2019 XMRig       <https://github.com/xmrig>, <support@xmrig.com>
+ * Copyright 2016-2024 XMRig       <https://github.com/xmrig>, <support@xmrig.com>
  *
  *   This program is free software: you can redistribute it and/or modify
  *   it under the terms of the GNU General Public License as published by
@@ -27,6 +27,7 @@
 
 
 #include "backend/cuda/runners/CudaBaseRunner.h"
+#include "base/tools/Buffer.h"
 
 
 namespace xmrig {
@@ -46,6 +47,7 @@ protected:
 private:
     bool m_ready             = false;
     const bool m_datasetHost = false;
+    Buffer m_seed;
     size_t m_intensity       = 0;
 };
 

src/backend/cuda/wrappers/CudaDevice.cpp

@@ -5,8 +5,8 @@
  * Copyright 2014-2016 Wolf9466    <https://github.com/OhGodAPet>
  * Copyright 2016      Jay D Dee   <jayddee246@gmail.com>
  * Copyright 2017-2018 XMR-Stak    <https://github.com/fireice-uk>, <https://github.com/psychocrypt>
- * Copyright 2018-2020 SChernykh   <https://github.com/SChernykh>
+ * Copyright 2018-2024 SChernykh   <https://github.com/SChernykh>
- * Copyright 2016-2020 XMRig       <https://github.com/xmrig>, <support@xmrig.com>
+ * Copyright 2016-2024 XMRig       <https://github.com/xmrig>, <support@xmrig.com>
  *
  *   This program is free software: you can redistribute it and/or modify
  *   it under the terms of the GNU General Public License as published by
@@ -22,7 +22,6 @@
  *   along with this program. If not, see <http://www.gnu.org/licenses/>.
  */
 
-
 #include "backend/cuda/wrappers/CudaDevice.h"
 #include "3rdparty/rapidjson/document.h"
 #include "backend/cuda/CudaThreads.h"
@@ -41,7 +40,7 @@
 xmrig::CudaDevice::CudaDevice(uint32_t index, int32_t bfactor, int32_t bsleep) :
     m_index(index)
 {
-    auto ctx = CudaLib::alloc(index, bfactor, bsleep);
+    auto *ctx = CudaLib::alloc(index, bfactor, bsleep);
     if (!CudaLib::deviceInfo(ctx, 0, 0, Algorithm::INVALID)) {
         CudaLib::release(ctx);
 
@@ -50,7 +49,7 @@ xmrig::CudaDevice::CudaDevice(uint32_t index, int32_t bfactor, int32_t bsleep) :
 
     m_ctx       = ctx;
     m_name      = CudaLib::deviceName(ctx);
-    m_topology  = PciTopology(CudaLib::deviceUint(ctx, CudaLib::DevicePciBusID), CudaLib::deviceUint(ctx, CudaLib::DevicePciDeviceID), 0);
+    m_topology  = { CudaLib::deviceUint(ctx, CudaLib::DevicePciBusID), CudaLib::deviceUint(ctx, CudaLib::DevicePciDeviceID), 0U };
 }
 
 

src/backend/cuda/wrappers/CudaLib.cpp

@@ -19,10 +19,10 @@
 #include <stdexcept>
 #include <uv.h>
 
-
 #include "backend/cuda/wrappers/CudaLib.h"
 #include "base/io/Env.h"
 #include "base/io/log/Log.h"
+#include "base/io/log/Tags.h"
 #include "base/kernel/Process.h"
 #include "crypto/rx/RxAlgo.h"
 
@@ -68,6 +68,7 @@ static const char *kPluginVersion                       = "pluginVersion";
 static const char *kRelease                             = "release";
 static const char *kRxHash                              = "rxHash";
 static const char *kRxPrepare                           = "rxPrepare";
+static const char *kRxUpdateDataset                     = "rxUpdateDataset";
 static const char *kSetJob                              = "setJob";
 static const char *kSetJob_v2                           = "setJob_v2";
 static const char *kVersion                             = "version";
@@ -92,6 +93,7 @@ using pluginVersion_t                                   = const char * (*)();
 using release_t                                         = void (*)(nvid_ctx *);
 using rxHash_t                                          = bool (*)(nvid_ctx *, uint32_t, uint64_t, uint32_t *, uint32_t *);
 using rxPrepare_t                                       = bool (*)(nvid_ctx *, const void *, size_t, bool, uint32_t);
+using rxUpdateDataset_t                                 = bool (*)(nvid_ctx *, const void *, size_t);
 using setJob_t                                          = bool (*)(nvid_ctx *, const void *, size_t, uint32_t);
 using setJob_v2_t                                       = bool (*)(nvid_ctx *, const void *, size_t, const char *);
 using version_t                                         = uint32_t (*)(Version);
@@ -116,6 +118,7 @@ static pluginVersion_t pPluginVersion                   = nullptr;
 static release_t pRelease                               = nullptr;
 static rxHash_t pRxHash                                 = nullptr;
 static rxPrepare_t pRxPrepare                           = nullptr;
+static rxUpdateDataset_t pRxUpdateDataset               = nullptr;
 static setJob_t pSetJob                                 = nullptr;
 static setJob_v2_t pSetJob_v2                           = nullptr;
 static version_t pVersion                               = nullptr;
@@ -202,10 +205,26 @@ bool xmrig::CudaLib::rxHash(nvid_ctx *ctx, uint32_t startNonce, uint64_t target,
 
 bool xmrig::CudaLib::rxPrepare(nvid_ctx *ctx, const void *dataset, size_t datasetSize, bool dataset_host, uint32_t batchSize) noexcept
 {
+#   ifdef XMRIG_ALGO_RANDOMX
+    if (!pRxUpdateDataset) {
+        LOG_WARN("%s" YELLOW_BOLD("CUDA plugin is outdated. Please update to the latest version"), Tags::randomx());
+    }
+#   endif
+
     return pRxPrepare(ctx, dataset, datasetSize, dataset_host, batchSize);
 }
 
 
+bool xmrig::CudaLib::rxUpdateDataset(nvid_ctx *ctx, const void *dataset, size_t datasetSize) noexcept
+{
+    if (pRxUpdateDataset) {
+        return pRxUpdateDataset(ctx, dataset, datasetSize);
+    }
+
+    return true;
+}
+
+
 bool xmrig::CudaLib::kawPowHash(nvid_ctx *ctx, uint8_t* job_blob, uint64_t target, uint32_t *rescount, uint32_t *resnonce, uint32_t *skipped_hashes) noexcept
 {
     return pKawPowHash(ctx, job_blob, target, rescount, resnonce, skipped_hashes);
@@ -401,5 +420,7 @@ void xmrig::CudaLib::load()
         DLSYM(SetJob_v2);
     }
 
+    uv_dlsym(&cudaLib, kRxUpdateDataset, reinterpret_cast<void**>(&pRxUpdateDataset));
+
     pInit();
 }

src/backend/cuda/wrappers/CudaLib.h

@@ -1,6 +1,6 @@
 /* XMRig
- * Copyright (c) 2018-2021 SChernykh   <https://github.com/SChernykh>
+ * Copyright (c) 2018-2024 SChernykh   <https://github.com/SChernykh>
- * Copyright (c) 2016-2021 XMRig       <https://github.com/xmrig>, <support@xmrig.com>
+ * Copyright (c) 2016-2024 XMRig       <https://github.com/xmrig>, <support@xmrig.com>
  *
  *   This program is free software: you can redistribute it and/or modify
  *   it under the terms of the GNU General Public License as published by
@@ -71,6 +71,7 @@ public:
     static bool deviceInit(nvid_ctx *ctx) noexcept;
     static bool rxHash(nvid_ctx *ctx, uint32_t startNonce, uint64_t target, uint32_t *rescount, uint32_t *resnonce) noexcept;
     static bool rxPrepare(nvid_ctx *ctx, const void *dataset, size_t datasetSize, bool dataset_host, uint32_t batchSize) noexcept;
+    static bool rxUpdateDataset(nvid_ctx *ctx, const void *dataset, size_t datasetSize) noexcept;
     static bool kawPowHash(nvid_ctx *ctx, uint8_t* job_blob, uint64_t target, uint32_t *rescount, uint32_t *resnonce, uint32_t *skipped_hashes) noexcept;
     static bool kawPowPrepare(nvid_ctx *ctx, const void* cache, size_t cache_size, const void* dag_precalc, size_t dag_size, uint32_t height, const uint64_t* dag_sizes) noexcept;
     static bool kawPowStopHash(nvid_ctx *ctx) noexcept;

src/backend/opencl/OclBackend.cpp

@@ -352,15 +352,20 @@ void xmrig::OclBackend::printHashrate(bool details)
 
     char num[16 * 3] = { 0 };
 
-    const double hashrate_short  = hashrate()->calc(Hashrate::ShortInterval);
+    auto hashrate_short = hashrate()->calc(Hashrate::ShortInterval);
-    const double hashrate_medium = hashrate()->calc(Hashrate::MediumInterval);
+    auto hashrate_medium = hashrate()->calc(Hashrate::MediumInterval);
-    const double hashrate_large  = hashrate()->calc(Hashrate::LargeInterval);
+    auto hashrate_large = hashrate()->calc(Hashrate::LargeInterval);
 
     double scale = 1.0;
     const char* h = " H/s";
 
-    if ((hashrate_short >= 1e6) || (hashrate_medium >= 1e6) || (hashrate_large >= 1e6)) {
+    if ((hashrate_short.second >= 1e6) || (hashrate_medium.second >= 1e6) || (hashrate_large.second >= 1e6)) {
         scale = 1e-6;
+
+        hashrate_short.second  *= scale;
+        hashrate_medium.second *= scale;
+        hashrate_large.second  *= scale;
+
         h = "MH/s";
     }
 
@@ -368,12 +373,16 @@ void xmrig::OclBackend::printHashrate(bool details)
 
     size_t i = 0;
     for (const auto& data : d_ptr->threads) {
-         Log::print("| %8zu | %8" PRId64 " | %8s | %8s | %8s |" CYAN_BOLD(" #%u") YELLOW(" %s") " %s",
+        auto h0 = hashrate()->calc(i, Hashrate::ShortInterval);
+        auto h1 = hashrate()->calc(i, Hashrate::MediumInterval);
+        auto h2 = hashrate()->calc(i, Hashrate::LargeInterval);
+
+        Log::print("| %8zu | %8" PRId64 " | %8s | %8s | %8s |" CYAN_BOLD(" #%u") YELLOW(" %s") " %s",
                     i,
                     data.affinity,
-                    Hashrate::format(hashrate()->calc(i, Hashrate::ShortInterval)  * scale, num,          sizeof num / 3),
+                    Hashrate::format(h0, num, sizeof num / 3),
-                    Hashrate::format(hashrate()->calc(i, Hashrate::MediumInterval) * scale, num + 16,     sizeof num / 3),
+                    Hashrate::format(h1, num + 16, sizeof num / 3),
-                    Hashrate::format(hashrate()->calc(i, Hashrate::LargeInterval)  * scale, num + 16 * 2, sizeof num / 3),
+                    Hashrate::format(h2, num + 16 * 2, sizeof num / 3),
                     data.device.index(),
                     data.device.topology().toString().data(),
                     data.device.printableName().data()
@@ -383,9 +392,9 @@ void xmrig::OclBackend::printHashrate(bool details)
     }
 
     Log::print(WHITE_BOLD_S "|        - |        - | %8s | %8s | %8s |",
-               Hashrate::format(hashrate_short  * scale, num,          sizeof num / 3),
+               Hashrate::format(hashrate_short , num,          sizeof num / 3),
-               Hashrate::format(hashrate_medium * scale, num + 16,     sizeof num / 3),
+               Hashrate::format(hashrate_medium, num + 16,     sizeof num / 3),
-               Hashrate::format(hashrate_large  * scale, num + 16 * 2, sizeof num / 3)
+               Hashrate::format(hashrate_large , num + 16 * 2, sizeof num / 3)
                );
 }
 

src/backend/opencl/OclWorker.cpp

@@ -190,7 +190,7 @@ void xmrig::OclWorker::start()
             std::this_thread::yield();
         }
 
-        if (!consumeJob()) {
+        if (isReady() && !consumeJob()) {
             return;
         }
     }

src/backend/opencl/opencl.cmake

@@ -5,13 +5,7 @@ if (BUILD_STATIC AND XMRIG_OS_UNIX AND WITH_OPENCL)
 endif()
 
 if (WITH_OPENCL)
-    add_definitions(/DXMRIG_FEATURE_OPENCL)
+    add_definitions(/DXMRIG_FEATURE_OPENCL /DCL_USE_DEPRECATED_OPENCL_1_2_APIS)
-    add_definitions(/DCL_USE_DEPRECATED_OPENCL_1_2_APIS)
-    if (XMRIG_OS_APPLE)
-        add_definitions(/DCL_TARGET_OPENCL_VERSION=120)
-    elseif (WITH_OPENCL_VERSION)
-        add_definitions(/DCL_TARGET_OPENCL_VERSION=${WITH_OPENCL_VERSION})
-    endif()
 
     set(HEADERS_BACKEND_OPENCL
         src/backend/opencl/cl/OclSource.h
@@ -71,6 +65,13 @@ if (WITH_OPENCL)
         src/backend/opencl/wrappers/OclPlatform.cpp
         )
 
+    if (XMRIG_OS_APPLE)
+        add_definitions(/DCL_TARGET_OPENCL_VERSION=120)
+        list(APPEND SOURCES_BACKEND_OPENCL src/backend/opencl/wrappers/OclDevice_mac.cpp)
+    elseif (WITH_OPENCL_VERSION)
+        add_definitions(/DCL_TARGET_OPENCL_VERSION=${WITH_OPENCL_VERSION})
+    endif()
+
     if (WIN32)
         list(APPEND SOURCES_BACKEND_OPENCL src/backend/opencl/OclCache_win.cpp)
     else()

src/backend/opencl/wrappers/OclDevice.cpp

@@ -1,6 +1,7 @@
 /* XMRig
- * Copyright (c) 2018-2021 SChernykh   <https://github.com/SChernykh>
+ * Copyright (c) 2021      Spudz76     <https://github.com/Spudz76>
- * Copyright (c) 2016-2021 XMRig       <https://github.com/xmrig>, <support@xmrig.com>
+ * Copyright (c) 2018-2024 SChernykh   <https://github.com/SChernykh>
+ * Copyright (c) 2016-2024 XMRig       <https://github.com/xmrig>, <support@xmrig.com>
  *
  *   This program is free software: you can redistribute it and/or modify
  *   it under the terms of the GNU General Public License as published by
@@ -17,6 +18,7 @@
  */
 
 #include "backend/opencl/wrappers/OclDevice.h"
+#include "3rdparty/fmt/core.h"
 #include "3rdparty/rapidjson/document.h"
 #include "backend/opencl/OclGenerator.h"
 #include "backend/opencl/OclThreads.h"
@@ -30,19 +32,21 @@
 
 
 #include <algorithm>
-
+#include <map>
-
-// NOLINTNEXTLINE(modernize-use-using)
-typedef union
-{
-    struct { cl_uint type; cl_uint data[5]; } raw;
-    struct { cl_uint type; cl_char unused[17]; cl_char bus; cl_char device; cl_char function; } pcie;
-} topology_amd;
 
 
 namespace xmrig {
 
 
+struct topology_amd {
+    cl_uint type;
+    cl_char unused[17];
+    cl_char bus;
+    cl_char device;
+    cl_char function;
+};
+
+
 #ifdef XMRIG_ALGO_RANDOMX
 extern bool ocl_generic_rx_generator(const OclDevice &device, const Algorithm &algorithm, OclThreads &threads);
 #endif
@@ -81,9 +85,11 @@ static OclVendor getPlatformVendorId(const String &vendor, const String &extensi
         return OCL_VENDOR_INTEL;
     }
 
+#   ifdef XMRIG_OS_APPLE
     if (extensions.contains("cl_APPLE_") || vendor.contains("Apple")) {
         return OCL_VENDOR_APPLE;
     }
+#   endif
 
     return OCL_VENDOR_UNKNOWN;
 }
@@ -103,117 +109,16 @@ static OclVendor getVendorId(const String &vendor)
         return OCL_VENDOR_INTEL;
     }
 
+#   ifdef XMRIG_OS_APPLE
     if (vendor.contains("Apple")) {
         return OCL_VENDOR_APPLE;
     }
+#   endif
 
     return OCL_VENDOR_UNKNOWN;
 }
 
 
-static OclDevice::Type getType(const String &name, const OclVendor platformVendorId)
-{
-    if (platformVendorId == OCL_VENDOR_APPLE) {
-        // Apple Platform: uses product names, not gfx# or codenames
-        if (name.contains("AMD Radeon")) {
-            if (name.contains(" 450 ") ||
-                name.contains(" 455 ") ||
-                name.contains(" 460 ")) {
-                return OclDevice::Baffin;
-            }
-
-            if (name.contains(" 555 ") || name.contains(" 555X ") ||
-                name.contains(" 560 ") || name.contains(" 560X ") ||
-                name.contains(" 570 ") || name.contains(" 570X ") ||
-                name.contains(" 575 ") || name.contains(" 575X ")) {
-                return OclDevice::Polaris;
-            }
-
-            if (name.contains(" 580 ") || name.contains(" 580X ")) {
-                return OclDevice::Ellesmere;
-            }
-
-            if (name.contains(" Vega ")) {
-                if (name.contains(" 48 ") ||
-                    name.contains(" 56 ") ||
-                    name.contains(" 64 ") ||
-                    name.contains(" 64X ")) {
-                    return OclDevice::Vega_10;
-                }
-                if (name.contains(" 16 ") ||
-                    name.contains(" 20 ") ||
-                    name.contains(" II ")) {
-                    return OclDevice::Vega_20;
-                }
-            }
-
-            if (name.contains(" 5700 ") || name.contains(" W5700X ")) {
-                return OclDevice::Navi_10;
-            }
-
-            if (name.contains(" 5600 ") || name.contains(" 5600M ")) {
-                return OclDevice::Navi_12;
-            }
-
-            if (name.contains(" 5300 ") || name.contains(" 5300M ") ||
-                name.contains(" 5500 ") || name.contains(" 5500M ")) {
-                return OclDevice::Navi_14;
-            }
-
-            if (name.contains(" W6800 ") || name.contains(" W6900X ")) {
-                return OclDevice::Navi_21;
-            }
-        }
-    }
-
-    if (name == "gfx900" || name == "gfx901") {
-        return OclDevice::Vega_10;
-    }
-
-    if (name == "gfx902" || name == "gfx903") {
-        return OclDevice::Raven;
-    }
-
-    if (name == "gfx906" || name == "gfx907") {
-        return OclDevice::Vega_20;
-    }
-
-    if (name == "gfx1010") {
-        return OclDevice::Navi_10;
-    }
-
-    if (name == "gfx1011") {
-        return OclDevice::Navi_12;
-    }
-
-    if (name == "gfx1012") {
-        return OclDevice::Navi_14;
-    }
-
-    if (name == "gfx1030") {
-        return OclDevice::Navi_21;
-    }
-
-    if (name == "gfx804") {
-        return OclDevice::Lexa;
-    }
-
-    if (name == "Baffin") {
-        return OclDevice::Baffin;
-    }
-
-    if (name.contains("Ellesmere")) {
-        return OclDevice::Ellesmere;
-    }
-
-    if (name == "gfx803" || name.contains("polaris")) {
-        return OclDevice::Polaris;
-    }
-
-    return OclDevice::Unknown;
-}
-
-
 } // namespace xmrig
 
 
@@ -231,21 +136,21 @@ xmrig::OclDevice::OclDevice(uint32_t index, cl_device_id id, cl_platform_id plat
 {
     m_vendorId  = getVendorId(m_vendor);
     m_platformVendorId = getPlatformVendorId(m_platformVendor, m_extensions);
-    m_type      = getType(m_name, m_platformVendorId);
+    m_type      = getType(m_name);
 
     if (m_extensions.contains("cl_amd_device_attribute_query")) {
-        topology_amd topology;
+        topology_amd topology{};
-
+        if (OclLib::getDeviceInfo(id, CL_DEVICE_TOPOLOGY_AMD, sizeof(topology), &topology) == CL_SUCCESS && topology.type == CL_DEVICE_TOPOLOGY_TYPE_PCIE_AMD) {
-        if (OclLib::getDeviceInfo(id, CL_DEVICE_TOPOLOGY_AMD, sizeof(topology), &topology, nullptr) == CL_SUCCESS && topology.raw.type == CL_DEVICE_TOPOLOGY_TYPE_PCIE_AMD) {
+            m_topology = { topology.bus, topology.device, topology.function };
-            m_topology = PciTopology(static_cast<uint32_t>(topology.pcie.bus), static_cast<uint32_t>(topology.pcie.device), static_cast<uint32_t>(topology.pcie.function));
         }
+
         m_board = OclLib::getString(id, CL_DEVICE_BOARD_NAME_AMD);
     }
     else if (m_extensions.contains("cl_nv_device_attribute_query")) {
         cl_uint bus = 0;
-        if (OclLib::getDeviceInfo(id, CL_DEVICE_PCI_BUS_ID_NV, sizeof (bus), &bus, nullptr) == CL_SUCCESS) {
+        if (OclLib::getDeviceInfo(id, CL_DEVICE_PCI_BUS_ID_NV, sizeof(bus), &bus) == CL_SUCCESS) {
             cl_uint slot  = OclLib::getUint(id, CL_DEVICE_PCI_SLOT_ID_NV);
-            m_topology = PciTopology(bus, (slot >> 3) & 0xff, slot & 7);
+            m_topology = { bus, (slot >> 3) & 0xff, slot & 7 };
         }
     }
 }
@@ -253,17 +158,11 @@ xmrig::OclDevice::OclDevice(uint32_t index, cl_device_id id, cl_platform_id plat
 
 xmrig::String xmrig::OclDevice::printableName() const
 {
-    const size_t size = m_board.size() + m_name.size() + 64;
-    char *buf         = new char[size]();
-
     if (m_board.isNull()) {
-        snprintf(buf, size, GREEN_BOLD("%s"), m_name.data());
+        return fmt::format(GREEN_BOLD("{}"), m_name).c_str();
-    }
-    else {
-        snprintf(buf, size, GREEN_BOLD("%s") " (" CYAN_BOLD("%s") ")", m_board.data(), m_name.data());
     }
 
-    return buf;
+    return fmt::format(GREEN_BOLD("{}") " (" CYAN_BOLD("{}") ")", m_board, m_name).c_str();
 }
 
 
@@ -311,3 +210,35 @@ void xmrig::OclDevice::toJSON(rapidjson::Value &out, rapidjson::Document &doc) c
 #   endif
 }
 #endif
+
+
+#ifndef XMRIG_OS_APPLE
+xmrig::OclDevice::Type xmrig::OclDevice::getType(const String &name)
+{
+    static std::map<const char *, OclDevice::Type> types = {
+        { "gfx900",     Vega_10 },
+        { "gfx901",     Vega_10 },
+        { "gfx902",     Raven },
+        { "gfx903",     Raven },
+        { "gfx906",     Vega_20 },
+        { "gfx907",     Vega_20 },
+        { "gfx1010",    Navi_10 },
+        { "gfx1011",    Navi_12 },
+        { "gfx1012",    Navi_14 },
+        { "gfx1030",    Navi_21 },
+        { "gfx804",     Lexa },
+        { "Baffin",     Baffin },
+        { "Ellesmere",  Ellesmere },
+        { "gfx803",     Polaris },
+        { "polaris",    Polaris },
+    };
+
+    for (auto &kv : types) {
+        if (name.contains(kv.first)) {
+            return kv.second;
+        }
+    }
+
+    return OclDevice::Unknown;
+}
+#endif

src/backend/opencl/wrappers/OclDevice.h

@@ -1,6 +1,6 @@
 /* XMRig
- * Copyright (c) 2018-2021 SChernykh   <https://github.com/SChernykh>
+ * Copyright (c) 2018-2024 SChernykh   <https://github.com/SChernykh>
- * Copyright (c) 2016-2021 XMRig       <https://github.com/xmrig>, <support@xmrig.com>
+ * Copyright (c) 2016-2024 XMRig       <https://github.com/xmrig>, <support@xmrig.com>
  *
  *   This program is free software: you can redistribute it and/or modify
  *   it under the terms of the GNU General Public License as published by
@@ -86,6 +86,8 @@ public:
 #   endif
 
 private:
+    static OclDevice::Type getType(const String &name);
+
     cl_device_id m_id               = nullptr;
     cl_platform_id m_platform       = nullptr;
     const String m_platformVendor;

src/backend/opencl/wrappers/OclDevice_mac.cpp

@@ -0,0 +1,77 @@
+/* XMRig
+ * Copyright (c) 2021      Spudz76     <https://github.com/Spudz76>
+ * Copyright (c) 2018-2024 SChernykh   <https://github.com/SChernykh>
+ * Copyright (c) 2016-2024 XMRig       <https://github.com/xmrig>, <support@xmrig.com>
+ *
+ *   This program is free software: you can redistribute it and/or modify
+ *   it under the terms of the GNU General Public License as published by
+ *   the Free Software Foundation, either version 3 of the License, or
+ *   (at your option) any later version.
+ *
+ *   This program is distributed in the hope that it will be useful,
+ *   but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ *   GNU General Public License for more details.
+ *
+ *   You should have received a copy of the GNU General Public License
+ *   along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include "backend/opencl/wrappers/OclDevice.h"
+
+
+xmrig::OclDevice::Type xmrig::OclDevice::getType(const String &name)
+{
+    // Apple Platform: uses product names, not gfx# or codenames
+    if (name.contains("AMD Radeon")) {
+        if (name.contains(" 450 ") ||
+            name.contains(" 455 ") ||
+            name.contains(" 460 ")) {
+            return Baffin;
+        }
+
+        if (name.contains(" 555 ") || name.contains(" 555X ") ||
+            name.contains(" 560 ") || name.contains(" 560X ") ||
+            name.contains(" 570 ") || name.contains(" 570X ") ||
+            name.contains(" 575 ") || name.contains(" 575X ")) {
+            return Polaris;
+        }
+
+        if (name.contains(" 580 ") || name.contains(" 580X ")) {
+            return Ellesmere;
+        }
+
+        if (name.contains(" Vega ")) {
+            if (name.contains(" 48 ") ||
+                name.contains(" 56 ") ||
+                name.contains(" 64 ") ||
+                name.contains(" 64X ")) {
+                return Vega_10;
+            }
+            if (name.contains(" 16 ") ||
+                name.contains(" 20 ") ||
+                name.contains(" II ")) {
+                return Vega_20;
+            }
+        }
+
+        if (name.contains(" 5700 ") || name.contains(" W5700X ")) {
+            return Navi_10;
+        }
+
+        if (name.contains(" 5600 ") || name.contains(" 5600M ")) {
+            return Navi_12;
+        }
+
+        if (name.contains(" 5300 ") || name.contains(" 5300M ") ||
+            name.contains(" 5500 ") || name.contains(" 5500M ")) {
+            return Navi_14;
+        }
+
+        if (name.contains(" W6800 ") || name.contains(" W6900X ")) {
+            return Navi_21;
+        }
+    }
+
+    return OclDevice::Unknown;
+}

src/base/api/interfaces/IApiRequest.h

@@ -52,6 +52,8 @@ public:
     enum RequestType {
         REQ_UNKNOWN,
         REQ_SUMMARY,
+        REQ_BACKENDS,
+        REQ_CONFIG,
         REQ_JSON_RPC
     };
 

src/base/api/requests/ApiRequest.h

@@ -60,7 +60,7 @@ protected:
     inline Source source() const override           { return m_source; }
     inline void done(int) override                  { m_state = STATE_DONE; }
 
-    int m_version       = 1;
+    int m_version       = 0;
     RequestType m_type  = REQ_UNKNOWN;
     State m_state       = STATE_NEW;
     String m_rpcMethod;

src/base/api/requests/HttpApiRequest.cpp

@@ -67,10 +67,33 @@ xmrig::HttpApiRequest::HttpApiRequest(const HttpData &req, bool restricted) :
     m_res(req.id()),
     m_url(req.url.c_str())
 {
-    if (method() == METHOD_GET) {
+    if (url().size() > 4 && memcmp(url().data(), "/", 1) == 0 && memcmp(url().data()+2, "/", 1) == 0) {
-        if (url() == "/1/summary" || url() == "/2/summary" || url() == "/api.json") {
+        if (memcmp(url().data(), "/2/", 3) == 0) {
-            m_type = REQ_SUMMARY;
+            m_version = 2;
+        } else if (memcmp(url().data(), "/1/", 3) == 0) {
+            m_version = 1;
         }
+        switch (url().size()) {
+        case 9:
+            if (memcmp(url().data()+3, "config", 6) == 0) {
+                m_type = REQ_CONFIG;
+            }
+            break;
+        case 10:
+            if (memcmp(url().data()+3, "summary", 7) == 0) {
+                m_type = REQ_SUMMARY;
+            }
+            break;
+        case 11:
+            if (memcmp(url().data()+3, "backends", 8) == 0) {
+                m_type = REQ_BACKENDS;
+            }
+            break;
+        }
+    }
+
+    if (url() == "/api.json") {
+            m_type = REQ_SUMMARY;
     }
 
     if (method() == METHOD_POST && url() == "/json_rpc") {
@@ -94,12 +117,6 @@ xmrig::HttpApiRequest::HttpApiRequest(const HttpData &req, bool restricted) :
 
         return;
     }
-
-    if (url().size() > 4) {
-        if (memcmp(url().data(), "/2/", 3) == 0) {
-            m_version = 2;
-        }
-    }
 }
 
 

src/base/kernel/Base.cpp

@@ -45,13 +45,6 @@
 #ifdef XMRIG_FEATURE_API
 #   include "base/api/Api.h"
 #   include "base/api/interfaces/IApiRequest.h"
-
-namespace xmrig {
-
-static const char *kConfigPathV1 = "/1/config";
-static const char *kConfigPathV2 = "/2/config";
-
-} // namespace xmrig
 #endif
 
 
@@ -317,7 +310,7 @@ void xmrig::Base::onFileChanged(const String &fileName)
 void xmrig::Base::onRequest(IApiRequest &request)
 {
     if (request.method() == IApiRequest::METHOD_GET) {
-        if (request.url() == kConfigPathV1 || request.url() == kConfigPathV2) {
+        if (request.type() == IApiRequest::REQ_CONFIG) {
             if (request.isRestricted()) {
                 return request.done(403);
             }
@@ -327,7 +320,7 @@ void xmrig::Base::onRequest(IApiRequest &request)
         }
     }
     else if (request.method() == IApiRequest::METHOD_PUT || request.method() == IApiRequest::METHOD_POST) {
-        if (request.url() == kConfigPathV1 || request.url() == kConfigPathV2) {
+        if (request.type() == IApiRequest::REQ_CONFIG) {
             request.accept();
 
             if (!reload(request.json())) {

src/base/kernel/Entry.cpp

@@ -5,8 +5,8 @@
  * Copyright 2014-2016 Wolf9466    <https://github.com/OhGodAPet>
  * Copyright 2016      Jay D Dee   <jayddee246@gmail.com>
  * Copyright 2017-2018 XMR-Stak    <https://github.com/fireice-uk>, <https://github.com/psychocrypt>
- * Copyright 2018-2019 SChernykh   <https://github.com/SChernykh>
+ * Copyright 2018-2024 SChernykh   <https://github.com/SChernykh>
- * Copyright 2016-2019 XMRig       <https://github.com/xmrig>, <support@xmrig.com>
+ * Copyright 2016-2024 XMRig       <https://github.com/xmrig>, <support@xmrig.com>
  *
  *   This program is free software: you can redistribute it and/or modify
  *   it under the terms of the GNU General Public License as published by
@@ -22,11 +22,9 @@
  *   along with this program. If not, see <http://www.gnu.org/licenses/>.
  */
 
-
 #include <cstdio>
 #include <uv.h>
 
-
 #ifdef XMRIG_FEATURE_TLS
 #   include <openssl/opensslv.h>
 #endif
@@ -66,13 +64,13 @@ static int showVersion()
 #   endif
 
     printf("\n features:"
-#   if defined(__i386__) || defined(_M_IX86)
+#   if defined(__x86_64__) || defined(_M_AMD64) || defined (__arm64__) || defined (__aarch64__)
-    " 32-bit"
-#   elif defined(__x86_64__) || defined(_M_AMD64)
     " 64-bit"
+#   else
+    " 32-bit"
 #   endif
 
-#   if defined(__AES__) || defined(_MSC_VER)
+#   if defined(__AES__) || defined(_MSC_VER) || defined(__ARM_FEATURE_CRYPTO)
     " AES"
 #   endif
     "\n");

src/core/Miner.cpp

@@ -173,7 +173,7 @@ public:
         Value total(kArrayType);
         Value threads(kArrayType);
 
-        double t[3] = { 0.0 };
+        std::pair<bool, double> t[3] = { { true, 0.0 }, { true, 0.0 }, { true, 0.0 } };
 
         for (IBackend *backend : backends) {
             const Hashrate *hr = backend->hashrate();
@@ -181,9 +181,13 @@ public:
                 continue;
             }
 
-            t[0] += hr->calc(Hashrate::ShortInterval);
+            const auto h0 = hr->calc(Hashrate::ShortInterval);
-            t[1] += hr->calc(Hashrate::MediumInterval);
+            const auto h1 = hr->calc(Hashrate::MediumInterval);
-            t[2] += hr->calc(Hashrate::LargeInterval);
+            const auto h2 = hr->calc(Hashrate::LargeInterval);
+
+            if (h0.first) { t[0].second += h0.second; } else { t[0].first = false; }
+            if (h1.first) { t[1].second += h1.second; } else { t[1].first = false; }
+            if (h2.first) { t[2].second += h2.second; } else { t[2].first = false; }
 
             if (version > 1) {
                 continue;
@@ -204,7 +208,7 @@ public:
         total.PushBack(Hashrate::normalize(t[2]),  allocator);
 
         hashrate.AddMember("total",   total, allocator);
-        hashrate.AddMember("highest", Hashrate::normalize(maxHashrate[algorithm]), allocator);
+        hashrate.AddMember("highest", Hashrate::normalize({ maxHashrate[algorithm] > 0.0, maxHashrate[algorithm] }), allocator);
 
         if (version == 1) {
             hashrate.AddMember("threads", threads, allocator);
@@ -283,7 +287,7 @@ public:
     void printHashrate(bool details)
     {
         char num[16 * 5] = { 0 };
-        double speed[3]  = { 0.0 };
+        std::pair<bool, double> speed[3] = { { true, 0.0 }, { true, 0.0 }, { true, 0.0 } };
         uint32_t count   = 0;
 
         double avg_hashrate = 0.0;
@@ -293,9 +297,13 @@ public:
             if (hashrate) {
                 ++count;
 
-                speed[0] += hashrate->calc(Hashrate::ShortInterval);
+                const auto h0 = hashrate->calc(Hashrate::ShortInterval);
-                speed[1] += hashrate->calc(Hashrate::MediumInterval);
+                const auto h1 = hashrate->calc(Hashrate::MediumInterval);
-                speed[2] += hashrate->calc(Hashrate::LargeInterval);
+                const auto h2 = hashrate->calc(Hashrate::LargeInterval);
+
+                if (h0.first) { speed[0].second += h0.second; } else { speed[0].first = false; }
+                if (h1.first) { speed[1].second += h1.second; } else { speed[1].first = false; }
+                if (h2.first) { speed[2].second += h2.second; } else { speed[2].first = false; }
 
                 avg_hashrate += hashrate->average();
             }
@@ -312,8 +320,13 @@ public:
         double scale  = 1.0;
         const char* h = "H/s";
 
-        if ((speed[0] >= 1e6) || (speed[1] >= 1e6) || (speed[2] >= 1e6) || (maxHashrate[algorithm] >= 1e6)) {
+        if ((speed[0].second >= 1e6) || (speed[1].second >= 1e6) || (speed[2].second >= 1e6) || (maxHashrate[algorithm] >= 1e6)) {
             scale = 1e-6;
+
+            speed[0].second *= scale;
+            speed[1].second *= scale;
+            speed[2].second *= scale;
+
             h = "MH/s";
         }
 
@@ -322,16 +335,16 @@ public:
 
 #       ifdef XMRIG_ALGO_GHOSTRIDER
         if (algorithm.family() == Algorithm::GHOSTRIDER) {
-            snprintf(avg_hashrate_buf, sizeof(avg_hashrate_buf), " avg " CYAN_BOLD("%s %s"), Hashrate::format(avg_hashrate * scale, num + 16 * 4, 16), h);
+            snprintf(avg_hashrate_buf, sizeof(avg_hashrate_buf), " avg " CYAN_BOLD("%s %s"), Hashrate::format({ true, avg_hashrate * scale }, num + 16 * 4, 16), h);
         }
 #       endif
 
         LOG_INFO("%s " WHITE_BOLD("speed") " 10s/60s/15m " CYAN_BOLD("%s") CYAN(" %s %s ") CYAN_BOLD("%s") " max " CYAN_BOLD("%s %s") "%s",
                  Tags::miner(),
-                 Hashrate::format(speed[0] * scale,                 num,          16),
+                 Hashrate::format(speed[0],                 num,          16),
-                 Hashrate::format(speed[1] * scale,                 num + 16,     16),
+                 Hashrate::format(speed[1],                 num + 16,     16),
-                 Hashrate::format(speed[2] * scale,                 num + 16 * 2, 16), h,
+                 Hashrate::format(speed[2],                 num + 16 * 2, 16), h,
-                 Hashrate::format(maxHashrate[algorithm] * scale,   num + 16 * 3, 16), h,
+                 Hashrate::format({ maxHashrate[algorithm] > 0.0, maxHashrate[algorithm] * scale },   num + 16 * 3, 16), h,
                  avg_hashrate_buf
                  );
 
@@ -576,6 +589,11 @@ void xmrig::Miner::setJob(const Job &job, bool donate)
 
 #   ifdef XMRIG_ALGO_RANDOMX
     const bool ready = d_ptr->initRX();
+
+    // Always reset nonce on RandomX dataset change
+    if (!ready) {
+        d_ptr->reset = true;
+    }
 #   else
     constexpr const bool ready = true;
 #   endif
@@ -641,7 +659,10 @@ void xmrig::Miner::onTimer(const Timer *)
         }
 
         if (backend->hashrate()) {
-            maxHashrate += backend->hashrate()->calc(Hashrate::ShortInterval);
+            const auto h = backend->hashrate()->calc(Hashrate::ShortInterval);
+            if (h.first) {
+                maxHashrate += h.second;
+            }
         }
     }
 
@@ -689,7 +710,7 @@ void xmrig::Miner::onRequest(IApiRequest &request)
             d_ptr->getMiner(request.reply(), request.doc(), request.version());
             d_ptr->getHashrate(request.reply(), request.doc(), request.version());
         }
-        else if (request.url() == "/2/backends") {
+        else if (request.type() == IApiRequest::REQ_BACKENDS && request.version() == 2) {
             request.accept();
 
             d_ptr->getBackends(request.reply(), request.doc());
@@ -711,6 +732,12 @@ void xmrig::Miner::onRequest(IApiRequest &request)
 
             stop();
         }
+        else if (request.rpcMethod() == "start") {
+            request.accept();
+
+            const auto config = d_ptr->controller->config();
+            onConfigChanged(config, config);
+        }
     }
 
     for (IBackend *backend : d_ptr->backends) {

src/crypto/ghostrider/README.md

@@ -16,7 +16,7 @@ xmrig -a gr -o rtm.suprnova.cc:4273 --tls -u WALLET_ADDRESS -p x
 
 You can use **rtm_ghostrider_example.cmd** as a template and put pool URL and your wallet address there. The general XMRig documentation is available [here](https://xmrig.com/docs/miner).
 
-**Using `--threads` or `-t` option is NOT recommended because it turns off advanced built-in config.** If you want to tweak the nubmer of threads used for GhostRider, it's recommended to start using config.json instead of command line. The best suitable command line option for this is `--cpu-max-threads-hint=N` where N can be between 0 and 100.
+**Using `--threads` or `-t` option is NOT recommended because it turns off advanced built-in config.** If you want to tweak the number of threads used for GhostRider, it's recommended to start using config.json instead of command line. The best suitable command line option for this is `--cpu-max-threads-hint=N` where N can be between 0 and 100.
 
 ## Performance
 

src/crypto/randomx/jit_compiler_x86.cpp

@@ -267,8 +267,8 @@ namespace randomx {
 						initDatasetAVX2 = false;
 						break;
 					case xmrig::ICpuInfo::ARCH_ZEN5:
-						// TODO: test it
+						// AVX2 init is 49% faster on Zen5
-						initDatasetAVX2 = false;
+						initDatasetAVX2 = true;
 						break;
 					}
 				}

src/crypto/rx/RxBasicStorage.cpp

@@ -1,7 +1,7 @@
 /* XMRig
  * Copyright (c) 2018-2019 tevador     <tevador@gmail.com>
- * Copyright (c) 2018-2020 SChernykh   <https://github.com/SChernykh>
+ * Copyright (c) 2018-2024 SChernykh   <https://github.com/SChernykh>
- * Copyright (c) 2016-2020 XMRig       <https://github.com/xmrig>, <support@xmrig.com>
+ * Copyright (c) 2016-2024 XMRig       <https://github.com/xmrig>, <support@xmrig.com>
  *
  *   This program is free software: you can redistribute it and/or modify
  *   it under the terms of the GNU General Public License as published by
@@ -17,9 +17,7 @@
  *   along with this program. If not, see <http://www.gnu.org/licenses/>.
  */
 
-
 #include "crypto/rx/RxBasicStorage.h"
-#include "backend/common/Tags.h"
 #include "base/io/log/Log.h"
 #include "base/io/log/Tags.h"
 #include "base/tools/Chrono.h"

src/crypto/rx/RxConfig.cpp

@@ -60,8 +60,6 @@ static const std::array<MsrItems, kMsrArraySize> msrPresets = {
     MsrItems{{ 0xC0011020, 0ULL }, { 0xC0011021, 0x40ULL, ~0x20ULL }, { 0xC0011022, 0x1510000ULL }, { 0xC001102b, 0x2000cc16ULL }},
     MsrItems{{ 0xC0011020, 0x0004480000000000ULL }, { 0xC0011021, 0x001c000200000040ULL, ~0x20ULL }, { 0xC0011022, 0xc000000401570000ULL }, { 0xC001102b, 0x2000cc10ULL }},
     MsrItems{{ 0xC0011020, 0x0004400000000000ULL }, { 0xC0011021, 0x0004000000000040ULL, ~0x20ULL }, { 0xC0011022, 0x8680000401570000ULL }, { 0xC001102b, 0x2040cc10ULL }},
-
-    // TODO: Tune it for Zen5 when it's available
     MsrItems{{ 0xC0011020, 0x0004400000000000ULL }, { 0xC0011021, 0x0004000000000040ULL, ~0x20ULL }, { 0xC0011022, 0x8680000401570000ULL }, { 0xC001102b, 0x2040cc10ULL }},
 
     MsrItems{{ 0x1a4, 0xf }},

src/version.h

@@ -22,7 +22,7 @@
 #define APP_ID        "xmrig"
 #define APP_NAME      "XMRig"
 #define APP_DESC      "XMRig miner"
-#define APP_VERSION   "6.22.0"
+#define APP_VERSION   "6.22.3-dev"
 #define APP_DOMAIN    "xmrig.com"
 #define APP_SITE      "www.xmrig.com"
 #define APP_COPYRIGHT "Copyright (C) 2016-2024 xmrig.com"
@@ -30,7 +30,7 @@
 
 #define APP_VER_MAJOR  6
 #define APP_VER_MINOR  22
-#define APP_VER_PATCH  0
+#define APP_VER_PATCH  3
 
 #ifdef _MSC_VER
 #   if (_MSC_VER >= 1930)