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Author SHA1 Message Date
XMRig
80ae339343 v6.12.2 2021-05-31 12:58:30 +07:00
XMRig
4d87555398 Merge branch 'dev' 2021-05-31 12:57:55 +07:00
xmrig
bef82c5de6 Update CHANGELOG.md 2021-05-30 21:28:28 +07:00
xmrig
b069ad5dd1 Merge pull request #2358 from zzjzxq33/patch-1
Update openssl version to 1.1.1k
2021-05-30 17:53:53 +07:00
xmrig
f6a0646271 Merge pull request #2401 from SChernykh/dev
RandomX: fix broken light mode mining
2021-05-22 18:54:29 +07:00
SChernykh
b5f1a1feae RandomX: fix broken light mode mining
It broke after #2395
2021-05-22 13:49:22 +02:00
XMRig
1ce059da1c Add "argon2/ninja" algorithm alias. 2021-05-22 15:10:50 +07:00
xmrig
2929451ee1 Merge pull request #2398 from SChernykh/dev
RandomX ARMv8: optimized dataset read
2021-05-21 09:58:54 +07:00
SChernykh
94fecb5e92 RandomX ARMv8: optimized dataset read
Break dependency from readReg2 and readReg3. It should run faster on superscalar and out-of-order CPUs i.e. Apple M1.
2021-05-20 21:24:28 +02:00
xmrig
3bfa5ea038 Merge pull request #2395 from SChernykh/dev
RandomX: rewrote dataset read code
2021-05-20 18:58:48 +07:00
SChernykh
ff82ca57f2 RandomX: rewrote dataset read code
Unified code for AMD and Intel
1% faster on Intel
0.15% faster on AMD Ryzen
2021-05-20 12:45:42 +02:00
xmrig
7f7b1fb073 Merge pull request #2393 from SChernykh/dev
RandomX: added BMI2 version for scratchpad prefetch
2021-05-19 22:54:58 +07:00
SChernykh
d443dd86f1 RandomX: added BMI2 version for scratchpad prefetch
Saves 1 instruction and 1 byte in the main loop.
2021-05-19 17:52:16 +02:00
xmrig
3ac8f6b23a Merge pull request #2386 from SChernykh/dev
Enabled IMUL_RCP optimization for light mode mining
2021-05-17 16:36:23 +07:00
SChernykh
9b1f020a8b Enabled IMUL_RCP optimization for light mode mining
Better fix for #2377
2021-05-17 11:26:40 +02:00
XMRig
8bf88a4e74 Merge branch 'Spudz76-dev-fixCLKawPowPlatformHandling' into dev 2021-05-16 10:10:33 +07:00
XMRig
08a2c143f5 Regenerate OpenCL headers. 2021-05-16 10:09:29 +07:00
Tony Butler
4eb9a1aad5 Fix CL code for KawPow where it assumes everything is AMD 2021-05-15 20:34:57 -06:00
xmrig
c8c40586a1 Merge pull request #2378 from SChernykh/dev
Fixed broken light mode mining on x86
2021-05-16 07:03:57 +07:00
SChernykh
29cb416107 Fixed broken light mode mining on x86 2021-05-15 21:41:39 +02:00
xmrig
465169ff12 Merge pull request #2375 from Spudz76/dev-fixMacOSCudaLoader
Fixup MacOS CUDA backend default loader name
2021-05-14 18:48:09 +07:00
Tony Butler
df2bcd8192 Fixup MacOS CUDA backend default loader name 2021-05-14 05:28:31 -06:00
zzjzxq33
d89bb56964 Update openssl version to 1.1.1k 2021-05-09 11:11:46 +08:00
XMRig
87a0864e3b ...and --cpu-affinity. 2021-05-08 04:36:09 +07:00
XMRig
ecf5579f36 #2351 Fixed help output for --cpu-priority option. 2021-05-08 04:34:22 +07:00
xmrig
d5523d819f Merge pull request #2341 from SChernykh/dev
Update sse2neon.h
2021-05-03 23:17:12 +07:00
SChernykh
dbda2e9ccd Update sse2neon.h 2021-05-03 18:08:59 +02:00
xmrig
8babd7bc0a Merge pull request #2340 from SChernykh/dev
Fix AES detection on FreeBSD on ARM
2021-05-03 19:06:49 +07:00
SChernykh
27ced139a6 Fix AES detection on FreeBSD on ARM 2021-05-03 09:57:43 +02:00
xmrig
b46849e813 Merge pull request #2322 from SChernykh/dev
Update randomx_boost.sh
2021-04-28 19:12:37 +07:00
SChernykh
a96a6108ff Update randomx_boost.sh
- Support builtin MSR, see #2283
- Added detection of AMD EPYC CPUs
2021-04-28 14:10:30 +02:00
xmrig
c50c78b700 Merge pull request #2312 from SChernykh/dev
Add  missing allow_writes=on to randomx_boost.sh
2021-04-25 20:46:07 +07:00
SChernykh
cd7ab2c79f Add missing allow_writes=on to randomx_boost.sh 2021-04-25 15:31:30 +02:00
XMRig
695fbc013b #2280 Disable GPU backends in benchmark mode. 2021-04-25 15:28:45 +07:00
XMRig
a403c53543 Merge branch 'jsonboss-patch-1' into dev 2021-04-24 23:22:56 +07:00
XMRig
e26fbc96e9 Removed unnecessary system call. 2021-04-24 23:22:10 +07:00
XMRig
259c165e60 Merge branch 'patch-1' of https://github.com/jsonboss/xmrig into jsonboss-patch-1 2021-04-24 22:14:59 +07:00
XMRig
7897bf02dc v6.12.2-dev 2021-04-24 01:53:07 +07:00
XMRig
05f62c5ccc Merge branch 'master' into dev 2021-04-24 01:52:37 +07:00
XMRig
d82e100e30 v6.12.1 2021-04-23 19:43:12 +07:00
XMRig
5f869a414c Merge branch 'dev' 2021-04-23 19:42:29 +07:00
xmrig
7fd6be7d83 Update CHANGELOG.md 2021-04-23 18:54:42 +07:00
xmrig
ae6c536e98 Merge pull request #2296 from SChernykh/dev
Fixed Zen3 asm for cn/upx2
2021-04-21 19:52:52 +07:00
XMRig
c66c593123 v6.12.1-dev 2021-04-21 19:51:03 +07:00
XMRig
b3788b2ba3 Merge branch 'master' into dev 2021-04-21 19:49:54 +07:00
SChernykh
b7adb34c37 Fixed Zen3 asm for cn/upx2
- Invalid rounding mode was used which caused rejected shares sometimes
- Also optimized CN implode/explode functions a bit.
2021-04-21 13:22:25 +02:00
XMRig
ace8409a56 v6.12.0 2021-04-20 20:55:58 +07:00
XMRig
e2c757d9dd Merge branch 'dev' 2021-04-20 20:55:35 +07:00
xmrig
da35de993f Update CHANGELOG.md 2021-04-19 23:20:10 +07:00
xmrig
854b7618ef Merge pull request #2289 from SChernykh/dev
RandomX: optimized IMUL_RCP instruction
2021-04-19 22:54:02 +07:00
SChernykh
3477f9fbc1 RandomX: optimized IMUL_RCP instruction
+0.4% on AMD Zen2
+0.3% on AMD Zen3
+0.1% on Intel SandyBridge
+0.3% on rx/wow on Intel SandyBridge
2021-04-19 17:43:58 +02:00
xmrig
5799744f2f Update CHANGELOG.md 2021-04-19 20:56:45 +07:00
xmrig
61d165a314 Merge pull request #2287 from SChernykh/dev
Fixed rounding mode after running cn/upx
2021-04-19 18:06:16 +07:00
SChernykh
69186f2470 Optimized cn/upx for Zen3
0.9% faster
2021-04-19 12:29:44 +02:00
SChernykh
730d4a6cee Fix dvision by zero check in percent() 2021-04-19 12:05:07 +02:00
SChernykh
54bc91d5e3 Fixed rounding mode after running cn/upx 2021-04-19 12:02:57 +02:00
jsonboss
2012ffb231 support builtin msr 2021-04-19 10:38:27 +08:00
XMRig
5f9e0ebc6c v6.12.0-dev 2021-04-18 20:12:03 +07:00
xmrig
f314c69a70 Merge pull request #2278 from SChernykh/dev
Optimized cn/upx2
2021-04-17 23:41:26 +07:00
SChernykh
16fe462cad Optimized cn/upx2 for Ryzen CPUs 2021-04-17 18:18:26 +02:00
xmrig
e6e2987ddf Merge pull request #2276 from SChernykh/dev
Added support for Uplexa (cn/upx2 algorithm)
2021-04-17 20:10:54 +07:00
SChernykh
ed456b02cf Update CnHash.cpp 2021-04-17 15:06:31 +02:00
SChernykh
da7f5826cb Added support for Uplexa (cn/upx2 algorithm) 2021-04-17 14:53:42 +02:00
XMRig
6cb398bb42 Merge branch 'dev' of github.com:xmrig/xmrig into dev 2021-04-14 23:44:42 +07:00
XMRig
748be760e8 Added support for --user command line option for the benchmark. 2021-04-14 23:43:31 +07:00
xmrig
4a4118bb8e Merge pull request #2261 from SChernykh/dev
Show total hashrate if compiled without OpenCL
2021-04-13 19:06:42 +07:00
SChernykh
77f1bf0861 Show total hashrate if compiled without OpenCL 2021-04-13 14:02:29 +02:00
XMRig
6bb29b3e7b v6.11.3-dev 2021-04-11 21:13:39 +07:00
XMRig
f720772338 Merge branch 'master' into dev 2021-04-11 21:13:08 +07:00
XMRig
e53e48b88c v6.11.2 2021-04-11 17:24:46 +07:00
XMRig
ecf36ee891 Merge branch 'dev' 2021-04-11 17:24:23 +07:00
xmrig
23ef949dd3 Update CHANGELOG.md 2021-04-11 11:45:07 +07:00
XMRig
92e708c6e7 Update llhttp to v5.1.0 2021-04-10 21:23:32 +07:00
XMRig
30cfcc27db #2207 Fixed regression in HTTP parser. 2021-04-10 21:02:59 +07:00
XMRig
3c6077fb02 v6.11.2-dev 2021-04-08 00:33:01 +07:00
XMRig
63883b4fa7 Merge branch 'master' into dev 2021-04-08 00:32:21 +07:00
XMRig
0f83b5e06c v6.11.1 2021-04-07 10:34:37 +07:00
XMRig
637a333197 Merge branch 'dev' 2021-04-07 10:33:48 +07:00
xmrig
3171b06048 Update CHANGELOG.md 2021-04-07 10:32:17 +07:00
xmrig
2a66a0fa2f Merge pull request #2239 from SChernykh/dev
Fixed broken "coin" setting functionality
2021-04-07 10:30:28 +07:00
SChernykh
c080d5b962 Fixed broken "coin" setting functionality 2021-04-06 23:02:10 +02:00
76 changed files with 7948 additions and 6308 deletions

View File

@@ -1,3 +1,33 @@
# v6.12.2
- [#2280](https://github.com/xmrig/xmrig/issues/2280) GPU backends are now disabled in benchmark mode.
- [#2322](https://github.com/xmrig/xmrig/pull/2322) Improved MSR compatibility with recent Linux kernels and updated `randomx_boost.sh`.
- [#2340](https://github.com/xmrig/xmrig/pull/2340) Fixed AES detection on FreeBSD on ARM.
- [#2341](https://github.com/xmrig/xmrig/pull/2341) `sse2neon` updated to the latest version.
- [#2351](https://github.com/xmrig/xmrig/issues/2351) Fixed help output for `--cpu-priority` and `--cpu-affinity` option.
- [#2375](https://github.com/xmrig/xmrig/pull/2375) Fixed macOS CUDA backend default loader name.
- [#2378](https://github.com/xmrig/xmrig/pull/2378) Fixed broken light mode mining on x86.
- [#2379](https://github.com/xmrig/xmrig/pull/2379) Fixed CL code for KawPow where it assumes everything is AMD.
- [#2386](https://github.com/xmrig/xmrig/pull/2386) RandomX: enabled `IMUL_RCP` optimization for light mode mining.
- [#2393](https://github.com/xmrig/xmrig/pull/2393) RandomX: added BMI2 version for scratchpad prefetch.
- [#2395](https://github.com/xmrig/xmrig/pull/2395) RandomX: rewrote dataset read code.
- [#2398](https://github.com/xmrig/xmrig/pull/2398) RandomX: optimized ARMv8 dataset read.
- Added `argon2/ninja` alias for `argon2/wrkz` algorithm.
# v6.12.1
- [#2296](https://github.com/xmrig/xmrig/pull/2296) Fixed Zen3 assembly code for `cn/upx2` algorithm.
# v6.12.0
- [#2276](https://github.com/xmrig/xmrig/pull/2276) Added support for Uplexa (`cn/upx2` algorithm).
- [#2261](https://github.com/xmrig/xmrig/pull/2261) Show total hashrate if compiled without OpenCL.
- [#2289](https://github.com/xmrig/xmrig/pull/2289) RandomX: optimized `IMUL_RCP` instruction.
- Added support for `--user` command line option for online benchmark.
# v6.11.2
- [#2207](https://github.com/xmrig/xmrig/issues/2207) Fixed regression in HTTP parser and llhttp updated to v5.1.0.
# v6.11.1
- [#2239](https://github.com/xmrig/xmrig/pull/2239) Fixed broken `coin` setting functionality.
# v6.11.0
- [#2196](https://github.com/xmrig/xmrig/pull/2196) Improved DNS subsystem and added new DNS specific options.
- [#2172](https://github.com/xmrig/xmrig/pull/2172) Fixed build on Alpine 3.13.

View File

@@ -5,6 +5,7 @@ option(WITH_HWLOC "Enable hwloc support" ON)
option(WITH_CN_LITE "Enable CryptoNight-Lite algorithms family" ON)
option(WITH_CN_HEAVY "Enable CryptoNight-Heavy algorithms family" ON)
option(WITH_CN_PICO "Enable CryptoNight-Pico algorithm" ON)
option(WITH_CN_FEMTO "Enable CryptoNight-UPX2 algorithm" ON)
option(WITH_RANDOMX "Enable RandomX algorithms family" ON)
option(WITH_ARGON2 "Enable Argon2 algorithms family" ON)
option(WITH_ASTROBWT "Enable AstroBWT algorithms family" ON)
@@ -196,6 +197,10 @@ if (WITH_CN_PICO)
add_definitions(/DXMRIG_ALGO_CN_PICO)
endif()
if (WITH_CN_FEMTO)
add_definitions(/DXMRIG_ALGO_CN_FEMTO)
endif()
if (WITH_EMBEDDED_CONFIG)
add_definitions(/DXMRIG_FEATURE_EMBEDDED_CONFIG)
endif()

View File

@@ -1,6 +1,6 @@
#!/bin/bash -e
OPENSSL_VERSION="1.1.1j"
OPENSSL_VERSION="1.1.1k"
mkdir -p deps
mkdir -p deps/include
@@ -17,4 +17,4 @@ make -j$(nproc || sysctl -n hw.ncpu || sysctl -n hw.logicalcpu)
cp -fr include ../../deps
cp libcrypto.a ../../deps/lib
cp libssl.a ../../deps/lib
cd ..
cd ..

View File

@@ -1,28 +1,34 @@
#!/bin/bash
modprobe msr
MSR_FILE=/sys/module/msr/parameters/allow_writes
if cat /proc/cpuinfo | grep "AMD Ryzen" > /dev/null;
if test -e "$MSR_FILE"; then
echo on > $MSR_FILE
else
modprobe msr allow_writes=on
fi
if cat /proc/cpuinfo | grep -E 'AMD Ryzen|AMD EPYC' > /dev/null;
then
if cat /proc/cpuinfo | grep "cpu family[[:space:]]:[[:space:]]25" > /dev/null;
then
echo "Detected Ryzen (Zen3)"
echo "Detected Zen3 CPU"
wrmsr -a 0xc0011020 0x4480000000000
wrmsr -a 0xc0011021 0x1c000200000040
wrmsr -a 0xc0011022 0xc000000401500000
wrmsr -a 0xc001102b 0x2000cc14
echo "MSR register values for Ryzen (Zen3) applied"
echo "MSR register values for Zen3 applied"
else
echo "Detected Ryzen (Zen1/Zen2)"
echo "Detected Zen1/Zen2 CPU"
wrmsr -a 0xc0011020 0
wrmsr -a 0xc0011021 0x40
wrmsr -a 0xc0011022 0x1510000
wrmsr -a 0xc001102b 0x2000cc16
echo "MSR register values for Ryzen (Zen1/Zen2) applied"
echo "MSR register values for Zen1/Zen2 applied"
fi
elif cat /proc/cpuinfo | grep "Intel" > /dev/null;
then
echo "Detected Intel"
echo "Detected Intel CPU"
wrmsr -a 0x1a4 0xf
echo "MSR register values for Intel applied"
else

View File

@@ -24,6 +24,70 @@ void llhttp_init(llhttp_t* parser, llhttp_type_t type,
}
#if defined(__wasm__)
extern int wasm_on_message_begin(llhttp_t * p);
extern int wasm_on_url(llhttp_t* p, const char* at, size_t length);
extern int wasm_on_status(llhttp_t* p, const char* at, size_t length);
extern int wasm_on_header_field(llhttp_t* p, const char* at, size_t length);
extern int wasm_on_header_value(llhttp_t* p, const char* at, size_t length);
extern int wasm_on_headers_complete(llhttp_t * p);
extern int wasm_on_body(llhttp_t* p, const char* at, size_t length);
extern int wasm_on_message_complete(llhttp_t * p);
const llhttp_settings_t wasm_settings = {
wasm_on_message_begin,
wasm_on_url,
wasm_on_status,
wasm_on_header_field,
wasm_on_header_value,
wasm_on_headers_complete,
wasm_on_body,
wasm_on_message_complete,
NULL,
NULL,
};
llhttp_t* llhttp_alloc(llhttp_type_t type) {
llhttp_t* parser = malloc(sizeof(llhttp_t));
llhttp_init(parser, type, &wasm_settings);
return parser;
}
void llhttp_free(llhttp_t* parser) {
free(parser);
}
/* Some getters required to get stuff from the parser */
uint8_t llhttp_get_type(llhttp_t* parser) {
return parser->type;
}
uint8_t llhttp_get_http_major(llhttp_t* parser) {
return parser->http_major;
}
uint8_t llhttp_get_http_minor(llhttp_t* parser) {
return parser->http_minor;
}
uint8_t llhttp_get_method(llhttp_t* parser) {
return parser->method;
}
int llhttp_get_status_code(llhttp_t* parser) {
return parser->status_code;
}
uint8_t llhttp_get_upgrade(llhttp_t* parser) {
return parser->upgrade;
}
#endif // defined(__wasm__)
void llhttp_reset(llhttp_t* parser) {
llhttp_type_t type = parser->type;
const llhttp_settings_t* settings = parser->settings;
@@ -150,6 +214,7 @@ void llhttp_set_lenient_headers(llhttp_t* parser, int enabled) {
}
}
void llhttp_set_lenient_chunked_length(llhttp_t* parser, int enabled) {
if (enabled) {
parser->lenient_flags |= LENIENT_CHUNKED_LENGTH;
@@ -159,6 +224,14 @@ void llhttp_set_lenient_chunked_length(llhttp_t* parser, int enabled) {
}
void llhttp_set_lenient_keep_alive(llhttp_t* parser, int enabled) {
if (enabled) {
parser->lenient_flags |= LENIENT_KEEP_ALIVE;
} else {
parser->lenient_flags &= ~LENIENT_KEEP_ALIVE;
}
}
/* Callbacks */

View File

@@ -5,6 +5,12 @@ extern "C" {
#endif
#include <stddef.h>
#if defined(__wasm__)
#define LLHTTP_EXPORT __attribute__((visibility("default")))
#else
#define LLHTTP_EXPORT
#endif
typedef llhttp__internal_t llhttp_t;
typedef struct llhttp_settings_s llhttp_settings_t;
@@ -55,15 +61,46 @@ struct llhttp_settings_s {
* the `parser` here. In practice, `settings` has to be either a static
* variable or be allocated with `malloc`, `new`, etc.
*/
LLHTTP_EXPORT
void llhttp_init(llhttp_t* parser, llhttp_type_t type,
const llhttp_settings_t* settings);
#if defined(__wasm__)
LLHTTP_EXPORT
llhttp_t* llhttp_alloc(llhttp_type_t type);
LLHTTP_EXPORT
void llhttp_free(llhttp_t* parser);
LLHTTP_EXPORT
uint8_t llhttp_get_type(llhttp_t* parser);
LLHTTP_EXPORT
uint8_t llhttp_get_http_major(llhttp_t* parser);
LLHTTP_EXPORT
uint8_t llhttp_get_http_minor(llhttp_t* parser);
LLHTTP_EXPORT
uint8_t llhttp_get_method(llhttp_t* parser);
LLHTTP_EXPORT
int llhttp_get_status_code(llhttp_t* parser);
LLHTTP_EXPORT
uint8_t llhttp_get_upgrade(llhttp_t* parser);
#endif // defined(__wasm__)
/* Reset an already initialized parser back to the start state, preserving the
* existing parser type, callback settings, user data, and lenient flags.
*/
LLHTTP_EXPORT
void llhttp_reset(llhttp_t* parser);
/* Initialize the settings object */
LLHTTP_EXPORT
void llhttp_settings_init(llhttp_settings_t* settings);
/* Parse full or partial request/response, invoking user callbacks along the
@@ -82,6 +119,7 @@ void llhttp_settings_init(llhttp_settings_t* settings);
* to return the same error upon each successive call up until `llhttp_init()`
* is called.
*/
LLHTTP_EXPORT
llhttp_errno_t llhttp_execute(llhttp_t* parser, const char* data, size_t len);
/* This method should be called when the other side has no further bytes to
@@ -92,16 +130,19 @@ llhttp_errno_t llhttp_execute(llhttp_t* parser, const char* data, size_t len);
* connection. This method will invoke `on_message_complete()` callback if the
* request was terminated safely. Otherwise a error code would be returned.
*/
LLHTTP_EXPORT
llhttp_errno_t llhttp_finish(llhttp_t* parser);
/* Returns `1` if the incoming message is parsed until the last byte, and has
* to be completed by calling `llhttp_finish()` on EOF
*/
LLHTTP_EXPORT
int llhttp_message_needs_eof(const llhttp_t* parser);
/* Returns `1` if there might be any other messages following the last that was
* successfully parsed.
*/
LLHTTP_EXPORT
int llhttp_should_keep_alive(const llhttp_t* parser);
/* Make further calls of `llhttp_execute()` return `HPE_PAUSED` and set
@@ -110,6 +151,7 @@ int llhttp_should_keep_alive(const llhttp_t* parser);
* Important: do not call this from user callbacks! User callbacks must return
* `HPE_PAUSED` if pausing is required.
*/
LLHTTP_EXPORT
void llhttp_pause(llhttp_t* parser);
/* Might be called to resume the execution after the pause in user's callback.
@@ -117,6 +159,7 @@ void llhttp_pause(llhttp_t* parser);
*
* Call this only if `llhttp_execute()` returns `HPE_PAUSED`.
*/
LLHTTP_EXPORT
void llhttp_resume(llhttp_t* parser);
/* Might be called to resume the execution after the pause in user's callback.
@@ -124,9 +167,11 @@ void llhttp_resume(llhttp_t* parser);
*
* Call this only if `llhttp_execute()` returns `HPE_PAUSED_UPGRADE`
*/
LLHTTP_EXPORT
void llhttp_resume_after_upgrade(llhttp_t* parser);
/* Returns the latest return error */
LLHTTP_EXPORT
llhttp_errno_t llhttp_get_errno(const llhttp_t* parser);
/* Returns the verbal explanation of the latest returned error.
@@ -134,6 +179,7 @@ llhttp_errno_t llhttp_get_errno(const llhttp_t* parser);
* Note: User callback should set error reason when returning the error. See
* `llhttp_set_error_reason()` for details.
*/
LLHTTP_EXPORT
const char* llhttp_get_error_reason(const llhttp_t* parser);
/* Assign verbal description to the returned error. Must be called in user
@@ -141,6 +187,7 @@ const char* llhttp_get_error_reason(const llhttp_t* parser);
*
* Note: `HPE_USER` error code might be useful in user callbacks.
*/
LLHTTP_EXPORT
void llhttp_set_error_reason(llhttp_t* parser, const char* reason);
/* Returns the pointer to the last parsed byte before the returned error. The
@@ -148,12 +195,15 @@ void llhttp_set_error_reason(llhttp_t* parser, const char* reason);
*
* Note: this method might be useful for counting the number of parsed bytes.
*/
LLHTTP_EXPORT
const char* llhttp_get_error_pos(const llhttp_t* parser);
/* Returns textual name of error code */
LLHTTP_EXPORT
const char* llhttp_errno_name(llhttp_errno_t err);
/* Returns textual name of HTTP method */
LLHTTP_EXPORT
const char* llhttp_method_name(llhttp_method_t method);
@@ -166,6 +216,7 @@ const char* llhttp_method_name(llhttp_method_t method);
*
* **(USE AT YOUR OWN RISK)**
*/
LLHTTP_EXPORT
void llhttp_set_lenient_headers(llhttp_t* parser, int enabled);
@@ -179,8 +230,23 @@ void llhttp_set_lenient_headers(llhttp_t* parser, int enabled);
*
* **(USE AT YOUR OWN RISK)**
*/
LLHTTP_EXPORT
void llhttp_set_lenient_chunked_length(llhttp_t* parser, int enabled);
/* Enables/disables lenient handling of `Connection: close` and HTTP/1.0
* requests responses.
*
* Normally `llhttp` would error on (in strict mode) or discard (in loose mode)
* the HTTP request/response after the request/response with `Connection: close`
* and `Content-Length`. This is important to prevent cache poisoning attacks,
* but might interact badly with outdated and insecure clients. With this flag
* the extra request/response will be parsed normally.
*
* **(USE AT YOUR OWN RISK)**
*/
void llhttp_set_lenient_keep_alive(llhttp_t* parser, int enabled);
#ifdef __cplusplus
} /* extern "C" */
#endif

View File

@@ -627,6 +627,13 @@ int llhttp__internal__c_update_finish_1(
return 0;
}
int llhttp__internal__c_test_lenient_flags(
llhttp__internal_t* state,
const unsigned char* p,
const unsigned char* endp) {
return (state->lenient_flags & 4) == 4;
}
int llhttp__internal__c_test_flags_1(
llhttp__internal_t* state,
const unsigned char* p,
@@ -634,7 +641,7 @@ int llhttp__internal__c_test_flags_1(
return (state->flags & 544) == 544;
}
int llhttp__internal__c_test_lenient_flags(
int llhttp__internal__c_test_lenient_flags_1(
llhttp__internal_t* state,
const unsigned char* p,
const unsigned char* endp) {
@@ -802,7 +809,7 @@ int llhttp__internal__c_update_header_state_2(
return 0;
}
int llhttp__internal__c_test_lenient_flags_1(
int llhttp__internal__c_test_lenient_flags_2(
llhttp__internal_t* state,
const unsigned char* p,
const unsigned char* endp) {
@@ -1661,7 +1668,7 @@ static llparse_state_t llhttp__internal__run(
goto s_n_llhttp__internal__n_span_end_llhttp__on_header_value_2;
}
default: {
goto s_n_llhttp__internal__n_invoke_test_lenient_flags_1;
goto s_n_llhttp__internal__n_invoke_test_lenient_flags_2;
}
}
/* UNREACHABLE */;
@@ -5733,10 +5740,20 @@ static llparse_state_t llhttp__internal__run(
/* UNREACHABLE */;
abort();
}
s_n_llhttp__internal__n_invoke_test_lenient_flags: {
switch (llhttp__internal__c_test_lenient_flags(state, p, endp)) {
case 1:
goto s_n_llhttp__internal__n_invoke_update_finish_2;
default:
goto s_n_llhttp__internal__n_closed;
}
/* UNREACHABLE */;
abort();
}
s_n_llhttp__internal__n_invoke_update_finish_1: {
switch (llhttp__internal__c_update_finish_1(state, p, endp)) {
default:
goto s_n_llhttp__internal__n_closed;
goto s_n_llhttp__internal__n_invoke_test_lenient_flags;
}
/* UNREACHABLE */;
abort();
@@ -6098,8 +6115,8 @@ static llparse_state_t llhttp__internal__run(
/* UNREACHABLE */;
abort();
}
s_n_llhttp__internal__n_invoke_test_lenient_flags: {
switch (llhttp__internal__c_test_lenient_flags(state, p, endp)) {
s_n_llhttp__internal__n_invoke_test_lenient_flags_1: {
switch (llhttp__internal__c_test_lenient_flags_1(state, p, endp)) {
case 0:
goto s_n_llhttp__internal__n_error_15;
default:
@@ -6111,7 +6128,7 @@ static llparse_state_t llhttp__internal__run(
s_n_llhttp__internal__n_invoke_test_flags_1: {
switch (llhttp__internal__c_test_flags_1(state, p, endp)) {
case 1:
goto s_n_llhttp__internal__n_invoke_test_lenient_flags;
goto s_n_llhttp__internal__n_invoke_test_lenient_flags_1;
default:
goto s_n_llhttp__internal__n_invoke_llhttp__before_headers_complete;
}
@@ -6365,8 +6382,8 @@ static llparse_state_t llhttp__internal__run(
/* UNREACHABLE */;
abort();
}
s_n_llhttp__internal__n_invoke_test_lenient_flags_1: {
switch (llhttp__internal__c_test_lenient_flags_1(state, p, endp)) {
s_n_llhttp__internal__n_invoke_test_lenient_flags_2: {
switch (llhttp__internal__c_test_lenient_flags_2(state, p, endp)) {
case 1:
goto s_n_llhttp__internal__n_header_value_lenient;
default:
@@ -6727,7 +6744,7 @@ static llparse_state_t llhttp__internal__run(
abort();
}
s_n_llhttp__internal__n_error_29: {
state->error = 0x16;
state->error = 0x17;
state->reason = "Pause on PRI/Upgrade";
state->error_pos = (const char*) p;
state->_current = (void*) (intptr_t) s_error;
@@ -7906,6 +7923,7 @@ reset:
enum llparse_state_e {
s_error,
s_n_llhttp__internal__n_closed,
s_n_llhttp__internal__n_invoke_llhttp__after_message_complete,
s_n_llhttp__internal__n_pause_1,
s_n_llhttp__internal__n_invoke_is_equal_upgrade,
@@ -8199,6 +8217,13 @@ int llhttp__internal__c_update_finish_1(
return 0;
}
int llhttp__internal__c_test_lenient_flags(
llhttp__internal_t* state,
const unsigned char* p,
const unsigned char* endp) {
return (state->lenient_flags & 4) == 4;
}
int llhttp__internal__c_test_flags_1(
llhttp__internal_t* state,
const unsigned char* p,
@@ -8206,7 +8231,7 @@ int llhttp__internal__c_test_flags_1(
return (state->flags & 544) == 544;
}
int llhttp__internal__c_test_lenient_flags(
int llhttp__internal__c_test_lenient_flags_1(
llhttp__internal_t* state,
const unsigned char* p,
const unsigned char* endp) {
@@ -8278,7 +8303,7 @@ int llhttp__internal__c_or_flags(
return 0;
}
int llhttp__internal__c_update_finish_2(
int llhttp__internal__c_update_finish_3(
llhttp__internal_t* state,
const unsigned char* p,
const unsigned char* endp) {
@@ -8374,7 +8399,7 @@ int llhttp__internal__c_update_header_state_2(
return 0;
}
int llhttp__internal__c_test_lenient_flags_1(
int llhttp__internal__c_test_lenient_flags_2(
llhttp__internal_t* state,
const unsigned char* p,
const unsigned char* endp) {
@@ -8574,9 +8599,21 @@ static llparse_state_t llhttp__internal__run(
const unsigned char* endp) {
int match;
switch ((llparse_state_t) (intptr_t) state->_current) {
case s_n_llhttp__internal__n_closed:
s_n_llhttp__internal__n_closed: {
if (p == endp) {
return s_n_llhttp__internal__n_closed;
}
p++;
goto s_n_llhttp__internal__n_closed;
/* UNREACHABLE */;
abort();
}
case s_n_llhttp__internal__n_invoke_llhttp__after_message_complete:
s_n_llhttp__internal__n_invoke_llhttp__after_message_complete: {
switch (llhttp__after_message_complete(state, p, endp)) {
case 1:
goto s_n_llhttp__internal__n_invoke_update_finish_2;
default:
goto s_n_llhttp__internal__n_invoke_update_finish_1;
}
@@ -9045,7 +9082,7 @@ static llparse_state_t llhttp__internal__run(
case 3:
goto s_n_llhttp__internal__n_span_start_llhttp__on_body_1;
case 4:
goto s_n_llhttp__internal__n_invoke_update_finish_2;
goto s_n_llhttp__internal__n_invoke_update_finish_3;
case 5:
goto s_n_llhttp__internal__n_error_10;
default:
@@ -9184,7 +9221,7 @@ static llparse_state_t llhttp__internal__run(
goto s_n_llhttp__internal__n_span_end_llhttp__on_header_value_2;
}
default: {
goto s_n_llhttp__internal__n_invoke_test_lenient_flags_1;
goto s_n_llhttp__internal__n_invoke_test_lenient_flags_2;
}
}
/* UNREACHABLE */;
@@ -13077,7 +13114,7 @@ static llparse_state_t llhttp__internal__run(
/* UNREACHABLE */;
abort();
}
s_n_llhttp__internal__n_invoke_update_finish_1: {
s_n_llhttp__internal__n_invoke_update_finish_2: {
switch (llhttp__internal__c_update_finish_1(state, p, endp)) {
default:
goto s_n_llhttp__internal__n_start;
@@ -13085,6 +13122,24 @@ static llparse_state_t llhttp__internal__run(
/* UNREACHABLE */;
abort();
}
s_n_llhttp__internal__n_invoke_test_lenient_flags: {
switch (llhttp__internal__c_test_lenient_flags(state, p, endp)) {
case 1:
goto s_n_llhttp__internal__n_invoke_update_finish_2;
default:
goto s_n_llhttp__internal__n_closed;
}
/* UNREACHABLE */;
abort();
}
s_n_llhttp__internal__n_invoke_update_finish_1: {
switch (llhttp__internal__c_update_finish_1(state, p, endp)) {
default:
goto s_n_llhttp__internal__n_invoke_test_lenient_flags;
}
/* UNREACHABLE */;
abort();
}
s_n_llhttp__internal__n_pause_5: {
state->error = 0x15;
state->reason = "on_message_complete pause";
@@ -13311,8 +13366,8 @@ static llparse_state_t llhttp__internal__run(
/* UNREACHABLE */;
abort();
}
s_n_llhttp__internal__n_invoke_update_finish_2: {
switch (llhttp__internal__c_update_finish_2(state, p, endp)) {
s_n_llhttp__internal__n_invoke_update_finish_3: {
switch (llhttp__internal__c_update_finish_3(state, p, endp)) {
default:
goto s_n_llhttp__internal__n_span_start_llhttp__on_body_2;
}
@@ -13424,8 +13479,8 @@ static llparse_state_t llhttp__internal__run(
/* UNREACHABLE */;
abort();
}
s_n_llhttp__internal__n_invoke_test_lenient_flags: {
switch (llhttp__internal__c_test_lenient_flags(state, p, endp)) {
s_n_llhttp__internal__n_invoke_test_lenient_flags_1: {
switch (llhttp__internal__c_test_lenient_flags_1(state, p, endp)) {
case 0:
goto s_n_llhttp__internal__n_error_11;
default:
@@ -13437,7 +13492,7 @@ static llparse_state_t llhttp__internal__run(
s_n_llhttp__internal__n_invoke_test_flags_1: {
switch (llhttp__internal__c_test_flags_1(state, p, endp)) {
case 1:
goto s_n_llhttp__internal__n_invoke_test_lenient_flags;
goto s_n_llhttp__internal__n_invoke_test_lenient_flags_1;
default:
goto s_n_llhttp__internal__n_invoke_llhttp__before_headers_complete;
}
@@ -13673,8 +13728,8 @@ static llparse_state_t llhttp__internal__run(
/* UNREACHABLE */;
abort();
}
s_n_llhttp__internal__n_invoke_test_lenient_flags_1: {
switch (llhttp__internal__c_test_lenient_flags_1(state, p, endp)) {
s_n_llhttp__internal__n_invoke_test_lenient_flags_2: {
switch (llhttp__internal__c_test_lenient_flags_2(state, p, endp)) {
case 1:
goto s_n_llhttp__internal__n_header_value_lenient;
default:
@@ -14035,7 +14090,7 @@ static llparse_state_t llhttp__internal__run(
abort();
}
s_n_llhttp__internal__n_error_23: {
state->error = 0x16;
state->error = 0x17;
state->reason = "Pause on PRI/Upgrade";
state->error_pos = (const char*) p;
state->_current = (void*) (intptr_t) s_error;

View File

@@ -1,8 +1,8 @@
#ifndef INCLUDE_LLHTTP_H_
#define INCLUDE_LLHTTP_H_
#define LLHTTP_VERSION_MAJOR 4
#define LLHTTP_VERSION_MINOR 0
#define LLHTTP_VERSION_MAJOR 5
#define LLHTTP_VERSION_MINOR 1
#define LLHTTP_VERSION_PATCH 0
#ifndef LLHTTP_STRICT_MODE
@@ -79,7 +79,8 @@ enum llhttp_errno {
HPE_CB_CHUNK_COMPLETE = 20,
HPE_PAUSED = 21,
HPE_PAUSED_UPGRADE = 22,
HPE_USER = 23
HPE_PAUSED_H2_UPGRADE = 23,
HPE_USER = 24
};
typedef enum llhttp_errno llhttp_errno_t;
@@ -98,7 +99,8 @@ typedef enum llhttp_flags llhttp_flags_t;
enum llhttp_lenient_flags {
LENIENT_HEADERS = 0x1,
LENIENT_CHUNKED_LENGTH = 0x2
LENIENT_CHUNKED_LENGTH = 0x2,
LENIENT_KEEP_ALIVE = 0x4
};
typedef enum llhttp_lenient_flags llhttp_lenient_flags_t;
@@ -190,7 +192,8 @@ typedef enum llhttp_method llhttp_method_t;
XX(20, CB_CHUNK_COMPLETE, CB_CHUNK_COMPLETE) \
XX(21, PAUSED, PAUSED) \
XX(22, PAUSED_UPGRADE, PAUSED_UPGRADE) \
XX(23, USER, USER) \
XX(23, PAUSED_H2_UPGRADE, PAUSED_H2_UPGRADE) \
XX(24, USER, USER) \
#define HTTP_METHOD_MAP(XX) \
@@ -255,6 +258,12 @@ extern "C" {
#endif
#include <stddef.h>
#if defined(__wasm__)
#define LLHTTP_EXPORT __attribute__((visibility("default")))
#else
#define LLHTTP_EXPORT
#endif
typedef llhttp__internal_t llhttp_t;
typedef struct llhttp_settings_s llhttp_settings_t;
@@ -305,15 +314,46 @@ struct llhttp_settings_s {
* the `parser` here. In practice, `settings` has to be either a static
* variable or be allocated with `malloc`, `new`, etc.
*/
LLHTTP_EXPORT
void llhttp_init(llhttp_t* parser, llhttp_type_t type,
const llhttp_settings_t* settings);
#if defined(__wasm__)
LLHTTP_EXPORT
llhttp_t* llhttp_alloc(llhttp_type_t type);
LLHTTP_EXPORT
void llhttp_free(llhttp_t* parser);
LLHTTP_EXPORT
uint8_t llhttp_get_type(llhttp_t* parser);
LLHTTP_EXPORT
uint8_t llhttp_get_http_major(llhttp_t* parser);
LLHTTP_EXPORT
uint8_t llhttp_get_http_minor(llhttp_t* parser);
LLHTTP_EXPORT
uint8_t llhttp_get_method(llhttp_t* parser);
LLHTTP_EXPORT
int llhttp_get_status_code(llhttp_t* parser);
LLHTTP_EXPORT
uint8_t llhttp_get_upgrade(llhttp_t* parser);
#endif // defined(__wasm__)
/* Reset an already initialized parser back to the start state, preserving the
* existing parser type, callback settings, user data, and lenient flags.
*/
LLHTTP_EXPORT
void llhttp_reset(llhttp_t* parser);
/* Initialize the settings object */
LLHTTP_EXPORT
void llhttp_settings_init(llhttp_settings_t* settings);
/* Parse full or partial request/response, invoking user callbacks along the
@@ -332,6 +372,7 @@ void llhttp_settings_init(llhttp_settings_t* settings);
* to return the same error upon each successive call up until `llhttp_init()`
* is called.
*/
LLHTTP_EXPORT
llhttp_errno_t llhttp_execute(llhttp_t* parser, const char* data, size_t len);
/* This method should be called when the other side has no further bytes to
@@ -342,16 +383,19 @@ llhttp_errno_t llhttp_execute(llhttp_t* parser, const char* data, size_t len);
* connection. This method will invoke `on_message_complete()` callback if the
* request was terminated safely. Otherwise a error code would be returned.
*/
LLHTTP_EXPORT
llhttp_errno_t llhttp_finish(llhttp_t* parser);
/* Returns `1` if the incoming message is parsed until the last byte, and has
* to be completed by calling `llhttp_finish()` on EOF
*/
LLHTTP_EXPORT
int llhttp_message_needs_eof(const llhttp_t* parser);
/* Returns `1` if there might be any other messages following the last that was
* successfully parsed.
*/
LLHTTP_EXPORT
int llhttp_should_keep_alive(const llhttp_t* parser);
/* Make further calls of `llhttp_execute()` return `HPE_PAUSED` and set
@@ -360,6 +404,7 @@ int llhttp_should_keep_alive(const llhttp_t* parser);
* Important: do not call this from user callbacks! User callbacks must return
* `HPE_PAUSED` if pausing is required.
*/
LLHTTP_EXPORT
void llhttp_pause(llhttp_t* parser);
/* Might be called to resume the execution after the pause in user's callback.
@@ -367,6 +412,7 @@ void llhttp_pause(llhttp_t* parser);
*
* Call this only if `llhttp_execute()` returns `HPE_PAUSED`.
*/
LLHTTP_EXPORT
void llhttp_resume(llhttp_t* parser);
/* Might be called to resume the execution after the pause in user's callback.
@@ -374,9 +420,11 @@ void llhttp_resume(llhttp_t* parser);
*
* Call this only if `llhttp_execute()` returns `HPE_PAUSED_UPGRADE`
*/
LLHTTP_EXPORT
void llhttp_resume_after_upgrade(llhttp_t* parser);
/* Returns the latest return error */
LLHTTP_EXPORT
llhttp_errno_t llhttp_get_errno(const llhttp_t* parser);
/* Returns the verbal explanation of the latest returned error.
@@ -384,6 +432,7 @@ llhttp_errno_t llhttp_get_errno(const llhttp_t* parser);
* Note: User callback should set error reason when returning the error. See
* `llhttp_set_error_reason()` for details.
*/
LLHTTP_EXPORT
const char* llhttp_get_error_reason(const llhttp_t* parser);
/* Assign verbal description to the returned error. Must be called in user
@@ -391,6 +440,7 @@ const char* llhttp_get_error_reason(const llhttp_t* parser);
*
* Note: `HPE_USER` error code might be useful in user callbacks.
*/
LLHTTP_EXPORT
void llhttp_set_error_reason(llhttp_t* parser, const char* reason);
/* Returns the pointer to the last parsed byte before the returned error. The
@@ -398,12 +448,15 @@ void llhttp_set_error_reason(llhttp_t* parser, const char* reason);
*
* Note: this method might be useful for counting the number of parsed bytes.
*/
LLHTTP_EXPORT
const char* llhttp_get_error_pos(const llhttp_t* parser);
/* Returns textual name of error code */
LLHTTP_EXPORT
const char* llhttp_errno_name(llhttp_errno_t err);
/* Returns textual name of HTTP method */
LLHTTP_EXPORT
const char* llhttp_method_name(llhttp_method_t method);
@@ -416,6 +469,7 @@ const char* llhttp_method_name(llhttp_method_t method);
*
* **(USE AT YOUR OWN RISK)**
*/
LLHTTP_EXPORT
void llhttp_set_lenient_headers(llhttp_t* parser, int enabled);
@@ -429,8 +483,23 @@ void llhttp_set_lenient_headers(llhttp_t* parser, int enabled);
*
* **(USE AT YOUR OWN RISK)**
*/
LLHTTP_EXPORT
void llhttp_set_lenient_chunked_length(llhttp_t* parser, int enabled);
/* Enables/disables lenient handling of `Connection: close` and HTTP/1.0
* requests responses.
*
* Normally `llhttp` would error on (in strict mode) or discard (in loose mode)
* the HTTP request/response after the request/response with `Connection: close`
* and `Content-Length`. This is important to prevent cache poisoning attacks,
* but might interact badly with outdated and insecure clients. With this flag
* the extra request/response will be parsed normally.
*
* **(USE AT YOUR OWN RISK)**
*/
void llhttp_set_lenient_keep_alive(llhttp_t* parser, int enabled);
#ifdef __cplusplus
} /* extern "C" */
#endif

View File

@@ -334,13 +334,11 @@ void xmrig::CpuBackend::printHashrate(bool details)
i++;
}
# ifdef XMRIG_FEATURE_OPENCL
Log::print(WHITE_BOLD_S "| - | - | %7s | %7s | %7s |",
Hashrate::format(hashrate()->calc(Hashrate::ShortInterval), num, sizeof num / 3),
Hashrate::format(hashrate()->calc(Hashrate::MediumInterval), num + 8, sizeof num / 3),
Hashrate::format(hashrate()->calc(Hashrate::LargeInterval), num + 8 * 2, sizeof num / 3)
);
# endif
}

View File

@@ -197,6 +197,7 @@ void xmrig::CpuConfig::generate()
count += xmrig::generate<Algorithm::CN_LITE>(m_threads, m_limit);
count += xmrig::generate<Algorithm::CN_HEAVY>(m_threads, m_limit);
count += xmrig::generate<Algorithm::CN_PICO>(m_threads, m_limit);
count += xmrig::generate<Algorithm::CN_FEMTO>(m_threads, m_limit);
count += xmrig::generate<Algorithm::RANDOM_X>(m_threads, m_limit);
count += xmrig::generate<Algorithm::ARGON2>(m_threads, m_limit);
count += xmrig::generate<Algorithm::ASTROBWT>(m_threads, m_limit);

View File

@@ -100,6 +100,15 @@ size_t inline generate<Algorithm::CN_PICO>(Threads<CpuThreads> &threads, uint32_
#endif
#ifdef XMRIG_ALGO_CN_FEMTO
template<>
size_t inline generate<Algorithm::CN_FEMTO>(Threads<CpuThreads>& threads, uint32_t limit)
{
return generate("cn/upx2", threads, Algorithm::CN_UPX2, limit);
}
#endif
#ifdef XMRIG_ALGO_RANDOMX
template<>
size_t inline generate<Algorithm::RANDOM_X>(Threads<CpuThreads> &threads, uint32_t limit)

View File

@@ -193,6 +193,12 @@ bool xmrig::CpuWorker<N>::selfTest()
}
# endif
# ifdef XMRIG_ALGO_CN_FEMTO
if (m_algorithm.family() == Algorithm::CN_FEMTO) {
return verify(Algorithm::CN_UPX2, test_output_femto_upx2);
}
# endif
# ifdef XMRIG_ALGO_ARGON2
if (m_algorithm.family() == Algorithm::ARGON2) {
return verify(Algorithm::AR2_CHUKWA, argon2_chukwa_test_out) &&

View File

@@ -309,26 +309,34 @@ xmrig::CpuThreads xmrig::BasicCpuInfo::threads(const Algorithm &algorithm, uint3
return 1;
}
Algorithm::Family f = algorithm.family();
# ifdef XMRIG_ALGO_CN_LITE
if (algorithm.family() == Algorithm::CN_LITE) {
if (f == Algorithm::CN_LITE) {
return CpuThreads(count, 1);
}
# endif
# ifdef XMRIG_ALGO_CN_PICO
if (algorithm.family() == Algorithm::CN_PICO) {
if (f == Algorithm::CN_PICO) {
return CpuThreads(count, 2);
}
# endif
# ifdef XMRIG_ALGO_CN_FEMTO
if (f == Algorithm::CN_FEMTO) {
return CpuThreads(count, 2);
}
# endif
# ifdef XMRIG_ALGO_CN_HEAVY
if (algorithm.family() == Algorithm::CN_HEAVY) {
if (f == Algorithm::CN_HEAVY) {
return CpuThreads(std::max<size_t>(count / 4, 1), 1);
}
# endif
# ifdef XMRIG_ALGO_RANDOMX
if (algorithm.family() == Algorithm::RANDOM_X) {
if (f == Algorithm::RANDOM_X) {
if (algorithm == Algorithm::RX_WOW) {
return count;
}
@@ -338,13 +346,13 @@ xmrig::CpuThreads xmrig::BasicCpuInfo::threads(const Algorithm &algorithm, uint3
# endif
# ifdef XMRIG_ALGO_ARGON2
if (algorithm.family() == Algorithm::ARGON2) {
if (f == Algorithm::ARGON2) {
return count;
}
# endif
# ifdef XMRIG_ALGO_ASTROBWT
if (algorithm.family() == Algorithm::ASTROBWT) {
if (f == Algorithm::ASTROBWT) {
CpuThreads threads;
for (size_t i = 0; i < count; ++i) {
threads.add(i, 0);

View File

@@ -28,7 +28,15 @@
#if __ARM_FEATURE_CRYPTO && !defined(__APPLE__)
# include <sys/auxv.h>
# include <asm/hwcap.h>
# ifndef __FreeBSD__
# include <asm/hwcap.h>
# else
# include <stdint.h>
# include <machine/armreg.h>
# ifndef ID_AA64ISAR0_AES_VAL
# define ID_AA64ISAR0_AES_VAL ID_AA64ISAR0_AES
# endif
# endif
#endif
@@ -62,10 +70,13 @@ xmrig::BasicCpuInfo::BasicCpuInfo() :
# endif
# if __ARM_FEATURE_CRYPTO
# if !defined(__APPLE__)
m_flags.set(FLAG_AES, getauxval(AT_HWCAP) & HWCAP_AES);
# else
# if defined(__APPLE__)
m_flags.set(FLAG_AES, true);
# elif defined(__FreeBSD__)
uint64_t isar0 = READ_SPECIALREG(id_aa64isar0_el1);
m_flags.set(FLAG_AES, ID_AA64ISAR0_AES_VAL(isar0) >= ID_AA64ISAR0_AES_BASE);
# else
m_flags.set(FLAG_AES, getauxval(AT_HWCAP) & HWCAP_AES);
# endif
# endif

View File

@@ -336,11 +336,10 @@ void xmrig::HwlocCpuInfo::processTopLevelCache(hwloc_obj_t cache, const Algorith
size_t cacheHashes = ((L3 + extra) + (scratchpad / 2)) / scratchpad;
# ifdef XMRIG_ALGO_CN_PICO
if (intensity && algorithm == Algorithm::CN_PICO_0 && (cacheHashes / PUs) >= 2) {
Algorithm::Family family = algorithm.family();
if (intensity && ((family == Algorithm::CN_PICO) || (family == Algorithm::CN_FEMTO)) && (cacheHashes / PUs) >= 2) {
intensity = 2;
}
# endif
# ifdef XMRIG_ALGO_RANDOMX
if (extra == 0 && algorithm.l2() > 0) {

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@@ -179,6 +179,7 @@ void xmrig::CudaConfig::generate()
count += xmrig::generate<Algorithm::CN_LITE>(m_threads, devices);
count += xmrig::generate<Algorithm::CN_HEAVY>(m_threads, devices);
count += xmrig::generate<Algorithm::CN_PICO>(m_threads, devices);
count += xmrig::generate<Algorithm::CN_FEMTO>(m_threads, devices);
count += xmrig::generate<Algorithm::RANDOM_X>(m_threads, devices);
count += xmrig::generate<Algorithm::ASTROBWT>(m_threads, devices);
count += xmrig::generate<Algorithm::KAWPOW>(m_threads, devices);

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@@ -102,6 +102,15 @@ size_t inline generate<Algorithm::CN_PICO>(Threads<CudaThreads> &threads, const
#endif
#ifdef XMRIG_ALGO_CN_FEMTO
template<>
size_t inline generate<Algorithm::CN_FEMTO>(Threads<CudaThreads>& threads, const std::vector<CudaDevice>& devices)
{
return generate("cn/upx2", threads, Algorithm::CN_UPX2, devices);
}
#endif
#ifdef XMRIG_ALGO_RANDOMX
template<>
size_t inline generate<Algorithm::RANDOM_X>(Threads<CudaThreads> &threads, const std::vector<CudaDevice> &devices)

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@@ -48,7 +48,7 @@ enum Version : uint32_t
static uv_lib_t cudaLib;
#if defined(__APPLE__)
static String defaultLoader = "/System/Library/Frameworks/OpenCL.framework/OpenCL";
static String defaultLoader = "libxmrig-cuda.dylib";
#elif defined(_WIN32)
static String defaultLoader = "xmrig-cuda.dll";
#else

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@@ -219,6 +219,7 @@ void xmrig::OclConfig::generate()
count += xmrig::generate<Algorithm::CN_LITE>(m_threads, devices);
count += xmrig::generate<Algorithm::CN_HEAVY>(m_threads, devices);
count += xmrig::generate<Algorithm::CN_PICO>(m_threads, devices);
count += xmrig::generate<Algorithm::CN_FEMTO>(m_threads, devices);
count += xmrig::generate<Algorithm::RANDOM_X>(m_threads, devices);
count += xmrig::generate<Algorithm::ASTROBWT>(m_threads, devices);
count += xmrig::generate<Algorithm::KAWPOW>(m_threads, devices);

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@@ -101,6 +101,15 @@ size_t inline generate<Algorithm::CN_PICO>(Threads<OclThreads> &threads, const s
#endif
#ifdef XMRIG_ALGO_CN_FEMTO
template<>
size_t inline generate<Algorithm::CN_FEMTO>(Threads<OclThreads>& threads, const std::vector<OclDevice>& devices)
{
return generate("cn/upx2", threads, Algorithm::CN_UPX2, devices);
}
#endif
#ifdef XMRIG_ALGO_RANDOMX
template<>
size_t inline generate<Algorithm::RANDOM_X>(Threads<OclThreads> &threads, const std::vector<OclDevice> &devices)

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@@ -17,16 +17,17 @@
#define ALGO_CN_PICO_0 16
#define ALGO_CN_PICO_TLO 17
#define ALGO_CN_CCX 18
#define ALGO_RX_0 19
#define ALGO_RX_WOW 20
#define ALGO_RX_ARQMA 21
#define ALGO_RX_SFX 22
#define ALGO_RX_KEVA 23
#define ALGO_AR2_CHUKWA 24
#define ALGO_AR2_CHUKWA_V2 25
#define ALGO_AR2_WRKZ 26
#define ALGO_ASTROBWT_DERO 27
#define ALGO_KAWPOW_RVN 28
#define ALGO_CN_UPX2 19
#define ALGO_RX_0 20
#define ALGO_RX_WOW 21
#define ALGO_RX_ARQMA 22
#define ALGO_RX_SFX 23
#define ALGO_RX_KEVA 24
#define ALGO_AR2_CHUKWA 25
#define ALGO_AR2_CHUKWA_V2 26
#define ALGO_AR2_WRKZ 27
#define ALGO_ASTROBWT_DERO 28
#define ALGO_KAWPOW_RVN 29
#define FAMILY_UNKNOWN 0
#define FAMILY_CN 1

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@@ -514,7 +514,7 @@ __kernel void cn1(__global ulong *input, __global uint4 *Scratchpad, __global ul
c = AES_Round(AES0, AES1, AES2, AES3, c, ((uint4 *)a)[0]);
{
# if (ALGO == ALGO_CN_RWZ)
# if ((ALGO == ALGO_CN_RWZ) || (ALGO == ALGO_CN_UPX2))
const ulong2 chunk1 = as_ulong2(SCRATCHPAD_CHUNK(3));
const ulong2 chunk2 = as_ulong2(SCRATCHPAD_CHUNK(2));
const ulong2 chunk3 = as_ulong2(SCRATCHPAD_CHUNK(1));
@@ -561,7 +561,7 @@ __kernel void cn1(__global ulong *input, __global uint4 *Scratchpad, __global ul
t ^= chunk2;
const ulong2 chunk3 = as_ulong2(SCRATCHPAD_CHUNK(3));
# if (ALGO == ALGO_CN_RWZ)
# if ((ALGO == ALGO_CN_RWZ) || (ALGO == ALGO_CN_UPX2))
SCRATCHPAD_CHUNK(1) = as_uint4(chunk1 + bx1);
SCRATCHPAD_CHUNK(2) = as_uint4(chunk3 + bx0);
SCRATCHPAD_CHUNK(3) = as_uint4(chunk2 + ((ulong2 *)a)[0]);

File diff suppressed because it is too large Load Diff

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@@ -29,7 +29,11 @@ typedef unsigned long uint64_t;
#endif
#ifndef PLATFORM
#ifdef cl_amd_media_ops
#define PLATFORM OPENCL_PLATFORM_AMD
#else
#define PLATFORM OPENCL_PLATFORM_UNKNOWN
#endif
#endif
#define HASHES_PER_GROUP (GROUP_SIZE / PROGPOW_LANES)

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@@ -2,7 +2,7 @@
namespace xmrig {
static const char kawpow_cl[5870] = {
static const char kawpow_cl[5948] = {
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@@ -25,168 +25,170 @@ static const char kawpow_cl[5870] = {
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};
} // namespace xmrig

View File

@@ -2,7 +2,7 @@
namespace xmrig {
static const char kawpow_dag_cl[5990] = {
static const char kawpow_dag_cl[6068] = {
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@@ -25,172 +25,174 @@ static const char kawpow_dag_cl[5990] = {
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};
} // namespace xmrig

File diff suppressed because it is too large Load Diff

View File

@@ -88,7 +88,8 @@ static inline uint32_t getIntensity(const OclDevice &device, const Algorithm &al
static inline uint32_t getWorksize(const Algorithm &algorithm)
{
if (algorithm.family() == Algorithm::CN_PICO) {
Algorithm::Family f = algorithm.family();
if (f == Algorithm::CN_PICO || f == Algorithm::CN_FEMTO) {
return 64;
}

View File

@@ -39,10 +39,12 @@
xmrig::OclCnRunner::OclCnRunner(size_t index, const OclLaunchData &data) : OclBaseRunner(index, data)
{
uint32_t stridedIndex = data.thread.stridedIndex();
Algorithm::Family f = m_algorithm.family();
if (data.device.vendorId() == OCL_VENDOR_NVIDIA) {
stridedIndex = 0;
}
else if (stridedIndex == 1 && (m_algorithm.family() == Algorithm::CN_PICO || (m_algorithm.family() == Algorithm::CN && CnAlgo<>::base(m_algorithm) == Algorithm::CN_2))) {
else if (stridedIndex == 1 && (f == Algorithm::CN_PICO || f == Algorithm::CN_FEMTO || (f == Algorithm::CN && CnAlgo<>::base(m_algorithm) == Algorithm::CN_2))) {
stridedIndex = 2;
}

View File

@@ -6,8 +6,8 @@
* Copyright 2016 Jay D Dee <jayddee246@gmail.com>
* Copyright 2017-2018 XMR-Stak <https://github.com/fireice-uk>, <https://github.com/psychocrypt>
* Copyright 2018 Lee Clagett <https://github.com/vtnerd>
* Copyright 2018-2020 SChernykh <https://github.com/SChernykh>
* Copyright 2016-2020 XMRig <https://github.com/xmrig>, <support@xmrig.com>
* Copyright 2018-2021 SChernykh <https://github.com/SChernykh>
* Copyright 2016-2021 XMRig <https://github.com/xmrig>, <support@xmrig.com>
*
* This program is free software: you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@@ -117,6 +117,7 @@ static AlgoName const algorithm_names[] = {
{ "chukwa", nullptr, Algorithm::AR2_CHUKWA },
{ "argon2/chukwav2", nullptr, Algorithm::AR2_CHUKWA_V2 },
{ "chukwav2", nullptr, Algorithm::AR2_CHUKWA_V2 },
{ "argon2/ninja", nullptr, Algorithm::AR2_WRKZ },
{ "argon2/wrkz", nullptr, Algorithm::AR2_WRKZ },
# endif
# ifdef XMRIG_ALGO_ASTROBWT
@@ -129,6 +130,11 @@ static AlgoName const algorithm_names[] = {
# endif
{ "cryptonight/ccx", "cn/ccx", Algorithm::CN_CCX },
{ "cryptonight/conceal", "cn/conceal", Algorithm::CN_CCX },
# ifdef XMRIG_ALGO_CN_FEMTO
{ "cryptonight/upx2", "cn/upx2", Algorithm::CN_UPX2 },
{ "cn-extremelite/upx2", nullptr, Algorithm::CN_UPX2 },
{ "cryptonight-upx/2", nullptr, Algorithm::CN_UPX2 },
# endif
};
@@ -199,6 +205,9 @@ size_t xmrig::Algorithm::l3() const
case CN_PICO:
return oneMiB / 4;
case CN_FEMTO:
return oneMiB / 8;
default:
break;
}
@@ -329,6 +338,11 @@ xmrig::Algorithm::Family xmrig::Algorithm::family(Id id)
return CN_PICO;
# endif
# ifdef XMRIG_ALGO_CN_FEMTO
case CN_UPX2:
return CN_FEMTO;
# endif
# ifdef XMRIG_ALGO_RANDOMX
case RX_0:
case RX_WOW:

View File

@@ -6,8 +6,8 @@
* Copyright 2016 Jay D Dee <jayddee246@gmail.com>
* Copyright 2017-2018 XMR-Stak <https://github.com/fireice-uk>, <https://github.com/psychocrypt>
* Copyright 2018 Lee Clagett <https://github.com/vtnerd>
* Copyright 2018-2020 SChernykh <https://github.com/SChernykh>
* Copyright 2016-2020 XMRig <https://github.com/xmrig>, <support@xmrig.com>
* Copyright 2018-2021 SChernykh <https://github.com/SChernykh>
* Copyright 2016-2021 XMRig <https://github.com/xmrig>, <support@xmrig.com>
*
* This program is free software: you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@@ -64,6 +64,7 @@ public:
CN_PICO_0, // "cn-pico" CryptoNight-Pico
CN_PICO_TLO, // "cn-pico/tlo" CryptoNight-Pico (TLO)
CN_CCX, // "cn/ccx" Conceal (CCX)
CN_UPX2, // "cn/upx2" Uplexa (UPX2)
RX_0, // "rx/0" RandomX (reference configuration).
RX_WOW, // "rx/wow" RandomWOW (Wownero).
RX_ARQ, // "rx/arq" RandomARQ (Arqma).
@@ -83,6 +84,7 @@ public:
CN_LITE,
CN_HEAVY,
CN_PICO,
CN_FEMTO,
RANDOM_X,
ARGON2,
ASTROBWT,
@@ -94,7 +96,7 @@ public:
inline Algorithm(Id id) : m_id(id) {}
Algorithm(const rapidjson::Value &value);
inline bool isCN() const { auto f = family(); return f == CN || f == CN_LITE || f == CN_HEAVY || f == CN_PICO; }
inline bool isCN() const { auto f = family(); return f == CN || f == CN_LITE || f == CN_HEAVY || f == CN_PICO || f == CN_FEMTO; }
inline bool isEqual(const Algorithm &other) const { return m_id == other.m_id; }
inline bool isValid() const { return m_id != INVALID && family() != UNKNOWN; }
inline const char *name() const { return name(false); }

View File

@@ -119,7 +119,7 @@ void xmrig::HttpClient::handshake()
void xmrig::HttpClient::read(const char *data, size_t size)
{
if (parse(data, size) < size) {
if (!parse(data, size)) {
close(UV_EPROTO);
}
}

View File

@@ -118,13 +118,13 @@ bool xmrig::HttpContext::isRequest() const
}
size_t xmrig::HttpContext::parse(const char *data, size_t size)
bool xmrig::HttpContext::parse(const char *data, size_t size)
{
if (size == 0) {
return size;
return true;
}
return llhttp_execute(m_parser, data, size);
return llhttp_execute(m_parser, data, size) == HPE_OK;
}

View File

@@ -62,7 +62,7 @@ public:
void write(std::string &&data, bool close) override;
bool isRequest() const override;
size_t parse(const char *data, size_t size);
bool parse(const char *data, size_t size);
std::string ip() const override;
uint64_t elapsed() const;
void close(int status = 0);

View File

@@ -50,14 +50,7 @@ void xmrig::HttpServer::onConnection(uv_stream_t *stream, uint16_t)
{
auto ctx = static_cast<HttpContext*>(tcp->data);
if (nread >= 0) {
const auto size = static_cast<size_t>(nread);
const auto parsed = ctx->parse(buf->base, size);
if (parsed < size) {
ctx->close();
}
} else {
if (nread < 0 || !ctx->parse(buf->base, static_cast<size_t>(nread))) {
ctx->close();
}

View File

@@ -74,7 +74,7 @@ bool xmrig::HttpsContext::write(BIO *bio)
void xmrig::HttpsContext::parse(char *data, size_t size)
{
if (HttpContext::parse(data, size) < size) {
if (!HttpContext::parse(data, size)) {
close();
}
}

View File

@@ -379,11 +379,16 @@ bool xmrig::Client::parseJob(const rapidjson::Value &params, int *code)
}
const char *algo = Json::getString(params, "algo");
const char *blobData = Json::getString(params, "blob");
if (algo) {
job.setAlgorithm(algo);
}
else if (m_pool.coin().isValid()) {
job.setAlgorithm(m_pool.coin().algorithm(job.blob()[0]));
uint8_t blobVersion = 0;
if (blobData) {
Cvt::fromHex(&blobVersion, 1, blobData, 2);
}
job.setAlgorithm(m_pool.coin().algorithm(blobVersion));
}
# ifdef XMRIG_FEATURE_HTTP
@@ -399,7 +404,7 @@ bool xmrig::Client::parseJob(const rapidjson::Value &params, int *code)
else
# endif
{
if (!job.setBlob(params["blob"].GetString())) {
if (!job.setBlob(blobData)) {
*code = 4;
return false;
}

View File

@@ -248,7 +248,9 @@ bool xmrig::DaemonClient::parseJob(const rapidjson::Value &params, int *code)
}
if (m_pool.coin().isValid()) {
job.setAlgorithm(m_pool.coin().algorithm(job.blob()[0]));
uint8_t blobVersion = 0;
Cvt::fromHex(&blobVersion, 1, m_blockhashingblob.data(), 2);
job.setAlgorithm(m_pool.coin().algorithm(blobVersion));
}
if (blocktemplate.isNull() || !job.setBlob(m_blockhashingblob)) {

View File

@@ -57,6 +57,12 @@ public:
Pools();
# ifdef XMRIG_FEATURE_BENCHMARK
inline bool isBenchmark() const { return !!m_benchmark; }
# else
inline constexpr bool isBenchmark() const { return false; }
# endif
inline const std::vector<Pool> &data() const { return m_data; }
inline int retries() const { return m_retries; }
inline int retryPause() const { return m_retryPause; }

View File

@@ -130,12 +130,17 @@ bool xmrig::SelfSelectClient::parseResponse(int64_t id, rapidjson::Value &result
}
}
if (!m_job.setBlob(result[kBlockhashingBlob].GetString())) {
return false;
const char *blobData = Json::getString(result, kBlockhashingBlob);
if (pool().coin().isValid()) {
uint8_t blobVersion = 0;
if (blobData) {
Cvt::fromHex(&blobVersion, 1, blobData, 2);
}
m_job.setAlgorithm(pool().coin().algorithm(blobVersion));
}
if (pool().coin().isValid()) {
m_job.setAlgorithm(pool().coin().algorithm(m_job.blob()[0]));
if (!m_job.setBlob(blobData)) {
return false;
}
m_job.setHeight(Json::getUint64(result, kHeight));

View File

@@ -334,6 +334,7 @@ void xmrig::BenchClient::send(Request request)
{
doc.AddMember(StringRef(BenchConfig::kSize), m_benchmark->size(), allocator);
doc.AddMember(StringRef(BenchConfig::kAlgo), m_benchmark->algorithm().toJSON(), allocator);
doc.AddMember(StringRef(BenchConfig::kUser), m_benchmark->user().toJSON(), allocator);
doc.AddMember("version", APP_VERSION, allocator);
doc.AddMember("threads", m_threads, allocator);
doc.AddMember("steady_ready_ts", m_readyTime, allocator);

View File

@@ -41,6 +41,7 @@ const char *BenchConfig::kSeed = "seed";
const char *BenchConfig::kSize = "size";
const char *BenchConfig::kSubmit = "submit";
const char *BenchConfig::kToken = "token";
const char *BenchConfig::kUser = "user";
const char *BenchConfig::kVerify = "verify";
#ifndef XMRIG_DEBUG_BENCHMARK_API
@@ -59,8 +60,8 @@ xmrig::BenchConfig::BenchConfig(uint32_t size, const String &id, const rapidjson
m_id(id),
m_seed(Json::getString(object, kSeed)),
m_token(Json::getString(object, kToken)),
m_size(size),
m_hash(0)
m_user(Json::getString(object, kUser)),
m_size(size)
{
if (!m_algorithm.isValid() || m_algorithm.family() != Algorithm::RANDOM_X) {
m_algorithm = Algorithm::RX_0;
@@ -111,6 +112,7 @@ rapidjson::Value xmrig::BenchConfig::toJSON(rapidjson::Document &doc) const
out.AddMember(StringRef(kVerify), m_id.toJSON(), allocator);
out.AddMember(StringRef(kToken), m_token.toJSON(), allocator);
out.AddMember(StringRef(kSeed), m_seed.toJSON(), allocator);
out.AddMember(StringRef(kUser), m_user.toJSON(), allocator);
if (m_hash) {
out.AddMember(StringRef(kHash), Value(fmt::format("{:016X}", m_hash).c_str(), allocator), allocator);

View File

@@ -39,6 +39,7 @@ public:
static const char *kSize;
static const char *kSubmit;
static const char *kToken;
static const char *kUser;
static const char *kVerify;
# ifndef XMRIG_DEBUG_BENCHMARK_API
@@ -59,6 +60,7 @@ public:
inline const String &id() const { return m_id; }
inline const String &seed() const { return m_seed; }
inline const String &token() const { return m_token; }
inline const String &user() const { return m_user; }
inline uint32_t size() const { return m_size; }
inline uint64_t hash() const { return m_hash; }
@@ -73,8 +75,9 @@ private:
String m_id;
String m_seed;
String m_token;
String m_user;
uint32_t m_size;
uint64_t m_hash;
uint64_t m_hash = 0;
};

View File

@@ -225,11 +225,15 @@ bool xmrig::Config::read(const IJsonReader &reader, const char *fileName)
# endif
# ifdef XMRIG_FEATURE_OPENCL
d_ptr->cl.read(reader.getValue(kOcl));
if (!pools().isBenchmark()) {
d_ptr->cl.read(reader.getValue(kOcl));
}
# endif
# ifdef XMRIG_FEATURE_CUDA
d_ptr->cuda.read(reader.getValue(kCuda));
if (!pools().isBenchmark()) {
d_ptr->cuda.read(reader.getValue(kCuda));
}
# endif
# if defined(XMRIG_FEATURE_NVML) || defined (XMRIG_FEATURE_ADL)

View File

@@ -262,6 +262,7 @@ void xmrig::ConfigTransform::transform(rapidjson::Document &doc, int key, const
case IConfig::BenchTokenKey: /* --token */
case IConfig::BenchSeedKey: /* --seed */
case IConfig::BenchHashKey: /* --hash */
case IConfig::UserKey: /* --user */
return transformBenchmark(doc, key, arg);
# endif
@@ -347,6 +348,9 @@ void xmrig::ConfigTransform::transformBenchmark(rapidjson::Document &doc, int ke
case IConfig::BenchHashKey: /* --hash */
return set(doc, BenchConfig::kBenchmark, BenchConfig::kHash, arg);
case IConfig::UserKey: /* --user */
return set(doc, BenchConfig::kBenchmark, BenchConfig::kUser, arg);
}
}
#endif

View File

@@ -79,9 +79,9 @@ static inline const std::string &usage()
u += " --no-cpu disable CPU mining backend\n";
u += " -t, --threads=N number of CPU threads, proper CPU affinity required for some optimizations.\n";
u += " --cpu-affinity set process affinity to CPU core(s), mask 0x3 for cores 0 and 1\n";
u += " --cpu-affinity=N set process affinity to CPU core(s), mask 0x3 for cores 0 and 1\n";
u += " -v, --av=N algorithm variation, 0 auto select\n";
u += " --cpu-priority set process priority (0 idle, 2 normal to 5 highest)\n";
u += " --cpu-priority=N set process priority (0 idle, 2 normal to 5 highest)\n";
u += " --cpu-max-threads-hint=N maximum CPU threads count (in percentage) hint for autoconfig\n";
u += " --cpu-memory-pool=N number of 2 MB pages for persistent memory pool, -1 (auto), 0 (disable)\n";
u += " --cpu-no-yield prefer maximum hashrate rather than system response/stability\n";

View File

@@ -96,6 +96,11 @@ public:
return CN_ITER / 8;
# endif
# ifdef XMRIG_ALGO_CN_FEMTO
case Algorithm::CN_UPX2:
return CN_ITER / 32;
# endif
default:
break;
}
@@ -111,6 +116,12 @@ public:
}
# endif
# ifdef XMRIG_ALGO_CN_FEMTO
if (algo == Algorithm::CN_UPX2) {
return 0x1FFF0;
}
# endif
return ((memory(algo) - 1) / 16) * 16;
}
@@ -149,6 +160,9 @@ public:
# ifdef XMRIG_ALGO_CN_PICO
case Algorithm::CN_PICO_0:
case Algorithm::CN_PICO_TLO:
# endif
# ifdef XMRIG_ALGO_CN_FEMTO
case Algorithm::CN_UPX2:
# endif
return Algorithm::CN_2;
@@ -176,6 +190,7 @@ template<> constexpr inline Algorithm::Id CnAlgo<Algorithm::CN_FAST>::base() con
template<> constexpr inline Algorithm::Id CnAlgo<Algorithm::CN_RTO>::base() const { return Algorithm::CN_1; }
template<> constexpr inline Algorithm::Id CnAlgo<Algorithm::CN_LITE_1>::base() const { return Algorithm::CN_1; }
template<> constexpr inline Algorithm::Id CnAlgo<Algorithm::CN_HEAVY_TUBE>::base() const { return Algorithm::CN_1; }
template<> constexpr inline Algorithm::Id CnAlgo<Algorithm::CN_UPX2>::base() const { return Algorithm::CN_2; }
template<> constexpr inline uint32_t CnAlgo<Algorithm::CN_FAST>::iterations() const { return CN_ITER / 2; }
@@ -192,6 +207,7 @@ template<> constexpr inline uint32_t CnAlgo<Algorithm::CN_ZLS>::iterations() con
template<> constexpr inline uint32_t CnAlgo<Algorithm::CN_PICO_0>::iterations() const { return CN_ITER / 8; }
template<> constexpr inline uint32_t CnAlgo<Algorithm::CN_PICO_TLO>::iterations() const { return CN_ITER / 8; }
template<> constexpr inline uint32_t CnAlgo<Algorithm::CN_CCX>::iterations() const { return CN_ITER / 2; }
template<> constexpr inline uint32_t CnAlgo<Algorithm::CN_UPX2>::iterations() const { return CN_ITER / 32; }
template<> constexpr inline size_t CnAlgo<Algorithm::CN_LITE_0>::memory() const { return CN_MEMORY / 2; }
@@ -201,9 +217,11 @@ template<> constexpr inline size_t CnAlgo<Algorithm::CN_HEAVY_TUBE>::memory() co
template<> constexpr inline size_t CnAlgo<Algorithm::CN_HEAVY_XHV>::memory() const { return CN_MEMORY * 2; }
template<> constexpr inline size_t CnAlgo<Algorithm::CN_PICO_0>::memory() const { return CN_MEMORY / 8; }
template<> constexpr inline size_t CnAlgo<Algorithm::CN_PICO_TLO>::memory() const { return CN_MEMORY / 8; }
template<> constexpr inline size_t CnAlgo<Algorithm::CN_UPX2>::memory() const { return CN_MEMORY / 16; }
template<> constexpr inline uint32_t CnAlgo<Algorithm::CN_PICO_0>::mask() const { return 0x1FFF0; }
template<> constexpr inline uint32_t CnAlgo<Algorithm::CN_UPX2>::mask() const { return 0x1FFF0; }
} /* namespace xmrig */

View File

@@ -99,8 +99,11 @@ cn_mainloop_fun cn_double_mainloop_ryzen_asm = nullptr;
cn_mainloop_fun cn_double_mainloop_bulldozer_asm = nullptr;
cn_mainloop_fun cn_double_double_mainloop_sandybridge_asm = nullptr;
cn_mainloop_fun cn_upx2_mainloop_asm = nullptr;
cn_mainloop_fun cn_upx2_double_mainloop_asm = nullptr;
template<typename T, typename U>
template<Algorithm::Id SOURCE_ALGO = Algorithm::CN_2, typename T, typename U>
static void patchCode(T dst, U src, const uint32_t iterations, const uint32_t mask = CnAlgo<Algorithm::CN_HALF>().mask())
{
auto p = reinterpret_cast<const uint8_t*>(src);
@@ -124,11 +127,11 @@ static void patchCode(T dst, U src, const uint32_t iterations, const uint32_t ma
auto patched_data = reinterpret_cast<uint8_t*>(dst);
for (size_t i = 0; i + sizeof(uint32_t) <= size; ++i) {
switch (*(uint32_t*)(patched_data + i)) {
case CnAlgo<Algorithm::CN_2>().iterations():
case CnAlgo<SOURCE_ALGO>().iterations():
*(uint32_t*)(patched_data + i) = iterations;
break;
case CnAlgo<Algorithm::CN_2>().mask():
case CnAlgo<SOURCE_ALGO>().mask():
*(uint32_t*)(patched_data + i) = mask;
break;
}
@@ -138,7 +141,7 @@ static void patchCode(T dst, U src, const uint32_t iterations, const uint32_t ma
static void patchAsmVariants()
{
const int allocation_size = 81920;
const int allocation_size = 131072;
auto base = static_cast<uint8_t *>(VirtualMemory::allocateExecutableMemory(allocation_size, false));
cn_half_mainloop_ivybridge_asm = reinterpret_cast<cn_mainloop_fun> (base + 0x0000);
@@ -170,6 +173,11 @@ static void patchAsmVariants()
cn_tlo_double_mainloop_sandybridge_asm = reinterpret_cast<cn_mainloop_fun> (base + 0x13000);
# endif
# ifdef XMRIG_ALGO_CN_FEMTO
cn_upx2_mainloop_asm = reinterpret_cast<cn_mainloop_fun> (base + 0x14000);
cn_upx2_double_mainloop_asm = reinterpret_cast<cn_mainloop_fun> (base + 0x15000);
# endif
{
constexpr uint32_t ITER = CnAlgo<Algorithm::CN_HALF>().iterations();
@@ -219,6 +227,16 @@ static void patchAsmVariants()
patchCode(cn_double_double_mainloop_sandybridge_asm, cnv2_double_mainloop_sandybridge_asm, ITER);
}
# ifdef XMRIG_ALGO_CN_FEMTO
{
constexpr uint32_t ITER = CnAlgo<Algorithm::CN_UPX2>().iterations();
constexpr uint32_t MASK = CnAlgo<Algorithm::CN_UPX2>().mask();
patchCode<Algorithm::CN_RWZ>(cn_upx2_mainloop_asm, cnv2_rwz_mainloop_asm, ITER, MASK);
patchCode<Algorithm::CN_RWZ>(cn_upx2_double_mainloop_asm, cnv2_rwz_double_mainloop_asm, ITER, MASK);
}
#endif
VirtualMemory::protectRX(base, allocation_size);
VirtualMemory::flushInstructionCache(base, allocation_size);
}
@@ -272,6 +290,11 @@ xmrig::CnHash::CnHash()
ADD_FN(Algorithm::CN_CCX);
# ifdef XMRIG_ALGO_CN_FEMTO
ADD_FN(Algorithm::CN_UPX2);
ADD_FN_ASM(Algorithm::CN_UPX2);
# endif
# ifdef XMRIG_ALGO_ARGON2
m_map[Algorithm::AR2_CHUKWA][AV_SINGLE][Assembly::NONE] = argon2::single_hash<Algorithm::AR2_CHUKWA>;
m_map[Algorithm::AR2_CHUKWA][AV_SINGLE_SOFT][Assembly::NONE] = argon2::single_hash<Algorithm::AR2_CHUKWA>;

View File

@@ -395,7 +395,7 @@ static inline void cryptonight_monero_tweak(const uint8_t* l, uint64_t idx, __m1
uint64_t* mem_out = (uint64_t*)&l[idx];
if (props.base() == Algorithm::CN_2) {
VARIANT2_SHUFFLE(l, idx, ax0, bx0, bx1, cx, (ALGO == Algorithm::CN_RWZ ? 1 : 0));
VARIANT2_SHUFFLE(l, idx, ax0, bx0, bx1, cx, (((ALGO == Algorithm::CN_RWZ) || (ALGO == Algorithm::CN_UPX2)) ? 1 : 0));
_mm_store_si128((__m128i *)mem_out, _mm_xor_si128(bx0, cx));
} else {
__m128i tmp = _mm_xor_si128(bx0, cx);
@@ -528,7 +528,7 @@ inline void cryptonight_single_hash(const uint8_t *__restrict__ input, size_t si
if (ALGO == Algorithm::CN_R) {
VARIANT2_SHUFFLE(l0, idx0 & MASK, ax0, bx0, bx1, cx, 0);
} else {
VARIANT2_SHUFFLE2(l0, idx0 & MASK, ax0, bx0, bx1, hi, lo, (ALGO == Algorithm::CN_RWZ ? 1 : 0));
VARIANT2_SHUFFLE2(l0, idx0 & MASK, ax0, bx0, bx1, hi, lo, (((ALGO == Algorithm::CN_RWZ) || (ALGO == Algorithm::CN_UPX2)) ? 1 : 0));
}
}
@@ -704,7 +704,7 @@ inline void cryptonight_double_hash(const uint8_t *__restrict__ input, size_t si
if (ALGO == Algorithm::CN_R) {
VARIANT2_SHUFFLE(l0, idx0 & MASK, ax0, bx00, bx01, cx0, 0);
} else {
VARIANT2_SHUFFLE2(l0, idx0 & MASK, ax0, bx00, bx01, hi, lo, (ALGO == Algorithm::CN_RWZ ? 1 : 0));
VARIANT2_SHUFFLE2(l0, idx0 & MASK, ax0, bx00, bx01, hi, lo, (((ALGO == Algorithm::CN_RWZ) || (ALGO == Algorithm::CN_UPX2)) ? 1 : 0));
}
}
@@ -764,7 +764,7 @@ inline void cryptonight_double_hash(const uint8_t *__restrict__ input, size_t si
if (ALGO == Algorithm::CN_R) {
VARIANT2_SHUFFLE(l1, idx1 & MASK, ax1, bx10, bx11, cx1, 0);
} else {
VARIANT2_SHUFFLE2(l1, idx1 & MASK, ax1, bx10, bx11, hi, lo, (ALGO == Algorithm::CN_RWZ ? 1 : 0));
VARIANT2_SHUFFLE2(l1, idx1 & MASK, ax1, bx10, bx11, hi, lo, (((ALGO == Algorithm::CN_RWZ) || (ALGO == Algorithm::CN_UPX2)) ? 1 : 0));
}
}

View File

@@ -370,6 +370,23 @@ const static uint8_t test_output_pico_tlo[160] = {
#endif
#ifdef XMRIG_ALGO_CN_FEMTO
// "cn/upx2"
const static uint8_t test_output_femto_upx2[160] = {
0xAA, 0xBB, 0xB8, 0xED, 0x14, 0xA8, 0x35, 0xFA, 0x22, 0xCF, 0xB1, 0xB5, 0xDE, 0xA8, 0x72, 0xB0,
0xA1, 0xD6, 0xCB, 0xD8, 0x46, 0xF4, 0x39, 0x1C, 0x0F, 0x01, 0xF3, 0x87, 0x5E, 0x3A, 0x37, 0x61,
0x38, 0x59, 0x15, 0x72, 0xF8, 0x20, 0xD4, 0xDE, 0x25, 0x3C, 0xF5, 0x5A, 0x21, 0x92, 0xB6, 0x22,
0xB0, 0x28, 0x9E, 0x2E, 0x5C, 0x36, 0x16, 0xE6, 0x1E, 0x78, 0x7A, 0x8F, 0xE4, 0x62, 0xEC, 0x5A,
0xFD, 0x58, 0xCC, 0x6F, 0x3C, 0xD3, 0x8A, 0x0B, 0x5B, 0x6C, 0x83, 0x4E, 0x9B, 0xD4, 0xC2, 0x5A,
0x43, 0x2C, 0x48, 0x98, 0xF3, 0x16, 0xCA, 0x87, 0xE9, 0x5F, 0x44, 0x93, 0x53, 0x48, 0x00, 0xA3,
0xE8, 0xE4, 0xB6, 0x9D, 0x5A, 0x3B, 0x49, 0x2C, 0x21, 0xE9, 0x4B, 0x02, 0xFC, 0x87, 0x8D, 0x75,
0x66, 0x05, 0xAF, 0xA3, 0x9D, 0xC9, 0xD8, 0x88, 0x2D, 0x67, 0x31, 0x21, 0x4C, 0x4D, 0x88, 0x7D,
0x86, 0x9E, 0x4D, 0x74, 0xF4, 0x4C, 0x57, 0x27, 0xCF, 0xEF, 0x86, 0x01, 0xB0, 0x52, 0x18, 0xF3,
0xAD, 0xE4, 0x52, 0x5E, 0xB0, 0x4A, 0x97, 0xB4, 0x96, 0x18, 0xB6, 0x9C, 0x93, 0x0E, 0x49, 0xBB,
};
#endif
#ifdef XMRIG_ALGO_ARGON2
// "argon2/chukwa"
const static uint8_t argon2_chukwa_test_out[160] = {

View File

@@ -377,12 +377,15 @@ static inline void cn_explode_scratchpad(const __m128i *input, __m128i *output)
_mm_store_si128(output + 1, xin1);
_mm_store_si128(output + 2, xin2);
_mm_store_si128(output + 3, xin3);
output += (64 << interleave) / sizeof(__m128i);
_mm_store_si128(output + 0, xin4);
_mm_store_si128(output + 1, xin5);
_mm_store_si128(output + 2, xin6);
_mm_store_si128(output + 3, xin7);
output += (64 << interleave) / sizeof(__m128i);
constexpr int output_increment = (64 << interleave) / sizeof(__m128i);
_mm_store_si128(output + output_increment + 0, xin4);
_mm_store_si128(output + output_increment + 1, xin5);
_mm_store_si128(output + output_increment + 2, xin6);
_mm_store_si128(output + output_increment + 3, xin7);
output += output_increment * 2;
}
}
@@ -414,13 +417,15 @@ static inline void cn_implode_scratchpad(const __m128i *input, __m128i *output)
xout1 = _mm_xor_si128(_mm_load_si128(input + 1), xout1);
xout2 = _mm_xor_si128(_mm_load_si128(input + 2), xout2);
xout3 = _mm_xor_si128(_mm_load_si128(input + 3), xout3);
input += (64 << interleave) / sizeof(__m128i);
xout4 = _mm_xor_si128(_mm_load_si128(input + 0), xout4);
xout5 = _mm_xor_si128(_mm_load_si128(input + 1), xout5);
xout6 = _mm_xor_si128(_mm_load_si128(input + 2), xout6);
xout7 = _mm_xor_si128(_mm_load_si128(input + 3), xout7);
input += (64 << interleave) / sizeof(__m128i);
constexpr int input_increment = (64 << interleave) / sizeof(__m128i);
xout4 = _mm_xor_si128(_mm_load_si128(input + input_increment + 0), xout4);
xout5 = _mm_xor_si128(_mm_load_si128(input + input_increment + 1), xout5);
xout6 = _mm_xor_si128(_mm_load_si128(input + input_increment + 2), xout6);
xout7 = _mm_xor_si128(_mm_load_si128(input + input_increment + 3), xout7);
input += input_increment * 2;
i += 8;
if ((interleave > 0) && (i < props.memory() / sizeof(__m128i))) {
@@ -563,7 +568,7 @@ static inline void cryptonight_monero_tweak(uint64_t *mem_out, const uint8_t *l,
constexpr CnAlgo<ALGO> props;
if (props.base() == Algorithm::CN_2) {
VARIANT2_SHUFFLE(l, idx, ax0, bx0, bx1, cx, (ALGO == Algorithm::CN_RWZ ? 1 : 0));
VARIANT2_SHUFFLE(l, idx, ax0, bx0, bx1, cx, (((ALGO == Algorithm::CN_RWZ) || (ALGO == Algorithm::CN_UPX2)) ? 1 : 0));
_mm_store_si128(reinterpret_cast<__m128i *>(mem_out), _mm_xor_si128(bx0, cx));
} else {
__m128i tmp = _mm_xor_si128(bx0, cx);
@@ -715,7 +720,7 @@ inline void cryptonight_single_hash(const uint8_t *__restrict__ input, size_t si
if (ALGO == Algorithm::CN_R) {
VARIANT2_SHUFFLE(l0, idx0 & MASK, ax0, bx0, bx1, cx, 0);
} else {
VARIANT2_SHUFFLE2(l0, idx0 & MASK, ax0, bx0, bx1, hi, lo, (ALGO == Algorithm::CN_RWZ ? 1 : 0));
VARIANT2_SHUFFLE2(l0, idx0 & MASK, ax0, bx0, bx1, hi, lo, (((ALGO == Algorithm::CN_RWZ) || (ALGO == Algorithm::CN_UPX2)) ? 1 : 0));
}
}
@@ -789,6 +794,7 @@ extern "C" void cnv2_mainloop_bulldozer_asm(cryptonight_ctx **ctx);
extern "C" void cnv2_double_mainloop_sandybridge_asm(cryptonight_ctx **ctx);
extern "C" void cnv2_rwz_mainloop_asm(cryptonight_ctx **ctx);
extern "C" void cnv2_rwz_double_mainloop_asm(cryptonight_ctx **ctx);
extern "C" void cnv2_upx_double_mainloop_zen3_asm(cryptonight_ctx * *ctx);
namespace xmrig {
@@ -822,6 +828,8 @@ extern cn_mainloop_fun cn_double_mainloop_ryzen_asm;
extern cn_mainloop_fun cn_double_mainloop_bulldozer_asm;
extern cn_mainloop_fun cn_double_double_mainloop_sandybridge_asm;
extern cn_mainloop_fun cn_upx2_mainloop_asm;
extern cn_mainloop_fun cn_upx2_double_mainloop_asm;
} // namespace xmrig
@@ -934,6 +942,11 @@ inline void cryptonight_single_hash_asm(const uint8_t *__restrict__ input, size_
cn_double_mainloop_bulldozer_asm(ctx);
}
}
# ifdef XMRIG_ALGO_CN_FEMTO
else if (ALGO == Algorithm::CN_UPX2) {
cn_upx2_mainloop_asm(ctx);
}
# endif
else if (props.isR()) {
ctx[0]->generated_code(ctx);
}
@@ -976,6 +989,16 @@ inline void cryptonight_double_hash_asm(const uint8_t *__restrict__ input, size_
else if (ALGO == Algorithm::CN_PICO_TLO) {
cn_tlo_double_mainloop_sandybridge_asm(ctx);
}
# endif
# ifdef XMRIG_ALGO_CN_FEMTO
else if (ALGO == Algorithm::CN_UPX2) {
if (Cpu::info()->arch() == ICpuInfo::ARCH_ZEN3) {
cnv2_upx_double_mainloop_zen3_asm(ctx);
}
else {
cn_upx2_double_mainloop_asm(ctx);
}
}
# endif
else if (ALGO == Algorithm::CN_RWZ) {
cnv2_rwz_double_mainloop_asm(ctx);
@@ -1134,7 +1157,7 @@ inline void cryptonight_double_hash(const uint8_t *__restrict__ input, size_t si
if (ALGO == Algorithm::CN_R) {
VARIANT2_SHUFFLE(l0, idx0 & MASK, ax0, bx00, bx01, cx0, 0);
} else {
VARIANT2_SHUFFLE2(l0, idx0 & MASK, ax0, bx00, bx01, hi, lo, (ALGO == Algorithm::CN_RWZ ? 1 : 0));
VARIANT2_SHUFFLE2(l0, idx0 & MASK, ax0, bx00, bx01, hi, lo, (((ALGO == Algorithm::CN_RWZ) || (ALGO == Algorithm::CN_UPX2)) ? 1 : 0));
}
}
@@ -1192,7 +1215,7 @@ inline void cryptonight_double_hash(const uint8_t *__restrict__ input, size_t si
if (ALGO == Algorithm::CN_R) {
VARIANT2_SHUFFLE(l1, idx1 & MASK, ax1, bx10, bx11, cx1, 0);
} else {
VARIANT2_SHUFFLE2(l1, idx1 & MASK, ax1, bx10, bx11, hi, lo, (ALGO == Algorithm::CN_RWZ ? 1 : 0));
VARIANT2_SHUFFLE2(l1, idx1 & MASK, ax1, bx10, bx11, hi, lo, (((ALGO == Algorithm::CN_RWZ) || (ALGO == Algorithm::CN_UPX2)) ? 1 : 0));
}
}
@@ -1302,7 +1325,7 @@ inline void cryptonight_double_hash(const uint8_t *__restrict__ input, size_t si
if (ALGO == Algorithm::CN_R) { \
VARIANT2_SHUFFLE(l, idx & MASK, a, b0, b1, c, 0); \
} else { \
VARIANT2_SHUFFLE2(l, idx & MASK, a, b0, b1, hi, lo, (ALGO == Algorithm::CN_RWZ ? 1 : 0)); \
VARIANT2_SHUFFLE2(l, idx & MASK, a, b0, b1, hi, lo, (((ALGO == Algorithm::CN_RWZ) || (ALGO == Algorithm::CN_UPX2)) ? 1 : 0)); \
} \
} \
if (ALGO == Algorithm::CN_R) { \

View File

@@ -0,0 +1,320 @@
mov rax, rsp
push rbx
push rbp
push rsi
push rdi
push r12
push r13
push r14
push r15
sub rsp, 232
mov rdi, QWORD PTR [rcx+8]
mov edx, 768
mov rbx, QWORD PTR [rcx]
mov ecx, 256
movaps XMMWORD PTR [rax-88], xmm6
movaps XMMWORD PTR [rax-104], xmm7
mov r13, QWORD PTR [rdi+224]
movq xmm0, QWORD PTR [rdi+104]
mov r12, QWORD PTR [rbx+224]
movaps XMMWORD PTR [rax-120], xmm8
movaps XMMWORD PTR [rax-136], xmm9
movaps XMMWORD PTR [rax-152], xmm10
movaps XMMWORD PTR [rsp+112], xmm11
movaps XMMWORD PTR [rsp+96], xmm12
movaps XMMWORD PTR [rsp+80], xmm13
movq xmm13, QWORD PTR [rbx+96]
movaps XMMWORD PTR [rsp+64], xmm14
movq xmm14, QWORD PTR [rbx+104]
movaps XMMWORD PTR [rsp+48], xmm15
movq xmm15, QWORD PTR [rdi+96]
mov QWORD PTR [rsp], r13
movdqa XMMWORD PTR [rsp+32], xmm0
stmxcsr DWORD PTR [rsp+24]
mov DWORD PTR [rsp+28], 16256
ldmxcsr DWORD PTR [rsp+28]
mov rcx, QWORD PTR [rbx+56]
xorps xmm12, xmm12
xor rcx, QWORD PTR [rbx+24]
mov rax, QWORD PTR [rbx+48]
xor rax, QWORD PTR [rbx+16]
mov rsi, QWORD PTR [rbx+32]
mov rbp, QWORD PTR [rdi+32]
movq xmm0, rcx
mov rcx, QWORD PTR [rbx+88]
xor rcx, QWORD PTR [rbx+72]
movq xmm7, rax
mov rax, QWORD PTR [rbx+80]
xor rax, QWORD PTR [rbx+64]
mov r14, QWORD PTR [rbx+40]
mov r15, QWORD PTR [rdi+40]
xor rsi, QWORD PTR [rbx]
xor rbp, QWORD PTR [rdi]
movq xmm9, rax
mov rax, QWORD PTR [rdi+48]
xor rax, QWORD PTR [rdi+16]
xor r14, QWORD PTR [rbx+8]
xor r15, QWORD PTR [rdi+8]
movq xmm8, rax
punpcklqdq xmm7, xmm0
mov eax, 1023
shl rax, 52
movq xmm11, rax
punpcklqdq xmm11, xmm11
mov rax, QWORD PTR [rdi+80]
movq xmm0, rcx
mov rcx, QWORD PTR [rdi+56]
xor rcx, QWORD PTR [rdi+24]
punpcklqdq xmm9, xmm0
mov QWORD PTR [rsp+8], 16384
movq xmm0, rcx
mov rcx, QWORD PTR [rdi+88]
xor rcx, QWORD PTR [rdi+72]
xor rax, QWORD PTR [rdi+64]
punpcklqdq xmm8, xmm0
movq xmm0, rcx
movq xmm10, rax
mov rax, 4389456576511
mov QWORD PTR [rsp+16], rax
mov rax, -4389456576512
mov QWORD PTR [rsp+216], rax
punpcklqdq xmm10, xmm0
ALIGN(64)
upx2_main_loop:
mov rdx, rsi
mov r9, rbp
and edx, 131056
and r9d, 131056
movdqu xmm6, XMMWORD PTR [rdx+r12]
lea r8, QWORD PTR [rdx+r12]
movdqu xmm4, XMMWORD PTR [r9+r13]
lea r10, QWORD PTR [r9+r13]
mov ecx, edx
mov eax, edx
xor rax, 32
xor rcx, 48
xor rdx, 16
movq xmm0, r14
movq xmm3, rsi
movq xmm5, rbp
punpcklqdq xmm3, xmm0
movq xmm0, r15
movdqu xmm2, XMMWORD PTR [rax+r12]
movdqu xmm1, XMMWORD PTR [rcx+r12]
paddq xmm2, xmm3
punpcklqdq xmm5, xmm0
paddq xmm1, xmm7
aesenc xmm6, xmm3
aesenc xmm4, xmm5
movdqa xmm0, xmm9
movq rdi, xmm4
paddq xmm0, XMMWORD PTR [rdx+r12]
movdqu XMMWORD PTR [rdx+r12], xmm0
xor edx, edx
movdqu XMMWORD PTR [rax+r12], xmm1
movdqa xmm0, xmm6
movdqu XMMWORD PTR [rcx+r12], xmm2
pxor xmm0, xmm7
movdqu XMMWORD PTR [r8], xmm0
mov ecx, r9d
xor rcx, 48
mov eax, r9d
xor rax, 32
xor r9, 16
movdqa xmm0, xmm10
movdqu xmm1, XMMWORD PTR [rcx+r13]
movdqu xmm2, XMMWORD PTR [rax+r13]
paddq xmm1, xmm8
paddq xmm0, XMMWORD PTR [r9+r13]
paddq xmm2, xmm5
movdqu XMMWORD PTR [r9+r13], xmm0
movq r9, xmm6
movdqu XMMWORD PTR [rax+r13], xmm1
movdqa xmm0, xmm4
movdqu XMMWORD PTR [rcx+r13], xmm2
pxor xmm0, xmm8
movdqu XMMWORD PTR [r10], xmm0
movq rcx, xmm14
mov rax, rcx
movq r10, xmm13
shl rax, 32
movdqa xmm0, xmm6
xor r10, rax
psrldq xmm0, 8
lea r8, QWORD PTR [rcx+rcx]
movq rax, xmm0
add r8d, r9d
mov ecx, -2147483647
or r8, rcx
mov r11, r9
div r8
and r11d, 131056
movaps xmm1, xmm12
mov eax, eax
add r11, r12
shl rdx, 32
add rdx, rax
xor r10, QWORD PTR [r11]
mov rbx, QWORD PTR [r11+8]
lea r8, QWORD PTR [rdx+r9]
movq xmm13, rdx
mov rax, r8
shr rax, 12
movq xmm0, rax
paddq xmm0, xmm11
sqrtsd xmm1, xmm0
movq rdx, xmm1
mov rax, rdx
shr rdx, 19
shr rax, 20
mov rcx, rdx
sub rcx, rax
add rax, QWORD PTR [rsp+216]
sub rcx, QWORD PTR [rsp+16]
mov r13, QWORD PTR [rsp]
imul rcx, rax
mov rax, r10
sub rcx, r8
mov rcx, r9
adc rdx, 0
xor rcx, 32
and ecx, 131056
movq xmm14, rdx
movdqu xmm1, XMMWORD PTR [rcx+r12]
mul r9
paddq xmm1, xmm3
mov r8, rax
xor r8, QWORD PTR [rcx+r12+8]
add r14, r8
movq xmm0, rax
movq xmm2, rdx
xor rdx, QWORD PTR [rcx+r12]
mov rax, r9
xor rax, 48
punpcklqdq xmm2, xmm0
and eax, 131056
add rsi, rdx
xor r9, 16
xor edx, edx
and r9d, 131056
movdqu xmm0, XMMWORD PTR [rax+r12]
paddq xmm0, xmm7
pxor xmm2, XMMWORD PTR [r9+r12]
paddq xmm2, xmm9
movdqu XMMWORD PTR [r9+r12], xmm2
movq r9, xmm15
movdqu XMMWORD PTR [rcx+r12], xmm0
movdqa xmm0, xmm4
mov rcx, QWORD PTR [rsp+32]
movdqu XMMWORD PTR [rax+r12], xmm1
mov rax, rcx
shl rax, 32
movaps xmm1, xmm12
xor r9, rax
psrldq xmm0, 8
lea r8, QWORD PTR [rcx+rcx]
mov QWORD PTR [r11], rsi
add r8d, edi
mov QWORD PTR [r11+8], r14
movq rax, xmm0
mov ecx, -2147483647
or r8, rcx
xor rsi, r10
div r8
mov r10, rdi
xor r14, rbx
mov eax, eax
and r10d, 131056
shl rdx, 32
add r10, r13
add rdx, rax
xor r9, QWORD PTR [r10]
mov r11, QWORD PTR [r10+8]
lea r8, QWORD PTR [rdx+rdi]
mov rax, r8
movq xmm15, rdx
shr rax, 12
movq xmm0, rax
paddq xmm0, xmm11
sqrtsd xmm1, xmm0
movq rdx, xmm1
mov rax, rdx
shr rax, 20
shr rdx, 19
mov rcx, rdx
sub rcx, rax
sub rcx, QWORD PTR [rsp+16]
movdqa xmm9, xmm7
movdqa xmm7, xmm6
add rax, QWORD PTR [rsp+216]
imul rcx, rax
mov rax, r9
sub rcx, r8
mov rcx, rdi
adc rdx, 0
xor rcx, 32
and ecx, 131056
mov QWORD PTR [rsp+32], rdx
movdqu xmm1, XMMWORD PTR [rcx+r13]
mul rdi
paddq xmm1, xmm5
mov r8, rax
xor r8, QWORD PTR [rcx+r13+8]
add r15, r8
movq xmm0, rax
movq xmm2, rdx
xor rdx, QWORD PTR [rcx+r13]
mov rax, rdi
xor rdi, 16
punpcklqdq xmm2, xmm0
xor rax, 48
and edi, 131056
and eax, 131056
add rbp, rdx
pxor xmm2, XMMWORD PTR [rdi+r13]
movdqu xmm0, XMMWORD PTR [rax+r13]
paddq xmm2, xmm10
movdqu XMMWORD PTR [rdi+r13], xmm2
paddq xmm0, xmm8
movdqu XMMWORD PTR [rcx+r13], xmm0
movdqa xmm10, xmm8
movdqu XMMWORD PTR [rax+r13], xmm1
movdqa xmm8, xmm4
mov QWORD PTR [r10], rbp
xor rbp, r9
mov QWORD PTR [r10+8], r15
xor r15, r11
sub QWORD PTR [rsp+8], 1
jne upx2_main_loop
ldmxcsr DWORD PTR [rsp+24]
movaps xmm13, XMMWORD PTR [rsp+80]
lea r11, QWORD PTR [rsp+232]
movaps xmm6, XMMWORD PTR [r11-24]
movaps xmm7, XMMWORD PTR [r11-40]
movaps xmm8, XMMWORD PTR [r11-56]
movaps xmm9, XMMWORD PTR [r11-72]
movaps xmm10, XMMWORD PTR [r11-88]
movaps xmm11, XMMWORD PTR [r11-104]
movaps xmm12, XMMWORD PTR [r11-120]
movaps xmm14, XMMWORD PTR [rsp+64]
movaps xmm15, XMMWORD PTR [rsp+48]
mov rsp, r11
pop r15
pop r14
pop r13
pop r12
pop rdi
pop rsi
pop rbp
pop rbx

View File

@@ -17,6 +17,7 @@
.global FN_PREFIX(cnv2_double_mainloop_sandybridge_asm)
.global FN_PREFIX(cnv2_rwz_mainloop_asm)
.global FN_PREFIX(cnv2_rwz_double_mainloop_asm)
.global FN_PREFIX(cnv2_upx_double_mainloop_zen3_asm)
ALIGN(64)
FN_PREFIX(cnv2_mainloop_ivybridge_asm):
@@ -72,6 +73,15 @@ FN_PREFIX(cnv2_rwz_double_mainloop_asm):
ret 0
mov eax, 3735929054
ALIGN(64)
FN_PREFIX(cnv2_upx_double_mainloop_zen3_asm):
sub rsp, 48
mov rcx, rdi
#include "cn2/cnv2_upx_double_mainloop_zen3.inc"
add rsp, 48
ret 0
mov eax, 3735929054
#if defined(__linux__) && defined(__ELF__)
.section .note.GNU-stack,"",%progbits
#endif

View File

@@ -48,5 +48,12 @@ cnv2_rwz_double_mainloop_asm PROC
mov eax, 3735929054
cnv2_rwz_double_mainloop_asm ENDP
ALIGN(64)
cnv2_upx_double_mainloop_zen3_asm PROC
INCLUDE cn2/cnv2_upx_double_mainloop_zen3.inc
ret 0
mov eax, 3735929054
cnv2_upx_double_mainloop_zen3_asm ENDP
_TEXT_CNV2_MAINLOOP ENDS
END

View File

@@ -0,0 +1,320 @@
mov rax, rsp
push rbx
push rbp
push rsi
push rdi
push r12
push r13
push r14
push r15
sub rsp, 232
mov rdi, QWORD PTR [rcx+8]
mov edx, 768
mov rbx, QWORD PTR [rcx]
mov ecx, 256
movaps XMMWORD PTR [rax-88], xmm6
movaps XMMWORD PTR [rax-104], xmm7
mov r13, QWORD PTR [rdi+224]
movd xmm0, QWORD PTR [rdi+104]
mov r12, QWORD PTR [rbx+224]
movaps XMMWORD PTR [rax-120], xmm8
movaps XMMWORD PTR [rax-136], xmm9
movaps XMMWORD PTR [rax-152], xmm10
movaps XMMWORD PTR [rsp+112], xmm11
movaps XMMWORD PTR [rsp+96], xmm12
movaps XMMWORD PTR [rsp+80], xmm13
movd xmm13, QWORD PTR [rbx+96]
movaps XMMWORD PTR [rsp+64], xmm14
movd xmm14, QWORD PTR [rbx+104]
movaps XMMWORD PTR [rsp+48], xmm15
movd xmm15, QWORD PTR [rdi+96]
mov QWORD PTR [rsp], r13
movdqa XMMWORD PTR [rsp+32], xmm0
stmxcsr DWORD PTR [rsp+24]
mov DWORD PTR [rsp+28], 16256
ldmxcsr DWORD PTR [rsp+28]
mov rcx, QWORD PTR [rbx+56]
xorps xmm12, xmm12
xor rcx, QWORD PTR [rbx+24]
mov rax, QWORD PTR [rbx+48]
xor rax, QWORD PTR [rbx+16]
mov rsi, QWORD PTR [rbx+32]
mov rbp, QWORD PTR [rdi+32]
movd xmm0, rcx
mov rcx, QWORD PTR [rbx+88]
xor rcx, QWORD PTR [rbx+72]
movd xmm7, rax
mov rax, QWORD PTR [rbx+80]
xor rax, QWORD PTR [rbx+64]
mov r14, QWORD PTR [rbx+40]
mov r15, QWORD PTR [rdi+40]
xor rsi, QWORD PTR [rbx]
xor rbp, QWORD PTR [rdi]
movd xmm9, rax
mov rax, QWORD PTR [rdi+48]
xor rax, QWORD PTR [rdi+16]
xor r14, QWORD PTR [rbx+8]
xor r15, QWORD PTR [rdi+8]
movd xmm8, rax
punpcklqdq xmm7, xmm0
mov eax, 1023
shl rax, 52
movd xmm11, rax
punpcklqdq xmm11, xmm11
mov rax, QWORD PTR [rdi+80]
movd xmm0, rcx
mov rcx, QWORD PTR [rdi+56]
xor rcx, QWORD PTR [rdi+24]
punpcklqdq xmm9, xmm0
mov QWORD PTR [rsp+8], 16384
movd xmm0, rcx
mov rcx, QWORD PTR [rdi+88]
xor rcx, QWORD PTR [rdi+72]
xor rax, QWORD PTR [rdi+64]
punpcklqdq xmm8, xmm0
movd xmm0, rcx
movd xmm10, rax
mov rax, 4389456576511
mov QWORD PTR [rsp+16], rax
mov rax, -4389456576512
mov QWORD PTR [rsp+216], rax
punpcklqdq xmm10, xmm0
ALIGN(64)
upx2_main_loop:
mov rdx, rsi
mov r9, rbp
and edx, 131056
and r9d, 131056
movdqu xmm6, XMMWORD PTR [rdx+r12]
lea r8, QWORD PTR [rdx+r12]
movdqu xmm4, XMMWORD PTR [r9+r13]
lea r10, QWORD PTR [r9+r13]
mov ecx, edx
mov eax, edx
xor rax, 32
xor rcx, 48
xor rdx, 16
movd xmm0, r14
movd xmm3, rsi
movd xmm5, rbp
punpcklqdq xmm3, xmm0
movd xmm0, r15
movdqu xmm2, XMMWORD PTR [rax+r12]
movdqu xmm1, XMMWORD PTR [rcx+r12]
paddq xmm2, xmm3
punpcklqdq xmm5, xmm0
paddq xmm1, xmm7
aesenc xmm6, xmm3
aesenc xmm4, xmm5
movdqa xmm0, xmm9
movd rdi, xmm4
paddq xmm0, XMMWORD PTR [rdx+r12]
movdqu XMMWORD PTR [rdx+r12], xmm0
xor edx, edx
movdqu XMMWORD PTR [rax+r12], xmm1
movdqa xmm0, xmm6
movdqu XMMWORD PTR [rcx+r12], xmm2
pxor xmm0, xmm7
movdqu XMMWORD PTR [r8], xmm0
mov ecx, r9d
xor rcx, 48
mov eax, r9d
xor rax, 32
xor r9, 16
movdqa xmm0, xmm10
movdqu xmm1, XMMWORD PTR [rcx+r13]
movdqu xmm2, XMMWORD PTR [rax+r13]
paddq xmm1, xmm8
paddq xmm0, XMMWORD PTR [r9+r13]
paddq xmm2, xmm5
movdqu XMMWORD PTR [r9+r13], xmm0
movd r9, xmm6
movdqu XMMWORD PTR [rax+r13], xmm1
movdqa xmm0, xmm4
movdqu XMMWORD PTR [rcx+r13], xmm2
pxor xmm0, xmm8
movdqu XMMWORD PTR [r10], xmm0
movd rcx, xmm14
mov rax, rcx
movd r10, xmm13
shl rax, 32
movdqa xmm0, xmm6
xor r10, rax
psrldq xmm0, 8
lea r8, QWORD PTR [rcx+rcx]
movd rax, xmm0
add r8d, r9d
mov ecx, -2147483647
or r8, rcx
mov r11, r9
div r8
and r11d, 131056
movaps xmm1, xmm12
mov eax, eax
add r11, r12
shl rdx, 32
add rdx, rax
xor r10, QWORD PTR [r11]
mov rbx, QWORD PTR [r11+8]
lea r8, QWORD PTR [rdx+r9]
movd xmm13, rdx
mov rax, r8
shr rax, 12
movd xmm0, rax
paddq xmm0, xmm11
sqrtsd xmm1, xmm0
movd rdx, xmm1
mov rax, rdx
shr rdx, 19
shr rax, 20
mov rcx, rdx
sub rcx, rax
add rax, QWORD PTR [rsp+216]
sub rcx, QWORD PTR [rsp+16]
mov r13, QWORD PTR [rsp]
imul rcx, rax
mov rax, r10
sub rcx, r8
mov rcx, r9
adc rdx, 0
xor rcx, 32
and ecx, 131056
movd xmm14, rdx
movdqu xmm1, XMMWORD PTR [rcx+r12]
mul r9
paddq xmm1, xmm3
mov r8, rax
xor r8, QWORD PTR [rcx+r12+8]
add r14, r8
movd xmm0, rax
movd xmm2, rdx
xor rdx, QWORD PTR [rcx+r12]
mov rax, r9
xor rax, 48
punpcklqdq xmm2, xmm0
and eax, 131056
add rsi, rdx
xor r9, 16
xor edx, edx
and r9d, 131056
movdqu xmm0, XMMWORD PTR [rax+r12]
paddq xmm0, xmm7
pxor xmm2, XMMWORD PTR [r9+r12]
paddq xmm2, xmm9
movdqu XMMWORD PTR [r9+r12], xmm2
movd r9, xmm15
movdqu XMMWORD PTR [rcx+r12], xmm0
movdqa xmm0, xmm4
mov rcx, QWORD PTR [rsp+32]
movdqu XMMWORD PTR [rax+r12], xmm1
mov rax, rcx
shl rax, 32
movaps xmm1, xmm12
xor r9, rax
psrldq xmm0, 8
lea r8, QWORD PTR [rcx+rcx]
mov QWORD PTR [r11], rsi
add r8d, edi
mov QWORD PTR [r11+8], r14
movd rax, xmm0
mov ecx, -2147483647
or r8, rcx
xor rsi, r10
div r8
mov r10, rdi
xor r14, rbx
mov eax, eax
and r10d, 131056
shl rdx, 32
add r10, r13
add rdx, rax
xor r9, QWORD PTR [r10]
mov r11, QWORD PTR [r10+8]
lea r8, QWORD PTR [rdx+rdi]
mov rax, r8
movd xmm15, rdx
shr rax, 12
movd xmm0, rax
paddq xmm0, xmm11
sqrtsd xmm1, xmm0
movd rdx, xmm1
mov rax, rdx
shr rax, 20
shr rdx, 19
mov rcx, rdx
sub rcx, rax
sub rcx, QWORD PTR [rsp+16]
movdqa xmm9, xmm7
movdqa xmm7, xmm6
add rax, QWORD PTR [rsp+216]
imul rcx, rax
mov rax, r9
sub rcx, r8
mov rcx, rdi
adc rdx, 0
xor rcx, 32
and ecx, 131056
mov QWORD PTR [rsp+32], rdx
movdqu xmm1, XMMWORD PTR [rcx+r13]
mul rdi
paddq xmm1, xmm5
mov r8, rax
xor r8, QWORD PTR [rcx+r13+8]
add r15, r8
movd xmm0, rax
movd xmm2, rdx
xor rdx, QWORD PTR [rcx+r13]
mov rax, rdi
xor rdi, 16
punpcklqdq xmm2, xmm0
xor rax, 48
and edi, 131056
and eax, 131056
add rbp, rdx
pxor xmm2, XMMWORD PTR [rdi+r13]
movdqu xmm0, XMMWORD PTR [rax+r13]
paddq xmm2, xmm10
movdqu XMMWORD PTR [rdi+r13], xmm2
paddq xmm0, xmm8
movdqu XMMWORD PTR [rcx+r13], xmm0
movdqa xmm10, xmm8
movdqu XMMWORD PTR [rax+r13], xmm1
movdqa xmm8, xmm4
mov QWORD PTR [r10], rbp
xor rbp, r9
mov QWORD PTR [r10+8], r15
xor r15, r11
sub QWORD PTR [rsp+8], 1
jne upx2_main_loop
ldmxcsr DWORD PTR [rsp+24]
movaps xmm13, XMMWORD PTR [rsp+80]
lea r11, QWORD PTR [rsp+232]
movaps xmm6, XMMWORD PTR [r11-24]
movaps xmm7, XMMWORD PTR [r11-40]
movaps xmm8, XMMWORD PTR [r11-56]
movaps xmm9, XMMWORD PTR [r11-72]
movaps xmm10, XMMWORD PTR [r11-88]
movaps xmm11, XMMWORD PTR [r11-104]
movaps xmm12, XMMWORD PTR [r11-120]
movaps xmm14, XMMWORD PTR [rsp+64]
movaps xmm15, XMMWORD PTR [rsp+48]
mov rsp, r11
pop r15
pop r14
pop r13
pop r12
pop rdi
pop rsi
pop rbp
pop rbx

View File

@@ -7,6 +7,7 @@
.global cnv2_double_mainloop_sandybridge_asm
.global cnv2_rwz_mainloop_asm
.global cnv2_rwz_double_mainloop_asm
.global cnv2_upx_double_mainloop_zen3_asm
ALIGN(64)
cnv2_mainloop_ivybridge_asm:
@@ -43,3 +44,9 @@ cnv2_rwz_double_mainloop_asm:
#include "cn2/cnv2_rwz_double_main_loop.inc"
ret 0
mov eax, 3735929054
ALIGN(64)
cnv2_upx_double_mainloop_zen3_asm:
#include "cn2/cnv2_upx_double_mainloop_zen3.inc"
ret 0
mov eax, 3735929054

View File

@@ -48,5 +48,12 @@ cnv2_rwz_double_mainloop_asm PROC
mov eax, 3735929054
cnv2_rwz_double_mainloop_asm ENDP
ALIGN(64)
cnv2_upx_double_mainloop_zen3_asm PROC
INCLUDE cn2/cnv2_upx_double_mainloop_zen3.inc
ret 0
mov eax, 3735929054
cnv2_upx_double_mainloop_zen3_asm ENDP
_TEXT_CNV2_MAINLOOP ENDS
END

View File

@@ -278,6 +278,7 @@ typedef int64x2_t __m128i; /* 128-bit vector containing integers */
#define vreinterpretq_s64_m128d(x) vreinterpretq_s64_f64(x)
#define vreinterpretq_u32_m128d(x) vreinterpretq_u32_f64(x)
#define vreinterpretq_u64_m128d(x) vreinterpretq_u64_f64(x)
#define vreinterpretq_f64_m128d(x) (x)
@@ -342,10 +343,10 @@ typedef union ALIGN_STRUCT(16) SIMDVec {
/* Backwards compatibility for compilers with lack of specific type support */
// Older gcc does not define vld1q_u8_x4 type
#if defined(__GNUC__) && !defined(__clang__) && \
((__GNUC__ == 10 && (__GNUC_MINOR__ <= 2)) || \
(__GNUC__ == 9 && (__GNUC_MINOR__ <= 3)) || \
(__GNUC__ == 8 && (__GNUC_MINOR__ <= 4)) || __GNUC__ <= 7)
#if defined(__GNUC__) && !defined(__clang__) && \
((__GNUC__ <= 10 && defined(__arm__)) || \
(__GNUC__ == 10 && __GNUC_MINOR__ < 3 && defined(__aarch64__)) || \
(__GNUC__ <= 9 && defined(__aarch64__)))
FORCE_INLINE uint8x16x4_t _sse2neon_vld1q_u8_x4(const uint8_t *p)
{
uint8x16x4_t ret;
@@ -955,13 +956,34 @@ FORCE_INLINE void _mm_store_si128(__m128i *p, __m128i a)
vst1q_s32((int32_t *) p, vreinterpretq_s32_m128i(a));
}
// Stores four 32-bit integer values as (as a __m128i value) at the address p.
// https://msdn.microsoft.com/en-us/library/vstudio/edk11s13(v=vs.100).aspx
// Stores 128-bits of integer data a at the address p.
// https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm_storeu_si128
FORCE_INLINE void _mm_storeu_si128(__m128i *p, __m128i a)
{
vst1q_s32((int32_t *) p, vreinterpretq_s32_m128i(a));
}
// Stores 64-bits of integer data a at the address p.
// https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm_storeu_si64
FORCE_INLINE void _mm_storeu_si64(void *p, __m128i a)
{
vst1q_lane_s64((int64_t *) p, vreinterpretq_s64_m128i(a), 0);
}
// Stores 32-bits of integer data a at the address p.
// https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm_storeu_si32
FORCE_INLINE void _mm_storeu_si32(void *p, __m128i a)
{
vst1q_lane_s32((int32_t *) p, vreinterpretq_s32_m128i(a), 0);
}
// Stores 16-bits of integer data a at the address p.
// https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm_storeu_si16
FORCE_INLINE void _mm_storeu_si16(void *p, __m128i a)
{
vst1q_lane_s16((int16_t *) p, vreinterpretq_s16_m128i(a), 0);
}
// Stores the lower single - precision, floating - point value.
// https://msdn.microsoft.com/en-us/library/tzz10fbx(v=vs.100).aspx
FORCE_INLINE void _mm_store_ss(float *p, __m128 a)
@@ -2317,20 +2339,34 @@ FORCE_INLINE __m128i _mm_shuffle_epi8(__m128i a, __m128i b)
// ENDFOR
// FORCE_INLINE __m128i _mm_blend_epi16(__m128i a, __m128i b,
// __constrange(0,255) int imm)
#define _mm_blend_epi16(a, b, imm) \
__extension__({ \
const uint16_t _mask[8] = {((imm) & (1 << 0)) ? 0xFFFF : 0x0000, \
((imm) & (1 << 1)) ? 0xFFFF : 0x0000, \
((imm) & (1 << 2)) ? 0xFFFF : 0x0000, \
((imm) & (1 << 3)) ? 0xFFFF : 0x0000, \
((imm) & (1 << 4)) ? 0xFFFF : 0x0000, \
((imm) & (1 << 5)) ? 0xFFFF : 0x0000, \
((imm) & (1 << 6)) ? 0xFFFF : 0x0000, \
((imm) & (1 << 7)) ? 0xFFFF : 0x0000}; \
uint16x8_t _mask_vec = vld1q_u16(_mask); \
uint16x8_t _a = vreinterpretq_u16_m128i(a); \
uint16x8_t _b = vreinterpretq_u16_m128i(b); \
vreinterpretq_m128i_u16(vbslq_u16(_mask_vec, _b, _a)); \
#define _mm_blend_epi16(a, b, imm) \
__extension__({ \
const uint16_t _mask[8] = {((imm) & (1 << 0)) ? (uint16_t) -1 : 0x0, \
((imm) & (1 << 1)) ? (uint16_t) -1 : 0x0, \
((imm) & (1 << 2)) ? (uint16_t) -1 : 0x0, \
((imm) & (1 << 3)) ? (uint16_t) -1 : 0x0, \
((imm) & (1 << 4)) ? (uint16_t) -1 : 0x0, \
((imm) & (1 << 5)) ? (uint16_t) -1 : 0x0, \
((imm) & (1 << 6)) ? (uint16_t) -1 : 0x0, \
((imm) & (1 << 7)) ? (uint16_t) -1 : 0x0}; \
uint16x8_t _mask_vec = vld1q_u16(_mask); \
uint16x8_t _a = vreinterpretq_u16_m128i(a); \
uint16x8_t _b = vreinterpretq_u16_m128i(b); \
vreinterpretq_m128i_u16(vbslq_u16(_mask_vec, _b, _a)); \
})
// Blend packed double-precision (64-bit) floating-point elements from a and b
// using control mask imm8, and store the results in dst.
// https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm_blend_pd
#define _mm_blend_pd(a, b, imm) \
__extension__({ \
const uint64_t _mask[2] = { \
((imm) & (1 << 0)) ? ~UINT64_C(0) : UINT64_C(0), \
((imm) & (1 << 1)) ? ~UINT64_C(0) : UINT64_C(0)}; \
uint64x2_t _mask_vec = vld1q_u64(_mask); \
uint64x2_t _a = vreinterpretq_u64_m128d(a); \
uint64x2_t _b = vreinterpretq_u64_m128d(b); \
vreinterpretq_m128d_u64(vbslq_u64(_mask_vec, _b, _a)); \
})
// Blend packed 8-bit integers from a and b using mask, and store the results in
@@ -2434,8 +2470,7 @@ FORCE_INLINE __m128i _mm_slli_epi64(__m128i a, int imm)
__m128i ret; \
if (unlikely(imm) == 0) { \
ret = a; \
} \
if (likely(0 < (imm) && (imm) < 16)) { \
} else if (likely(0 < (imm) && (imm) < 16)) { \
ret = vreinterpretq_m128i_u16( \
vshlq_u16(vreinterpretq_u16_m128i(a), vdupq_n_s16(-imm))); \
} else { \
@@ -2463,8 +2498,7 @@ FORCE_INLINE __m128i _mm_slli_epi64(__m128i a, int imm)
__m128i ret; \
if (unlikely((imm) == 0)) { \
ret = a; \
} \
if (likely(0 < (imm) && (imm) < 32)) { \
} else if (likely(0 < (imm) && (imm) < 32)) { \
ret = vreinterpretq_m128i_u32( \
vshlq_u32(vreinterpretq_u32_m128i(a), vdupq_n_s32(-imm))); \
} else { \
@@ -2491,8 +2525,7 @@ FORCE_INLINE __m128i _mm_slli_epi64(__m128i a, int imm)
__m128i ret; \
if (unlikely((imm) == 0)) { \
ret = a; \
} \
if (likely(0 < (imm) && (imm) < 64)) { \
} else if (likely(0 < (imm) && (imm) < 64)) { \
ret = vreinterpretq_m128i_u64( \
vshlq_u64(vreinterpretq_u64_m128i(a), vdupq_n_s64(-imm))); \
} else { \
@@ -2520,8 +2553,7 @@ FORCE_INLINE __m128i _mm_slli_epi64(__m128i a, int imm)
__m128i ret; \
if (unlikely((imm) == 0)) { \
ret = a; \
} \
if (likely(0 < (imm) && (imm) < 32)) { \
} else if (likely(0 < (imm) && (imm) < 32)) { \
ret = vreinterpretq_m128i_s32( \
vshlq_s32(vreinterpretq_s32_m128i(a), vdupq_n_s32(-imm))); \
} else { \
@@ -2575,6 +2607,33 @@ FORCE_INLINE __m128i _mm_slli_epi64(__m128i a, int imm)
ret; \
})
// Compute the square root of packed double-precision (64-bit) floating-point
// elements in a, and store the results in dst.
// https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm_sqrt_pd
FORCE_INLINE __m128d _mm_sqrt_pd(__m128d a)
{
#if defined(__aarch64__)
return vreinterpretq_m128d_f64(vsqrtq_f64(vreinterpretq_f64_m128d(a)));
#else
double a0 = sqrt(((double *) &a)[0]);
double a1 = sqrt(((double *) &a)[1]);
return _mm_set_pd(a1, a0);
#endif
}
// Compute the square root of the lower double-precision (64-bit) floating-point
// element in b, store the result in the lower element of dst, and copy the
// upper element from a to the upper element of dst.
// https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm_sqrt_sd
FORCE_INLINE __m128d _mm_sqrt_sd(__m128d a, __m128d b)
{
#if defined(__aarch64__)
return _mm_move_sd(a, _mm_sqrt_pd(b));
#else
return _mm_set_pd(((double *) &a)[1], sqrt(((double *) &b)[0]));
#endif
}
// Shifts the 8 signed or unsigned 16-bit integers in a left by count bits while
// shifting in zeros.
//
@@ -2769,6 +2828,16 @@ FORCE_INLINE int _mm_movemask_epi8(__m128i a)
return vgetq_lane_u8(paired64, 0) | ((int) vgetq_lane_u8(paired64, 8) << 8);
}
// Set each bit of mask dst based on the most significant bit of the
// corresponding packed double-precision (64-bit) floating-point element in a.
// https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm_movemask_pd
FORCE_INLINE int _mm_movemask_pd(__m128d a)
{
uint64x2_t input = vreinterpretq_u64_m128d(a);
uint64x2_t high_bits = vshrq_n_u64(input, 63);
return vgetq_lane_u64(high_bits, 0) | (vgetq_lane_u64(high_bits, 1) << 1);
}
// Copy the lower 64-bit integer in a to dst.
//
// dst[63:0] := a[63:0]
@@ -2944,6 +3013,13 @@ FORCE_INLINE __m128i _mm_subs_epu8(__m128i a, __m128i b)
vqsubq_u8(vreinterpretq_u8_m128i(a), vreinterpretq_u8_m128i(b)));
}
#define _mm_ucomieq_sd _mm_comieq_sd
#define _mm_ucomige_sd _mm_comige_sd
#define _mm_ucomigt_sd _mm_comigt_sd
#define _mm_ucomile_sd _mm_comile_sd
#define _mm_ucomilt_sd _mm_comilt_sd
#define _mm_ucomineq_sd _mm_comineq_sd
// Subtracts the 16 signed 8-bit integers of b from the 16 signed 8-bit integers
// of a and saturates.
//
@@ -3805,6 +3881,32 @@ FORCE_INLINE __m128 _mm_fmadd_ps(__m128 a, __m128 b, __m128 c)
#endif
}
// Alternatively add and subtract packed double-precision (64-bit)
// floating-point elements in a to/from packed elements in b, and store the
// results in dst.
//
// FOR j := 0 to 1
// i := j*64
// IF ((j & 1) == 0)
// dst[i+63:i] := a[i+63:i] - b[i+63:i]
// ELSE
// dst[i+63:i] := a[i+63:i] + b[i+63:i]
// FI
// ENDFOR
//
// https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm_addsub_pd
FORCE_INLINE __m128d _mm_addsub_pd(__m128d a, __m128d b)
{
__m128d mask = _mm_set_pd(1.0f, -1.0f);
#if defined(__aarch64__)
return vreinterpretq_m128d_f64(vfmaq_f64(vreinterpretq_f64_m128d(a),
vreinterpretq_f64_m128d(b),
vreinterpretq_f64_m128d(mask)));
#else
return _mm_add_pd(_mm_mul_pd(b, mask), a);
#endif
}
// Alternatively add and subtract packed single-precision (32-bit)
// floating-point elements in a to/from packed elements in b, and store the
// results in dst.
@@ -4032,6 +4134,7 @@ FORCE_INLINE __m128 _mm_sqrt_ss(__m128 in)
// Computes the approximations of the reciprocal square roots of the four
// single-precision floating point values of in.
// The current precision is 1% error.
// https://msdn.microsoft.com/en-us/library/22hfsh53(v=vs.100).aspx
FORCE_INLINE __m128 _mm_rsqrt_ps(__m128 in)
{
@@ -4240,6 +4343,22 @@ FORCE_INLINE __m128d _mm_max_pd(__m128d a, __m128d b)
#endif
}
// Compare the lower double-precision (64-bit) floating-point elements in a and
// b, store the maximum value in the lower element of dst, and copy the upper
// element from a to the upper element of dst.
// https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm_max_sd
FORCE_INLINE __m128d _mm_max_sd(__m128d a, __m128d b)
{
#if defined(__aarch64__)
return _mm_move_sd(a, _mm_max_pd(a, b));
#else
double *da = (double *) &a;
double *db = (double *) &b;
double c[2] = {fmax(da[0], db[0]), da[1]};
return vld1q_f32((float32_t *) c);
#endif
}
// Computes the pairwise minima of the 16 unsigned 8-bit integers from a and the
// 16 unsigned 8-bit integers from b.
// https://msdn.microsoft.com/ko-kr/library/17k8cf58(v=vs.100).aspxx
@@ -4249,6 +4368,42 @@ FORCE_INLINE __m128i _mm_min_epu8(__m128i a, __m128i b)
vminq_u8(vreinterpretq_u8_m128i(a), vreinterpretq_u8_m128i(b)));
}
// Compare packed double-precision (64-bit) floating-point elements in a and b,
// and store packed minimum values in dst.
// https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm_min_pd
FORCE_INLINE __m128d _mm_min_pd(__m128d a, __m128d b)
{
#if defined(__aarch64__)
return vreinterpretq_m128d_f64(
vminq_f64(vreinterpretq_f64_m128d(a), vreinterpretq_f64_m128d(b)));
#else
uint64_t a0 = (uint64_t) vget_low_u64(vreinterpretq_u64_m128d(a));
uint64_t a1 = (uint64_t) vget_high_u64(vreinterpretq_u64_m128d(a));
uint64_t b0 = (uint64_t) vget_low_u64(vreinterpretq_u64_m128d(b));
uint64_t b1 = (uint64_t) vget_high_u64(vreinterpretq_u64_m128d(b));
uint64_t d[2];
d[0] = (*(double *) &a0) < (*(double *) &b0) ? a0 : b0;
d[1] = (*(double *) &a1) < (*(double *) &b1) ? a1 : b1;
return vreinterpretq_m128d_u64(vld1q_u64(d));
#endif
}
// Compare the lower double-precision (64-bit) floating-point elements in a and
// b, store the minimum value in the lower element of dst, and copy the upper
// element from a to the upper element of dst.
// https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm_min_sd
FORCE_INLINE __m128d _mm_min_sd(__m128d a, __m128d b)
{
#if defined(__aarch64__)
return _mm_move_sd(a, _mm_min_pd(a, b));
#else
double *da = (double *) &a;
double *db = (double *) &b;
double c[2] = {fmin(da[0], db[0]), da[1]};
return vld1q_f32((float32_t *) c);
#endif
}
// Computes the pairwise minima of the 8 signed 16-bit integers from a and the 8
// signed 16-bit integers from b.
// https://msdn.microsoft.com/en-us/library/vstudio/6te997ew(v=vs.100).aspx
@@ -4448,6 +4603,23 @@ FORCE_INLINE __m128i _mm_hadd_epi16(__m128i _a, __m128i _b)
#endif
}
// Horizontally subtract adjacent pairs of double-precision (64-bit)
// floating-point elements in a and b, and pack the results in dst.
// https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm_hsub_pd
FORCE_INLINE __m128d _mm_hsub_pd(__m128d _a, __m128d _b)
{
#if defined(__aarch64__)
return vreinterpretq_m128d_f64(vsubq_f64(
vuzp1q_f64(vreinterpretq_f64_m128d(_a), vreinterpretq_f64_m128d(_b)),
vuzp2q_f64(vreinterpretq_f64_m128d(_a), vreinterpretq_f64_m128d(_b))));
#else
double *da = (double *) &_a;
double *db = (double *) &_b;
double c[] = {da[0] - da[1], db[0] - db[1]};
return vreinterpretq_m128d_u64(vld1q_u64((uint64_t *) c));
#endif
}
// Horizontally substract adjacent pairs of single-precision (32-bit)
// floating-point elements in a and b, and pack the results in dst.
// https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm_hsub_ps
@@ -4808,6 +4980,57 @@ FORCE_INLINE __m128d _mm_cmpeq_pd(__m128d a, __m128d b)
#endif
}
// Compare the lower double-precision (64-bit) floating-point elements in a and
// b for equality, store the result in the lower element of dst, and copy the
// upper element from a to the upper element of dst.
// https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm_cmpeq_sd
FORCE_INLINE __m128d _mm_cmpeq_sd(__m128d a, __m128d b)
{
return _mm_move_sd(a, _mm_cmpeq_pd(a, b));
}
// Compare packed double-precision (64-bit) floating-point elements in a and b
// for greater-than-or-equal, and store the results in dst.
// https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm_cmpge_pd
FORCE_INLINE __m128d _mm_cmpge_pd(__m128d a, __m128d b)
{
#if defined(__aarch64__)
return vreinterpretq_m128d_u64(
vcgeq_f64(vreinterpretq_f64_m128d(a), vreinterpretq_f64_m128d(b)));
#else
uint64_t a0 = (uint64_t) vget_low_u64(vreinterpretq_u64_m128d(a));
uint64_t a1 = (uint64_t) vget_high_u64(vreinterpretq_u64_m128d(a));
uint64_t b0 = (uint64_t) vget_low_u64(vreinterpretq_u64_m128d(b));
uint64_t b1 = (uint64_t) vget_high_u64(vreinterpretq_u64_m128d(b));
uint64_t d[2];
d[0] = (*(double *) &a0) >= (*(double *) &b0) ? ~UINT64_C(0) : UINT64_C(0);
d[1] = (*(double *) &a1) >= (*(double *) &b1) ? ~UINT64_C(0) : UINT64_C(0);
return vreinterpretq_m128d_u64(vld1q_u64(d));
#endif
}
// Compare the lower double-precision (64-bit) floating-point elements in a and
// b for greater-than-or-equal, store the result in the lower element of dst,
// and copy the upper element from a to the upper element of dst.
// https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm_cmpge_sd
FORCE_INLINE __m128d _mm_cmpge_sd(__m128d a, __m128d b)
{
#if defined(__aarch64__)
return _mm_move_sd(a, _mm_cmpge_pd(a, b));
#else
// expand "_mm_cmpge_pd()" to reduce unnecessary operations
uint64_t a0 = (uint64_t) vget_low_u64(vreinterpretq_u64_m128d(a));
uint64_t a1 = (uint64_t) vget_high_u64(vreinterpretq_u64_m128d(a));
uint64_t b0 = (uint64_t) vget_low_u64(vreinterpretq_u64_m128d(b));
uint64_t d[2];
d[0] = (*(double *) &a0) >= (*(double *) &b0) ? ~UINT64_C(0) : UINT64_C(0);
d[1] = a1;
return vreinterpretq_m128d_u64(vld1q_u64(d));
#endif
}
// Compares the 8 signed or unsigned 16-bit integers in a and the 8 signed or
// unsigned 16-bit integers in b for equality.
// https://msdn.microsoft.com/en-us/library/2ay060te(v=vs.100).aspx
@@ -4872,6 +5095,95 @@ FORCE_INLINE __m128d _mm_cmplt_pd(__m128d a, __m128d b)
#endif
}
// Compare the lower double-precision (64-bit) floating-point elements in a and
// b for less-than, store the result in the lower element of dst, and copy the
// upper element from a to the upper element of dst.
// https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm_cmplt_sd
FORCE_INLINE __m128d _mm_cmplt_sd(__m128d a, __m128d b)
{
#if defined(__aarch64__)
return _mm_move_sd(a, _mm_cmplt_pd(a, b));
#else
uint64_t a0 = (uint64_t) vget_low_u64(vreinterpretq_u64_m128d(a));
uint64_t a1 = (uint64_t) vget_high_u64(vreinterpretq_u64_m128d(a));
uint64_t b0 = (uint64_t) vget_low_u64(vreinterpretq_u64_m128d(b));
uint64_t d[2];
d[0] = (*(double *) &a0) < (*(double *) &b0) ? ~UINT64_C(0) : UINT64_C(0);
d[1] = a1;
return vreinterpretq_m128d_u64(vld1q_u64(d));
#endif
}
// Compare packed double-precision (64-bit) floating-point elements in a and b
// for not-equal, and store the results in dst.
// https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm_cmpneq_pd
FORCE_INLINE __m128d _mm_cmpneq_pd(__m128d a, __m128d b)
{
#if defined(__aarch64__)
return vreinterpretq_m128d_s32(vmvnq_s32(vreinterpretq_s32_u64(
vceqq_f64(vreinterpretq_f64_m128d(a), vreinterpretq_f64_m128d(b)))));
#else
// (a == b) -> (a_lo == b_lo) && (a_hi == b_hi)
uint32x4_t cmp =
vceqq_u32(vreinterpretq_u32_m128d(a), vreinterpretq_u32_m128d(b));
uint32x4_t swapped = vrev64q_u32(cmp);
return vreinterpretq_m128d_u32(vmvnq_u32(vandq_u32(cmp, swapped)));
#endif
}
// Compare the lower double-precision (64-bit) floating-point elements in a and
// b for not-equal, store the result in the lower element of dst, and copy the
// upper element from a to the upper element of dst.
// https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm_cmpneq_sd
FORCE_INLINE __m128d _mm_cmpneq_sd(__m128d a, __m128d b)
{
return _mm_move_sd(a, _mm_cmpneq_pd(a, b));
}
// Compare packed double-precision (64-bit) floating-point elements in a and b
// for not-greater-than-or-equal, and store the results in dst.
// https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm_cmpnge_pd
FORCE_INLINE __m128d _mm_cmpnge_pd(__m128d a, __m128d b)
{
return _mm_cmplt_pd(a, b);
}
// Compare the lower double-precision (64-bit) floating-point elements in a and
// b for not-greater-than-or-equal, store the result in the lower element of
// dst, and copy the upper element from a to the upper element of dst.
// https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm_cmpnge_sd
FORCE_INLINE __m128d _mm_cmpnge_sd(__m128d a, __m128d b)
{
return _mm_cmplt_sd(a, b);
}
// Compare packed double-precision (64-bit) floating-point elements in a and b
// for not-greater-than, and store the results in dst.
// https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_cmpngt_pd
#define _mm_cmpngt_pd(a, b) _mm_cmple_pd(a, b)
// Compare the lower double-precision (64-bit) floating-point element in a and b
// for equality, and return the boolean result (0 or 1).
// https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm_comieq_sd
FORCE_INLINE int _mm_comieq_sd(__m128d a, __m128d b)
{
#if defined(__aarch64__)
return !!vgetq_lane_u64(vceqq_f64(a, b), 0);
#else
uint32x4_t a_not_nan =
vceqq_u32(vreinterpretq_u32_m128d(a), vreinterpretq_u32_m128d(a));
uint32x4_t b_not_nan =
vceqq_u32(vreinterpretq_u32_m128d(b), vreinterpretq_u32_m128d(b));
uint32x4_t a_and_b_not_nan = vandq_u32(a_not_nan, b_not_nan);
uint32x4_t a_eq_b =
vceqq_u32(vreinterpretq_u32_m128d(a), vreinterpretq_u32_m128d(b));
uint64x2_t and_results = vandq_u64(vreinterpretq_u64_u32(a_and_b_not_nan),
vreinterpretq_u64_u32(a_eq_b));
return !!vgetq_lane_u64(and_results, 0);
#endif
}
// Compares the 16 signed 8-bit integers in a and the 16 signed 8-bit integers
// in b for greater than.
//
@@ -4887,6 +5199,90 @@ FORCE_INLINE __m128i _mm_cmpgt_epi8(__m128i a, __m128i b)
vcgtq_s8(vreinterpretq_s8_m128i(a), vreinterpretq_s8_m128i(b)));
}
// Compare packed double-precision (64-bit) floating-point elements in a and b
// for greater-than, and store the results in dst.
// https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm_cmpgt_pd
FORCE_INLINE __m128d _mm_cmpgt_pd(__m128d a, __m128d b)
{
#if defined(__aarch64__)
return vreinterpretq_m128d_u64(
vcgtq_f64(vreinterpretq_f64_m128d(a), vreinterpretq_f64_m128d(b)));
#else
uint64_t a0 = (uint64_t) vget_low_u64(vreinterpretq_u64_m128d(a));
uint64_t a1 = (uint64_t) vget_high_u64(vreinterpretq_u64_m128d(a));
uint64_t b0 = (uint64_t) vget_low_u64(vreinterpretq_u64_m128d(b));
uint64_t b1 = (uint64_t) vget_high_u64(vreinterpretq_u64_m128d(b));
uint64_t d[2];
d[0] = (*(double *) &a0) > (*(double *) &b0) ? ~UINT64_C(0) : UINT64_C(0);
d[1] = (*(double *) &a1) > (*(double *) &b1) ? ~UINT64_C(0) : UINT64_C(0);
return vreinterpretq_m128d_u64(vld1q_u64(d));
#endif
}
// Compare the lower double-precision (64-bit) floating-point elements in a and
// b for greater-than, store the result in the lower element of dst, and copy
// the upper element from a to the upper element of dst.
// https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm_cmpgt_sd
FORCE_INLINE __m128d _mm_cmpgt_sd(__m128d a, __m128d b)
{
#if defined(__aarch64__)
return _mm_move_sd(a, _mm_cmpgt_pd(a, b));
#else
// expand "_mm_cmpge_pd()" to reduce unnecessary operations
uint64_t a0 = (uint64_t) vget_low_u64(vreinterpretq_u64_m128d(a));
uint64_t a1 = (uint64_t) vget_high_u64(vreinterpretq_u64_m128d(a));
uint64_t b0 = (uint64_t) vget_low_u64(vreinterpretq_u64_m128d(b));
uint64_t d[2];
d[0] = (*(double *) &a0) > (*(double *) &b0) ? ~UINT64_C(0) : UINT64_C(0);
d[1] = a1;
return vreinterpretq_m128d_u64(vld1q_u64(d));
#endif
}
// Compare packed double-precision (64-bit) floating-point elements in a and b
// for less-than-or-equal, and store the results in dst.
// https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm_cmple_pd
FORCE_INLINE __m128d _mm_cmple_pd(__m128d a, __m128d b)
{
#if defined(__aarch64__)
return vreinterpretq_m128d_u64(
vcleq_f64(vreinterpretq_f64_m128d(a), vreinterpretq_f64_m128d(b)));
#else
uint64_t a0 = (uint64_t) vget_low_u64(vreinterpretq_u64_m128d(a));
uint64_t a1 = (uint64_t) vget_high_u64(vreinterpretq_u64_m128d(a));
uint64_t b0 = (uint64_t) vget_low_u64(vreinterpretq_u64_m128d(b));
uint64_t b1 = (uint64_t) vget_high_u64(vreinterpretq_u64_m128d(b));
uint64_t d[2];
d[0] = (*(double *) &a0) <= (*(double *) &b0) ? ~UINT64_C(0) : UINT64_C(0);
d[1] = (*(double *) &a1) <= (*(double *) &b1) ? ~UINT64_C(0) : UINT64_C(0);
return vreinterpretq_m128d_u64(vld1q_u64(d));
#endif
}
// Compare the lower double-precision (64-bit) floating-point elements in a and
// b for less-than-or-equal, store the result in the lower element of dst, and
// copy the upper element from a to the upper element of dst.
// https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm_cmple_sd
FORCE_INLINE __m128d _mm_cmple_sd(__m128d a, __m128d b)
{
#if defined(__aarch64__)
return _mm_move_sd(a, _mm_cmple_pd(a, b));
#else
// expand "_mm_cmpge_pd()" to reduce unnecessary operations
uint64_t a0 = (uint64_t) vget_low_u64(vreinterpretq_u64_m128d(a));
uint64_t a1 = (uint64_t) vget_high_u64(vreinterpretq_u64_m128d(a));
uint64_t b0 = (uint64_t) vget_low_u64(vreinterpretq_u64_m128d(b));
uint64_t d[2];
d[0] = (*(double *) &a0) <= (*(double *) &b0) ? ~UINT64_C(0) : UINT64_C(0);
d[1] = a1;
return vreinterpretq_m128d_u64(vld1q_u64(d));
#endif
}
// Compares the 8 signed 16-bit integers in a and the 8 signed 16-bit integers
// in b for less than.
//
@@ -4944,31 +5340,9 @@ FORCE_INLINE __m128i _mm_cmpgt_epi64(__m128i a, __m128i b)
return vreinterpretq_m128i_u64(
vcgtq_s64(vreinterpretq_s64_m128i(a), vreinterpretq_s64_m128i(b)));
#else
// ARMv7 lacks vcgtq_s64.
// This is based off of Clang's SSE2 polyfill:
// (a > b) -> ((a_hi > b_hi) || (a_lo > b_lo && a_hi == b_hi))
// Mask the sign bit out since we need a signed AND an unsigned comparison
// and it is ugly to try and split them.
int32x4_t mask = vreinterpretq_s32_s64(vdupq_n_s64(0x80000000ull));
int32x4_t a_mask = veorq_s32(vreinterpretq_s32_m128i(a), mask);
int32x4_t b_mask = veorq_s32(vreinterpretq_s32_m128i(b), mask);
// Check if a > b
int64x2_t greater = vreinterpretq_s64_u32(vcgtq_s32(a_mask, b_mask));
// Copy upper mask to lower mask
// a_hi > b_hi
int64x2_t gt_hi = vshrq_n_s64(greater, 63);
// Copy lower mask to upper mask
// a_lo > b_lo
int64x2_t gt_lo = vsliq_n_s64(greater, greater, 32);
// Compare for equality
int64x2_t equal = vreinterpretq_s64_u32(vceqq_s32(a_mask, b_mask));
// Copy upper mask to lower mask
// a_hi == b_hi
int64x2_t eq_hi = vshrq_n_s64(equal, 63);
// a_hi > b_hi || (a_lo > b_lo && a_hi == b_hi)
int64x2_t ret = vorrq_s64(gt_hi, vandq_s64(gt_lo, eq_hi));
return vreinterpretq_m128i_s64(ret);
return vreinterpretq_m128i_s64(vshrq_n_s64(
vqsubq_s64(vreinterpretq_s64_m128i(b), vreinterpretq_s64_m128i(a)),
63));
#endif
}
@@ -5368,6 +5742,28 @@ FORCE_INLINE __m128d _mm_cvtepi32_pd(__m128i a)
#endif
}
// Convert packed signed 32-bit integers in a to packed double-precision
// (64-bit) floating-point elements, and store the results in dst.
//
// FOR j := 0 to 1
// i := j*32
// m := j*64
// dst[m+63:m] := Convert_Int32_To_FP64(a[i+31:i])
// ENDFOR
//
// https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm_cvtpi32_pd
FORCE_INLINE __m128d _mm_cvtpi32_pd(__m64 a)
{
#if defined(__aarch64__)
return vreinterpretq_m128d_f64(
vcvtq_f64_s64(vmovl_s32(vreinterpret_s32_m64(a))));
#else
double a0 = (double) vget_lane_s32(vreinterpret_s32_m64(a), 0);
double a1 = (double) vget_lane_s32(vreinterpret_s32_m64(a), 1);
return _mm_set_pd(a1, a0);
#endif
}
// Converts the four unsigned 8-bit integers in the lower 16 bits to four
// unsigned 32-bit integers.
FORCE_INLINE __m128i _mm_cvtepu8_epi16(__m128i a)
@@ -5647,6 +6043,15 @@ FORCE_INLINE __m128d _mm_load1_pd(const double *p)
// https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm_load_pd1
#define _mm_load_pd1 _mm_load1_pd
// Load a double-precision (64-bit) floating-point element from memory into both
// elements of dst.
//
// dst[63:0] := MEM[mem_addr+63:mem_addr]
// dst[127:64] := MEM[mem_addr+63:mem_addr]
//
// https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm_loaddup_pd
#define _mm_loaddup_pd _mm_load1_pd
// Load a double-precision (64-bit) floating-point element from memory into the
// upper element of dst, and copy the lower element from a to dst. mem_addr does
// not need to be aligned on any particular boundary.
@@ -6986,6 +7391,14 @@ FORCE_INLINE void _mm_sfence(void)
__sync_synchronize();
}
// Store 64-bits of integer data from a into memory using a non-temporal memory
// hint.
// https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm_stream_pi
FORCE_INLINE void _mm_stream_pi(__m64 *p, __m64 a)
{
vst1_s64((int64_t *) p, vreinterpret_s64_m64(a));
}
// Store 128-bits (composed of 4 packed single-precision (32-bit) floating-
// point elements) from a into memory using a non-temporal memory hint.
// https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm_stream_ps
@@ -6998,6 +7411,22 @@ FORCE_INLINE void _mm_stream_ps(float *p, __m128 a)
#endif
}
// Store 128-bits (composed of 2 packed double-precision (64-bit) floating-point
// elements) from a into memory using a non-temporal memory hint. mem_addr must
// be aligned on a 16-byte boundary or a general-protection exception may be
// generated.
// https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm_stream_pd
FORCE_INLINE void _mm_stream_pd(double *p, __m128d a)
{
#if __has_builtin(__builtin_nontemporal_store)
__builtin_nontemporal_store(a, (float32x4_t *) p);
#elif defined(__aarch64__)
vst1q_f64(p, vreinterpretq_f64_m128d(a));
#else
vst1q_s64((int64_t *) p, vreinterpretq_s64_m128d(a));
#endif
}
// Stores the data in a to the address p without polluting the caches. If the
// cache line containing address p is already in the cache, the cache will be
// updated.
@@ -7011,6 +7440,15 @@ FORCE_INLINE void _mm_stream_si128(__m128i *p, __m128i a)
#endif
}
// Store 32-bit integer a into memory using a non-temporal hint to minimize
// cache pollution. If the cache line containing address mem_addr is already in
// the cache, the cache will be updated.
// https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm_stream_si32
FORCE_INLINE void _mm_stream_si32(int *p, int a)
{
vst1q_lane_s32((int32_t *) p, vdupq_n_s32(a), 0);
}
// Load 128-bits of integer data from memory into dst using a non-temporal
// memory hint. mem_addr must be aligned on a 16-byte boundary or a
// general-protection exception may be generated.
@@ -7065,6 +7503,12 @@ FORCE_INLINE void _mm_maskmove_si64(__m64 a, __m64 mask, char *mem_addr)
vst1_s8((int8_t *) mem_addr, masked);
}
// Conditionally store 8-bit integer elements from a into memory using mask
// (elements are not stored when the highest bit is not set in the corresponding
// element) and a non-temporal memory hint.
// https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_m_maskmovq
#define _m_maskmovq(a, mask, mem_addr) _mm_maskmove_si64(a, mask, mem_addr)
// Free aligned memory that was allocated with _mm_malloc.
// https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm_free
FORCE_INLINE void _mm_free(void *addr)

View File

@@ -41,7 +41,7 @@ public:
size_t size = 0;
inline bool isFullyAllocated() const { return allocated == total; }
inline double percent() const { return allocated == 0 ? 0.0 : static_cast<double>(allocated) / total * 100.0; }
inline double percent() const { return total == 0 ? 0.0 : static_cast<double>(allocated) / total * 100.0; }
inline void reset() { allocated = 0; total = 0; size = 0; }
inline HugePagesInfo &operator+=(const HugePagesInfo &other)

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@@ -0,0 +1,17 @@
db 72, 185, 0, 0, 0, 0, 0, 0, 0, 0, 81
db 72, 185, 0, 0, 0, 0, 0, 0, 0, 0, 81
db 72, 185, 0, 0, 0, 0, 0, 0, 0, 0, 81
db 72, 185, 0, 0, 0, 0, 0, 0, 0, 0, 81
db 72, 185, 0, 0, 0, 0, 0, 0, 0, 0, 81
db 72, 185, 0, 0, 0, 0, 0, 0, 0, 0, 81
db 72, 185, 0, 0, 0, 0, 0, 0, 0, 0, 81
db 72, 185, 0, 0, 0, 0, 0, 0, 0, 0, 81
db 72, 185, 0, 0, 0, 0, 0, 0, 0, 0, 81
db 72, 185, 0, 0, 0, 0, 0, 0, 0, 0, 81
db 72, 185, 0, 0, 0, 0, 0, 0, 0, 0, 81
db 72, 185, 0, 0, 0, 0, 0, 0, 0, 0, 81
db 72, 185, 0, 0, 0, 0, 0, 0, 0, 0, 81
db 72, 185, 0, 0, 0, 0, 0, 0, 0, 0, 81
db 72, 185, 0, 0, 0, 0, 0, 0, 0, 0, 81
db 72, 185, 0, 0, 0, 0, 0, 0, 0, 0, 81
add rsp, 128

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@@ -22,6 +22,7 @@
mov rsi, rdx ;# uint8_t* scratchpad
mov rax, rbp
ror rbp, 32
;# zero integer registers
xor r8, r8

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@@ -35,6 +35,7 @@
mov rbx, r9 ;# loop counter
mov rax, rbp
ror rbp, 32
;# zero integer registers
xor r8, r8

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@@ -1,17 +1,16 @@
mov ecx, ebp ;# ecx = ma
and ecx, RANDOMX_DATASET_BASE_MASK
xor r8, qword ptr [rdi+rcx]
ror rbp, 32 ;# swap "ma" and "mx"
xor rbp, rax ;# modify "mx"
mov edx, ebp ;# edx = mx
and edx, RANDOMX_DATASET_BASE_MASK
prefetchnta byte ptr [rdi+rdx]
ror rbp, 32 ;# swap "ma" and "mx"
mov edx, ebp ;# edx = ma
and edx, RANDOMX_DATASET_BASE_MASK
lea rcx, [rdi+rdx] ;# dataset cache line
xor r8, qword ptr [rcx+0]
xor r9, qword ptr [rcx+8]
xor r10, qword ptr [rcx+16]
xor r11, qword ptr [rcx+24]
xor r12, qword ptr [rcx+32]
xor r13, qword ptr [rcx+40]
xor r14, qword ptr [rcx+48]
xor r15, qword ptr [rcx+56]
xor r9, qword ptr [rdi+rcx+8]
xor r10, qword ptr [rdi+rcx+16]
xor r11, qword ptr [rdi+rcx+24]
xor r12, qword ptr [rdi+rcx+32]
xor r13, qword ptr [rdi+rcx+40]
xor r14, qword ptr [rdi+rcx+48]
xor r15, qword ptr [rdi+rcx+56]

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@@ -1,17 +0,0 @@
mov rcx, rbp ;# ecx = ma
shr rcx, 32
and ecx, RANDOMX_DATASET_BASE_MASK
xor r8, qword ptr [rdi+rcx]
xor rbp, rax ;# modify "mx"
mov edx, ebp ;# edx = mx
and edx, RANDOMX_DATASET_BASE_MASK
prefetchnta byte ptr [rdi+rdx]
ror rbp, 32 ;# swap "ma" and "mx"
xor r9, qword ptr [rdi+rcx+8]
xor r10, qword ptr [rdi+rcx+16]
xor r11, qword ptr [rdi+rcx+24]
xor r12, qword ptr [rdi+rcx+32]
xor r13, qword ptr [rdi+rcx+40]
xor r14, qword ptr [rdi+rcx+48]
xor r15, qword ptr [rdi+rcx+56]

View File

@@ -7,4 +7,4 @@
xor r13, qword ptr [rsp+16]
xor r14, qword ptr [rsp+8]
xor r15, qword ptr [rsp+0]
add rsp, 72
add rsp, 200

View File

@@ -1,4 +1,4 @@
sub rsp, 72
sub rsp, 200
mov qword ptr [rsp+64], rbx
mov qword ptr [rsp+56], r8
mov qword ptr [rsp+48], r9
@@ -8,10 +8,10 @@
mov qword ptr [rsp+16], r13
mov qword ptr [rsp+8], r14
mov qword ptr [rsp+0], r15
xor rbp, rax ;# modify "mx"
ror rbp, 32 ;# swap "ma" and "mx"
mov ebx, ebp ;# ecx = ma
and ebx, RANDOMX_DATASET_BASE_MASK
shr ebx, 6 ;# ebx = Dataset block number
xor rbp, rax ;# modify "mx"
mov rbx, rbp ;# ebx = ma
shr rbx, 38
and ebx, RANDOMX_DATASET_BASE_MASK / 64 ;# ebx = Dataset block number
;# add ebx, datasetOffset / 64
;# call 32768

View File

@@ -304,6 +304,9 @@ literal_v14: .fill 2,8,0
literal_v15: .fill 2,8,0
DECL(randomx_program_aarch64_vm_instructions_end):
# Calculate dataset pointer for dataset read
# Do it here to break false dependency from readReg2 and readReg3 (see next line)
lsr x10, x9, 32
# mx ^= r[readReg2] ^ r[readReg3];
eor x9, x9, x18
@@ -321,8 +324,6 @@ DECL(randomx_program_aarch64_cacheline_align_mask1):
# mx <-> ma
ror x9, x9, 32
# Calculate dataset pointer for dataset read
mov w10, w9
DECL(randomx_program_aarch64_cacheline_align_mask2):
# Actual mask will be inserted by JIT compiler
and x10, x10, 1

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@@ -110,13 +110,12 @@ namespace randomx {
#define ADDR(x) ((uint8_t*)&x)
# endif
#define codePrefetchScratchpad ADDR(randomx_prefetch_scratchpad)
#define codePrefetchScratchpadEnd ADDR(randomx_prefetch_scratchpad_end)
#define codePrologue ADDR(randomx_program_prologue)
#define codeLoopBegin ADDR(randomx_program_loop_begin)
#define codeLoopLoad ADDR(randomx_program_loop_load)
#define codeLoopLoadXOP ADDR(randomx_program_loop_load_xop)
#define codeProgamStart ADDR(randomx_program_start)
#define codeReadDataset ADDR(randomx_program_read_dataset)
#define codeReadDatasetLightSshInit ADDR(randomx_program_read_dataset_sshash_init)
#define codeReadDatasetLightSshFin ADDR(randomx_program_read_dataset_sshash_fin)
#define codeDatasetInit ADDR(randomx_dataset_init)
@@ -134,10 +133,10 @@ namespace randomx {
#define codeShhEnd ADDR(randomx_sshash_end)
#define codeShhInit ADDR(randomx_sshash_init)
#define prefetchScratchpadSize (codePrefetchScratchpadEnd - codePrefetchScratchpad)
#define prologueSize (codeLoopBegin - codePrologue)
#define loopLoadSize (codeLoopLoadXOP - codeLoopLoad)
#define loopLoadXOPSize (codeProgamStart - codeLoopLoadXOP)
#define readDatasetSize (codeReadDatasetLightSshInit - codeReadDataset)
#define readDatasetLightInitSize (codeReadDatasetLightSshFin - codeReadDatasetLightSshInit)
#define readDatasetLightFinSize (codeLoopStore - codeReadDatasetLightSshFin)
#define loopStoreSize (codeLoopEnd - codeLoopStore)
@@ -321,26 +320,13 @@ namespace randomx {
vm_flags = flags;
generateProgramPrologue(prog, pcfg);
uint8_t* p;
uint32_t n;
if (flags & RANDOMX_FLAG_AMD) {
p = RandomX_CurrentConfig.codeReadDatasetRyzenTweaked;
n = RandomX_CurrentConfig.codeReadDatasetRyzenTweakedSize;
}
else {
p = RandomX_CurrentConfig.codeReadDatasetTweaked;
n = RandomX_CurrentConfig.codeReadDatasetTweakedSize;
}
memcpy(code + codePos, p, n);
codePos += n;
emit(codeReadDataset, readDatasetSize, code, codePos);
generateProgramEpilogue(prog, pcfg);
}
void JitCompilerX86::generateProgramLight(Program& prog, ProgramConfiguration& pcfg, uint32_t datasetOffset) {
generateProgramPrologue(prog, pcfg);
emit(RandomX_CurrentConfig.codeReadDatasetLightSshInitTweaked, readDatasetLightInitSize, code, codePos);
emit(codeReadDatasetLightSshInit, readDatasetLightInitSize, code, codePos);
*(uint32_t*)(code + codePos) = 0xc381;
codePos += 2;
emit32(datasetOffset / CacheLineSize, code, codePos);
@@ -428,7 +414,10 @@ namespace randomx {
xmrig::RxFix::setMainLoopBounds(mainLoopBounds);
# endif
memcpy(code + prologueSize - 48, &pcfg.eMask, sizeof(pcfg.eMask));
imul_rcp_storage = code + (ADDR(randomx_program_imul_rcp_store) - codePrologue) + 2;
imul_rcp_storage_used = 0;
memcpy(imul_rcp_storage - 34, &pcfg.eMask, sizeof(pcfg.eMask));
codePos = codePosFirst;
prevCFROUND = 0;
@@ -464,7 +453,7 @@ namespace randomx {
void JitCompilerX86::generateProgramEpilogue(Program& prog, ProgramConfiguration& pcfg) {
*(uint64_t*)(code + codePos) = 0xc03349c08b49ull + (static_cast<uint64_t>(pcfg.readReg0) << 16) + (static_cast<uint64_t>(pcfg.readReg1) << 40);
codePos += 6;
emit(RandomX_CurrentConfig.codePrefetchScratchpadTweaked, prefetchScratchpadSize, code, codePos);
emit(RandomX_CurrentConfig.codePrefetchScratchpadTweaked, RandomX_CurrentConfig.codePrefetchScratchpadTweakedSize, code, codePos);
memcpy(code + codePos, codeLoopStore, loopStoreSize);
codePos += loopStoreSize;
@@ -1012,13 +1001,24 @@ namespace randomx {
uint64_t divisor = instr.getImm32();
if (!isZeroOrPowerOf2(divisor)) {
*(uint32_t*)(p + pos) = 0xb848;
pos += 2;
emit64(randomx_reciprocal_fast(divisor), p, pos);
const uint32_t dst = instr.dst % RegistersCount;
emit32(0xc0af0f4c + (dst << 27), p, pos);
const uint64_t reciprocal = randomx_reciprocal_fast(divisor);
if (imul_rcp_storage_used < 16) {
*(uint64_t*)(imul_rcp_storage) = reciprocal;
*(uint64_t*)(p + pos) = 0x2444AF0F4Cull + (dst << 27) + (static_cast<uint64_t>(248 - imul_rcp_storage_used * 8) << 40);
++imul_rcp_storage_used;
imul_rcp_storage += 11;
pos += 6;
}
else {
*(uint32_t*)(p + pos) = 0xb848;
pos += 2;
emit64(reciprocal, p, pos);
emit32(0xc0af0f4c + (dst << 27), p, pos);
}
registerUsage[dst] = pos;
}

View File

@@ -104,6 +104,9 @@ namespace randomx {
uint8_t* allocatedCode = nullptr;
size_t allocatedSize = 0;
uint8_t* imul_rcp_storage = nullptr;
uint32_t imul_rcp_storage_used = 0;
void generateProgramPrologue(Program&, ProgramConfiguration&);
void generateProgramEpilogue(Program&, ProgramConfiguration&);
template<bool rax>

View File

@@ -38,15 +38,16 @@
#endif
.global DECL(randomx_prefetch_scratchpad)
.global DECL(randomx_prefetch_scratchpad_bmi2)
.global DECL(randomx_prefetch_scratchpad_end)
.global DECL(randomx_program_prologue)
.global DECL(randomx_program_prologue_first_load)
.global DECL(randomx_program_imul_rcp_store)
.global DECL(randomx_program_loop_begin)
.global DECL(randomx_program_loop_load)
.global DECL(randomx_program_loop_load_xop)
.global DECL(randomx_program_start)
.global DECL(randomx_program_read_dataset)
.global DECL(randomx_program_read_dataset_ryzen)
.global DECL(randomx_program_read_dataset_sshash_init)
.global DECL(randomx_program_read_dataset_sshash_fin)
.global DECL(randomx_program_loop_store)
@@ -79,6 +80,13 @@ DECL(randomx_prefetch_scratchpad):
and edx, RANDOMX_SCRATCHPAD_MASK
prefetcht0 [rsi+rdx]
DECL(randomx_prefetch_scratchpad_bmi2):
rorx rdx, rax, 32
and eax, RANDOMX_SCRATCHPAD_MASK
prefetcht0 [rsi+rax]
and edx, RANDOMX_SCRATCHPAD_MASK
prefetcht0 [rsi+rdx]
DECL(randomx_prefetch_scratchpad_end):
.balign 64
@@ -106,11 +114,15 @@ DECL(randomx_program_prologue_first_load):
nop
nop
nop
jmp DECL(randomx_program_loop_begin)
jmp DECL(randomx_program_imul_rcp_store)
.balign 64
#include "asm/program_xmm_constants.inc"
DECL(randomx_program_imul_rcp_store):
#include "asm/program_imul_rcp_store.inc"
jmp DECL(randomx_program_loop_begin)
.balign 64
DECL(randomx_program_loop_begin):
nop
@@ -127,9 +139,6 @@ DECL(randomx_program_start):
DECL(randomx_program_read_dataset):
#include "asm/program_read_dataset.inc"
DECL(randomx_program_read_dataset_ryzen):
#include "asm/program_read_dataset_ryzen.inc"
DECL(randomx_program_read_dataset_sshash_init):
#include "asm/program_read_dataset_sshash_init.inc"

View File

@@ -29,15 +29,16 @@ IFDEF RAX
_RANDOMX_JITX86_STATIC SEGMENT PAGE READ EXECUTE
PUBLIC randomx_prefetch_scratchpad
PUBLIC randomx_prefetch_scratchpad_bmi2
PUBLIC randomx_prefetch_scratchpad_end
PUBLIC randomx_program_prologue
PUBLIC randomx_program_prologue_first_load
PUBLIC randomx_program_imul_rcp_store
PUBLIC randomx_program_loop_begin
PUBLIC randomx_program_loop_load
PUBLIC randomx_program_loop_load_xop
PUBLIC randomx_program_start
PUBLIC randomx_program_read_dataset
PUBLIC randomx_program_read_dataset_ryzen
PUBLIC randomx_program_read_dataset_sshash_init
PUBLIC randomx_program_read_dataset_sshash_fin
PUBLIC randomx_dataset_init
@@ -69,6 +70,14 @@ randomx_prefetch_scratchpad PROC
prefetcht0 [rsi+rdx]
randomx_prefetch_scratchpad ENDP
randomx_prefetch_scratchpad_bmi2 PROC
rorx rdx, rax, 32
and eax, RANDOMX_SCRATCHPAD_MASK
prefetcht0 [rsi+rax]
and edx, RANDOMX_SCRATCHPAD_MASK
prefetcht0 [rsi+rdx]
randomx_prefetch_scratchpad_bmi2 ENDP
randomx_prefetch_scratchpad_end PROC
randomx_prefetch_scratchpad_end ENDP
@@ -94,12 +103,17 @@ randomx_program_prologue_first_load PROC
nop
nop
nop
jmp randomx_program_loop_begin
jmp randomx_program_imul_rcp_store
randomx_program_prologue_first_load ENDP
ALIGN 64
include asm/program_xmm_constants.inc
randomx_program_imul_rcp_store PROC
include asm/program_imul_rcp_store.inc
jmp randomx_program_loop_begin
randomx_program_imul_rcp_store ENDP
ALIGN 64
randomx_program_loop_begin PROC
nop
@@ -121,10 +135,6 @@ randomx_program_read_dataset PROC
include asm/program_read_dataset.inc
randomx_program_read_dataset ENDP
randomx_program_read_dataset_ryzen PROC
include asm/program_read_dataset_ryzen.inc
randomx_program_read_dataset_ryzen ENDP
randomx_program_read_dataset_sshash_init PROC
include asm/program_read_dataset_sshash_init.inc
randomx_program_read_dataset_sshash_init ENDP

View File

@@ -30,15 +30,16 @@ OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
extern "C" {
void randomx_prefetch_scratchpad();
void randomx_prefetch_scratchpad_bmi2();
void randomx_prefetch_scratchpad_end();
void randomx_program_prologue();
void randomx_program_prologue_first_load();
void randomx_program_imul_rcp_store();
void randomx_program_loop_begin();
void randomx_program_loop_load();
void randomx_program_loop_load_xop();
void randomx_program_start();
void randomx_program_read_dataset();
void randomx_program_read_dataset_ryzen();
void randomx_program_read_dataset_sshash_init();
void randomx_program_read_dataset_sshash_fin();
void randomx_program_loop_store();

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@@ -165,27 +165,17 @@ RandomX_ConfigurationBase::RandomX_ConfigurationBase()
const uint8_t* b = addr(randomx_sshash_end);
memcpy(codeShhPrefetchTweaked, a, b - a);
}
{
const uint8_t* a = addr(randomx_program_read_dataset);
const uint8_t* b = addr(randomx_program_read_dataset_ryzen);
memcpy(codeReadDatasetTweaked, a, b - a);
codeReadDatasetTweakedSize = b - a;
}
{
const uint8_t* a = addr(randomx_program_read_dataset_ryzen);
const uint8_t* b = addr(randomx_program_read_dataset_sshash_init);
memcpy(codeReadDatasetRyzenTweaked, a, b - a);
codeReadDatasetRyzenTweakedSize = b - a;
}
{
const uint8_t* a = addr(randomx_program_read_dataset_sshash_init);
const uint8_t* b = addr(randomx_program_read_dataset_sshash_fin);
memcpy(codeReadDatasetLightSshInitTweaked, a, b - a);
}
{
const uint8_t* a = addr(randomx_prefetch_scratchpad);
if (xmrig::Cpu::info()->hasBMI2()) {
const uint8_t* a = addr(randomx_prefetch_scratchpad_bmi2);
const uint8_t* b = addr(randomx_prefetch_scratchpad_end);
memcpy(codePrefetchScratchpadTweaked, a, b - a);
codePrefetchScratchpadTweakedSize = b - a;
}
else {
const uint8_t* a = addr(randomx_prefetch_scratchpad);
const uint8_t* b = addr(randomx_prefetch_scratchpad_bmi2);
memcpy(codePrefetchScratchpadTweaked, a, b - a);
codePrefetchScratchpadTweakedSize = b - a;
}
# endif
}
@@ -222,13 +212,15 @@ void RandomX_ConfigurationBase::Apply()
//*(uint32_t*)(codeReadDatasetTweaked + 24) = DatasetBaseMask;
//*(uint32_t*)(codeReadDatasetLightSshInitTweaked + 59) = DatasetBaseMask;
*(uint32_t*)(codePrefetchScratchpadTweaked + 4) = ScratchpadL3Mask64_Calculated;
*(uint32_t*)(codePrefetchScratchpadTweaked + 18) = ScratchpadL3Mask64_Calculated;
const bool hasBMI2 = xmrig::Cpu::info()->hasBMI2();
*(uint32_t*)(codePrefetchScratchpadTweaked + (hasBMI2 ? 7 : 4)) = ScratchpadL3Mask64_Calculated;
*(uint32_t*)(codePrefetchScratchpadTweaked + (hasBMI2 ? 17 : 18)) = ScratchpadL3Mask64_Calculated;
// Apply scratchpad prefetch mode
{
uint32_t* a = (uint32_t*)(codePrefetchScratchpadTweaked + 8);
uint32_t* b = (uint32_t*)(codePrefetchScratchpadTweaked + 22);
uint32_t* a = (uint32_t*)(codePrefetchScratchpadTweaked + (hasBMI2 ? 11 : 8));
uint32_t* b = (uint32_t*)(codePrefetchScratchpadTweaked + (hasBMI2 ? 21 : 22));
switch (scratchpadPrefetchMode)
{
@@ -295,7 +287,7 @@ typedef void(randomx::JitCompilerX86::* InstructionGeneratorX86_2)(const randomx
INST_HANDLE(IMUL_M, IMUL_R);
#if defined(_M_X64) || defined(__x86_64__)
if (xmrig::Cpu::info()->hasBMI2()) {
if (hasBMI2) {
INST_HANDLE2(IMULH_R, IMULH_R_BMI2, IMUL_M);
INST_HANDLE2(IMULH_M, IMULH_M_BMI2, IMULH_R);
}
@@ -337,7 +329,7 @@ typedef void(randomx::JitCompilerX86::* InstructionGeneratorX86_2)(const randomx
#endif
#if defined(_M_X64) || defined(__x86_64__)
if (xmrig::Cpu::info()->hasBMI2()) {
if (hasBMI2) {
INST_HANDLE2(CFROUND, CFROUND_BMI2, CBRANCH);
}
else

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@@ -125,12 +125,8 @@ struct RandomX_ConfigurationBase
rx_vec_i128 fillAes4Rx4_Key[8];
uint8_t codeShhPrefetchTweaked[20];
uint8_t codeReadDatasetTweaked[64];
uint32_t codeReadDatasetTweakedSize;
uint8_t codeReadDatasetRyzenTweaked[72];
uint32_t codeReadDatasetRyzenTweakedSize;
uint8_t codeReadDatasetLightSshInitTweaked[68];
uint8_t codePrefetchScratchpadTweaked[32];
uint8_t codePrefetchScratchpadTweaked[28];
uint32_t codePrefetchScratchpadTweakedSize;
uint32_t AddressMask_Calculated[4];
uint32_t ScratchpadL3Mask_Calculated;

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@@ -29,6 +29,7 @@
#include <cstdio>
#include <dirent.h>
#include <fcntl.h>
#include <fstream>
#include <sys/stat.h>
#include <sys/types.h>
#include <unistd.h>
@@ -48,7 +49,27 @@ static int msr_open(int32_t cpu, int flags)
class MsrPrivate
{
public:
bool available = true;
inline MsrPrivate() : m_available(msr_allow_writes() || msr_modprobe()) {}
inline bool isAvailable() const { return m_available; }
private:
inline bool msr_allow_writes()
{
std::ofstream file("/sys/module/msr/parameters/allow_writes", std::ios::out | std::ios::binary | std::ios::trunc);
if (file.is_open()) {
file << "on";
}
return file.good();
}
inline bool msr_modprobe()
{
return system("/sbin/modprobe msr allow_writes=on > /dev/null 2>&1") == 0;
}
const bool m_available;
};
@@ -57,10 +78,8 @@ public:
xmrig::Msr::Msr() : d_ptr(new MsrPrivate())
{
if (system("/sbin/modprobe msr allow_writes=on > /dev/null 2>&1") != 0) {
LOG_WARN("%s " YELLOW_BOLD("msr kernel module is not available"), Msr::tag());
d_ptr->available = false;
if (!isAvailable()) {
LOG_WARN("%s " YELLOW_BOLD("msr kernel module is not available"), tag());
}
}
@@ -73,7 +92,7 @@ xmrig::Msr::~Msr()
bool xmrig::Msr::isAvailable() const
{
return d_ptr->available;
return d_ptr->isAvailable();
}

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@@ -28,15 +28,15 @@
#define APP_ID "xmrig"
#define APP_NAME "XMRig"
#define APP_DESC "XMRig miner"
#define APP_VERSION "6.11.0"
#define APP_VERSION "6.12.2"
#define APP_DOMAIN "xmrig.com"
#define APP_SITE "www.xmrig.com"
#define APP_COPYRIGHT "Copyright (C) 2016-2021 xmrig.com"
#define APP_KIND "miner"
#define APP_VER_MAJOR 6
#define APP_VER_MINOR 11
#define APP_VER_PATCH 0
#define APP_VER_MINOR 12
#define APP_VER_PATCH 2
#ifdef _MSC_VER
# if (_MSC_VER >= 1920)