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v4.0.0-bet
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v4.1.0-bet
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19
CHANGELOG.md
19
CHANGELOG.md
@@ -1,8 +1,27 @@
|
||||
# v4.1.0-beta
|
||||
- **OpenCL backend disabled by default.**.
|
||||
- [#1183](https://github.com/xmrig/xmrig/issues/1183) Fixed compatibility with systemd.
|
||||
- [#1185](https://github.com/xmrig/xmrig/pull/1185) Added JIT compiler for RandomX on ARMv8.
|
||||
- Improved API endpoint `GET /2/backends` and added support for this endpoint to [workers.xmrig.info](http://workers.xmrig.info).
|
||||
- Added command line option `--no-cpu` to disable CPU backend.
|
||||
- Added OpenCL specific command line options: `--opencl`, `--opencl-devices`, `--opencl-platform`, `--opencl-loader` and `--opencl-no-cache`.
|
||||
- Removed command line option `--http-enabled`, HTTP API enabled automatically if any other `--http-*` option provided.
|
||||
|
||||
# v4.0.1-beta
|
||||
- [#1177](https://github.com/xmrig/xmrig/issues/1177) Fixed compatibility with old AMD drivers.
|
||||
- [#1180](https://github.com/xmrig/xmrig/issues/1180) Fixed possible duplicated shares after algorithm switching.
|
||||
- Added support for case if not all backend threads successfully started.
|
||||
- Fixed wrong config file permissions after write (only gcc builds on recent Windows 10 affected).
|
||||
|
||||
# v4.0.0-beta
|
||||
- [#1172](https://github.com/xmrig/xmrig/issues/1172) **Added OpenCL mining backend.**
|
||||
- [#268](https://github.com/xmrig/xmrig-amd/pull/268) [#270](https://github.com/xmrig/xmrig-amd/pull/270) [#271](https://github.com/xmrig/xmrig-amd/pull/271) [#273](https://github.com/xmrig/xmrig-amd/pull/273) [#274](https://github.com/xmrig/xmrig-amd/pull/274) [#1171](https://github.com/xmrig/xmrig/pull/1171) Added RandomX support for OpenCL, thanks [@SChernykh](https://github.com/SChernykh).
|
||||
- Algorithm `cn/wow` removed, as no longer alive.
|
||||
|
||||
# v3.1.3
|
||||
- [#1180](https://github.com/xmrig/xmrig/issues/1180) Fixed possible duplicated shares after algorithm switching.
|
||||
- Fixed wrong config file permissions after write (only gcc builds on recent Windows 10 affected).
|
||||
|
||||
# v3.1.2
|
||||
- Many RandomX optimizations and fixes.
|
||||
- [#1132](https://github.com/xmrig/xmrig/issues/1132) Fixed build on CentOS 7.
|
||||
|
||||
@@ -143,7 +143,7 @@ else()
|
||||
endif()
|
||||
endif()
|
||||
|
||||
if (CMAKE_SYSTEM_NAME MATCHES "Linux")
|
||||
if (CMAKE_SYSTEM_NAME MATCHES "Linux" OR CMAKE_SYSTEM_NAME MATCHES "Android")
|
||||
EXECUTE_PROCESS(COMMAND uname -o COMMAND tr -d '\n' OUTPUT_VARIABLE OPERATING_SYSTEM)
|
||||
if (OPERATING_SYSTEM MATCHES "Android")
|
||||
set(EXTRA_LIBS ${EXTRA_LIBS} log)
|
||||
|
||||
@@ -51,6 +51,13 @@ if (WITH_RANDOMX)
|
||||
)
|
||||
# cheat because cmake and ccache hate each other
|
||||
set_property(SOURCE src/crypto/randomx/jit_compiler_x86_static.S PROPERTY LANGUAGE C)
|
||||
elseif (XMRIG_ARM AND CMAKE_SIZEOF_VOID_P EQUAL 8)
|
||||
list(APPEND SOURCES_CRYPTO
|
||||
src/crypto/randomx/jit_compiler_a64_static.S
|
||||
src/crypto/randomx/jit_compiler_a64.cpp
|
||||
)
|
||||
# cheat because cmake and ccache hate each other
|
||||
set_property(SOURCE src/crypto/randomx/jit_compiler_a64_static.S PROPERTY LANGUAGE C)
|
||||
endif()
|
||||
|
||||
if (CMAKE_CXX_COMPILER_ID MATCHES Clang)
|
||||
|
||||
262
doc/topology/AMD_Opteron_6344_x2_N4_win7_2_0_4_bug.xml
Normal file
262
doc/topology/AMD_Opteron_6344_x2_N4_win7_2_0_4_bug.xml
Normal file
@@ -0,0 +1,262 @@
|
||||
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</object>
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</object>
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</object>
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<object type="L3Cache" cpuset="0x00000fc0" complete_cpuset="0x00000fc0" nodeset="0x00000002" complete_nodeset="0x00000002" gp_index="40" cache_size="12582912" depth="3" cache_linesize="64" cache_associativity="1" cache_type="0">
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<page_type size="4096" count="0"/>
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|
||||
<object type="L3Cache" cpuset="0x0003f000" complete_cpuset="0x0003f000" nodeset="0x00000004" complete_nodeset="0x00000004" gp_index="59" cache_size="12582912" depth="3" cache_linesize="64" cache_associativity="1" cache_type="0">
|
||||
<info name="Inclusive" value="0"/>
|
||||
<object type="NUMANode" os_index="2" cpuset="0x0003f000" complete_cpuset="0x0003f000" nodeset="0x00000004" complete_nodeset="0x00000004" gp_index="82" local_memory="8035020800">
|
||||
<page_type size="4096" count="0"/>
|
||||
</object>
|
||||
<object type="L2Cache" cpuset="0x00001000" complete_cpuset="0x00001000" nodeset="0x00000004" complete_nodeset="0x00000004" gp_index="43" cache_size="2097152" depth="2" cache_linesize="64" cache_associativity="16" cache_type="0">
|
||||
<info name="Inclusive" value="0"/>
|
||||
<object type="L1Cache" cpuset="0x00001000" complete_cpuset="0x00001000" nodeset="0x00000004" complete_nodeset="0x00000004" gp_index="42" cache_size="16384" depth="1" cache_linesize="64" cache_associativity="4" cache_type="1">
|
||||
<info name="Inclusive" value="0"/>
|
||||
<object type="Core" cpuset="0x00001000" complete_cpuset="0x00001000" nodeset="0x00000004" complete_nodeset="0x00000004" gp_index="41">
|
||||
<object type="PU" os_index="12" cpuset="0x00001000" complete_cpuset="0x00001000" nodeset="0x00000004" complete_nodeset="0x00000004" gp_index="97"/>
|
||||
</object>
|
||||
</object>
|
||||
</object>
|
||||
<object type="L2Cache" cpuset="0x00002000" complete_cpuset="0x00002000" nodeset="0x00000004" complete_nodeset="0x00000004" gp_index="46" cache_size="2097152" depth="2" cache_linesize="64" cache_associativity="16" cache_type="0">
|
||||
<info name="Inclusive" value="0"/>
|
||||
<object type="L1Cache" cpuset="0x00002000" complete_cpuset="0x00002000" nodeset="0x00000004" complete_nodeset="0x00000004" gp_index="45" cache_size="16384" depth="1" cache_linesize="64" cache_associativity="4" cache_type="1">
|
||||
<info name="Inclusive" value="0"/>
|
||||
<object type="Core" cpuset="0x00002000" complete_cpuset="0x00002000" nodeset="0x00000004" complete_nodeset="0x00000004" gp_index="44">
|
||||
<object type="PU" os_index="13" cpuset="0x00002000" complete_cpuset="0x00002000" nodeset="0x00000004" complete_nodeset="0x00000004" gp_index="98"/>
|
||||
</object>
|
||||
</object>
|
||||
</object>
|
||||
<object type="L2Cache" cpuset="0x00004000" complete_cpuset="0x00004000" nodeset="0x00000004" complete_nodeset="0x00000004" gp_index="49" cache_size="2097152" depth="2" cache_linesize="64" cache_associativity="16" cache_type="0">
|
||||
<info name="Inclusive" value="0"/>
|
||||
<object type="L1Cache" cpuset="0x00004000" complete_cpuset="0x00004000" nodeset="0x00000004" complete_nodeset="0x00000004" gp_index="48" cache_size="16384" depth="1" cache_linesize="64" cache_associativity="4" cache_type="1">
|
||||
<info name="Inclusive" value="0"/>
|
||||
<object type="Core" cpuset="0x00004000" complete_cpuset="0x00004000" nodeset="0x00000004" complete_nodeset="0x00000004" gp_index="47">
|
||||
<object type="PU" os_index="14" cpuset="0x00004000" complete_cpuset="0x00004000" nodeset="0x00000004" complete_nodeset="0x00000004" gp_index="99"/>
|
||||
</object>
|
||||
</object>
|
||||
</object>
|
||||
<object type="L2Cache" cpuset="0x00008000" complete_cpuset="0x00008000" nodeset="0x00000004" complete_nodeset="0x00000004" gp_index="52" cache_size="2097152" depth="2" cache_linesize="64" cache_associativity="16" cache_type="0">
|
||||
<info name="Inclusive" value="0"/>
|
||||
<object type="L1Cache" cpuset="0x00008000" complete_cpuset="0x00008000" nodeset="0x00000004" complete_nodeset="0x00000004" gp_index="51" cache_size="16384" depth="1" cache_linesize="64" cache_associativity="4" cache_type="1">
|
||||
<info name="Inclusive" value="0"/>
|
||||
<object type="Core" cpuset="0x00008000" complete_cpuset="0x00008000" nodeset="0x00000004" complete_nodeset="0x00000004" gp_index="50">
|
||||
<object type="PU" os_index="15" cpuset="0x00008000" complete_cpuset="0x00008000" nodeset="0x00000004" complete_nodeset="0x00000004" gp_index="100"/>
|
||||
</object>
|
||||
</object>
|
||||
</object>
|
||||
<object type="L2Cache" cpuset="0x00010000" complete_cpuset="0x00010000" nodeset="0x00000004" complete_nodeset="0x00000004" gp_index="55" cache_size="2097152" depth="2" cache_linesize="64" cache_associativity="16" cache_type="0">
|
||||
<info name="Inclusive" value="0"/>
|
||||
<object type="L1Cache" cpuset="0x00010000" complete_cpuset="0x00010000" nodeset="0x00000004" complete_nodeset="0x00000004" gp_index="54" cache_size="16384" depth="1" cache_linesize="64" cache_associativity="4" cache_type="1">
|
||||
<info name="Inclusive" value="0"/>
|
||||
<object type="Core" cpuset="0x00010000" complete_cpuset="0x00010000" nodeset="0x00000004" complete_nodeset="0x00000004" gp_index="53">
|
||||
<object type="PU" os_index="16" cpuset="0x00010000" complete_cpuset="0x00010000" nodeset="0x00000004" complete_nodeset="0x00000004" gp_index="101"/>
|
||||
</object>
|
||||
</object>
|
||||
</object>
|
||||
<object type="L2Cache" cpuset="0x00020000" complete_cpuset="0x00020000" nodeset="0x00000004" complete_nodeset="0x00000004" gp_index="58" cache_size="2097152" depth="2" cache_linesize="64" cache_associativity="16" cache_type="0">
|
||||
<info name="Inclusive" value="0"/>
|
||||
<object type="L1Cache" cpuset="0x00020000" complete_cpuset="0x00020000" nodeset="0x00000004" complete_nodeset="0x00000004" gp_index="57" cache_size="16384" depth="1" cache_linesize="64" cache_associativity="4" cache_type="1">
|
||||
<info name="Inclusive" value="0"/>
|
||||
<object type="Core" cpuset="0x00020000" complete_cpuset="0x00020000" nodeset="0x00000004" complete_nodeset="0x00000004" gp_index="56">
|
||||
<object type="PU" os_index="17" cpuset="0x00020000" complete_cpuset="0x00020000" nodeset="0x00000004" complete_nodeset="0x00000004" gp_index="102"/>
|
||||
</object>
|
||||
</object>
|
||||
</object>
|
||||
</object>
|
||||
<object type="L3Cache" cpuset="0x00fc0000" complete_cpuset="0x00fc0000" nodeset="0x00000008" complete_nodeset="0x00000008" gp_index="79" cache_size="12582912" depth="3" cache_linesize="64" cache_associativity="1" cache_type="0">
|
||||
<info name="Inclusive" value="0"/>
|
||||
<object type="NUMANode" os_index="3" cpuset="0x00fc0000" complete_cpuset="0x00fc0000" nodeset="0x00000008" complete_nodeset="0x00000008" gp_index="83" local_memory="8097337344">
|
||||
<page_type size="4096" count="0"/>
|
||||
</object>
|
||||
<object type="L2Cache" cpuset="0x00040000" complete_cpuset="0x00040000" nodeset="0x00000008" complete_nodeset="0x00000008" gp_index="62" cache_size="2097152" depth="2" cache_linesize="64" cache_associativity="16" cache_type="0">
|
||||
<info name="Inclusive" value="0"/>
|
||||
<object type="L1Cache" cpuset="0x00040000" complete_cpuset="0x00040000" nodeset="0x00000008" complete_nodeset="0x00000008" gp_index="61" cache_size="16384" depth="1" cache_linesize="64" cache_associativity="4" cache_type="1">
|
||||
<info name="Inclusive" value="0"/>
|
||||
<object type="Core" cpuset="0x00040000" complete_cpuset="0x00040000" nodeset="0x00000008" complete_nodeset="0x00000008" gp_index="60">
|
||||
<object type="PU" os_index="18" cpuset="0x00040000" complete_cpuset="0x00040000" nodeset="0x00000008" complete_nodeset="0x00000008" gp_index="103"/>
|
||||
</object>
|
||||
</object>
|
||||
</object>
|
||||
<object type="L2Cache" cpuset="0x00080000" complete_cpuset="0x00080000" nodeset="0x00000008" complete_nodeset="0x00000008" gp_index="65" cache_size="2097152" depth="2" cache_linesize="64" cache_associativity="16" cache_type="0">
|
||||
<info name="Inclusive" value="0"/>
|
||||
<object type="L1Cache" cpuset="0x00080000" complete_cpuset="0x00080000" nodeset="0x00000008" complete_nodeset="0x00000008" gp_index="64" cache_size="16384" depth="1" cache_linesize="64" cache_associativity="4" cache_type="1">
|
||||
<info name="Inclusive" value="0"/>
|
||||
<object type="Core" cpuset="0x00080000" complete_cpuset="0x00080000" nodeset="0x00000008" complete_nodeset="0x00000008" gp_index="63">
|
||||
<object type="PU" os_index="19" cpuset="0x00080000" complete_cpuset="0x00080000" nodeset="0x00000008" complete_nodeset="0x00000008" gp_index="104"/>
|
||||
</object>
|
||||
</object>
|
||||
</object>
|
||||
<object type="L2Cache" cpuset="0x00100000" complete_cpuset="0x00100000" nodeset="0x00000008" complete_nodeset="0x00000008" gp_index="68" cache_size="2097152" depth="2" cache_linesize="64" cache_associativity="16" cache_type="0">
|
||||
<info name="Inclusive" value="0"/>
|
||||
<object type="L1Cache" cpuset="0x00100000" complete_cpuset="0x00100000" nodeset="0x00000008" complete_nodeset="0x00000008" gp_index="67" cache_size="16384" depth="1" cache_linesize="64" cache_associativity="4" cache_type="1">
|
||||
<info name="Inclusive" value="0"/>
|
||||
<object type="Core" cpuset="0x00100000" complete_cpuset="0x00100000" nodeset="0x00000008" complete_nodeset="0x00000008" gp_index="66">
|
||||
<object type="PU" os_index="20" cpuset="0x00100000" complete_cpuset="0x00100000" nodeset="0x00000008" complete_nodeset="0x00000008" gp_index="105"/>
|
||||
</object>
|
||||
</object>
|
||||
</object>
|
||||
<object type="L2Cache" cpuset="0x00200000" complete_cpuset="0x00200000" nodeset="0x00000008" complete_nodeset="0x00000008" gp_index="71" cache_size="2097152" depth="2" cache_linesize="64" cache_associativity="16" cache_type="0">
|
||||
<info name="Inclusive" value="0"/>
|
||||
<object type="L1Cache" cpuset="0x00200000" complete_cpuset="0x00200000" nodeset="0x00000008" complete_nodeset="0x00000008" gp_index="70" cache_size="16384" depth="1" cache_linesize="64" cache_associativity="4" cache_type="1">
|
||||
<info name="Inclusive" value="0"/>
|
||||
<object type="Core" cpuset="0x00200000" complete_cpuset="0x00200000" nodeset="0x00000008" complete_nodeset="0x00000008" gp_index="69">
|
||||
<object type="PU" os_index="21" cpuset="0x00200000" complete_cpuset="0x00200000" nodeset="0x00000008" complete_nodeset="0x00000008" gp_index="106"/>
|
||||
</object>
|
||||
</object>
|
||||
</object>
|
||||
<object type="L2Cache" cpuset="0x00400000" complete_cpuset="0x00400000" nodeset="0x00000008" complete_nodeset="0x00000008" gp_index="74" cache_size="2097152" depth="2" cache_linesize="64" cache_associativity="16" cache_type="0">
|
||||
<info name="Inclusive" value="0"/>
|
||||
<object type="L1Cache" cpuset="0x00400000" complete_cpuset="0x00400000" nodeset="0x00000008" complete_nodeset="0x00000008" gp_index="73" cache_size="16384" depth="1" cache_linesize="64" cache_associativity="4" cache_type="1">
|
||||
<info name="Inclusive" value="0"/>
|
||||
<object type="Core" cpuset="0x00400000" complete_cpuset="0x00400000" nodeset="0x00000008" complete_nodeset="0x00000008" gp_index="72">
|
||||
<object type="PU" os_index="22" cpuset="0x00400000" complete_cpuset="0x00400000" nodeset="0x00000008" complete_nodeset="0x00000008" gp_index="107"/>
|
||||
</object>
|
||||
</object>
|
||||
</object>
|
||||
<object type="L2Cache" cpuset="0x00800000" complete_cpuset="0x00800000" nodeset="0x00000008" complete_nodeset="0x00000008" gp_index="78" cache_size="2097152" depth="2" cache_linesize="64" cache_associativity="16" cache_type="0">
|
||||
<info name="Inclusive" value="0"/>
|
||||
<object type="L1Cache" cpuset="0x00800000" complete_cpuset="0x00800000" nodeset="0x00000008" complete_nodeset="0x00000008" gp_index="77" cache_size="16384" depth="1" cache_linesize="64" cache_associativity="4" cache_type="1">
|
||||
<info name="Inclusive" value="0"/>
|
||||
<object type="Core" cpuset="0x00800000" complete_cpuset="0x00800000" nodeset="0x00000008" complete_nodeset="0x00000008" gp_index="76">
|
||||
<object type="PU" os_index="23" cpuset="0x00800000" complete_cpuset="0x00800000" nodeset="0x00000008" complete_nodeset="0x00000008" gp_index="108"/>
|
||||
</object>
|
||||
</object>
|
||||
</object>
|
||||
</object>
|
||||
</object>
|
||||
</object>
|
||||
</topology>
|
||||
399
doc/topology/AMD_Opteron_6348_x4_N8_linux_2_0_4.xml
Normal file
399
doc/topology/AMD_Opteron_6348_x4_N8_linux_2_0_4.xml
Normal file
@@ -0,0 +1,399 @@
|
||||
<?xml version="1.0" encoding="UTF-8"?>
|
||||
<!DOCTYPE topology SYSTEM "hwloc2.dtd">
|
||||
<topology version="2.0">
|
||||
<object type="Machine" os_index="0" cpuset="0xffffffff" complete_cpuset="0xffffffff" allowed_cpuset="0xffffffff" nodeset="0x00000066" complete_nodeset="0x000000ff" allowed_nodeset="0x00000066" gp_index="1">
|
||||
<info name="DMIProductName" value="H8QG6"/>
|
||||
<info name="DMIProductVersion" value="1234567890"/>
|
||||
<info name="DMIProductSerial" value="1234567890"/>
|
||||
<info name="DMIProductUUID" value="0"/>
|
||||
<info name="DMIBoardVendor" value="Supermicro"/>
|
||||
<info name="DMIBoardName" value="H8QG6"/>
|
||||
<info name="DMIBoardVersion" value="1234567890"/>
|
||||
<info name="DMIBoardSerial" value="0"/>
|
||||
<info name="DMIBoardAssetTag" value="1234567890"/>
|
||||
<info name="DMIChassisVendor" value="Supermicro"/>
|
||||
<info name="DMIChassisType" value="3"/>
|
||||
<info name="DMIChassisVersion" value="1234567890"/>
|
||||
<info name="DMIChassisSerial" value="1234567890."/>
|
||||
<info name="DMIChassisAssetTag" value="1234567890"/>
|
||||
<info name="DMIBIOSVendor" value="American Megatrends Inc."/>
|
||||
<info name="DMIBIOSVersion" value="080016 "/>
|
||||
<info name="DMIBIOSDate" value="10/11/2010"/>
|
||||
<info name="DMISysVendor" value="Supermicro"/>
|
||||
<info name="Backend" value="Linux"/>
|
||||
<info name="LinuxCgroup" value="/"/>
|
||||
<info name="OSName" value="Linux"/>
|
||||
<info name="OSRelease" value="4.15.0-20-generic"/>
|
||||
<info name="OSVersion" value="#21-Ubuntu SMP Tue Apr 24 06:16:15 UTC 2018"/>
|
||||
<info name="HostName" value="host"/>
|
||||
<info name="Architecture" value="x86_64"/>
|
||||
<info name="hwlocVersion" value="2.0.4"/>
|
||||
<info name="ProcessName" value="xmrig"/>
|
||||
<object type="Package" os_index="0" cpuset="0x000000ff" complete_cpuset="0x000000ff" nodeset="0x00000002" complete_nodeset="0x00000003" gp_index="2">
|
||||
<info name="CPUVendor" value="AuthenticAMD"/>
|
||||
<info name="CPUFamilyNumber" value="16"/>
|
||||
<info name="CPUModelNumber" value="9"/>
|
||||
<info name="CPUModel" value="AMD Opteron(tm) Processor 6128"/>
|
||||
<info name="CPUStepping" value="1"/>
|
||||
<object type="L3Cache" cpuset="0x0000000f" complete_cpuset="0x0000000f" nodeset="0x0" complete_nodeset="0x00000001" gp_index="7" cache_size="5240832" depth="3" cache_linesize="64" cache_associativity="48" cache_type="0">
|
||||
<info name="Inclusive" value="0"/>
|
||||
<object type="L2Cache" cpuset="0x00000001" complete_cpuset="0x00000001" nodeset="0x0" complete_nodeset="0x00000001" gp_index="6" cache_size="524288" depth="2" cache_linesize="64" cache_associativity="16" cache_type="0">
|
||||
<info name="Inclusive" value="0"/>
|
||||
<object type="L1Cache" cpuset="0x00000001" complete_cpuset="0x00000001" nodeset="0x0" complete_nodeset="0x00000001" gp_index="5" cache_size="65536" depth="1" cache_linesize="64" cache_associativity="2" cache_type="1">
|
||||
<info name="Inclusive" value="0"/>
|
||||
<object type="Core" os_index="0" cpuset="0x00000001" complete_cpuset="0x00000001" nodeset="0x0" complete_nodeset="0x00000001" gp_index="3">
|
||||
<object type="PU" os_index="0" cpuset="0x00000001" complete_cpuset="0x00000001" nodeset="0x0" complete_nodeset="0x00000001" gp_index="4"/>
|
||||
</object>
|
||||
</object>
|
||||
</object>
|
||||
<object type="L2Cache" cpuset="0x00000002" complete_cpuset="0x00000002" nodeset="0x0" complete_nodeset="0x00000001" gp_index="11" cache_size="524288" depth="2" cache_linesize="64" cache_associativity="16" cache_type="0">
|
||||
<info name="Inclusive" value="0"/>
|
||||
<object type="L1Cache" cpuset="0x00000002" complete_cpuset="0x00000002" nodeset="0x0" complete_nodeset="0x00000001" gp_index="10" cache_size="65536" depth="1" cache_linesize="64" cache_associativity="2" cache_type="1">
|
||||
<info name="Inclusive" value="0"/>
|
||||
<object type="Core" os_index="1" cpuset="0x00000002" complete_cpuset="0x00000002" nodeset="0x0" complete_nodeset="0x00000001" gp_index="8">
|
||||
<object type="PU" os_index="1" cpuset="0x00000002" complete_cpuset="0x00000002" nodeset="0x0" complete_nodeset="0x00000001" gp_index="9"/>
|
||||
</object>
|
||||
</object>
|
||||
</object>
|
||||
<object type="L2Cache" cpuset="0x00000004" complete_cpuset="0x00000004" nodeset="0x0" complete_nodeset="0x00000001" gp_index="15" cache_size="524288" depth="2" cache_linesize="64" cache_associativity="16" cache_type="0">
|
||||
<info name="Inclusive" value="0"/>
|
||||
<object type="L1Cache" cpuset="0x00000004" complete_cpuset="0x00000004" nodeset="0x0" complete_nodeset="0x00000001" gp_index="14" cache_size="65536" depth="1" cache_linesize="64" cache_associativity="2" cache_type="1">
|
||||
<info name="Inclusive" value="0"/>
|
||||
<object type="Core" os_index="2" cpuset="0x00000004" complete_cpuset="0x00000004" nodeset="0x0" complete_nodeset="0x00000001" gp_index="12">
|
||||
<object type="PU" os_index="2" cpuset="0x00000004" complete_cpuset="0x00000004" nodeset="0x0" complete_nodeset="0x00000001" gp_index="13"/>
|
||||
</object>
|
||||
</object>
|
||||
</object>
|
||||
<object type="L2Cache" cpuset="0x00000008" complete_cpuset="0x00000008" nodeset="0x0" complete_nodeset="0x00000001" gp_index="19" cache_size="524288" depth="2" cache_linesize="64" cache_associativity="16" cache_type="0">
|
||||
<info name="Inclusive" value="0"/>
|
||||
<object type="L1Cache" cpuset="0x00000008" complete_cpuset="0x00000008" nodeset="0x0" complete_nodeset="0x00000001" gp_index="18" cache_size="65536" depth="1" cache_linesize="64" cache_associativity="2" cache_type="1">
|
||||
<info name="Inclusive" value="0"/>
|
||||
<object type="Core" os_index="3" cpuset="0x00000008" complete_cpuset="0x00000008" nodeset="0x0" complete_nodeset="0x00000001" gp_index="16">
|
||||
<object type="PU" os_index="3" cpuset="0x00000008" complete_cpuset="0x00000008" nodeset="0x0" complete_nodeset="0x00000001" gp_index="17"/>
|
||||
</object>
|
||||
</object>
|
||||
</object>
|
||||
</object>
|
||||
<object type="L3Cache" cpuset="0x000000f0" complete_cpuset="0x000000f0" nodeset="0x00000002" complete_nodeset="0x00000002" gp_index="24" cache_size="5240832" depth="3" cache_linesize="64" cache_associativity="48" cache_type="0">
|
||||
<info name="Inclusive" value="0"/>
|
||||
<object type="NUMANode" os_index="1" cpuset="0x000000f0" complete_cpuset="0x000000f0" nodeset="0x00000002" complete_nodeset="0x00000002" gp_index="143" local_memory="4156817408">
|
||||
<page_type size="4096" count="854592"/>
|
||||
<page_type size="2097152" count="313"/>
|
||||
<page_type size="1073741824" count="0"/>
|
||||
</object>
|
||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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|
||||
</object>
|
||||
</object>
|
||||
</object>
|
||||
<object type="L2Cache" cpuset="0x00400000" complete_cpuset="0x00400000" nodeset="0x00000020" complete_nodeset="0x00000020" gp_index="102" cache_size="524288" depth="2" cache_linesize="64" cache_associativity="16" cache_type="0">
|
||||
<info name="Inclusive" value="0"/>
|
||||
<object type="L1Cache" cpuset="0x00400000" complete_cpuset="0x00400000" nodeset="0x00000020" complete_nodeset="0x00000020" gp_index="101" cache_size="65536" depth="1" cache_linesize="64" cache_associativity="2" cache_type="1">
|
||||
<info name="Inclusive" value="0"/>
|
||||
<object type="Core" os_index="2" cpuset="0x00400000" complete_cpuset="0x00400000" nodeset="0x00000020" complete_nodeset="0x00000020" gp_index="99">
|
||||
<object type="PU" os_index="22" cpuset="0x00400000" complete_cpuset="0x00400000" nodeset="0x00000020" complete_nodeset="0x00000020" gp_index="100"/>
|
||||
</object>
|
||||
</object>
|
||||
</object>
|
||||
<object type="L2Cache" cpuset="0x00800000" complete_cpuset="0x00800000" nodeset="0x00000020" complete_nodeset="0x00000020" gp_index="106" cache_size="524288" depth="2" cache_linesize="64" cache_associativity="16" cache_type="0">
|
||||
<info name="Inclusive" value="0"/>
|
||||
<object type="L1Cache" cpuset="0x00800000" complete_cpuset="0x00800000" nodeset="0x00000020" complete_nodeset="0x00000020" gp_index="105" cache_size="65536" depth="1" cache_linesize="64" cache_associativity="2" cache_type="1">
|
||||
<info name="Inclusive" value="0"/>
|
||||
<object type="Core" os_index="3" cpuset="0x00800000" complete_cpuset="0x00800000" nodeset="0x00000020" complete_nodeset="0x00000020" gp_index="103">
|
||||
<object type="PU" os_index="23" cpuset="0x00800000" complete_cpuset="0x00800000" nodeset="0x00000020" complete_nodeset="0x00000020" gp_index="104"/>
|
||||
</object>
|
||||
</object>
|
||||
</object>
|
||||
</object>
|
||||
</object>
|
||||
<object type="Package" os_index="3" cpuset="0xff000000" complete_cpuset="0xff000000" nodeset="0x00000040" complete_nodeset="0x000000c0" gp_index="107">
|
||||
<info name="CPUVendor" value="AuthenticAMD"/>
|
||||
<info name="CPUFamilyNumber" value="16"/>
|
||||
<info name="CPUModelNumber" value="9"/>
|
||||
<info name="CPUModel" value="AMD Opteron(tm) Processor 6128"/>
|
||||
<info name="CPUStepping" value="1"/>
|
||||
<object type="L3Cache" cpuset="0x0f000000" complete_cpuset="0x0f000000" nodeset="0x00000040" complete_nodeset="0x00000040" gp_index="112" cache_size="5240832" depth="3" cache_linesize="64" cache_associativity="48" cache_type="0">
|
||||
<info name="Inclusive" value="0"/>
|
||||
<object type="NUMANode" os_index="6" cpuset="0x0f000000" complete_cpuset="0x0f000000" nodeset="0x00000040" complete_nodeset="0x00000040" gp_index="148" local_memory="4221870080">
|
||||
<page_type size="4096" count="870986"/>
|
||||
<page_type size="2097152" count="312"/>
|
||||
<page_type size="1073741824" count="0"/>
|
||||
</object>
|
||||
<object type="L2Cache" cpuset="0x01000000" complete_cpuset="0x01000000" nodeset="0x00000040" complete_nodeset="0x00000040" gp_index="111" cache_size="524288" depth="2" cache_linesize="64" cache_associativity="16" cache_type="0">
|
||||
<info name="Inclusive" value="0"/>
|
||||
<object type="L1Cache" cpuset="0x01000000" complete_cpuset="0x01000000" nodeset="0x00000040" complete_nodeset="0x00000040" gp_index="110" cache_size="65536" depth="1" cache_linesize="64" cache_associativity="2" cache_type="1">
|
||||
<info name="Inclusive" value="0"/>
|
||||
<object type="Core" os_index="0" cpuset="0x01000000" complete_cpuset="0x01000000" nodeset="0x00000040" complete_nodeset="0x00000040" gp_index="108">
|
||||
<object type="PU" os_index="24" cpuset="0x01000000" complete_cpuset="0x01000000" nodeset="0x00000040" complete_nodeset="0x00000040" gp_index="109"/>
|
||||
</object>
|
||||
</object>
|
||||
</object>
|
||||
<object type="L2Cache" cpuset="0x02000000" complete_cpuset="0x02000000" nodeset="0x00000040" complete_nodeset="0x00000040" gp_index="116" cache_size="524288" depth="2" cache_linesize="64" cache_associativity="16" cache_type="0">
|
||||
<info name="Inclusive" value="0"/>
|
||||
<object type="L1Cache" cpuset="0x02000000" complete_cpuset="0x02000000" nodeset="0x00000040" complete_nodeset="0x00000040" gp_index="115" cache_size="65536" depth="1" cache_linesize="64" cache_associativity="2" cache_type="1">
|
||||
<info name="Inclusive" value="0"/>
|
||||
<object type="Core" os_index="1" cpuset="0x02000000" complete_cpuset="0x02000000" nodeset="0x00000040" complete_nodeset="0x00000040" gp_index="113">
|
||||
<object type="PU" os_index="25" cpuset="0x02000000" complete_cpuset="0x02000000" nodeset="0x00000040" complete_nodeset="0x00000040" gp_index="114"/>
|
||||
</object>
|
||||
</object>
|
||||
</object>
|
||||
<object type="L2Cache" cpuset="0x04000000" complete_cpuset="0x04000000" nodeset="0x00000040" complete_nodeset="0x00000040" gp_index="120" cache_size="524288" depth="2" cache_linesize="64" cache_associativity="16" cache_type="0">
|
||||
<info name="Inclusive" value="0"/>
|
||||
<object type="L1Cache" cpuset="0x04000000" complete_cpuset="0x04000000" nodeset="0x00000040" complete_nodeset="0x00000040" gp_index="119" cache_size="65536" depth="1" cache_linesize="64" cache_associativity="2" cache_type="1">
|
||||
<info name="Inclusive" value="0"/>
|
||||
<object type="Core" os_index="2" cpuset="0x04000000" complete_cpuset="0x04000000" nodeset="0x00000040" complete_nodeset="0x00000040" gp_index="117">
|
||||
<object type="PU" os_index="26" cpuset="0x04000000" complete_cpuset="0x04000000" nodeset="0x00000040" complete_nodeset="0x00000040" gp_index="118"/>
|
||||
</object>
|
||||
</object>
|
||||
</object>
|
||||
<object type="L2Cache" cpuset="0x08000000" complete_cpuset="0x08000000" nodeset="0x00000040" complete_nodeset="0x00000040" gp_index="124" cache_size="524288" depth="2" cache_linesize="64" cache_associativity="16" cache_type="0">
|
||||
<info name="Inclusive" value="0"/>
|
||||
<object type="L1Cache" cpuset="0x08000000" complete_cpuset="0x08000000" nodeset="0x00000040" complete_nodeset="0x00000040" gp_index="123" cache_size="65536" depth="1" cache_linesize="64" cache_associativity="2" cache_type="1">
|
||||
<info name="Inclusive" value="0"/>
|
||||
<object type="Core" os_index="3" cpuset="0x08000000" complete_cpuset="0x08000000" nodeset="0x00000040" complete_nodeset="0x00000040" gp_index="121">
|
||||
<object type="PU" os_index="27" cpuset="0x08000000" complete_cpuset="0x08000000" nodeset="0x00000040" complete_nodeset="0x00000040" gp_index="122"/>
|
||||
</object>
|
||||
</object>
|
||||
</object>
|
||||
</object>
|
||||
<object type="L3Cache" cpuset="0xf0000000" complete_cpuset="0xf0000000" nodeset="0x0" complete_nodeset="0x00000080" gp_index="129" cache_size="5240832" depth="3" cache_linesize="64" cache_associativity="48" cache_type="0">
|
||||
<info name="Inclusive" value="0"/>
|
||||
<object type="L2Cache" cpuset="0x10000000" complete_cpuset="0x10000000" nodeset="0x0" complete_nodeset="0x00000080" gp_index="128" cache_size="524288" depth="2" cache_linesize="64" cache_associativity="16" cache_type="0">
|
||||
<info name="Inclusive" value="0"/>
|
||||
<object type="L1Cache" cpuset="0x10000000" complete_cpuset="0x10000000" nodeset="0x0" complete_nodeset="0x00000080" gp_index="127" cache_size="65536" depth="1" cache_linesize="64" cache_associativity="2" cache_type="1">
|
||||
<info name="Inclusive" value="0"/>
|
||||
<object type="Core" os_index="0" cpuset="0x10000000" complete_cpuset="0x10000000" nodeset="0x0" complete_nodeset="0x00000080" gp_index="125">
|
||||
<object type="PU" os_index="28" cpuset="0x10000000" complete_cpuset="0x10000000" nodeset="0x0" complete_nodeset="0x00000080" gp_index="126"/>
|
||||
</object>
|
||||
</object>
|
||||
</object>
|
||||
<object type="L2Cache" cpuset="0x20000000" complete_cpuset="0x20000000" nodeset="0x0" complete_nodeset="0x00000080" gp_index="133" cache_size="524288" depth="2" cache_linesize="64" cache_associativity="16" cache_type="0">
|
||||
<info name="Inclusive" value="0"/>
|
||||
<object type="L1Cache" cpuset="0x20000000" complete_cpuset="0x20000000" nodeset="0x0" complete_nodeset="0x00000080" gp_index="132" cache_size="65536" depth="1" cache_linesize="64" cache_associativity="2" cache_type="1">
|
||||
<info name="Inclusive" value="0"/>
|
||||
<object type="Core" os_index="1" cpuset="0x20000000" complete_cpuset="0x20000000" nodeset="0x0" complete_nodeset="0x00000080" gp_index="130">
|
||||
<object type="PU" os_index="29" cpuset="0x20000000" complete_cpuset="0x20000000" nodeset="0x0" complete_nodeset="0x00000080" gp_index="131"/>
|
||||
</object>
|
||||
</object>
|
||||
</object>
|
||||
<object type="L2Cache" cpuset="0x40000000" complete_cpuset="0x40000000" nodeset="0x0" complete_nodeset="0x00000080" gp_index="137" cache_size="524288" depth="2" cache_linesize="64" cache_associativity="16" cache_type="0">
|
||||
<info name="Inclusive" value="0"/>
|
||||
<object type="L1Cache" cpuset="0x40000000" complete_cpuset="0x40000000" nodeset="0x0" complete_nodeset="0x00000080" gp_index="136" cache_size="65536" depth="1" cache_linesize="64" cache_associativity="2" cache_type="1">
|
||||
<info name="Inclusive" value="0"/>
|
||||
<object type="Core" os_index="2" cpuset="0x40000000" complete_cpuset="0x40000000" nodeset="0x0" complete_nodeset="0x00000080" gp_index="134">
|
||||
<object type="PU" os_index="30" cpuset="0x40000000" complete_cpuset="0x40000000" nodeset="0x0" complete_nodeset="0x00000080" gp_index="135"/>
|
||||
</object>
|
||||
</object>
|
||||
</object>
|
||||
<object type="L2Cache" cpuset="0x80000000" complete_cpuset="0x80000000" nodeset="0x0" complete_nodeset="0x00000080" gp_index="141" cache_size="524288" depth="2" cache_linesize="64" cache_associativity="16" cache_type="0">
|
||||
<info name="Inclusive" value="0"/>
|
||||
<object type="L1Cache" cpuset="0x80000000" complete_cpuset="0x80000000" nodeset="0x0" complete_nodeset="0x00000080" gp_index="140" cache_size="65536" depth="1" cache_linesize="64" cache_associativity="2" cache_type="1">
|
||||
<info name="Inclusive" value="0"/>
|
||||
<object type="Core" os_index="3" cpuset="0x80000000" complete_cpuset="0x80000000" nodeset="0x0" complete_nodeset="0x00000080" gp_index="138">
|
||||
<object type="PU" os_index="31" cpuset="0x80000000" complete_cpuset="0x80000000" nodeset="0x0" complete_nodeset="0x00000080" gp_index="139"/>
|
||||
</object>
|
||||
</object>
|
||||
</object>
|
||||
</object>
|
||||
</object>
|
||||
</object>
|
||||
<distances2 type="NUMANode" nbobjs="4" kind="5" indexing="os">
|
||||
<indexes length="8">1 2 5 6 </indexes>
|
||||
<u64values length="30">10 22 16 22 22 10 22 16 16 22 </u64values>
|
||||
<u64values length="18">10 22 22 16 22 10 </u64values>
|
||||
</distances2>
|
||||
</topology>
|
||||
|
||||
39
src/App.cpp
39
src/App.cpp
@@ -24,7 +24,7 @@
|
||||
*/
|
||||
|
||||
|
||||
#include <stdlib.h>
|
||||
#include <cstdlib>
|
||||
#include <uv.h>
|
||||
|
||||
|
||||
@@ -42,18 +42,9 @@
|
||||
#include "version.h"
|
||||
|
||||
|
||||
xmrig::App::App(Process *process) :
|
||||
m_console(nullptr),
|
||||
m_signals(nullptr)
|
||||
xmrig::App::App(Process *process)
|
||||
{
|
||||
m_controller = new Controller(process);
|
||||
if (m_controller->init() != 0) {
|
||||
return;
|
||||
}
|
||||
|
||||
if (!m_controller->config()->isBackground()) {
|
||||
m_console = new Console(this);
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
@@ -68,12 +59,26 @@ xmrig::App::~App()
|
||||
int xmrig::App::exec()
|
||||
{
|
||||
if (!m_controller->isReady()) {
|
||||
LOG_EMERG("no valid configuration found.");
|
||||
|
||||
return 2;
|
||||
}
|
||||
|
||||
m_signals = new Signals(this);
|
||||
|
||||
background();
|
||||
int rc = 0;
|
||||
if (background(rc)) {
|
||||
return rc;
|
||||
}
|
||||
|
||||
rc = m_controller->init();
|
||||
if (rc != 0) {
|
||||
return rc;
|
||||
}
|
||||
|
||||
if (!m_controller->isBackground()) {
|
||||
m_console = new Console(this);
|
||||
}
|
||||
|
||||
VirtualMemory::init(m_controller->config()->cpu().isHugePages());
|
||||
|
||||
@@ -87,10 +92,10 @@ int xmrig::App::exec()
|
||||
|
||||
m_controller->start();
|
||||
|
||||
const int r = uv_run(uv_default_loop(), UV_RUN_DEFAULT);
|
||||
rc = uv_run(uv_default_loop(), UV_RUN_DEFAULT);
|
||||
uv_loop_close(uv_default_loop());
|
||||
|
||||
return r;
|
||||
return rc;
|
||||
}
|
||||
|
||||
|
||||
@@ -150,7 +155,11 @@ void xmrig::App::onSignal(int signum)
|
||||
void xmrig::App::close()
|
||||
{
|
||||
m_signals->stop();
|
||||
m_console->stop();
|
||||
|
||||
if (m_console) {
|
||||
m_console->stop();
|
||||
}
|
||||
|
||||
m_controller->stop();
|
||||
|
||||
Log::destroy();
|
||||
|
||||
11
src/App.h
11
src/App.h
@@ -29,6 +29,7 @@
|
||||
|
||||
#include "base/kernel/interfaces/IConsoleListener.h"
|
||||
#include "base/kernel/interfaces/ISignalListener.h"
|
||||
#include "base/tools/Object.h"
|
||||
|
||||
|
||||
namespace xmrig {
|
||||
@@ -44,6 +45,8 @@ class Signals;
|
||||
class App : public IConsoleListener, public ISignalListener
|
||||
{
|
||||
public:
|
||||
XMRIG_DISABLE_COPY_MOVE_DEFAULT(App)
|
||||
|
||||
App(Process *process);
|
||||
~App() override;
|
||||
|
||||
@@ -54,12 +57,12 @@ protected:
|
||||
void onSignal(int signum) override;
|
||||
|
||||
private:
|
||||
void background();
|
||||
bool background(int &rc);
|
||||
void close();
|
||||
|
||||
Console *m_console;
|
||||
Controller *m_controller;
|
||||
Signals *m_signals;
|
||||
Console *m_console = nullptr;
|
||||
Controller *m_controller = nullptr;
|
||||
Signals *m_signals = nullptr;
|
||||
};
|
||||
|
||||
|
||||
|
||||
@@ -23,33 +23,36 @@
|
||||
*/
|
||||
|
||||
|
||||
#include <stdlib.h>
|
||||
#include <signal.h>
|
||||
#include <errno.h>
|
||||
#include <cstdlib>
|
||||
#include <csignal>
|
||||
#include <cerrno>
|
||||
#include <unistd.h>
|
||||
|
||||
|
||||
#include "App.h"
|
||||
#include "base/io/log/Log.h"
|
||||
#include "core/config/Config.h"
|
||||
#include "core/Controller.h"
|
||||
|
||||
|
||||
void xmrig::App::background()
|
||||
bool xmrig::App::background(int &rc)
|
||||
{
|
||||
signal(SIGPIPE, SIG_IGN);
|
||||
|
||||
if (!m_controller->config()->isBackground()) {
|
||||
return;
|
||||
if (!m_controller->isBackground()) {
|
||||
return false;
|
||||
}
|
||||
|
||||
int i = fork();
|
||||
if (i < 0) {
|
||||
exit(1);
|
||||
rc = 1;
|
||||
|
||||
return true;
|
||||
}
|
||||
|
||||
if (i > 0) {
|
||||
exit(0);
|
||||
rc = 0;
|
||||
|
||||
return true;
|
||||
}
|
||||
|
||||
i = setsid();
|
||||
@@ -62,4 +65,6 @@ void xmrig::App::background()
|
||||
if (i < 0) {
|
||||
LOG_ERR("chdir() failed (errno = %d)", errno);
|
||||
}
|
||||
|
||||
return false;
|
||||
}
|
||||
|
||||
@@ -29,13 +29,12 @@
|
||||
|
||||
#include "App.h"
|
||||
#include "core/Controller.h"
|
||||
#include "core/config/Config.h"
|
||||
|
||||
|
||||
void xmrig::App::background()
|
||||
bool xmrig::App::background(int &)
|
||||
{
|
||||
if (!m_controller->config()->isBackground()) {
|
||||
return;
|
||||
if (!m_controller->isBackground()) {
|
||||
return false;
|
||||
}
|
||||
|
||||
HWND hcon = GetConsoleWindow();
|
||||
@@ -46,4 +45,6 @@ void xmrig::App::background()
|
||||
CloseHandle(h);
|
||||
FreeConsole();
|
||||
}
|
||||
|
||||
return false;
|
||||
}
|
||||
|
||||
@@ -23,10 +23,10 @@
|
||||
*/
|
||||
|
||||
|
||||
#include <assert.h>
|
||||
#include <cassert>
|
||||
#include <cmath>
|
||||
#include <memory.h>
|
||||
#include <stdio.h>
|
||||
#include <cstdio>
|
||||
|
||||
|
||||
#include "backend/common/Hashrate.h"
|
||||
@@ -133,8 +133,8 @@ double xmrig::Hashrate::calc(size_t threadId, size_t ms) const
|
||||
return nan("");
|
||||
}
|
||||
|
||||
const double hashes = static_cast<double>(lastestHashCnt - earliestHashCount);
|
||||
const double time = static_cast<double>(lastestStamp - earliestStamp) / 1000.0;
|
||||
const auto hashes = static_cast<double>(lastestHashCnt - earliestHashCount);
|
||||
const auto time = static_cast<double>(lastestStamp - earliestStamp) / 1000.0;
|
||||
|
||||
return hashes / time;
|
||||
}
|
||||
@@ -175,3 +175,33 @@ rapidjson::Value xmrig::Hashrate::normalize(double d)
|
||||
|
||||
return Value(floor(d * 100.0) / 100.0);
|
||||
}
|
||||
|
||||
|
||||
#ifdef XMRIG_FEATURE_API
|
||||
rapidjson::Value xmrig::Hashrate::toJSON(rapidjson::Document &doc) const
|
||||
{
|
||||
using namespace rapidjson;
|
||||
auto &allocator = doc.GetAllocator();
|
||||
|
||||
Value out(kArrayType);
|
||||
out.PushBack(normalize(calc(ShortInterval)), allocator);
|
||||
out.PushBack(normalize(calc(MediumInterval)), allocator);
|
||||
out.PushBack(normalize(calc(LargeInterval)), allocator);
|
||||
|
||||
return out;
|
||||
}
|
||||
|
||||
|
||||
rapidjson::Value xmrig::Hashrate::toJSON(size_t threadId, rapidjson::Document &doc) const
|
||||
{
|
||||
using namespace rapidjson;
|
||||
auto &allocator = doc.GetAllocator();
|
||||
|
||||
Value out(kArrayType);
|
||||
out.PushBack(normalize(calc(threadId, ShortInterval)), allocator);
|
||||
out.PushBack(normalize(calc(threadId, MediumInterval)), allocator);
|
||||
out.PushBack(normalize(calc(threadId, LargeInterval)), allocator);
|
||||
|
||||
return out;
|
||||
}
|
||||
#endif
|
||||
|
||||
@@ -26,10 +26,11 @@
|
||||
#define XMRIG_HASHRATE_H
|
||||
|
||||
|
||||
#include <stddef.h>
|
||||
#include <stdint.h>
|
||||
#include <cstddef>
|
||||
#include <cstdint>
|
||||
|
||||
|
||||
#include "base/tools/Object.h"
|
||||
#include "rapidjson/fwd.h"
|
||||
|
||||
|
||||
@@ -39,6 +40,8 @@ namespace xmrig {
|
||||
class Hashrate
|
||||
{
|
||||
public:
|
||||
XMRIG_DISABLE_COPY_MOVE_DEFAULT(Hashrate)
|
||||
|
||||
enum Intervals {
|
||||
ShortInterval = 10000,
|
||||
MediumInterval = 60000,
|
||||
@@ -58,6 +61,11 @@ public:
|
||||
static const char *format(double h, char *buf, size_t size);
|
||||
static rapidjson::Value normalize(double d);
|
||||
|
||||
# ifdef XMRIG_FEATURE_API
|
||||
rapidjson::Value toJSON(rapidjson::Document &doc) const;
|
||||
rapidjson::Value toJSON(size_t threadId, rapidjson::Document &doc) const;
|
||||
# endif
|
||||
|
||||
private:
|
||||
constexpr static size_t kBucketSize = 2 << 11;
|
||||
constexpr static size_t kBucketMask = kBucketSize - 1;
|
||||
|
||||
@@ -26,10 +26,11 @@
|
||||
#define XMRIG_THREAD_H
|
||||
|
||||
|
||||
#include <thread>
|
||||
|
||||
|
||||
#include "backend/common/interfaces/IWorker.h"
|
||||
#include "base/tools/Object.h"
|
||||
|
||||
|
||||
#include <thread>
|
||||
|
||||
|
||||
namespace xmrig {
|
||||
@@ -42,6 +43,8 @@ template<class T>
|
||||
class Thread
|
||||
{
|
||||
public:
|
||||
XMRIG_DISABLE_COPY_MOVE_DEFAULT(Thread)
|
||||
|
||||
inline Thread(IBackend *backend, size_t id, const T &config) : m_id(id), m_config(config), m_backend(backend) {}
|
||||
inline ~Thread() { m_thread.join(); delete m_worker; }
|
||||
|
||||
|
||||
@@ -29,6 +29,7 @@
|
||||
#include "backend/common/Workers.h"
|
||||
#include "backend/cpu/CpuWorker.h"
|
||||
#include "base/io/log/Log.h"
|
||||
#include "base/tools/Object.h"
|
||||
|
||||
|
||||
#ifdef XMRIG_FEATURE_OPENCL
|
||||
@@ -42,9 +43,10 @@ namespace xmrig {
|
||||
class WorkersPrivate
|
||||
{
|
||||
public:
|
||||
inline WorkersPrivate()
|
||||
{
|
||||
}
|
||||
XMRIG_DISABLE_COPY_MOVE(WorkersPrivate)
|
||||
|
||||
|
||||
WorkersPrivate() = default;
|
||||
|
||||
|
||||
inline ~WorkersPrivate()
|
||||
@@ -131,7 +133,7 @@ void xmrig::Workers<T>::tick(uint64_t)
|
||||
|
||||
for (Thread<T> *handle : m_workers) {
|
||||
if (!handle->worker()) {
|
||||
return;
|
||||
continue;
|
||||
}
|
||||
|
||||
d_ptr->hashrate->add(handle->id(), handle->worker()->hashCount(), handle->worker()->timestamp());
|
||||
@@ -154,17 +156,21 @@ void xmrig::Workers<T>::onReady(void *arg)
|
||||
auto handle = static_cast<Thread<T>* >(arg);
|
||||
|
||||
IWorker *worker = create(handle);
|
||||
if (!worker || !worker->selfTest()) {
|
||||
LOG_ERR("thread %zu error: \"hash self-test failed\".", worker->id());
|
||||
assert(worker != nullptr);
|
||||
|
||||
if (!worker || !worker->selfTest()) {
|
||||
LOG_ERR("%s " RED("thread ") RED_BOLD("#%zu") RED(" self-test failed"), T::tag(), worker->id());
|
||||
|
||||
handle->backend()->start(worker, false);
|
||||
delete worker;
|
||||
|
||||
return;
|
||||
}
|
||||
|
||||
assert(handle->backend() != nullptr);
|
||||
|
||||
handle->setWorker(worker);
|
||||
handle->backend()->start(worker);
|
||||
handle->backend()->start(worker, true);
|
||||
}
|
||||
|
||||
|
||||
|
||||
@@ -29,6 +29,7 @@
|
||||
|
||||
#include "backend/common/Thread.h"
|
||||
#include "backend/cpu/CpuLaunchData.h"
|
||||
#include "base/tools/Object.h"
|
||||
|
||||
|
||||
#ifdef XMRIG_FEATURE_OPENCL
|
||||
@@ -47,6 +48,8 @@ template<class T>
|
||||
class Workers
|
||||
{
|
||||
public:
|
||||
XMRIG_DISABLE_COPY_MOVE(Workers)
|
||||
|
||||
Workers();
|
||||
~Workers();
|
||||
|
||||
|
||||
@@ -26,7 +26,7 @@
|
||||
#define XMRIG_IBACKEND_H
|
||||
|
||||
|
||||
#include <stdint.h>
|
||||
#include <cstdint>
|
||||
|
||||
|
||||
#include "rapidjson/fwd.h"
|
||||
@@ -56,7 +56,7 @@ public:
|
||||
virtual void prepare(const Job &nextJob) = 0;
|
||||
virtual void printHashrate(bool details) = 0;
|
||||
virtual void setJob(const Job &job) = 0;
|
||||
virtual void start(IWorker *worker) = 0;
|
||||
virtual void start(IWorker *worker, bool ready) = 0;
|
||||
virtual void stop() = 0;
|
||||
virtual void tick(uint64_t ticks) = 0;
|
||||
|
||||
|
||||
@@ -26,8 +26,8 @@
|
||||
#define XMRIG_IWORKER_H
|
||||
|
||||
|
||||
#include <stdint.h>
|
||||
#include <stddef.h>
|
||||
#include <cstdint>
|
||||
#include <cstddef>
|
||||
|
||||
|
||||
namespace xmrig {
|
||||
@@ -44,6 +44,7 @@ public:
|
||||
virtual bool selfTest() = 0;
|
||||
virtual const VirtualMemory *memory() const = 0;
|
||||
virtual size_t id() const = 0;
|
||||
virtual size_t intensity() const = 0;
|
||||
virtual uint64_t hashCount() const = 0;
|
||||
virtual uint64_t timestamp() const = 0;
|
||||
virtual void start() = 0;
|
||||
|
||||
@@ -27,7 +27,7 @@
|
||||
#define XMRIG_PCITOPOLOGY_H
|
||||
|
||||
|
||||
#include <stdio.h>
|
||||
#include <cstdio>
|
||||
|
||||
|
||||
#include "base/tools/String.h"
|
||||
@@ -40,19 +40,30 @@ class PciTopology
|
||||
{
|
||||
public:
|
||||
PciTopology() = default;
|
||||
PciTopology(uint32_t bus, uint32_t device, uint32_t function) : bus(bus), device(device), function(function) {}
|
||||
PciTopology(uint32_t bus, uint32_t device, uint32_t function) : m_valid(true), m_bus(bus), m_device(device), m_function(function) {}
|
||||
|
||||
uint32_t bus = 0;
|
||||
uint32_t device = 0;
|
||||
uint32_t function = 0;
|
||||
inline bool isValid() const { return m_valid; }
|
||||
inline uint8_t bus() const { return m_bus; }
|
||||
inline uint8_t device() const { return m_device; }
|
||||
inline uint8_t function() const { return m_function; }
|
||||
|
||||
String toString() const
|
||||
{
|
||||
if (!isValid()) {
|
||||
return "n/a";
|
||||
}
|
||||
|
||||
char *buf = new char[8]();
|
||||
snprintf(buf, 8, "%02x:%02x.%01x", bus, device, function);
|
||||
snprintf(buf, 8, "%02hhx:%02hhx.%01hhx", bus(), device(), function());
|
||||
|
||||
return buf;
|
||||
}
|
||||
|
||||
private:
|
||||
bool m_valid = false;
|
||||
uint8_t m_bus = 0;
|
||||
uint8_t m_device = 0;
|
||||
uint8_t m_function = 0;
|
||||
};
|
||||
|
||||
|
||||
|
||||
@@ -23,7 +23,7 @@
|
||||
*/
|
||||
|
||||
|
||||
#include <assert.h>
|
||||
#include <cassert>
|
||||
|
||||
|
||||
#include "backend/cpu/Cpu.h"
|
||||
@@ -44,7 +44,15 @@ static xmrig::ICpuInfo *cpuInfo = nullptr;
|
||||
|
||||
xmrig::ICpuInfo *xmrig::Cpu::info()
|
||||
{
|
||||
assert(cpuInfo != nullptr);
|
||||
if (cpuInfo == nullptr) {
|
||||
# if defined(XMRIG_FEATURE_HWLOC)
|
||||
cpuInfo = new HwlocCpuInfo();
|
||||
# elif defined(XMRIG_FEATURE_LIBCPUID)
|
||||
cpuInfo = new AdvancedCpuInfo();
|
||||
# else
|
||||
cpuInfo = new BasicCpuInfo();
|
||||
# endif
|
||||
}
|
||||
|
||||
return cpuInfo;
|
||||
}
|
||||
@@ -62,7 +70,7 @@ rapidjson::Value xmrig::Cpu::toJSON(rapidjson::Document &doc)
|
||||
cpu.AddMember("brand", StringRef(i->brand()), allocator);
|
||||
cpu.AddMember("aes", i->hasAES(), allocator);
|
||||
cpu.AddMember("avx2", i->hasAVX2(), allocator);
|
||||
cpu.AddMember("x64", i->isX64(), allocator);
|
||||
cpu.AddMember("x64", ICpuInfo::isX64(), allocator);
|
||||
cpu.AddMember("l2", static_cast<uint64_t>(i->L2()), allocator);
|
||||
cpu.AddMember("l3", static_cast<uint64_t>(i->L3()), allocator);
|
||||
cpu.AddMember("cores", static_cast<uint64_t>(i->cores()), allocator);
|
||||
@@ -81,20 +89,6 @@ rapidjson::Value xmrig::Cpu::toJSON(rapidjson::Document &doc)
|
||||
}
|
||||
|
||||
|
||||
void xmrig::Cpu::init()
|
||||
{
|
||||
assert(cpuInfo == nullptr);
|
||||
|
||||
# if defined(XMRIG_FEATURE_HWLOC)
|
||||
cpuInfo = new HwlocCpuInfo();
|
||||
# elif defined(XMRIG_FEATURE_LIBCPUID)
|
||||
cpuInfo = new AdvancedCpuInfo();
|
||||
# else
|
||||
cpuInfo = new BasicCpuInfo();
|
||||
# endif
|
||||
}
|
||||
|
||||
|
||||
void xmrig::Cpu::release()
|
||||
{
|
||||
assert(cpuInfo != nullptr);
|
||||
|
||||
@@ -37,7 +37,6 @@ class Cpu
|
||||
public:
|
||||
static ICpuInfo *info();
|
||||
static rapidjson::Value toJSON(rapidjson::Document &doc);
|
||||
static void init();
|
||||
static void release();
|
||||
|
||||
inline static Assembly::Id assembly(Assembly::Id hint) { return hint == Assembly::AUTO ? Cpu::info()->assembly() : hint; }
|
||||
|
||||
@@ -60,7 +60,7 @@ namespace xmrig {
|
||||
extern template class Threads<CpuThreads>;
|
||||
|
||||
|
||||
static const char *tag = CYAN_BG_BOLD(" cpu ");
|
||||
static const char *tag = CYAN_BG_BOLD(WHITE_BOLD_S " cpu ");
|
||||
static const String kType = "cpu";
|
||||
static std::mutex mutex;
|
||||
|
||||
@@ -80,38 +80,51 @@ public:
|
||||
m_memory = memory;
|
||||
m_pages = 0;
|
||||
m_started = 0;
|
||||
m_errors = 0;
|
||||
m_threads = threads.size();
|
||||
m_ways = 0;
|
||||
m_ts = Chrono::steadyMSecs();
|
||||
|
||||
for (const CpuLaunchData &data : threads) {
|
||||
m_ways += data.intensity;
|
||||
}
|
||||
}
|
||||
|
||||
inline bool started(const std::pair<size_t, size_t> &hugePages)
|
||||
inline bool started(IWorker *worker, bool ready)
|
||||
{
|
||||
m_started++;
|
||||
m_hugePages += hugePages.first;
|
||||
m_pages += hugePages.second;
|
||||
if (ready) {
|
||||
auto hugePages = worker->memory()->hugePages();
|
||||
|
||||
return m_started == m_threads;
|
||||
m_started++;
|
||||
m_hugePages += hugePages.first;
|
||||
m_pages += hugePages.second;
|
||||
m_ways += worker->intensity();
|
||||
}
|
||||
else {
|
||||
m_errors++;
|
||||
}
|
||||
|
||||
return (m_started + m_errors) == m_threads;
|
||||
}
|
||||
|
||||
inline void print() const
|
||||
{
|
||||
LOG_INFO("%s" GREEN_BOLD(" READY") " threads " CYAN_BOLD("%zu(%zu)") " huge pages %s%zu/%zu %1.0f%%\x1B[0m memory " CYAN_BOLD("%zu KB") BLACK_BOLD(" (%" PRIu64 " ms)"),
|
||||
if (m_started == 0) {
|
||||
LOG_ERR("%s " RED_BOLD("disabled") YELLOW(" (failed to start threads)"), tag);
|
||||
|
||||
return;
|
||||
}
|
||||
|
||||
LOG_INFO("%s" GREEN_BOLD(" READY") " threads %s%zu/%zu (%zu)" CLEAR " huge pages %s%zu/%zu %1.0f%%" CLEAR " memory " CYAN_BOLD("%zu KB") BLACK_BOLD(" (%" PRIu64 " ms)"),
|
||||
tag,
|
||||
m_threads, m_ways,
|
||||
m_errors == 0 ? CYAN_BOLD_S : YELLOW_BOLD_S,
|
||||
m_started, m_threads, m_ways,
|
||||
(m_hugePages == m_pages ? GREEN_BOLD_S : (m_hugePages == 0 ? RED_BOLD_S : YELLOW_BOLD_S)),
|
||||
m_hugePages, m_pages,
|
||||
m_hugePages == 0 ? 0.0 : static_cast<double>(m_hugePages) / m_pages * 100.0,
|
||||
m_ways * m_memory / 1024,
|
||||
memory() / 1024,
|
||||
Chrono::steadyMSecs() - m_ts
|
||||
);
|
||||
}
|
||||
|
||||
private:
|
||||
size_t m_errors = 0;
|
||||
size_t m_hugePages = 0;
|
||||
size_t m_memory = 0;
|
||||
size_t m_pages = 0;
|
||||
@@ -322,17 +335,19 @@ void xmrig::CpuBackend::setJob(const Job &job)
|
||||
}
|
||||
|
||||
|
||||
void xmrig::CpuBackend::start(IWorker *worker)
|
||||
void xmrig::CpuBackend::start(IWorker *worker, bool ready)
|
||||
{
|
||||
mutex.lock();
|
||||
|
||||
if (d_ptr->status.started(worker->memory()->hugePages())) {
|
||||
if (d_ptr->status.started(worker, ready)) {
|
||||
d_ptr->status.print();
|
||||
}
|
||||
|
||||
mutex.unlock();
|
||||
|
||||
worker->start();
|
||||
if (ready) {
|
||||
worker->start();
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
@@ -390,8 +405,9 @@ rapidjson::Value xmrig::CpuBackend::toJSON(rapidjson::Document &doc) const
|
||||
return out;
|
||||
}
|
||||
|
||||
out.AddMember("hashrate", hashrate()->toJSON(doc), allocator);
|
||||
|
||||
Value threads(kArrayType);
|
||||
const Hashrate *hr = hashrate();
|
||||
|
||||
size_t i = 0;
|
||||
for (const CpuLaunchData &data : d_ptr->threads) {
|
||||
@@ -399,15 +415,9 @@ rapidjson::Value xmrig::CpuBackend::toJSON(rapidjson::Document &doc) const
|
||||
thread.AddMember("intensity", data.intensity, allocator);
|
||||
thread.AddMember("affinity", data.affinity, allocator);
|
||||
thread.AddMember("av", data.av(), allocator);
|
||||
|
||||
Value hashrate(kArrayType);
|
||||
hashrate.PushBack(Hashrate::normalize(hr->calc(i, Hashrate::ShortInterval)), allocator);
|
||||
hashrate.PushBack(Hashrate::normalize(hr->calc(i, Hashrate::MediumInterval)), allocator);
|
||||
hashrate.PushBack(Hashrate::normalize(hr->calc(i, Hashrate::LargeInterval)), allocator);
|
||||
thread.AddMember("hashrate", hashrate()->toJSON(i, doc), allocator);
|
||||
|
||||
i++;
|
||||
|
||||
thread.AddMember("hashrate", hashrate, allocator);
|
||||
threads.PushBack(thread, allocator);
|
||||
}
|
||||
|
||||
|
||||
@@ -26,10 +26,11 @@
|
||||
#define XMRIG_CPUBACKEND_H
|
||||
|
||||
|
||||
#include <utility>
|
||||
|
||||
|
||||
#include "backend/common/interfaces/IBackend.h"
|
||||
#include "base/tools/Object.h"
|
||||
|
||||
|
||||
#include <utility>
|
||||
|
||||
|
||||
namespace xmrig {
|
||||
@@ -43,6 +44,8 @@ class Miner;
|
||||
class CpuBackend : public IBackend
|
||||
{
|
||||
public:
|
||||
XMRIG_DISABLE_COPY_MOVE_DEFAULT(CpuBackend)
|
||||
|
||||
CpuBackend(Controller *controller);
|
||||
~CpuBackend() override;
|
||||
|
||||
@@ -55,7 +58,7 @@ protected:
|
||||
void prepare(const Job &nextJob) override;
|
||||
void printHashrate(bool details) override;
|
||||
void setJob(const Job &job) override;
|
||||
void start(IWorker *worker) override;
|
||||
void start(IWorker *worker, bool ready) override;
|
||||
void stop() override;
|
||||
void tick(uint64_t ticks) override;
|
||||
|
||||
|
||||
@@ -24,13 +24,15 @@
|
||||
*/
|
||||
|
||||
|
||||
#include <algorithm>
|
||||
|
||||
|
||||
#include "backend/cpu/CpuLaunchData.h"
|
||||
|
||||
#include "backend/common/Tags.h"
|
||||
#include "backend/cpu/CpuConfig.h"
|
||||
|
||||
|
||||
#include <algorithm>
|
||||
|
||||
|
||||
xmrig::CpuLaunchData::CpuLaunchData(const Miner *miner, const Algorithm &algorithm, const CpuConfig &config, const CpuThread &thread) :
|
||||
algorithm(algorithm),
|
||||
assembly(config.assembly()),
|
||||
@@ -65,3 +67,9 @@ xmrig::CnHash::AlgoVariant xmrig::CpuLaunchData::av() const
|
||||
|
||||
return static_cast<CnHash::AlgoVariant>(!hwAES ? (intensity + 5) : (intensity + 2));
|
||||
}
|
||||
|
||||
|
||||
const char *xmrig::CpuLaunchData::tag()
|
||||
{
|
||||
return cpu_tag();
|
||||
}
|
||||
|
||||
@@ -54,6 +54,8 @@ public:
|
||||
inline bool operator!=(const CpuLaunchData &other) const { return !isEqual(other); }
|
||||
inline bool operator==(const CpuLaunchData &other) const { return isEqual(other); }
|
||||
|
||||
static const char *tag();
|
||||
|
||||
const Algorithm algorithm;
|
||||
const Assembly assembly;
|
||||
const bool hugePages;
|
||||
|
||||
@@ -54,6 +54,7 @@ protected:
|
||||
void start() override;
|
||||
|
||||
inline const VirtualMemory *memory() const override { return m_memory; }
|
||||
inline size_t intensity() const override { return N; }
|
||||
|
||||
private:
|
||||
inline cn_hash_fun fn(const Algorithm &algorithm) const { return CnHash::fn(algorithm, m_av, m_assembly); }
|
||||
|
||||
@@ -72,12 +72,19 @@ static void printDisabled(const char *reason)
|
||||
struct OclLaunchStatus
|
||||
{
|
||||
public:
|
||||
inline bool started() { m_started++; return m_started == m_threads; }
|
||||
inline size_t threads() const { return m_threads; }
|
||||
inline size_t threads() const { return m_threads; }
|
||||
|
||||
inline bool started(bool ready)
|
||||
{
|
||||
ready ? m_started++ : m_errors++;
|
||||
|
||||
return (m_started + m_errors) == m_threads;
|
||||
}
|
||||
|
||||
inline void start(size_t threads)
|
||||
{
|
||||
m_started = 0;
|
||||
m_errors = 0;
|
||||
m_threads = threads;
|
||||
m_ts = Chrono::steadyMSecs();
|
||||
OclWorker::ready = false;
|
||||
@@ -85,14 +92,23 @@ public:
|
||||
|
||||
inline void print() const
|
||||
{
|
||||
LOG_INFO("%s" GREEN_BOLD(" READY") " threads " CYAN_BOLD("%zu") BLACK_BOLD(" (%" PRIu64 " ms)"),
|
||||
if (m_started == 0) {
|
||||
LOG_ERR("%s " RED_BOLD("disabled") YELLOW(" (failed to start threads)"), tag);
|
||||
|
||||
return;
|
||||
}
|
||||
|
||||
LOG_INFO("%s" GREEN_BOLD(" READY") " threads " "%s%zu/%zu" BLACK_BOLD(" (%" PRIu64 " ms)"),
|
||||
tag,
|
||||
m_errors == 0 ? CYAN_BOLD_S : YELLOW_BOLD_S,
|
||||
m_started,
|
||||
m_threads,
|
||||
Chrono::steadyMSecs() - m_ts
|
||||
);
|
||||
}
|
||||
|
||||
private:
|
||||
size_t m_errors = 0;
|
||||
size_t m_started = 0;
|
||||
size_t m_threads = 0;
|
||||
uint64_t m_ts = 0;
|
||||
@@ -119,6 +135,10 @@ public:
|
||||
return printDisabled(RED_S " (failed to load OpenCL runtime)");
|
||||
}
|
||||
|
||||
if (platform.isValid()) {
|
||||
return;
|
||||
}
|
||||
|
||||
platform = cl.platform();
|
||||
if (!platform.isValid()) {
|
||||
return printDisabled(RED_S " (selected OpenCL platform NOT found)");
|
||||
@@ -134,7 +154,7 @@ public:
|
||||
for (const OclDevice &device : devices) {
|
||||
Log::print(GREEN_BOLD(" * ") WHITE_BOLD("%-13s") CYAN_BOLD("#%zu") YELLOW(" %s") " %s " WHITE_BOLD("%uMHz") " cu:" WHITE_BOLD("%u") " mem:" CYAN("%zu/%zu") " MB", "OPENCL GPU",
|
||||
device.index(),
|
||||
device.hasTopology() ? device.topology().toString().data() : "n/a",
|
||||
device.topology().toString().data(),
|
||||
device.printableName().data(),
|
||||
device.clock(),
|
||||
device.computeUnits(),
|
||||
@@ -161,7 +181,7 @@ public:
|
||||
CYAN_BOLD("%3u") " |" CYAN_BOLD("%3s") " |" CYAN_BOLD("%3u") " |" CYAN("%5zu") " | %s",
|
||||
i,
|
||||
data.thread.index(),
|
||||
data.device.hasTopology() ? data.device.topology().toString().data() : "n/a",
|
||||
data.device.topology().toString().data(),
|
||||
data.thread.intensity(),
|
||||
data.thread.worksize(),
|
||||
data.thread.stridedIndex(),
|
||||
@@ -269,7 +289,7 @@ void xmrig::OclBackend::printHashrate(bool details)
|
||||
Hashrate::format(hashrate()->calc(i, Hashrate::MediumInterval), num + 8, sizeof num / 3),
|
||||
Hashrate::format(hashrate()->calc(i, Hashrate::LargeInterval), num + 8 * 2, sizeof num / 3),
|
||||
data.device.index(),
|
||||
data.device.hasTopology() ? data.device.topology().toString().data() : "n/a",
|
||||
data.device.topology().toString().data(),
|
||||
data.device.printableName().data()
|
||||
);
|
||||
|
||||
@@ -286,12 +306,15 @@ void xmrig::OclBackend::printHashrate(bool details)
|
||||
|
||||
void xmrig::OclBackend::setJob(const Job &job)
|
||||
{
|
||||
const OclConfig &cl = d_ptr->controller->config()->cl();
|
||||
if (cl.isEnabled()) {
|
||||
d_ptr->init(cl);
|
||||
}
|
||||
|
||||
if (!isEnabled()) {
|
||||
return stop();
|
||||
}
|
||||
|
||||
const OclConfig &cl = d_ptr->controller->config()->cl();
|
||||
|
||||
std::vector<OclLaunchData> threads = cl.get(d_ptr->controller->miner(), job.algorithm(), d_ptr->platform, d_ptr->devices, tag);
|
||||
if (!d_ptr->threads.empty() && d_ptr->threads.size() == threads.size() && std::equal(d_ptr->threads.begin(), d_ptr->threads.end(), threads.begin())) {
|
||||
return;
|
||||
@@ -319,11 +342,11 @@ void xmrig::OclBackend::setJob(const Job &job)
|
||||
}
|
||||
|
||||
|
||||
void xmrig::OclBackend::start(IWorker *worker)
|
||||
void xmrig::OclBackend::start(IWorker *worker, bool ready)
|
||||
{
|
||||
mutex.lock();
|
||||
|
||||
if (d_ptr->status.started()) {
|
||||
if (d_ptr->status.started(ready)) {
|
||||
d_ptr->status.print();
|
||||
|
||||
OclWorker::ready = true;
|
||||
@@ -331,7 +354,9 @@ void xmrig::OclBackend::start(IWorker *worker)
|
||||
|
||||
mutex.unlock();
|
||||
|
||||
worker->start();
|
||||
if (ready) {
|
||||
worker->start();
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
@@ -373,22 +398,19 @@ rapidjson::Value xmrig::OclBackend::toJSON(rapidjson::Document &doc) const
|
||||
return out;
|
||||
}
|
||||
|
||||
out.AddMember("hashrate", hashrate()->toJSON(doc), allocator);
|
||||
|
||||
Value threads(kArrayType);
|
||||
const Hashrate *hr = hashrate();
|
||||
|
||||
size_t i = 0;
|
||||
for (const OclLaunchData &data : d_ptr->threads) {
|
||||
Value thread = data.thread.toJSON(doc);
|
||||
thread.AddMember("affinity", data.affinity, allocator);
|
||||
thread.AddMember("hashrate", hashrate()->toJSON(i, doc), allocator);
|
||||
|
||||
Value hashrate(kArrayType);
|
||||
hashrate.PushBack(Hashrate::normalize(hr->calc(i, Hashrate::ShortInterval)), allocator);
|
||||
hashrate.PushBack(Hashrate::normalize(hr->calc(i, Hashrate::MediumInterval)), allocator);
|
||||
hashrate.PushBack(Hashrate::normalize(hr->calc(i, Hashrate::LargeInterval)), allocator);
|
||||
data.device.toJSON(thread, doc);
|
||||
|
||||
i++;
|
||||
|
||||
thread.AddMember("hashrate", hashrate, allocator);
|
||||
threads.PushBack(thread, allocator);
|
||||
}
|
||||
|
||||
|
||||
@@ -62,7 +62,7 @@ protected:
|
||||
void prepare(const Job &nextJob) override;
|
||||
void printHashrate(bool details) override;
|
||||
void setJob(const Job &job) override;
|
||||
void start(IWorker *worker) override;
|
||||
void start(IWorker *worker, bool ready) override;
|
||||
void stop() override;
|
||||
void tick(uint64_t ticks) override;
|
||||
|
||||
|
||||
@@ -30,12 +30,16 @@
|
||||
#include "rapidjson/document.h"
|
||||
|
||||
|
||||
#include <algorithm>
|
||||
|
||||
|
||||
namespace xmrig {
|
||||
|
||||
static const char *kAMD = "AMD";
|
||||
static const char *kCache = "cache";
|
||||
static const char *kCn = "cn";
|
||||
static const char *kCn2 = "cn/2";
|
||||
static const char *kDevicesHint = "devices-hint";
|
||||
static const char *kEnabled = "enabled";
|
||||
static const char *kINTEL = "INTEL";
|
||||
static const char *kLoader = "loader";
|
||||
@@ -90,6 +94,22 @@ static size_t generate(const char *key, Threads<OclThreads> &threads, const Algo
|
||||
}
|
||||
|
||||
|
||||
static inline std::vector<OclDevice> filterDevices(const std::vector<OclDevice> &devices, const std::vector<uint32_t> &hints)
|
||||
{
|
||||
std::vector<OclDevice> out;
|
||||
out.reserve(std::min(devices.size(), hints.size()));
|
||||
|
||||
for (const auto &device : devices) {
|
||||
auto it = std::find(hints.begin(), hints.end(), device.index());
|
||||
if (it != hints.end()) {
|
||||
out.emplace_back(device);
|
||||
}
|
||||
}
|
||||
|
||||
return out;
|
||||
}
|
||||
|
||||
|
||||
}
|
||||
|
||||
|
||||
@@ -214,17 +234,20 @@ void xmrig::OclConfig::read(const rapidjson::Value &value)
|
||||
m_loader = Json::getString(value, kLoader);
|
||||
|
||||
setPlatform(Json::getValue(value, kPlatform));
|
||||
setDevicesHint(Json::getString(value, kDevicesHint));
|
||||
|
||||
if (isEnabled()) {
|
||||
m_threads.read(value);
|
||||
m_threads.read(value);
|
||||
|
||||
generate();
|
||||
}
|
||||
generate();
|
||||
}
|
||||
else if (value.IsBool() && value.IsFalse()) {
|
||||
m_enabled = false;
|
||||
else if (value.IsBool()) {
|
||||
m_enabled = value.GetBool();
|
||||
|
||||
generate();
|
||||
}
|
||||
else {
|
||||
m_shouldSave = true;
|
||||
|
||||
generate();
|
||||
}
|
||||
}
|
||||
@@ -232,11 +255,15 @@ void xmrig::OclConfig::read(const rapidjson::Value &value)
|
||||
|
||||
void xmrig::OclConfig::generate()
|
||||
{
|
||||
if (!isEnabled() || m_threads.has("*")) {
|
||||
return;
|
||||
}
|
||||
|
||||
if (!OclLib::init(loader())) {
|
||||
return;
|
||||
}
|
||||
|
||||
const auto devices = platform().devices();
|
||||
const auto devices = m_devicesHint.empty() ? platform().devices() : filterDevices(platform().devices(), m_devicesHint);
|
||||
if (devices.empty()) {
|
||||
return;
|
||||
}
|
||||
@@ -281,6 +308,21 @@ void xmrig::OclConfig::generate()
|
||||
}
|
||||
|
||||
|
||||
void xmrig::OclConfig::setDevicesHint(const char *devicesHint)
|
||||
{
|
||||
if (devicesHint == nullptr) {
|
||||
return;
|
||||
}
|
||||
|
||||
const auto indexes = String(devicesHint).split(',');
|
||||
m_devicesHint.reserve(indexes.size());
|
||||
|
||||
for (const auto &index : indexes) {
|
||||
m_devicesHint.push_back(strtoul(index, nullptr, 10));
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
void xmrig::OclConfig::setPlatform(const rapidjson::Value &platform)
|
||||
{
|
||||
if (platform.IsString()) {
|
||||
|
||||
@@ -53,11 +53,13 @@ public:
|
||||
|
||||
private:
|
||||
void generate();
|
||||
void setDevicesHint(const char *devicesHint);
|
||||
void setPlatform(const rapidjson::Value &platform);
|
||||
|
||||
bool m_cache = true;
|
||||
bool m_enabled = true;
|
||||
bool m_enabled = false;
|
||||
bool m_shouldSave = false;
|
||||
std::vector<uint32_t> m_devicesHint;
|
||||
String m_loader;
|
||||
String m_platformVendor;
|
||||
Threads<OclThreads> m_threads;
|
||||
|
||||
@@ -25,6 +25,8 @@
|
||||
|
||||
|
||||
#include "backend/opencl/OclLaunchData.h"
|
||||
|
||||
#include "backend/common/Tags.h"
|
||||
#include "backend/opencl/OclConfig.h"
|
||||
|
||||
|
||||
@@ -45,3 +47,9 @@ bool xmrig::OclLaunchData::isEqual(const OclLaunchData &other) const
|
||||
return (other.algorithm == algorithm &&
|
||||
other.thread == thread);
|
||||
}
|
||||
|
||||
|
||||
const char *xmrig::OclLaunchData::tag()
|
||||
{
|
||||
return ocl_tag();
|
||||
}
|
||||
|
||||
@@ -62,6 +62,8 @@ public:
|
||||
inline bool operator!=(const OclLaunchData &other) const { return !isEqual(other); }
|
||||
inline bool operator==(const OclLaunchData &other) const { return isEqual(other); }
|
||||
|
||||
static const char *tag();
|
||||
|
||||
cl_context ctx = nullptr;
|
||||
const Algorithm algorithm;
|
||||
const bool cache;
|
||||
|
||||
@@ -52,6 +52,10 @@ static const char* kDatasetHost = "dataset_host";
|
||||
|
||||
xmrig::OclThread::OclThread(const rapidjson::Value &value)
|
||||
{
|
||||
if (!value.IsObject()) {
|
||||
return;
|
||||
}
|
||||
|
||||
m_index = Json::getUint(value, kIndex);
|
||||
m_worksize = std::max(std::min(Json::getUint(value, kWorksize), 128u), 1u);
|
||||
m_unrollFactor = std::max(std::min(Json::getUint(value, kUnroll, m_unrollFactor), 128u), 1u);
|
||||
|
||||
@@ -137,6 +137,12 @@ bool xmrig::OclWorker::selfTest()
|
||||
}
|
||||
|
||||
|
||||
size_t xmrig::OclWorker::intensity() const
|
||||
{
|
||||
return m_runner ? m_runner->intensity() : 0;
|
||||
}
|
||||
|
||||
|
||||
void xmrig::OclWorker::start()
|
||||
{
|
||||
cl_uint results[0x100];
|
||||
|
||||
@@ -56,6 +56,7 @@ public:
|
||||
|
||||
protected:
|
||||
bool selfTest() override;
|
||||
size_t intensity() const override;
|
||||
void start() override;
|
||||
|
||||
private:
|
||||
|
||||
@@ -604,7 +604,7 @@ __kernel void hashAes1Rx4(__global const void* input, __global void* hash, uint
|
||||
__local const uint* const t2 = ((sub & 1) == 0) ? (T + 512) : (T + 1536);
|
||||
__local const uint* const t3 = ((sub & 1) == 0) ? (T + 768) : (T + 1280);
|
||||
|
||||
#pragma unroll(8)
|
||||
#pragma unroll 8
|
||||
for (uint i = 0; i < inputSize / sizeof(uint4); i += 4, p += 4)
|
||||
{
|
||||
uint k[4], y[4];
|
||||
|
||||
@@ -72,7 +72,7 @@ __kernel void fillAes_name(__global void* state, __global void* out, uint batch_
|
||||
const __local uint* const t2 = (sub & 1) ? (T + 512) : (T + 1536);
|
||||
const __local uint* const t3 = (sub & 1) ? (T + 768) : (T + 1280);
|
||||
|
||||
#pragma unroll(unroll_factor)
|
||||
#pragma unroll unroll_factor
|
||||
for (uint i = 0; i < outputSize / sizeof(uint4); i += 4, p += 4)
|
||||
{
|
||||
uint y[4];
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
@@ -902,7 +902,7 @@ __global uint* generate_jit_code(__global uint2* e, __global uint2* p0, __global
|
||||
{
|
||||
int prefetch_data_count;
|
||||
|
||||
#pragma unroll(1)
|
||||
#pragma unroll 1
|
||||
for (int pass = 0; pass < 2; ++pass)
|
||||
{
|
||||
#if RANDOMX_PROGRAM_SIZE > 256
|
||||
@@ -929,7 +929,7 @@ __global uint* generate_jit_code(__global uint2* e, __global uint2* p0, __global
|
||||
|
||||
prefetch_data_count = 0;
|
||||
|
||||
#pragma unroll(1)
|
||||
#pragma unroll 1
|
||||
for (uint i = 0; i < RANDOMX_PROGRAM_SIZE; ++i)
|
||||
{
|
||||
// Clean flags
|
||||
@@ -1314,7 +1314,7 @@ __global uint* generate_jit_code(__global uint2* e, __global uint2* p0, __global
|
||||
|
||||
// Sort p0
|
||||
uint prev = p0[0].x;
|
||||
#pragma unroll(1)
|
||||
#pragma unroll 1
|
||||
for (int j = 1; j < prefetch_data_count; ++j)
|
||||
{
|
||||
uint2 cur = p0[j];
|
||||
@@ -1344,7 +1344,7 @@ __global uint* generate_jit_code(__global uint2* e, __global uint2* p0, __global
|
||||
|
||||
__global int* prefetched_vgprs = prefecth_vgprs_stack + num_prefetch_vgprs;
|
||||
|
||||
#pragma unroll(8)
|
||||
#pragma unroll 8
|
||||
for (int i = 0; i < RANDOMX_PROGRAM_SIZE; ++i)
|
||||
prefetched_vgprs[i] = 0;
|
||||
|
||||
@@ -1359,7 +1359,7 @@ __global uint* generate_jit_code(__global uint2* e, __global uint2* p0, __global
|
||||
const uint size_limit = (COMPILED_PROGRAM_SIZE - 200) / sizeof(uint);
|
||||
__global uint* start_p = p;
|
||||
|
||||
#pragma unroll(1)
|
||||
#pragma unroll 1
|
||||
for (int i = 0; i < RANDOMX_PROGRAM_SIZE; ++i)
|
||||
{
|
||||
const uint2 inst = e[i];
|
||||
|
||||
@@ -1658,7 +1658,7 @@ uint32_t inner_loop(
|
||||
const int32_t sub2 = sub >> 1;
|
||||
imm_buf[IMM_INDEX_COUNT + 1] = fprc;
|
||||
|
||||
#pragma unroll(1)
|
||||
#pragma unroll 1
|
||||
for (int32_t ip = 0; ip < program_length;)
|
||||
{
|
||||
imm_buf[IMM_INDEX_COUNT] = ip;
|
||||
@@ -1934,7 +1934,7 @@ __kernel void execute_vm(__global void* vm_states, __global void* rounding, __gl
|
||||
const uint32_t workers_mask = ((1 << WORKERS_PER_HASH) - 1) << ((get_local_id(0) / IDX_WIDTH) * IDX_WIDTH);
|
||||
const uint32_t fp_workers_mask = 3 << (((sub >> 1) << 1) + (get_local_id(0) / IDX_WIDTH) * IDX_WIDTH);
|
||||
|
||||
#pragma unroll(1)
|
||||
#pragma unroll 1
|
||||
for (int ic = 0; ic < num_iterations; ++ic)
|
||||
{
|
||||
__local uint64_t *r;
|
||||
|
||||
@@ -45,7 +45,13 @@ static inline uint32_t getMaxThreads(const OclDevice &device, const Algorithm &a
|
||||
return 40000u;
|
||||
}
|
||||
|
||||
return ((algorithm.l3() <= oneMiB) ? 2u : 1u) * 1000u;
|
||||
const uint32_t ratio = (algorithm.l3() <= oneMiB) ? 2u : 1u;
|
||||
|
||||
if (device.vendorId() == OCL_VENDOR_INTEL) {
|
||||
return ratio * device.computeUnits() * 8;
|
||||
}
|
||||
|
||||
return ratio * 1000u;
|
||||
}
|
||||
|
||||
|
||||
@@ -107,7 +113,7 @@ bool ocl_generic_cn_generator(const OclDevice &device, const Algorithm &algorith
|
||||
return false;
|
||||
}
|
||||
|
||||
const uint32_t threadCount = ((device.globalMemSize() - intensity * 2 * algorithm.l3()) > 128 * oneMiB) ? 2 : 1;
|
||||
const uint32_t threadCount = (device.vendorId() == OCL_VENDOR_AMD && (device.globalMemSize() - intensity * 2 * algorithm.l3()) > 128 * oneMiB) ? 2 : 1;
|
||||
|
||||
threads.add(OclThread(device.index(), intensity, 8, getStridedIndex(device, algorithm), 2, threadCount, 8));
|
||||
|
||||
|
||||
@@ -86,7 +86,7 @@ bool ocl_generic_rx_generator(const OclDevice &device, const Algorithm &algorith
|
||||
return false;
|
||||
}
|
||||
|
||||
threads.add(OclThread(device.index(), intensity, 8, 2, gcnAsm, datasetHost, 6));
|
||||
threads.add(OclThread(device.index(), intensity, 8, device.vendorId() == OCL_VENDOR_AMD ? 2 : 1, gcnAsm, datasetHost, 6));
|
||||
|
||||
return true;
|
||||
}
|
||||
|
||||
@@ -51,18 +51,19 @@ public:
|
||||
IOclRunner() = default;
|
||||
virtual ~IOclRunner() = default;
|
||||
|
||||
virtual void run(uint32_t nonce, uint32_t *hashOutput) = 0;
|
||||
virtual void set(const Job &job, uint8_t *blob) = 0;
|
||||
virtual cl_context ctx() const = 0;
|
||||
virtual const Algorithm &algorithm() const = 0;
|
||||
virtual const char *buildOptions() const = 0;
|
||||
virtual const char *deviceKey() const = 0;
|
||||
virtual const char *source() const = 0;
|
||||
virtual const OclLaunchData &data() const = 0;
|
||||
virtual size_t intensity() const = 0;
|
||||
virtual size_t threadId() const = 0;
|
||||
virtual uint32_t deviceIndex() const = 0;
|
||||
virtual void build() = 0;
|
||||
virtual void init() = 0;
|
||||
virtual void run(uint32_t nonce, uint32_t *hashOutput) = 0;
|
||||
virtual void set(const Job &job, uint8_t *blob) = 0;
|
||||
|
||||
protected:
|
||||
virtual size_t bufferSize() const = 0;
|
||||
|
||||
@@ -40,7 +40,8 @@ xmrig::OclBaseRunner::OclBaseRunner(size_t id, const OclLaunchData &data) :
|
||||
m_source(OclSource::get(data.algorithm)),
|
||||
m_data(data),
|
||||
m_align(OclLib::getUint(data.device.id(), CL_DEVICE_MEM_BASE_ADDR_ALIGN)),
|
||||
m_threadId(id)
|
||||
m_threadId(id),
|
||||
m_intensity(data.thread.intensity())
|
||||
{
|
||||
m_deviceKey = data.device.name();
|
||||
|
||||
@@ -97,7 +98,7 @@ void xmrig::OclBaseRunner::init()
|
||||
constexpr size_t oneGiB = 1024 * 1024 * 1024;
|
||||
size_t size = bufferSize();
|
||||
|
||||
if (size < oneGiB && data().device.freeMemSize() >= oneGiB) {
|
||||
if (size < oneGiB && data().device.vendorId() == OCL_VENDOR_AMD && data().device.freeMemSize() >= oneGiB) {
|
||||
size = oneGiB;
|
||||
}
|
||||
|
||||
|
||||
@@ -55,6 +55,7 @@ protected:
|
||||
inline const char *deviceKey() const override { return m_deviceKey.c_str(); }
|
||||
inline const char *source() const override { return m_source; }
|
||||
inline const OclLaunchData &data() const override { return m_data; }
|
||||
inline size_t intensity() const override { return m_intensity; }
|
||||
inline size_t threadId() const override { return m_threadId; }
|
||||
|
||||
size_t bufferSize() const override;
|
||||
@@ -83,6 +84,7 @@ protected:
|
||||
size_t m_offset = 0;
|
||||
std::string m_deviceKey;
|
||||
std::string m_options;
|
||||
uint32_t m_intensity;
|
||||
};
|
||||
|
||||
|
||||
|
||||
@@ -83,12 +83,10 @@ xmrig::OclCnRunner::~OclCnRunner()
|
||||
|
||||
size_t xmrig::OclCnRunner::bufferSize() const
|
||||
{
|
||||
const size_t g_thd = data().thread.intensity();
|
||||
|
||||
return OclBaseRunner::bufferSize() +
|
||||
align(m_algorithm.l3() * g_thd) +
|
||||
align(200 * g_thd) +
|
||||
(align(sizeof(cl_uint) * (g_thd + 2)) * BRANCH_MAX);
|
||||
align(m_algorithm.l3() * m_intensity) +
|
||||
align(200 * m_intensity) +
|
||||
(align(sizeof(cl_uint) * (m_intensity + 2)) * BRANCH_MAX);
|
||||
}
|
||||
|
||||
|
||||
@@ -96,14 +94,13 @@ void xmrig::OclCnRunner::run(uint32_t nonce, uint32_t *hashOutput)
|
||||
{
|
||||
static const cl_uint zero = 0;
|
||||
|
||||
const size_t g_intensity = data().thread.intensity();
|
||||
const size_t w_size = data().thread.worksize();
|
||||
const size_t g_thd = ((g_intensity + w_size - 1u) / w_size) * w_size;
|
||||
const size_t w_size = data().thread.worksize();
|
||||
const size_t g_thd = ((m_intensity + w_size - 1u) / w_size) * w_size;
|
||||
|
||||
assert(g_thd % w_size == 0);
|
||||
|
||||
for (size_t i = 0; i < BRANCH_MAX; ++i) {
|
||||
enqueueWriteBuffer(m_branches[i], CL_FALSE, sizeof(cl_uint) * g_intensity, sizeof(cl_uint), &zero);
|
||||
enqueueWriteBuffer(m_branches[i], CL_FALSE, sizeof(cl_uint) * m_intensity, sizeof(cl_uint), &zero);
|
||||
}
|
||||
|
||||
enqueueWriteBuffer(m_output, CL_FALSE, sizeof(cl_uint) * 0xFF, sizeof(cl_uint), &zero);
|
||||
@@ -134,10 +131,15 @@ void xmrig::OclCnRunner::set(const Job &job, uint8_t *blob)
|
||||
if (m_algorithm == Algorithm::CN_R && m_height != job.height()) {
|
||||
delete m_cn1;
|
||||
|
||||
m_height = job.height();
|
||||
m_cnr = OclCnR::get(*this, m_height);
|
||||
m_cn1 = new Cn1Kernel(m_cnr, m_height);
|
||||
m_cn1->setArgs(m_input, m_scratchpads, m_states, data().thread.intensity());
|
||||
m_height = job.height();
|
||||
auto program = OclCnR::get(*this, m_height);
|
||||
m_cn1 = new Cn1Kernel(program, m_height);
|
||||
m_cn1->setArgs(m_input, m_scratchpads, m_states, m_intensity);
|
||||
|
||||
if (m_cnr != program) {
|
||||
OclLib::release(m_cnr);
|
||||
m_cnr = OclLib::retain(program);
|
||||
}
|
||||
}
|
||||
|
||||
for (auto kernel : m_branchKernels) {
|
||||
@@ -150,22 +152,20 @@ void xmrig::OclCnRunner::build()
|
||||
{
|
||||
OclBaseRunner::build();
|
||||
|
||||
const uint32_t intensity = data().thread.intensity();
|
||||
|
||||
m_cn0 = new Cn0Kernel(m_program);
|
||||
m_cn0->setArgs(m_input, m_scratchpads, m_states, intensity);
|
||||
m_cn0->setArgs(m_input, m_scratchpads, m_states, m_intensity);
|
||||
|
||||
m_cn2 = new Cn2Kernel(m_program);
|
||||
m_cn2->setArgs(m_scratchpads, m_states, m_branches, intensity);
|
||||
m_cn2->setArgs(m_scratchpads, m_states, m_branches, m_intensity);
|
||||
|
||||
if (m_algorithm != Algorithm::CN_R) {
|
||||
m_cn1 = new Cn1Kernel(m_program);
|
||||
m_cn1->setArgs(m_input, m_scratchpads, m_states, intensity);
|
||||
m_cn1->setArgs(m_input, m_scratchpads, m_states, m_intensity);
|
||||
}
|
||||
|
||||
for (size_t i = 0; i < BRANCH_MAX; ++i) {
|
||||
auto kernel = new CnBranchKernel(i, m_program);
|
||||
kernel->setArgs(m_states, m_branches[i], m_output, intensity);
|
||||
kernel->setArgs(m_states, m_branches[i], m_output, m_intensity);
|
||||
|
||||
m_branchKernels[i] = kernel;
|
||||
}
|
||||
@@ -176,12 +176,10 @@ void xmrig::OclCnRunner::init()
|
||||
{
|
||||
OclBaseRunner::init();
|
||||
|
||||
const size_t g_thd = data().thread.intensity();
|
||||
|
||||
m_scratchpads = createSubBuffer(CL_MEM_READ_WRITE, m_algorithm.l3() * g_thd);
|
||||
m_states = createSubBuffer(CL_MEM_READ_WRITE, 200 * g_thd);
|
||||
m_scratchpads = createSubBuffer(CL_MEM_READ_WRITE, m_algorithm.l3() * m_intensity);
|
||||
m_states = createSubBuffer(CL_MEM_READ_WRITE, 200 * m_intensity);
|
||||
|
||||
for (size_t i = 0; i < BRANCH_MAX; ++i) {
|
||||
m_branches[i] = createSubBuffer(CL_MEM_READ_WRITE, sizeof(cl_uint) * (g_thd + 2));
|
||||
m_branches[i] = createSubBuffer(CL_MEM_READ_WRITE, sizeof(cl_uint) * (m_intensity + 2));
|
||||
}
|
||||
}
|
||||
|
||||
@@ -87,28 +87,26 @@ void xmrig::OclRxBaseRunner::run(uint32_t nonce, uint32_t *hashOutput)
|
||||
|
||||
enqueueWriteBuffer(m_output, CL_FALSE, sizeof(cl_uint) * 0xFF, sizeof(uint32_t), &zero);
|
||||
|
||||
const uint32_t g_intensity = data().thread.intensity();
|
||||
|
||||
m_blake2b_initial_hash->enqueue(m_queue, g_intensity);
|
||||
m_fillAes1Rx4_scratchpad->enqueue(m_queue, g_intensity);
|
||||
m_blake2b_initial_hash->enqueue(m_queue, m_intensity);
|
||||
m_fillAes1Rx4_scratchpad->enqueue(m_queue, m_intensity);
|
||||
|
||||
const uint32_t programCount = RxAlgo::programCount(m_algorithm);
|
||||
|
||||
for (uint32_t i = 0; i < programCount; ++i) {
|
||||
m_fillAes4Rx4_entropy->enqueue(m_queue, g_intensity);
|
||||
m_fillAes4Rx4_entropy->enqueue(m_queue, m_intensity);
|
||||
|
||||
execute(i);
|
||||
|
||||
if (i == programCount - 1) {
|
||||
m_hashAes1Rx4->enqueue(m_queue, g_intensity);
|
||||
m_blake2b_hash_registers_32->enqueue(m_queue, g_intensity);
|
||||
m_hashAes1Rx4->enqueue(m_queue, m_intensity);
|
||||
m_blake2b_hash_registers_32->enqueue(m_queue, m_intensity);
|
||||
}
|
||||
else {
|
||||
m_blake2b_hash_registers_64->enqueue(m_queue, g_intensity);
|
||||
m_blake2b_hash_registers_64->enqueue(m_queue, m_intensity);
|
||||
}
|
||||
}
|
||||
|
||||
m_find_shares->enqueue(m_queue, g_intensity);
|
||||
m_find_shares->enqueue(m_queue, m_intensity);
|
||||
|
||||
finalize(hashOutput);
|
||||
|
||||
@@ -138,13 +136,11 @@ void xmrig::OclRxBaseRunner::set(const Job &job, uint8_t *blob)
|
||||
|
||||
size_t xmrig::OclRxBaseRunner::bufferSize() const
|
||||
{
|
||||
const size_t g_thd = data().thread.intensity();
|
||||
|
||||
return OclBaseRunner::bufferSize() +
|
||||
align((m_algorithm.l3() + 64) * g_thd) +
|
||||
align(64 * g_thd) +
|
||||
align((128 + 2560) * g_thd) +
|
||||
align(sizeof(uint32_t) * g_thd);
|
||||
align((m_algorithm.l3() + 64) * m_intensity) +
|
||||
align(64 * m_intensity) +
|
||||
align((128 + 2560) * m_intensity) +
|
||||
align(sizeof(uint32_t) * m_intensity);
|
||||
}
|
||||
|
||||
|
||||
@@ -152,14 +148,13 @@ void xmrig::OclRxBaseRunner::build()
|
||||
{
|
||||
OclBaseRunner::build();
|
||||
|
||||
const uint32_t batch_size = data().thread.intensity();
|
||||
const uint32_t rx_version = RxAlgo::version(m_algorithm);
|
||||
|
||||
m_fillAes1Rx4_scratchpad = new FillAesKernel(m_program, "fillAes1Rx4_scratchpad");
|
||||
m_fillAes1Rx4_scratchpad->setArgs(m_hashes, m_scratchpads, batch_size, rx_version);
|
||||
m_fillAes1Rx4_scratchpad->setArgs(m_hashes, m_scratchpads, m_intensity, rx_version);
|
||||
|
||||
m_fillAes4Rx4_entropy = new FillAesKernel(m_program, "fillAes4Rx4_entropy");
|
||||
m_fillAes4Rx4_entropy->setArgs(m_hashes, m_entropy, batch_size, rx_version);
|
||||
m_fillAes4Rx4_entropy->setArgs(m_hashes, m_entropy, m_intensity, rx_version);
|
||||
|
||||
m_hashAes1Rx4 = new HashAesKernel(m_program);
|
||||
|
||||
@@ -178,10 +173,8 @@ void xmrig::OclRxBaseRunner::init()
|
||||
{
|
||||
OclBaseRunner::init();
|
||||
|
||||
const size_t g_thd = data().thread.intensity();
|
||||
|
||||
m_scratchpads = createSubBuffer(CL_MEM_READ_WRITE | CL_MEM_HOST_NO_ACCESS, (m_algorithm.l3() + 64) * g_thd);
|
||||
m_hashes = createSubBuffer(CL_MEM_READ_WRITE | CL_MEM_HOST_NO_ACCESS, 64 * g_thd);
|
||||
m_entropy = createSubBuffer(CL_MEM_READ_WRITE | CL_MEM_HOST_NO_ACCESS, (128 + 2560) * g_thd);
|
||||
m_rounding = createSubBuffer(CL_MEM_READ_WRITE | CL_MEM_HOST_NO_ACCESS, sizeof(uint32_t) * g_thd);
|
||||
m_scratchpads = createSubBuffer(CL_MEM_READ_WRITE | CL_MEM_HOST_NO_ACCESS, (m_algorithm.l3() + 64) * m_intensity);
|
||||
m_hashes = createSubBuffer(CL_MEM_READ_WRITE | CL_MEM_HOST_NO_ACCESS, 64 * m_intensity);
|
||||
m_entropy = createSubBuffer(CL_MEM_READ_WRITE | CL_MEM_HOST_NO_ACCESS, (128 + 2560) * m_intensity);
|
||||
m_rounding = createSubBuffer(CL_MEM_READ_WRITE | CL_MEM_HOST_NO_ACCESS, sizeof(uint32_t) * m_intensity);
|
||||
}
|
||||
|
||||
@@ -54,9 +54,7 @@ xmrig::OclRxJitRunner::~OclRxJitRunner()
|
||||
|
||||
size_t xmrig::OclRxJitRunner::bufferSize() const
|
||||
{
|
||||
const size_t g_thd = data().thread.intensity();
|
||||
|
||||
return OclRxBaseRunner::bufferSize() + align(256 * g_thd) + align(5120 * g_thd) + align(10048 * g_thd);
|
||||
return OclRxBaseRunner::bufferSize() + align(256 * m_intensity) + align(5120 * m_intensity) + align(10048 * m_intensity);
|
||||
}
|
||||
|
||||
|
||||
@@ -64,33 +62,29 @@ void xmrig::OclRxJitRunner::build()
|
||||
{
|
||||
OclRxBaseRunner::build();
|
||||
|
||||
const uint32_t batch_size = data().thread.intensity();
|
||||
|
||||
m_hashAes1Rx4->setArgs(m_scratchpads, m_registers, 256, batch_size);
|
||||
m_hashAes1Rx4->setArgs(m_scratchpads, m_registers, 256, m_intensity);
|
||||
m_blake2b_hash_registers_32->setArgs(m_hashes, m_registers, 256);
|
||||
m_blake2b_hash_registers_64->setArgs(m_hashes, m_registers, 256);
|
||||
|
||||
m_randomx_jit = new RxJitKernel(m_program);
|
||||
m_randomx_jit->setArgs(m_entropy, m_registers, m_intermediate_programs, m_programs, batch_size, m_rounding);
|
||||
m_randomx_jit->setArgs(m_entropy, m_registers, m_intermediate_programs, m_programs, m_intensity, m_rounding);
|
||||
|
||||
if (!loadAsmProgram()) {
|
||||
throw std::runtime_error(OclError::toString(CL_INVALID_PROGRAM));
|
||||
}
|
||||
|
||||
m_randomx_run = new RxRunKernel(m_asmProgram);
|
||||
m_randomx_run->setArgs(data().dataset->get(), m_scratchpads, m_registers, m_rounding, m_programs, batch_size, m_algorithm);
|
||||
m_randomx_run->setArgs(data().dataset->get(), m_scratchpads, m_registers, m_rounding, m_programs, m_intensity, m_algorithm);
|
||||
}
|
||||
|
||||
|
||||
void xmrig::OclRxJitRunner::execute(uint32_t iteration)
|
||||
{
|
||||
const uint32_t g_intensity = data().thread.intensity();
|
||||
|
||||
m_randomx_jit->enqueue(m_queue, g_intensity, iteration);
|
||||
m_randomx_jit->enqueue(m_queue, m_intensity, iteration);
|
||||
|
||||
OclLib::finish(m_queue);
|
||||
|
||||
m_randomx_run->enqueue(m_queue, g_intensity);
|
||||
m_randomx_run->enqueue(m_queue, m_intensity);
|
||||
}
|
||||
|
||||
|
||||
@@ -98,11 +92,9 @@ void xmrig::OclRxJitRunner::init()
|
||||
{
|
||||
OclRxBaseRunner::init();
|
||||
|
||||
const size_t g_thd = data().thread.intensity();
|
||||
|
||||
m_registers = createSubBuffer(CL_MEM_READ_WRITE | CL_MEM_HOST_NO_ACCESS, 256 * g_thd);
|
||||
m_intermediate_programs = createSubBuffer(CL_MEM_READ_WRITE | CL_MEM_HOST_NO_ACCESS, 5120 * g_thd);
|
||||
m_programs = createSubBuffer(CL_MEM_READ_WRITE | CL_MEM_HOST_NO_ACCESS, 10048 * g_thd);
|
||||
m_registers = createSubBuffer(CL_MEM_READ_WRITE | CL_MEM_HOST_NO_ACCESS, 256 * m_intensity);
|
||||
m_intermediate_programs = createSubBuffer(CL_MEM_READ_WRITE | CL_MEM_HOST_NO_ACCESS, 5120 * m_intensity);
|
||||
m_programs = createSubBuffer(CL_MEM_READ_WRITE | CL_MEM_HOST_NO_ACCESS, 10048 * m_intensity);
|
||||
}
|
||||
|
||||
|
||||
|
||||
@@ -52,7 +52,7 @@ xmrig::OclRxVmRunner::~OclRxVmRunner()
|
||||
|
||||
size_t xmrig::OclRxVmRunner::bufferSize() const
|
||||
{
|
||||
return OclRxBaseRunner::bufferSize() + (align(2560 * data().thread.intensity()));
|
||||
return OclRxBaseRunner::bufferSize() + (align(2560 * m_intensity));
|
||||
}
|
||||
|
||||
|
||||
@@ -60,10 +60,9 @@ void xmrig::OclRxVmRunner::build()
|
||||
{
|
||||
OclRxBaseRunner::build();
|
||||
|
||||
const uint32_t batch_size = data().thread.intensity();
|
||||
const uint32_t hashStrideBytes = RxAlgo::programSize(m_algorithm) * 8;
|
||||
const uint32_t hashStrideBytes = RxAlgo::programSize(m_algorithm) * 8;
|
||||
|
||||
m_hashAes1Rx4->setArgs(m_scratchpads, m_vm_states, hashStrideBytes, batch_size);
|
||||
m_hashAes1Rx4->setArgs(m_scratchpads, m_vm_states, hashStrideBytes, m_intensity);
|
||||
m_blake2b_hash_registers_32->setArgs(m_hashes, m_vm_states, hashStrideBytes);
|
||||
m_blake2b_hash_registers_64->setArgs(m_hashes, m_vm_states, hashStrideBytes);
|
||||
|
||||
@@ -71,7 +70,7 @@ void xmrig::OclRxVmRunner::build()
|
||||
m_init_vm->setArgs(m_entropy, m_vm_states, m_rounding);
|
||||
|
||||
m_execute_vm = new ExecuteVmKernel(m_program);
|
||||
m_execute_vm->setArgs(m_vm_states, m_rounding, m_scratchpads, data().dataset->get(), batch_size);
|
||||
m_execute_vm->setArgs(m_vm_states, m_rounding, m_scratchpads, data().dataset->get(), m_intensity);
|
||||
}
|
||||
|
||||
|
||||
@@ -79,9 +78,8 @@ void xmrig::OclRxVmRunner::execute(uint32_t iteration)
|
||||
{
|
||||
const uint32_t bfactor = std::min(data().thread.bfactor(), 8u);
|
||||
const uint32_t num_iterations = RxAlgo::programIterations(m_algorithm) >> bfactor;
|
||||
const uint32_t g_intensity = data().thread.intensity();
|
||||
|
||||
m_init_vm->enqueue(m_queue, g_intensity, iteration);
|
||||
m_init_vm->enqueue(m_queue, m_intensity, iteration);
|
||||
|
||||
m_execute_vm->setIterations(num_iterations);
|
||||
|
||||
@@ -90,7 +88,7 @@ void xmrig::OclRxVmRunner::execute(uint32_t iteration)
|
||||
m_execute_vm->setLast(1);
|
||||
}
|
||||
|
||||
m_execute_vm->enqueue(m_queue, g_intensity, m_worksize);
|
||||
m_execute_vm->enqueue(m_queue, m_intensity, m_worksize);
|
||||
|
||||
if (j == 0) {
|
||||
m_execute_vm->setFirst(0);
|
||||
@@ -103,5 +101,5 @@ void xmrig::OclRxVmRunner::init()
|
||||
{
|
||||
OclRxBaseRunner::init();
|
||||
|
||||
m_vm_states = createSubBuffer(CL_MEM_READ_WRITE, 2560 * data().thread.intensity());
|
||||
m_vm_states = createSubBuffer(CL_MEM_READ_WRITE, 2560 * m_intensity);
|
||||
}
|
||||
|
||||
@@ -63,9 +63,7 @@ xmrig::OclRyoRunner::~OclRyoRunner()
|
||||
|
||||
size_t xmrig::OclRyoRunner::bufferSize() const
|
||||
{
|
||||
const size_t g_thd = data().thread.intensity();
|
||||
|
||||
return OclBaseRunner::bufferSize() + align(data().algorithm.l3() * g_thd) + align(200 * g_thd);
|
||||
return OclBaseRunner::bufferSize() + align(data().algorithm.l3() * m_intensity) + align(200 * m_intensity);
|
||||
}
|
||||
|
||||
|
||||
@@ -73,9 +71,8 @@ void xmrig::OclRyoRunner::run(uint32_t nonce, uint32_t *hashOutput)
|
||||
{
|
||||
static const cl_uint zero = 0;
|
||||
|
||||
const size_t g_intensity = data().thread.intensity();
|
||||
const size_t w_size = data().thread.worksize();
|
||||
const size_t g_thd = ((g_intensity + w_size - 1u) / w_size) * w_size;
|
||||
const size_t w_size = data().thread.worksize();
|
||||
const size_t g_thd = ((m_intensity + w_size - 1u) / w_size) * w_size;
|
||||
|
||||
assert(g_thd % w_size == 0);
|
||||
|
||||
@@ -109,19 +106,17 @@ void xmrig::OclRyoRunner::build()
|
||||
{
|
||||
OclBaseRunner::build();
|
||||
|
||||
const uint32_t intensity = data().thread.intensity();
|
||||
|
||||
m_cn00 = new Cn00RyoKernel(m_program);
|
||||
m_cn00->setArgs(m_scratchpads, m_states);
|
||||
|
||||
m_cn0 = new Cn0Kernel(m_program);
|
||||
m_cn0->setArgs(m_input, m_scratchpads, m_states, intensity);
|
||||
m_cn0->setArgs(m_input, m_scratchpads, m_states, m_intensity);
|
||||
|
||||
m_cn1 = new Cn1RyoKernel(m_program);
|
||||
m_cn1->setArgs(m_scratchpads, m_states, intensity);
|
||||
m_cn1->setArgs(m_scratchpads, m_states, m_intensity);
|
||||
|
||||
m_cn2 = new Cn2RyoKernel(m_program);
|
||||
m_cn2->setArgs(m_scratchpads, m_states, m_output, intensity);
|
||||
m_cn2->setArgs(m_scratchpads, m_states, m_output, m_intensity);
|
||||
}
|
||||
|
||||
|
||||
@@ -129,8 +124,6 @@ void xmrig::OclRyoRunner::init()
|
||||
{
|
||||
OclBaseRunner::init();
|
||||
|
||||
const size_t g_thd = data().thread.intensity();
|
||||
|
||||
m_scratchpads = createSubBuffer(CL_MEM_READ_WRITE, data().algorithm.l3() * g_thd);
|
||||
m_states = createSubBuffer(CL_MEM_READ_WRITE, 200 * g_thd);
|
||||
m_scratchpads = createSubBuffer(CL_MEM_READ_WRITE, data().algorithm.l3() * m_intensity);
|
||||
m_states = createSubBuffer(CL_MEM_READ_WRITE, 200 * m_intensity);
|
||||
}
|
||||
|
||||
@@ -237,7 +237,7 @@ private:
|
||||
for (size_t i = 0; i < OclCnR::kHeightChunkSize; ++i) {
|
||||
V4_Instruction code[256];
|
||||
const int code_size = v4_random_math_init<Algorithm::CN_R>(code, offset + i);
|
||||
const std::string kernel = std::regex_replace(cryptonight_r_cl, std::regex("XMRIG_INCLUDE_RANDOM_MATH"), getCode(code, code_size));
|
||||
const std::string kernel = std::regex_replace(std::string(cryptonight_r_cl), std::regex("XMRIG_INCLUDE_RANDOM_MATH"), getCode(code, code_size));
|
||||
|
||||
source += std::regex_replace(kernel, std::regex("KERNEL_NAME"), "cn1_" + std::to_string(offset + i));
|
||||
}
|
||||
|
||||
@@ -142,16 +142,14 @@ xmrig::OclDevice::OclDevice(uint32_t index, cl_device_id id, cl_platform_id plat
|
||||
topology_amd topology;
|
||||
|
||||
if (OclLib::getDeviceInfo(id, 0x4037 /* CL_DEVICE_TOPOLOGY_AMD */, sizeof(topology), &topology, nullptr) == CL_SUCCESS && topology.raw.type == 1) {
|
||||
m_topology = true;
|
||||
m_pciTopology = PciTopology(static_cast<uint32_t>(topology.pcie.bus), static_cast<uint32_t>(topology.pcie.device), static_cast<uint32_t>(topology.pcie.function));
|
||||
m_topology = PciTopology(static_cast<uint32_t>(topology.pcie.bus), static_cast<uint32_t>(topology.pcie.device), static_cast<uint32_t>(topology.pcie.function));
|
||||
}
|
||||
}
|
||||
else if (m_vendorId == OCL_VENDOR_NVIDIA) {
|
||||
cl_uint bus = 0;
|
||||
if (OclLib::getDeviceInfo(id, 0x4008 /* CL_DEVICE_PCI_BUS_ID_NV */, sizeof (bus), &bus, nullptr) == CL_SUCCESS) {
|
||||
m_topology = true;
|
||||
cl_uint slot = OclLib::getUint(id, 0x4009 /* CL_DEVICE_PCI_SLOT_ID_NV */);
|
||||
m_pciTopology = PciTopology(bus, (slot >> 3) & 0xff, slot & 7);
|
||||
m_topology = PciTopology(bus, (slot >> 3) & 0xff, slot & 7);
|
||||
}
|
||||
}
|
||||
}
|
||||
@@ -205,3 +203,18 @@ void xmrig::OclDevice::generate(const Algorithm &algorithm, OclThreads &threads)
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
#ifdef XMRIG_FEATURE_API
|
||||
void xmrig::OclDevice::toJSON(rapidjson::Value &out, rapidjson::Document &doc) const
|
||||
{
|
||||
using namespace rapidjson;
|
||||
auto &allocator = doc.GetAllocator();
|
||||
|
||||
out.AddMember("board", board().toJSON(doc), allocator);
|
||||
out.AddMember("name", name().toJSON(doc), allocator);
|
||||
out.AddMember("bus_id", topology().toString().toJSON(doc), allocator);
|
||||
out.AddMember("cu", computeUnits(), allocator);
|
||||
out.AddMember("global_mem", globalMemSize(), allocator);
|
||||
}
|
||||
#endif
|
||||
|
||||
@@ -69,10 +69,9 @@ public:
|
||||
uint32_t clock() const;
|
||||
void generate(const Algorithm &algorithm, OclThreads &threads) const;
|
||||
|
||||
inline bool hasTopology() const { return m_topology; }
|
||||
inline bool isValid() const { return m_id != nullptr && m_platform != nullptr; }
|
||||
inline cl_device_id id() const { return m_id; }
|
||||
inline const PciTopology &topology() const { return m_pciTopology; }
|
||||
inline const PciTopology &topology() const { return m_topology; }
|
||||
inline const String &board() const { return m_board.isNull() ? m_name : m_board; }
|
||||
inline const String &name() const { return m_name; }
|
||||
inline const String &vendor() const { return m_vendor; }
|
||||
@@ -81,8 +80,11 @@ public:
|
||||
inline uint32_t computeUnits() const { return m_computeUnits; }
|
||||
inline uint32_t index() const { return m_index; }
|
||||
|
||||
# ifdef XMRIG_FEATURE_API
|
||||
void toJSON(rapidjson::Value &out, rapidjson::Document &doc) const;
|
||||
# endif
|
||||
|
||||
private:
|
||||
bool m_topology = false;
|
||||
cl_device_id m_id = nullptr;
|
||||
cl_platform_id m_platform = nullptr;
|
||||
const String m_board;
|
||||
@@ -91,7 +93,7 @@ private:
|
||||
const uint32_t m_computeUnits = 1;
|
||||
const uint32_t m_index = 0;
|
||||
OclVendor m_vendorId = OCL_VENDOR_UNKNOWN;
|
||||
PciTopology m_pciTopology;
|
||||
PciTopology m_topology;
|
||||
Type m_type = Unknown;
|
||||
};
|
||||
|
||||
|
||||
@@ -73,6 +73,7 @@ static const char *kReleaseDevice = "clReleaseDevice";
|
||||
static const char *kReleaseKernel = "clReleaseKernel";
|
||||
static const char *kReleaseMemObject = "clReleaseMemObject";
|
||||
static const char *kReleaseProgram = "clReleaseProgram";
|
||||
static const char *kRetainProgram = "clRetainProgram";
|
||||
static const char *kSetKernelArg = "clSetKernelArg";
|
||||
static const char *kSetMemObjectDestructorCallback = "clSetMemObjectDestructorCallback";
|
||||
static const char *kUnloadPlatformCompiler = "clUnloadPlatformCompiler";
|
||||
@@ -105,6 +106,7 @@ typedef cl_int (CL_API_CALL *releaseDevice_t)(cl_device_id device);
|
||||
typedef cl_int (CL_API_CALL *releaseKernel_t)(cl_kernel);
|
||||
typedef cl_int (CL_API_CALL *releaseMemObject_t)(cl_mem);
|
||||
typedef cl_int (CL_API_CALL *releaseProgram_t)(cl_program);
|
||||
typedef cl_int (CL_API_CALL *retainProgram_t)(cl_program);
|
||||
typedef cl_int (CL_API_CALL *setKernelArg_t)(cl_kernel, cl_uint, size_t, const void *);
|
||||
typedef cl_int (CL_API_CALL *setMemObjectDestructorCallback_t)(cl_mem, void (CL_CALLBACK *)(cl_mem, void *), void *);
|
||||
typedef cl_int (CL_API_CALL *unloadPlatformCompiler_t)(cl_platform_id);
|
||||
@@ -146,6 +148,7 @@ static releaseDevice_t pReleaseDevice = nu
|
||||
static releaseKernel_t pReleaseKernel = nullptr;
|
||||
static releaseMemObject_t pReleaseMemObject = nullptr;
|
||||
static releaseProgram_t pReleaseProgram = nullptr;
|
||||
static retainProgram_t pRetainProgram = nullptr;
|
||||
static setKernelArg_t pSetKernelArg = nullptr;
|
||||
static setMemObjectDestructorCallback_t pSetMemObjectDestructorCallback = nullptr;
|
||||
static unloadPlatformCompiler_t pUnloadPlatformCompiler = nullptr;
|
||||
@@ -235,6 +238,7 @@ bool xmrig::OclLib::load()
|
||||
DLSYM(UnloadPlatformCompiler);
|
||||
DLSYM(SetMemObjectDestructorCallback);
|
||||
DLSYM(CreateSubBuffer);
|
||||
DLSYM(RetainProgram);
|
||||
|
||||
# if defined(CL_VERSION_2_0)
|
||||
uv_dlsym(&oclLib, kCreateCommandQueueWithProperties, reinterpret_cast<void**>(&pCreateCommandQueueWithProperties));
|
||||
@@ -696,6 +700,18 @@ cl_program xmrig::OclLib::createProgramWithSource(cl_context context, cl_uint co
|
||||
}
|
||||
|
||||
|
||||
cl_program xmrig::OclLib::retain(cl_program program) noexcept
|
||||
{
|
||||
assert(pRetainProgram != nullptr);
|
||||
|
||||
if (program != nullptr) {
|
||||
pRetainProgram(program);
|
||||
}
|
||||
|
||||
return program;
|
||||
}
|
||||
|
||||
|
||||
cl_uint xmrig::OclLib::getNumPlatforms() noexcept
|
||||
{
|
||||
cl_uint count = 0;
|
||||
|
||||
@@ -81,6 +81,7 @@ public:
|
||||
static cl_mem createSubBuffer(cl_mem buffer, cl_mem_flags flags, size_t offset, size_t size);
|
||||
static cl_program createProgramWithBinary(cl_context context, cl_uint num_devices, const cl_device_id *device_list, const size_t *lengths, const unsigned char **binaries, cl_int *binary_status, cl_int *errcode_ret) noexcept;
|
||||
static cl_program createProgramWithSource(cl_context context, cl_uint count, const char **strings, const size_t *lengths, cl_int *errcode_ret) noexcept;
|
||||
static cl_program retain(cl_program program) noexcept;
|
||||
static cl_uint getNumPlatforms() noexcept;
|
||||
static cl_uint getUint(cl_command_queue command_queue, cl_command_queue_info param_name, cl_uint defaultValue = 0) noexcept;
|
||||
static cl_uint getUint(cl_context context, cl_context_info param_name, cl_uint defaultValue = 0) noexcept;
|
||||
|
||||
@@ -117,9 +117,10 @@ void xmrig::Api::exec(IApiRequest &request)
|
||||
auto &allocator = request.doc().GetAllocator();
|
||||
|
||||
request.accept();
|
||||
request.reply().AddMember("id", StringRef(m_id), allocator);
|
||||
request.reply().AddMember("worker_id", StringRef(m_workerId), allocator);
|
||||
request.reply().AddMember("uptime", (Chrono::currentMSecsSinceEpoch() - m_timestamp) / 1000, allocator);
|
||||
request.reply().AddMember("id", StringRef(m_id), allocator);
|
||||
request.reply().AddMember("worker_id", StringRef(m_workerId), allocator);
|
||||
request.reply().AddMember("uptime", (Chrono::currentMSecsSinceEpoch() - m_timestamp) / 1000, allocator);
|
||||
request.reply().AddMember("restricted", request.isRestricted(), allocator);
|
||||
|
||||
Value features(kArrayType);
|
||||
# ifdef XMRIG_FEATURE_API
|
||||
|
||||
@@ -27,10 +27,11 @@
|
||||
|
||||
|
||||
#include <vector>
|
||||
#include <stdint.h>
|
||||
#include <cstdint>
|
||||
|
||||
|
||||
#include "base/kernel/interfaces/IBaseListener.h"
|
||||
#include "base/tools/Object.h"
|
||||
|
||||
|
||||
namespace xmrig {
|
||||
@@ -47,6 +48,8 @@ class String;
|
||||
class Api : public IBaseListener
|
||||
{
|
||||
public:
|
||||
XMRIG_DISABLE_COPY_MOVE_DEFAULT(Api)
|
||||
|
||||
Api(Base *base);
|
||||
~Api() override;
|
||||
|
||||
|
||||
@@ -31,8 +31,11 @@
|
||||
xmrig::Console::Console(IConsoleListener *listener)
|
||||
: m_listener(listener)
|
||||
{
|
||||
m_tty = new uv_tty_t;
|
||||
if (!isSupported()) {
|
||||
return;
|
||||
}
|
||||
|
||||
m_tty = new uv_tty_t;
|
||||
m_tty->data = this;
|
||||
uv_tty_init(uv_default_loop(), m_tty, 0, 1);
|
||||
|
||||
@@ -53,6 +56,10 @@ xmrig::Console::~Console()
|
||||
|
||||
void xmrig::Console::stop()
|
||||
{
|
||||
if (!m_tty) {
|
||||
return;
|
||||
}
|
||||
|
||||
uv_tty_reset_mode();
|
||||
|
||||
Handle::close(m_tty);
|
||||
@@ -60,6 +67,13 @@ void xmrig::Console::stop()
|
||||
}
|
||||
|
||||
|
||||
bool xmrig::Console::isSupported() const
|
||||
{
|
||||
const uv_handle_type type = uv_guess_handle(0);
|
||||
return type == UV_TTY || type == UV_NAMED_PIPE;
|
||||
}
|
||||
|
||||
|
||||
void xmrig::Console::onAllocBuffer(uv_handle_t *handle, size_t, uv_buf_t *buf)
|
||||
{
|
||||
auto console = static_cast<Console*>(handle->data);
|
||||
|
||||
@@ -26,9 +26,11 @@
|
||||
#define XMRIG_CONSOLE_H
|
||||
|
||||
|
||||
#include <uv.h>
|
||||
#include "base/tools/Object.h"
|
||||
|
||||
|
||||
#include <uv.h>
|
||||
|
||||
|
||||
namespace xmrig {
|
||||
|
||||
@@ -39,18 +41,22 @@ class IConsoleListener;
|
||||
class Console
|
||||
{
|
||||
public:
|
||||
XMRIG_DISABLE_COPY_MOVE_DEFAULT(Console)
|
||||
|
||||
Console(IConsoleListener *listener);
|
||||
~Console();
|
||||
|
||||
void stop();
|
||||
|
||||
private:
|
||||
bool isSupported() const;
|
||||
|
||||
static void onAllocBuffer(uv_handle_t *handle, size_t suggested_size, uv_buf_t *buf);
|
||||
static void onRead(uv_stream_t *stream, ssize_t nread, const uv_buf_t *buf);
|
||||
|
||||
char m_buf[1];
|
||||
char m_buf[1] = { 0 };
|
||||
IConsoleListener *m_listener;
|
||||
uv_tty_t *m_tty;
|
||||
uv_tty_t *m_tty = nullptr;
|
||||
};
|
||||
|
||||
|
||||
|
||||
@@ -27,6 +27,9 @@
|
||||
#include "rapidjson/document.h"
|
||||
|
||||
|
||||
#include <cassert>
|
||||
|
||||
|
||||
namespace xmrig {
|
||||
|
||||
static const rapidjson::Value kNullValue;
|
||||
@@ -36,6 +39,8 @@ static const rapidjson::Value kNullValue;
|
||||
|
||||
bool xmrig::Json::getBool(const rapidjson::Value &obj, const char *key, bool defaultValue)
|
||||
{
|
||||
assert(obj.IsObject());
|
||||
|
||||
auto i = obj.FindMember(key);
|
||||
if (i != obj.MemberEnd() && i->value.IsBool()) {
|
||||
return i->value.GetBool();
|
||||
@@ -47,6 +52,8 @@ bool xmrig::Json::getBool(const rapidjson::Value &obj, const char *key, bool def
|
||||
|
||||
const char *xmrig::Json::getString(const rapidjson::Value &obj, const char *key, const char *defaultValue)
|
||||
{
|
||||
assert(obj.IsObject());
|
||||
|
||||
auto i = obj.FindMember(key);
|
||||
if (i != obj.MemberEnd() && i->value.IsString()) {
|
||||
return i->value.GetString();
|
||||
@@ -58,6 +65,8 @@ const char *xmrig::Json::getString(const rapidjson::Value &obj, const char *key,
|
||||
|
||||
const rapidjson::Value &xmrig::Json::getArray(const rapidjson::Value &obj, const char *key)
|
||||
{
|
||||
assert(obj.IsObject());
|
||||
|
||||
auto i = obj.FindMember(key);
|
||||
if (i != obj.MemberEnd() && i->value.IsArray()) {
|
||||
return i->value;
|
||||
@@ -69,6 +78,8 @@ const rapidjson::Value &xmrig::Json::getArray(const rapidjson::Value &obj, const
|
||||
|
||||
const rapidjson::Value &xmrig::Json::getObject(const rapidjson::Value &obj, const char *key)
|
||||
{
|
||||
assert(obj.IsObject());
|
||||
|
||||
auto i = obj.FindMember(key);
|
||||
if (i != obj.MemberEnd() && i->value.IsObject()) {
|
||||
return i->value;
|
||||
@@ -80,6 +91,8 @@ const rapidjson::Value &xmrig::Json::getObject(const rapidjson::Value &obj, cons
|
||||
|
||||
const rapidjson::Value &xmrig::Json::getValue(const rapidjson::Value &obj, const char *key)
|
||||
{
|
||||
assert(obj.IsObject());
|
||||
|
||||
auto i = obj.FindMember(key);
|
||||
if (i != obj.MemberEnd()) {
|
||||
return i->value;
|
||||
@@ -91,6 +104,8 @@ const rapidjson::Value &xmrig::Json::getValue(const rapidjson::Value &obj, const
|
||||
|
||||
int xmrig::Json::getInt(const rapidjson::Value &obj, const char *key, int defaultValue)
|
||||
{
|
||||
assert(obj.IsObject());
|
||||
|
||||
auto i = obj.FindMember(key);
|
||||
if (i != obj.MemberEnd() && i->value.IsInt()) {
|
||||
return i->value.GetInt();
|
||||
@@ -102,6 +117,8 @@ int xmrig::Json::getInt(const rapidjson::Value &obj, const char *key, int defaul
|
||||
|
||||
int64_t xmrig::Json::getInt64(const rapidjson::Value &obj, const char *key, int64_t defaultValue)
|
||||
{
|
||||
assert(obj.IsObject());
|
||||
|
||||
auto i = obj.FindMember(key);
|
||||
if (i != obj.MemberEnd() && i->value.IsInt64()) {
|
||||
return i->value.GetInt64();
|
||||
@@ -113,6 +130,8 @@ int64_t xmrig::Json::getInt64(const rapidjson::Value &obj, const char *key, int6
|
||||
|
||||
uint64_t xmrig::Json::getUint64(const rapidjson::Value &obj, const char *key, uint64_t defaultValue)
|
||||
{
|
||||
assert(obj.IsObject());
|
||||
|
||||
auto i = obj.FindMember(key);
|
||||
if (i != obj.MemberEnd() && i->value.IsUint64()) {
|
||||
return i->value.GetUint64();
|
||||
@@ -124,6 +143,8 @@ uint64_t xmrig::Json::getUint64(const rapidjson::Value &obj, const char *key, ui
|
||||
|
||||
unsigned xmrig::Json::getUint(const rapidjson::Value &obj, const char *key, unsigned defaultValue)
|
||||
{
|
||||
assert(obj.IsObject());
|
||||
|
||||
auto i = obj.FindMember(key);
|
||||
if (i != obj.MemberEnd() && i->value.IsUint()) {
|
||||
return i->value.GetUint();
|
||||
|
||||
@@ -28,6 +28,7 @@
|
||||
|
||||
#ifdef __GNUC__
|
||||
# include <fcntl.h>
|
||||
# include <sys/stat.h>
|
||||
# include <ext/stdio_filebuf.h>
|
||||
#endif
|
||||
|
||||
@@ -102,7 +103,7 @@ bool xmrig::Json::save(const char *fileName, const rapidjson::Document &doc)
|
||||
return false;
|
||||
}
|
||||
# elif defined(__GNUC__)
|
||||
const int fd = _wopen(toUtf16(fileName).c_str(), _O_WRONLY | _O_BINARY | _O_CREAT | _O_TRUNC);
|
||||
const int fd = _wopen(toUtf16(fileName).c_str(), _O_WRONLY | _O_BINARY | _O_CREAT | _O_TRUNC, _S_IWRITE);
|
||||
if (fd == -1) {
|
||||
return false;
|
||||
}
|
||||
|
||||
@@ -24,7 +24,7 @@
|
||||
*/
|
||||
|
||||
|
||||
#include <stdio.h>
|
||||
#include <cstdio>
|
||||
|
||||
|
||||
#include "base/tools/Handle.h"
|
||||
@@ -32,9 +32,13 @@
|
||||
#include "base/io/log/Log.h"
|
||||
|
||||
|
||||
xmrig::ConsoleLog::ConsoleLog() :
|
||||
m_stream(nullptr)
|
||||
xmrig::ConsoleLog::ConsoleLog()
|
||||
{
|
||||
if (!isSupported()) {
|
||||
Log::colors = false;
|
||||
return;
|
||||
}
|
||||
|
||||
m_tty = new uv_tty_t;
|
||||
|
||||
if (uv_tty_init(uv_default_loop(), m_tty, 1, 0) < 0) {
|
||||
@@ -66,7 +70,7 @@ xmrig::ConsoleLog::~ConsoleLog()
|
||||
|
||||
void xmrig::ConsoleLog::print(int, const char *line, size_t, size_t size, bool colors)
|
||||
{
|
||||
if (Log::colors != colors) {
|
||||
if (!m_tty || Log::colors != colors) {
|
||||
return;
|
||||
}
|
||||
|
||||
@@ -86,12 +90,18 @@ void xmrig::ConsoleLog::print(int, const char *line, size_t, size_t size, bool c
|
||||
}
|
||||
|
||||
|
||||
bool xmrig::ConsoleLog::isSupported() const
|
||||
{
|
||||
const uv_handle_type type = uv_guess_handle(1);
|
||||
return type == UV_TTY || type == UV_NAMED_PIPE;
|
||||
}
|
||||
|
||||
|
||||
bool xmrig::ConsoleLog::isWritable() const
|
||||
{
|
||||
if (!m_stream || uv_is_writable(m_stream) != 1) {
|
||||
return false;
|
||||
}
|
||||
|
||||
const uv_handle_type type = uv_guess_handle(1);
|
||||
return type == UV_TTY || type == UV_NAMED_PIPE;
|
||||
return isSupported();
|
||||
}
|
||||
|
||||
@@ -27,11 +27,12 @@
|
||||
#define XMRIG_CONSOLELOG_H
|
||||
|
||||
|
||||
typedef struct uv_stream_s uv_stream_t;
|
||||
typedef struct uv_tty_s uv_tty_t;
|
||||
using uv_stream_t = struct uv_stream_s;
|
||||
using uv_tty_t = struct uv_tty_s;
|
||||
|
||||
|
||||
#include "base/kernel/interfaces/ILogBackend.h"
|
||||
#include "base/tools/Object.h"
|
||||
|
||||
|
||||
namespace xmrig {
|
||||
@@ -40,6 +41,8 @@ namespace xmrig {
|
||||
class ConsoleLog : public ILogBackend
|
||||
{
|
||||
public:
|
||||
XMRIG_DISABLE_COPY_MOVE(ConsoleLog)
|
||||
|
||||
ConsoleLog();
|
||||
~ConsoleLog() override;
|
||||
|
||||
@@ -47,10 +50,11 @@ protected:
|
||||
void print(int level, const char *line, size_t offset, size_t size, bool colors) override;
|
||||
|
||||
private:
|
||||
bool isSupported() const;
|
||||
bool isWritable() const;
|
||||
|
||||
uv_stream_t *m_stream;
|
||||
uv_tty_t *m_tty;
|
||||
uv_stream_t *m_stream = nullptr;
|
||||
uv_tty_t *m_tty = nullptr;
|
||||
};
|
||||
|
||||
|
||||
|
||||
@@ -23,7 +23,7 @@
|
||||
*/
|
||||
|
||||
|
||||
#include <assert.h>
|
||||
#include <cassert>
|
||||
#include <memory>
|
||||
|
||||
|
||||
@@ -64,15 +64,16 @@ static const char *kConfigPathV2 = "/2/config";
|
||||
#endif
|
||||
|
||||
|
||||
class xmrig::BasePrivate
|
||||
namespace xmrig {
|
||||
|
||||
|
||||
class BasePrivate
|
||||
{
|
||||
public:
|
||||
inline BasePrivate(Process *process) :
|
||||
api(nullptr),
|
||||
config(nullptr),
|
||||
process(process),
|
||||
watcher(nullptr)
|
||||
{}
|
||||
XMRIG_DISABLE_COPY_MOVE_DEFAULT(BasePrivate)
|
||||
|
||||
|
||||
inline BasePrivate(Process *process) : config(load(process)) {}
|
||||
|
||||
|
||||
inline ~BasePrivate()
|
||||
@@ -94,13 +95,33 @@ public:
|
||||
}
|
||||
|
||||
|
||||
inline Config *load()
|
||||
inline void replace(Config *newConfig)
|
||||
{
|
||||
Config *previousConfig = config;
|
||||
config = newConfig;
|
||||
|
||||
for (IBaseListener *listener : listeners) {
|
||||
listener->onConfigChanged(config, previousConfig);
|
||||
}
|
||||
|
||||
delete previousConfig;
|
||||
}
|
||||
|
||||
|
||||
Api *api = nullptr;
|
||||
Config *config = nullptr;
|
||||
std::vector<IBaseListener *> listeners;
|
||||
Watcher *watcher = nullptr;
|
||||
|
||||
|
||||
private:
|
||||
inline Config *load(Process *process)
|
||||
{
|
||||
JsonChain chain;
|
||||
ConfigTransform transform;
|
||||
std::unique_ptr<Config> config;
|
||||
|
||||
transform.load(chain, process, transform);
|
||||
ConfigTransform::load(chain, process, transform);
|
||||
|
||||
if (read(chain, config)) {
|
||||
return config.release();
|
||||
@@ -122,29 +143,12 @@ public:
|
||||
|
||||
return nullptr;
|
||||
}
|
||||
|
||||
|
||||
inline void replace(Config *newConfig)
|
||||
{
|
||||
Config *previousConfig = config;
|
||||
config = newConfig;
|
||||
|
||||
for (IBaseListener *listener : listeners) {
|
||||
listener->onConfigChanged(config, previousConfig);
|
||||
}
|
||||
|
||||
delete previousConfig;
|
||||
}
|
||||
|
||||
|
||||
Api *api;
|
||||
Config *config;
|
||||
Process *process;
|
||||
std::vector<IBaseListener *> listeners;
|
||||
Watcher *watcher;
|
||||
};
|
||||
|
||||
|
||||
} // namespace xmrig
|
||||
|
||||
|
||||
xmrig::Base::Base(Process *process)
|
||||
: d_ptr(new BasePrivate(process))
|
||||
{
|
||||
@@ -165,14 +169,6 @@ bool xmrig::Base::isReady() const
|
||||
|
||||
int xmrig::Base::init()
|
||||
{
|
||||
d_ptr->config = d_ptr->load();
|
||||
|
||||
if (!d_ptr->config) {
|
||||
LOG_EMERG("No valid configuration found. Exiting.");
|
||||
|
||||
return 1;
|
||||
}
|
||||
|
||||
# ifdef XMRIG_FEATURE_API
|
||||
d_ptr->api = new Api(this);
|
||||
d_ptr->api->addListener(this);
|
||||
@@ -184,7 +180,7 @@ int xmrig::Base::init()
|
||||
Platform::setProcessPriority(config()->cpu().priority());
|
||||
# endif
|
||||
|
||||
if (config()->isBackground()) {
|
||||
if (isBackground()) {
|
||||
Log::background = true;
|
||||
}
|
||||
else {
|
||||
@@ -240,6 +236,12 @@ xmrig::Api *xmrig::Base::api() const
|
||||
}
|
||||
|
||||
|
||||
bool xmrig::Base::isBackground() const
|
||||
{
|
||||
return d_ptr->config && d_ptr->config->isBackground();
|
||||
}
|
||||
|
||||
|
||||
bool xmrig::Base::reload(const rapidjson::Value &json)
|
||||
{
|
||||
JsonReader reader(json);
|
||||
@@ -247,7 +249,7 @@ bool xmrig::Base::reload(const rapidjson::Value &json)
|
||||
return false;
|
||||
}
|
||||
|
||||
Config *config = new Config();
|
||||
auto config = new Config();
|
||||
if (!config->read(reader, d_ptr->config->fileName())) {
|
||||
delete config;
|
||||
|
||||
@@ -289,7 +291,7 @@ void xmrig::Base::onFileChanged(const String &fileName)
|
||||
JsonChain chain;
|
||||
chain.addFile(fileName);
|
||||
|
||||
Config *config = new Config();
|
||||
auto config = new Config();
|
||||
|
||||
if (!config->read(chain, chain.fileName())) {
|
||||
LOG_ERR("reloading failed");
|
||||
|
||||
@@ -29,6 +29,7 @@
|
||||
#include "base/api/interfaces/IApiListener.h"
|
||||
#include "base/kernel/interfaces/IConfigListener.h"
|
||||
#include "base/kernel/interfaces/IWatcherListener.h"
|
||||
#include "base/tools/Object.h"
|
||||
#include "rapidjson/fwd.h"
|
||||
|
||||
|
||||
@@ -45,6 +46,8 @@ class Process;
|
||||
class Base : public IWatcherListener, public IApiListener
|
||||
{
|
||||
public:
|
||||
XMRIG_DISABLE_COPY_MOVE_DEFAULT(Base)
|
||||
|
||||
Base(Process *process);
|
||||
~Base() override;
|
||||
|
||||
@@ -54,6 +57,7 @@ public:
|
||||
virtual void stop();
|
||||
|
||||
Api *api() const;
|
||||
bool isBackground() const;
|
||||
bool reload(const rapidjson::Value &json);
|
||||
Config *config() const;
|
||||
void addListener(IBaseListener *listener);
|
||||
|
||||
@@ -23,7 +23,7 @@
|
||||
*/
|
||||
|
||||
|
||||
#include <stdio.h>
|
||||
#include <cstdio>
|
||||
#include <uv.h>
|
||||
|
||||
|
||||
@@ -161,7 +161,7 @@ int xmrig::Entry::exec(const Process &process, Id id)
|
||||
{
|
||||
switch (id) {
|
||||
case Usage:
|
||||
printf(usage);
|
||||
printf("%s\n", usage().c_str());
|
||||
return 0;
|
||||
|
||||
case Version:
|
||||
|
||||
@@ -23,8 +23,8 @@
|
||||
*/
|
||||
|
||||
|
||||
#include <ctime>
|
||||
#include <uv.h>
|
||||
#include <time.h>
|
||||
|
||||
|
||||
#include "base/kernel/Process.h"
|
||||
@@ -55,11 +55,6 @@ xmrig::Process::Process(int argc, char **argv) :
|
||||
}
|
||||
|
||||
|
||||
xmrig::Process::~Process()
|
||||
{
|
||||
}
|
||||
|
||||
|
||||
xmrig::String xmrig::Process::location(Location location, const char *fileName) const
|
||||
{
|
||||
constexpr const size_t max = 520;
|
||||
|
||||
@@ -47,7 +47,6 @@ public:
|
||||
# endif
|
||||
|
||||
Process(int argc, char **argv);
|
||||
~Process();
|
||||
|
||||
String location(Location location, const char *fileName = nullptr) const;
|
||||
|
||||
|
||||
@@ -23,7 +23,7 @@
|
||||
*/
|
||||
|
||||
|
||||
#include <stdio.h>
|
||||
#include <cstdio>
|
||||
|
||||
|
||||
#ifdef _MSC_VER
|
||||
@@ -50,12 +50,7 @@ static const char *kApi = "api";
|
||||
static const char *kHttp = "http";
|
||||
static const char *kPools = "pools";
|
||||
|
||||
}
|
||||
|
||||
|
||||
xmrig::BaseTransform::BaseTransform()
|
||||
{
|
||||
}
|
||||
} // namespace xmrig
|
||||
|
||||
|
||||
void xmrig::BaseTransform::load(JsonChain &chain, Process *process, IConfigTransform &transform)
|
||||
@@ -68,7 +63,7 @@ void xmrig::BaseTransform::load(JsonChain &chain, Process *process, IConfigTrans
|
||||
|
||||
Document doc(kObjectType);
|
||||
|
||||
while (1) {
|
||||
while (true) {
|
||||
key = getopt_long(argc, argv, short_options, options, nullptr);
|
||||
if (key < 0) {
|
||||
break;
|
||||
@@ -107,6 +102,10 @@ void xmrig::BaseTransform::finalize(rapidjson::Document &doc)
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
if (m_http) {
|
||||
set(doc, kHttp, "enabled", true);
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
@@ -169,9 +168,11 @@ void xmrig::BaseTransform::transform(rapidjson::Document &doc, int key, const ch
|
||||
return set(doc, "log-file", arg);
|
||||
|
||||
case IConfig::HttpAccessTokenKey: /* --http-access-token */
|
||||
m_http = true;
|
||||
return set(doc, kHttp, "access-token", arg);
|
||||
|
||||
case IConfig::HttpHostKey: /* --http-host */
|
||||
m_http = true;
|
||||
return set(doc, kHttp, "host", arg);
|
||||
|
||||
case IConfig::ApiWorkerIdKey: /* --api-worker-id */
|
||||
@@ -226,8 +227,10 @@ void xmrig::BaseTransform::transformBoolean(rapidjson::Document &doc, int key, b
|
||||
case IConfig::TlsKey: /* --tls */
|
||||
return add(doc, kPools, "tls", enable);
|
||||
|
||||
# ifdef XMRIG_FEATURE_HTTP
|
||||
case IConfig::DaemonKey: /* --daemon */
|
||||
return add(doc, kPools, "daemon", enable);
|
||||
# endif
|
||||
|
||||
# ifndef XMRIG_PROXY_PROJECT
|
||||
case IConfig::NicehashKey: /* --nicehash */
|
||||
@@ -238,10 +241,12 @@ void xmrig::BaseTransform::transformBoolean(rapidjson::Document &doc, int key, b
|
||||
return set(doc, "colors", enable);
|
||||
|
||||
case IConfig::HttpRestrictedKey: /* --http-no-restricted */
|
||||
m_http = true;
|
||||
return set(doc, kHttp, "restricted", enable);
|
||||
|
||||
case IConfig::HttpEnabledKey: /* --http-enabled */
|
||||
return set(doc, kHttp, "enabled", enable);
|
||||
m_http = true;
|
||||
break;
|
||||
|
||||
case IConfig::DryRunKey: /* --dry-run */
|
||||
return set(doc, "dry-run", enable);
|
||||
@@ -268,13 +273,16 @@ void xmrig::BaseTransform::transformUint64(rapidjson::Document &doc, int key, ui
|
||||
return set(doc, "donate-over-proxy", arg);
|
||||
|
||||
case IConfig::HttpPort: /* --http-port */
|
||||
m_http = true;
|
||||
return set(doc, kHttp, "port", arg);
|
||||
|
||||
case IConfig::PrintTimeKey: /* --print-time */
|
||||
return set(doc, "print-time", arg);
|
||||
|
||||
# ifdef XMRIG_FEATURE_HTTP
|
||||
case IConfig::DaemonPollKey: /* --daemon-poll-interval */
|
||||
return add(doc, kPools, "daemon-poll-interval", arg);
|
||||
# endif
|
||||
|
||||
default:
|
||||
break;
|
||||
|
||||
@@ -44,8 +44,6 @@ class Process;
|
||||
class BaseTransform : public IConfigTransform
|
||||
{
|
||||
public:
|
||||
BaseTransform();
|
||||
|
||||
static void load(JsonChain &chain, Process *process, IConfigTransform &transform);
|
||||
|
||||
protected:
|
||||
@@ -104,6 +102,8 @@ protected:
|
||||
private:
|
||||
void transformBoolean(rapidjson::Document &doc, int key, bool enable);
|
||||
void transformUint64(rapidjson::Document &doc, int key, uint64_t arg);
|
||||
|
||||
bool m_http = false;
|
||||
};
|
||||
|
||||
|
||||
|
||||
@@ -78,6 +78,7 @@ public:
|
||||
PrintTimeKey = 1007,
|
||||
|
||||
// xmrig cpu
|
||||
CPUKey = 1024,
|
||||
AVKey = 'v',
|
||||
CPUAffinityKey = 1020,
|
||||
DryRunKey = 5000,
|
||||
@@ -99,6 +100,7 @@ public:
|
||||
OclMemChunkKey = 1408,
|
||||
OclUnrollKey = 1409,
|
||||
OclCompModeKey = 1410,
|
||||
OclKey = 1411,
|
||||
|
||||
// xmrig-proxy
|
||||
AccessLogFileKey = 'A',
|
||||
|
||||
@@ -28,6 +28,14 @@
|
||||
"cn/0": false,
|
||||
"cn-lite/0": false
|
||||
},
|
||||
"opencl": {
|
||||
"enabled": false,
|
||||
"cache": true,
|
||||
"loader": null,
|
||||
"platform": "AMD",
|
||||
"cn/0": false,
|
||||
"cn-lite/0": false
|
||||
},
|
||||
"donate-level": 5,
|
||||
"donate-over-proxy": 1,
|
||||
"log-file": null,
|
||||
|
||||
@@ -23,7 +23,7 @@
|
||||
*/
|
||||
|
||||
|
||||
#include <assert.h>
|
||||
#include <cassert>
|
||||
|
||||
|
||||
#include "backend/cpu/Cpu.h"
|
||||
@@ -44,20 +44,9 @@ xmrig::Controller::~Controller()
|
||||
}
|
||||
|
||||
|
||||
bool xmrig::Controller::isReady() const
|
||||
{
|
||||
return Base::isReady() && m_network;
|
||||
}
|
||||
|
||||
|
||||
int xmrig::Controller::init()
|
||||
{
|
||||
Cpu::init();
|
||||
|
||||
const int rc = Base::init();
|
||||
if (rc != 0) {
|
||||
return rc;
|
||||
}
|
||||
Base::init();
|
||||
|
||||
m_network = new Network(this);
|
||||
return 0;
|
||||
|
||||
@@ -27,6 +27,7 @@
|
||||
|
||||
|
||||
#include "base/kernel/Base.h"
|
||||
#include "base/tools/Object.h"
|
||||
|
||||
|
||||
namespace xmrig {
|
||||
@@ -40,10 +41,11 @@ class Network;
|
||||
class Controller : public Base
|
||||
{
|
||||
public:
|
||||
XMRIG_DISABLE_COPY_MOVE_DEFAULT(Controller)
|
||||
|
||||
Controller(Process *process);
|
||||
~Controller() override;
|
||||
|
||||
bool isReady() const override;
|
||||
int init() override;
|
||||
void start() override;
|
||||
void stop() override;
|
||||
|
||||
@@ -124,16 +124,15 @@ public:
|
||||
{
|
||||
active = true;
|
||||
|
||||
if (reset) {
|
||||
Nonce::reset(job.index());
|
||||
}
|
||||
|
||||
for (IBackend *backend : backends) {
|
||||
backend->setJob(job);
|
||||
}
|
||||
|
||||
if (reset) {
|
||||
Nonce::reset(job.index());
|
||||
}
|
||||
else {
|
||||
Nonce::touch();
|
||||
}
|
||||
Nonce::touch();
|
||||
|
||||
if (enabled) {
|
||||
Nonce::pause(false);;
|
||||
|
||||
@@ -35,11 +35,16 @@ namespace xmrig
|
||||
static const char *kAffinity = "affinity";
|
||||
static const char *kAsterisk = "*";
|
||||
static const char *kCpu = "cpu";
|
||||
static const char *kEnabled = "enabled";
|
||||
static const char *kIntensity = "intensity";
|
||||
static const char *kThreads = "threads";
|
||||
|
||||
#ifdef XMRIG_ALGO_RANDOMX
|
||||
static const char *kRandomX = "randomx";
|
||||
static const char *kRandomX = "randomx";
|
||||
#endif
|
||||
|
||||
#ifdef XMRIG_FEATURE_OPENCL
|
||||
static const char *kOcl = "opencl";
|
||||
#endif
|
||||
|
||||
|
||||
@@ -80,12 +85,7 @@ static inline bool isHwAes(uint64_t av)
|
||||
}
|
||||
|
||||
|
||||
}
|
||||
|
||||
|
||||
xmrig::ConfigTransform::ConfigTransform() : BaseTransform()
|
||||
{
|
||||
}
|
||||
} // namespace xmrig
|
||||
|
||||
|
||||
void xmrig::ConfigTransform::finalize(rapidjson::Document &doc)
|
||||
@@ -109,6 +109,12 @@ void xmrig::ConfigTransform::finalize(rapidjson::Document &doc)
|
||||
|
||||
doc[kCpu].AddMember(StringRef(kAsterisk), profile, doc.GetAllocator());
|
||||
}
|
||||
|
||||
# ifdef XMRIG_FEATURE_OPENCL
|
||||
if (m_opencl) {
|
||||
set(doc, kOcl, kEnabled, true);
|
||||
}
|
||||
# endif
|
||||
}
|
||||
|
||||
|
||||
@@ -123,6 +129,7 @@ void xmrig::ConfigTransform::transform(rapidjson::Document &doc, int key, const
|
||||
return transformUint64(doc, key, static_cast<uint64_t>(strtol(arg, nullptr, 10)));
|
||||
|
||||
case IConfig::HugePagesKey: /* --no-huge-pages */
|
||||
case IConfig::CPUKey: /* --no-cpu */
|
||||
return transformBoolean(doc, key, false);
|
||||
|
||||
case IConfig::CPUAffinityKey: /* --cpu-affinity */
|
||||
@@ -131,7 +138,7 @@ void xmrig::ConfigTransform::transform(rapidjson::Document &doc, int key, const
|
||||
return transformUint64(doc, key, p ? strtoull(p, nullptr, 16) : strtoull(arg, nullptr, 10));
|
||||
}
|
||||
|
||||
# ifndef XMRIG_NO_ASM
|
||||
# ifdef XMRIG_FEATURE_ASM
|
||||
case IConfig::AssemblyKey: /* --asm */
|
||||
return set(doc, kCpu, "asm", arg);
|
||||
# endif
|
||||
@@ -144,6 +151,29 @@ void xmrig::ConfigTransform::transform(rapidjson::Document &doc, int key, const
|
||||
return set(doc, kRandomX, "numa", false);
|
||||
# endif
|
||||
|
||||
# ifdef XMRIG_FEATURE_OPENCL
|
||||
case IConfig::OclKey: /* --opencl */
|
||||
m_opencl = true;
|
||||
break;
|
||||
|
||||
case IConfig::OclCacheKey: /* --opencl-no-cache */
|
||||
return set(doc, kOcl, "cache", false);
|
||||
|
||||
case IConfig::OclLoaderKey: /* --opencl-loader */
|
||||
return set(doc, kOcl, "loader", arg);
|
||||
|
||||
case IConfig::OclDevicesKey: /* --opencl-devices */
|
||||
m_opencl = true;
|
||||
return set(doc, kOcl, "devices-hint", arg);
|
||||
|
||||
case IConfig::OclPlatformKey: /* --opencl-platform */
|
||||
if (strlen(arg) < 3) {
|
||||
return set(doc, kOcl, "platform", static_cast<uint64_t>(strtol(arg, nullptr, 10)));
|
||||
}
|
||||
|
||||
return set(doc, kOcl, "platform", arg);
|
||||
# endif
|
||||
|
||||
default:
|
||||
break;
|
||||
}
|
||||
@@ -156,6 +186,9 @@ void xmrig::ConfigTransform::transformBoolean(rapidjson::Document &doc, int key,
|
||||
case IConfig::HugePagesKey: /* --no-huge-pages */
|
||||
return set(doc, kCpu, "huge-pages", enable);
|
||||
|
||||
case IConfig::CPUKey: /* --no-cpu */
|
||||
return set(doc, kCpu, kEnabled, enable);
|
||||
|
||||
default:
|
||||
break;
|
||||
}
|
||||
|
||||
@@ -34,9 +34,6 @@ namespace xmrig {
|
||||
|
||||
class ConfigTransform : public BaseTransform
|
||||
{
|
||||
public:
|
||||
ConfigTransform();
|
||||
|
||||
protected:
|
||||
void finalize(rapidjson::Document &doc) override;
|
||||
void transform(rapidjson::Document &doc, int key, const char *arg) override;
|
||||
@@ -45,6 +42,7 @@ private:
|
||||
void transformBoolean(rapidjson::Document &doc, int key, bool enable);
|
||||
void transformUint64(rapidjson::Document &doc, int key, uint64_t arg);
|
||||
|
||||
bool m_opencl = false;
|
||||
int64_t m_affinity = -1;
|
||||
uint64_t m_intensity = 1;
|
||||
uint64_t m_threads = 0;
|
||||
|
||||
@@ -62,6 +62,14 @@ R"===(
|
||||
"cn/0": false,
|
||||
"cn-lite/0": false
|
||||
},
|
||||
"opencl": {
|
||||
"enabled": false,
|
||||
"cache": true,
|
||||
"loader": null,
|
||||
"platform": "AMD",
|
||||
"cn/0": false,
|
||||
"cn-lite/0": false
|
||||
},
|
||||
"donate-level": 5,
|
||||
"donate-over-proxy": 1,
|
||||
"log-file": null,
|
||||
|
||||
@@ -45,6 +45,7 @@ static const char short_options[] = "a:c:kBp:Px:r:R:s:t:T:o:u:O:v:l:S";
|
||||
|
||||
static const option options[] = {
|
||||
{ "algo", 1, nullptr, IConfig::AlgorithmKey },
|
||||
# ifdef XMRIG_FEATURE_HTTP
|
||||
{ "api-worker-id", 1, nullptr, IConfig::ApiWorkerIdKey },
|
||||
{ "api-id", 1, nullptr, IConfig::ApiIdKey },
|
||||
{ "http-enabled", 0, nullptr, IConfig::HttpEnabledKey },
|
||||
@@ -52,6 +53,9 @@ static const option options[] = {
|
||||
{ "http-access-token", 1, nullptr, IConfig::HttpAccessTokenKey },
|
||||
{ "http-port", 1, nullptr, IConfig::HttpPort },
|
||||
{ "http-no-restricted", 0, nullptr, IConfig::HttpRestrictedKey },
|
||||
{ "daemon", 0, nullptr, IConfig::DaemonKey },
|
||||
{ "daemon-poll-interval", 1, nullptr, IConfig::DaemonPollKey },
|
||||
# endif
|
||||
{ "av", 1, nullptr, IConfig::AVKey },
|
||||
{ "background", 0, nullptr, IConfig::BackgroundKey },
|
||||
{ "config", 1, nullptr, IConfig::ConfigKey },
|
||||
@@ -76,13 +80,25 @@ static const option options[] = {
|
||||
{ "user-agent", 1, nullptr, IConfig::UserAgentKey },
|
||||
{ "userpass", 1, nullptr, IConfig::UserpassKey },
|
||||
{ "rig-id", 1, nullptr, IConfig::RigIdKey },
|
||||
{ "no-cpu", 0, nullptr, IConfig::CPUKey },
|
||||
# ifdef XMRIG_FEATURE_TLS
|
||||
{ "tls", 0, nullptr, IConfig::TlsKey },
|
||||
{ "tls-fingerprint", 1, nullptr, IConfig::FingerprintKey },
|
||||
# endif
|
||||
# ifdef XMRIG_FEATURE_ASM
|
||||
{ "asm", 1, nullptr, IConfig::AssemblyKey },
|
||||
{ "daemon", 0, nullptr, IConfig::DaemonKey },
|
||||
{ "daemon-poll-interval", 1, nullptr, IConfig::DaemonPollKey },
|
||||
# endif
|
||||
# ifdef XMRIG_ALGO_RANDOMX
|
||||
{ "randomx-init", 1, nullptr, IConfig::RandomXInitKey },
|
||||
{ "randomx-no-numa", 0, nullptr, IConfig::RandomXNumaKey },
|
||||
# endif
|
||||
# ifdef XMRIG_FEATURE_OPENCL
|
||||
{ "opencl", 0, nullptr, IConfig::OclKey },
|
||||
{ "opencl-devices", 1, nullptr, IConfig::OclDevicesKey },
|
||||
{ "opencl-platform", 1, nullptr, IConfig::OclPlatformKey },
|
||||
{ "opencl-loader", 1, nullptr, IConfig::OclLoaderKey },
|
||||
{ "opencl-no-cache", 0, nullptr, IConfig::OclCacheKey },
|
||||
# endif
|
||||
{ nullptr, 0, nullptr, 0 }
|
||||
};
|
||||
|
||||
|
||||
@@ -29,99 +29,105 @@
|
||||
#include "version.h"
|
||||
|
||||
|
||||
#include <string>
|
||||
|
||||
|
||||
namespace xmrig {
|
||||
|
||||
|
||||
static char const usage[] = "\
|
||||
Usage: " APP_ID " [OPTIONS]\n\
|
||||
Options:\n\
|
||||
-a, --algo=ALGO specify the algorithm to use\n\
|
||||
cn/r, cn/2, cn/1, cn/0, cn/double, cn/half, cn/fast,\n\
|
||||
cn/rwz, cn/zls, cn/xao, cn/rto"
|
||||
#ifdef XMRIG_ALGO_CN_GPU
|
||||
", cn/gpu,\n"
|
||||
#else
|
||||
",\n"
|
||||
#endif
|
||||
#ifdef XMRIG_ALGO_CN_LITE
|
||||
"\
|
||||
cn-lite/1,\n"
|
||||
#endif
|
||||
#ifdef XMRIG_ALGO_CN_HEAVY
|
||||
"\
|
||||
cn-heavy/xhv, cn-heavy/tube, cn-heavy/0,\n"
|
||||
#endif
|
||||
#ifdef XMRIG_ALGO_CN_PICO
|
||||
"\
|
||||
cn-pico,\n"
|
||||
#endif
|
||||
#ifdef XMRIG_ALGO_RANDOMX
|
||||
"\
|
||||
rx/wow, rx/loki\n"
|
||||
#endif
|
||||
"\
|
||||
-o, --url=URL URL of mining server\n\
|
||||
-O, --userpass=U:P username:password pair for mining server\n\
|
||||
-u, --user=USERNAME username for mining server\n\
|
||||
-p, --pass=PASSWORD password for mining server\n\
|
||||
--rig-id=ID rig identifier for pool-side statistics (needs pool support)\n\
|
||||
-t, --threads=N number of miner threads\n\
|
||||
-v, --av=N algorithm variation, 0 auto select\n\
|
||||
-k, --keepalive send keepalived packet for prevent timeout (needs pool support)\n\
|
||||
--nicehash enable nicehash.com support\n"
|
||||
#ifdef XMRIG_FEATURE_TLS
|
||||
"\
|
||||
--tls enable SSL/TLS support (needs pool support)\n\
|
||||
--tls-fingerprint=F pool TLS certificate fingerprint, if set enable strict certificate pinning\n"
|
||||
#endif
|
||||
#ifdef XMRIG_FEATURE_HTTP
|
||||
"\
|
||||
--daemon use daemon RPC instead of pool for solo mining\n\
|
||||
--daemon-poll-interval=N daemon poll interval in milliseconds (default: 1000)\n"
|
||||
#endif
|
||||
"\
|
||||
-r, --retries=N number of times to retry before switch to backup server (default: 5)\n\
|
||||
-R, --retry-pause=N time to pause between retries (default: 5)\n\
|
||||
--cpu-affinity set process affinity to CPU core(s), mask 0x3 for cores 0 and 1\n\
|
||||
--cpu-priority set process priority (0 idle, 2 normal to 5 highest)\n\
|
||||
--no-huge-pages disable huge pages support\n\
|
||||
--no-color disable colored output\n\
|
||||
--donate-level=N donate level, default 5%% (5 minutes in 100 minutes)\n\
|
||||
--user-agent set custom user-agent string for pool\n\
|
||||
-B, --background run the miner in the background\n\
|
||||
-c, --config=FILE load a JSON-format configuration file\n\
|
||||
-l, --log-file=FILE log all output to a file\n"
|
||||
# ifdef HAVE_SYSLOG_H
|
||||
"\
|
||||
-S, --syslog use system log for output messages\n"
|
||||
# endif
|
||||
"\
|
||||
--asm=ASM ASM optimizations, possible values: auto, none, intel, ryzen, bulldozer.\n\
|
||||
--print-time=N print hashrate report every N seconds\n"
|
||||
#ifdef XMRIG_FEATURE_HTTP
|
||||
"\
|
||||
--api-worker-id=ID custom worker-id for API\n\
|
||||
--api-id=ID custom instance ID for API\n\
|
||||
--http-enabled enable HTTP API\n\
|
||||
--http-host=HOST bind host for HTTP API (default: 127.0.0.1)\n\
|
||||
--http-port=N bind port for HTTP API\n\
|
||||
--http-access-token=T access token for HTTP API\n\
|
||||
--http-no-restricted enable full remote access to HTTP API (only if access token set)\n"
|
||||
#endif
|
||||
#ifdef XMRIG_ALGO_RANDOMX
|
||||
"\
|
||||
--randomx-init=N threads count to initialize RandomX dataset\n\
|
||||
--randomx-no-numa disable NUMA support for RandomX\n"
|
||||
#endif
|
||||
#ifdef XMRIG_FEATURE_HWLOC
|
||||
"\
|
||||
--export-topology export hwloc topology to a XML file and exit\n"
|
||||
#endif
|
||||
"\
|
||||
--dry-run test configuration and exit\n\
|
||||
-h, --help display this help and exit\n\
|
||||
-V, --version output version information and exit\n\
|
||||
";
|
||||
static inline const std::string &usage()
|
||||
{
|
||||
static std::string u;
|
||||
|
||||
if (!u.empty()) {
|
||||
return u;
|
||||
}
|
||||
|
||||
u += "Usage: " APP_ID " [OPTIONS]\n\nNetwork:\n";
|
||||
u += " -o, --url=URL URL of mining server\n";
|
||||
u += " -a, --algo=ALGO mining algorithm https://xmrig.com/docs/algorithms\n";
|
||||
u += " -u, --user=USERNAME username for mining server\n";
|
||||
u += " -p, --pass=PASSWORD password for mining server\n";
|
||||
u += " -O, --userpass=U:P username:password pair for mining server\n";
|
||||
u += " -k, --keepalive send keepalived packet for prevent timeout (needs pool support)\n";
|
||||
u += " --nicehash enable nicehash.com support\n";
|
||||
u += " --rig-id=ID rig identifier for pool-side statistics (needs pool support)\n";
|
||||
|
||||
# ifdef XMRIG_FEATURE_TLS
|
||||
u += " --tls enable SSL/TLS support (needs pool support)\n";
|
||||
u += " --tls-fingerprint=HEX pool TLS certificate fingerprint for strict certificate pinning\n";
|
||||
# endif
|
||||
|
||||
# ifdef XMRIG_FEATURE_HTTP
|
||||
u += " --daemon use daemon RPC instead of pool for solo mining\n";
|
||||
u += " --daemon-poll-interval=N daemon poll interval in milliseconds (default: 1000)\n";
|
||||
# endif
|
||||
|
||||
u += " -r, --retries=N number of times to retry before switch to backup server (default: 5)\n";
|
||||
u += " -R, --retry-pause=N time to pause between retries (default: 5)\n";
|
||||
u += " --user-agent set custom user-agent string for pool\n";
|
||||
u += " --donate-level=N donate level, default 5%% (5 minutes in 100 minutes)\n";
|
||||
u += " --donate-over-proxy=N control donate over xmrig-proxy feature\n";
|
||||
|
||||
u += "\nCPU backend:\n";
|
||||
|
||||
u += " --no-cpu disable CPU mining backend\n";
|
||||
u += " -t, --threads=N number of CPU threads\n";
|
||||
u += " -v, --av=N algorithm variation, 0 auto select\n";
|
||||
u += " --cpu-affinity set process affinity to CPU core(s), mask 0x3 for cores 0 and 1\n";
|
||||
u += " --cpu-priority set process priority (0 idle, 2 normal to 5 highest)\n";
|
||||
u += " --no-huge-pages disable huge pages support\n";
|
||||
u += " --asm=ASM ASM optimizations, possible values: auto, none, intel, ryzen, bulldozer\n";
|
||||
|
||||
# ifdef XMRIG_ALGO_RANDOMX
|
||||
u += " --randomx-init=N threads count to initialize RandomX dataset\n";
|
||||
u += " --randomx-no-numa disable NUMA support for RandomX\n";
|
||||
# endif
|
||||
|
||||
# ifdef XMRIG_FEATURE_HTTP
|
||||
u += "\nAPI:\n";
|
||||
u += " --api-worker-id=ID custom worker-id for API\n";
|
||||
u += " --api-id=ID custom instance ID for API\n";
|
||||
u += " --http-host=HOST bind host for HTTP API (default: 127.0.0.1)\n";
|
||||
u += " --http-port=N bind port for HTTP API\n";
|
||||
u += " --http-access-token=T access token for HTTP API\n";
|
||||
u += " --http-no-restricted enable full remote access to HTTP API (only if access token set)\n";
|
||||
# endif
|
||||
|
||||
# ifdef XMRIG_FEATURE_OPENCL
|
||||
u += "\nOpenCL backend:\n";
|
||||
u += " --opencl enable OpenCL mining backend\n";
|
||||
u += " --opencl-devices=N list of OpenCL devices to use\n";
|
||||
u += " --opencl-platform=N OpenCL platform index or name\n";
|
||||
u += " --opencl-loader=N path to OpenCL-ICD-Loader (OpenCL.dll or libOpenCL.so)\n";
|
||||
u += " --opencl-no-cache disable OpenCL cache\n";
|
||||
u += " --print-platforms print available OpenCL platforms and exit\n";
|
||||
# endif
|
||||
|
||||
u += "\nLogging:\n";
|
||||
|
||||
# ifdef HAVE_SYSLOG_H
|
||||
u += " -S, --syslog use system log for output messages\n";
|
||||
# endif
|
||||
|
||||
u += " -l, --log-file=FILE log all output to a file\n";
|
||||
u += " --print-time=N print hashrate report every N seconds\n";
|
||||
u += " --no-color disable colored output\n";
|
||||
|
||||
u += "\nMisc:\n";
|
||||
|
||||
u += " -c, --config=FILE load a JSON-format configuration file\n";
|
||||
u += " -B, --background run the miner in the background\n";
|
||||
u += " -V, --version output version information and exit\n";
|
||||
u += " -h, --help display this help and exit\n";
|
||||
u += " --dry-run test configuration and exit\n";
|
||||
|
||||
# ifdef XMRIG_FEATURE_HWLOC
|
||||
u += " --export-topology export hwloc topology to a XML file and exit\n";
|
||||
# endif
|
||||
|
||||
return u;
|
||||
}
|
||||
|
||||
|
||||
} /* namespace xmrig */
|
||||
|
||||
@@ -78,7 +78,6 @@ void xmrig::Nonce::reset(uint8_t index)
|
||||
std::lock_guard<std::mutex> lock(mutex);
|
||||
|
||||
m_nonces[index] = 0;
|
||||
touch();
|
||||
}
|
||||
|
||||
|
||||
|
||||
@@ -108,7 +108,7 @@ namespace randomx {
|
||||
class JitCompilerX86;
|
||||
using JitCompiler = JitCompilerX86;
|
||||
#elif defined(__aarch64__)
|
||||
#define RANDOMX_HAVE_COMPILER 0
|
||||
#define RANDOMX_HAVE_COMPILER 1
|
||||
class JitCompilerA64;
|
||||
using JitCompiler = JitCompilerA64;
|
||||
#else
|
||||
|
||||
@@ -376,11 +376,138 @@ FORCE_INLINE rx_vec_f128 rx_cvt_packed_int_vec_f128(const void* addr) {
|
||||
|
||||
#define RANDOMX_DEFAULT_FENV
|
||||
|
||||
void rx_reset_float_state();
|
||||
#elif defined(__aarch64__)
|
||||
|
||||
void rx_set_rounding_mode(uint32_t mode);
|
||||
#include <stdlib.h>
|
||||
#include <arm_neon.h>
|
||||
#include <arm_acle.h>
|
||||
|
||||
#else //end altivec
|
||||
typedef uint8x16_t rx_vec_i128;
|
||||
typedef float64x2_t rx_vec_f128;
|
||||
|
||||
inline void* rx_aligned_alloc(size_t size, size_t align) {
|
||||
void* p;
|
||||
if (posix_memalign(&p, align, size) == 0)
|
||||
return p;
|
||||
|
||||
return 0;
|
||||
};
|
||||
|
||||
#define rx_aligned_free(a) free(a)
|
||||
|
||||
inline void rx_prefetch_nta(void* ptr) {
|
||||
asm volatile ("prfm pldl1strm, [%0]\n" : : "r" (ptr));
|
||||
}
|
||||
|
||||
FORCE_INLINE rx_vec_f128 rx_load_vec_f128(const double* pd) {
|
||||
return vld1q_f64((const float64_t*)pd);
|
||||
}
|
||||
|
||||
FORCE_INLINE void rx_store_vec_f128(double* mem_addr, rx_vec_f128 val) {
|
||||
vst1q_f64((float64_t*)mem_addr, val);
|
||||
}
|
||||
|
||||
FORCE_INLINE rx_vec_f128 rx_swap_vec_f128(rx_vec_f128 a) {
|
||||
float64x2_t temp;
|
||||
temp = vcopyq_laneq_f64(temp, 1, a, 1);
|
||||
a = vcopyq_laneq_f64(a, 1, a, 0);
|
||||
return vcopyq_laneq_f64(a, 0, temp, 1);
|
||||
}
|
||||
|
||||
FORCE_INLINE rx_vec_f128 rx_set_vec_f128(uint64_t x1, uint64_t x0) {
|
||||
uint64x2_t temp0 = vdupq_n_u64(x0);
|
||||
uint64x2_t temp1 = vdupq_n_u64(x1);
|
||||
return vreinterpretq_f64_u64(vcopyq_laneq_u64(temp0, 1, temp1, 0));
|
||||
}
|
||||
|
||||
FORCE_INLINE rx_vec_f128 rx_set1_vec_f128(uint64_t x) {
|
||||
return vreinterpretq_f64_u64(vdupq_n_u64(x));
|
||||
}
|
||||
|
||||
#define rx_add_vec_f128 vaddq_f64
|
||||
#define rx_sub_vec_f128 vsubq_f64
|
||||
#define rx_mul_vec_f128 vmulq_f64
|
||||
#define rx_div_vec_f128 vdivq_f64
|
||||
#define rx_sqrt_vec_f128 vsqrtq_f64
|
||||
|
||||
FORCE_INLINE rx_vec_f128 rx_xor_vec_f128(rx_vec_f128 a, rx_vec_f128 b) {
|
||||
return vreinterpretq_f64_u8(veorq_u8(vreinterpretq_u8_f64(a), vreinterpretq_u8_f64(b)));
|
||||
}
|
||||
|
||||
FORCE_INLINE rx_vec_f128 rx_and_vec_f128(rx_vec_f128 a, rx_vec_f128 b) {
|
||||
return vreinterpretq_f64_u8(vandq_u8(vreinterpretq_u8_f64(a), vreinterpretq_u8_f64(b)));
|
||||
}
|
||||
|
||||
FORCE_INLINE rx_vec_f128 rx_or_vec_f128(rx_vec_f128 a, rx_vec_f128 b) {
|
||||
return vreinterpretq_f64_u8(vorrq_u8(vreinterpretq_u8_f64(a), vreinterpretq_u8_f64(b)));
|
||||
}
|
||||
|
||||
#ifdef __ARM_FEATURE_CRYPTO
|
||||
|
||||
|
||||
FORCE_INLINE rx_vec_i128 rx_aesenc_vec_i128(rx_vec_i128 a, rx_vec_i128 key) {
|
||||
const uint8x16_t zero = { 0 };
|
||||
return vaesmcq_u8(vaeseq_u8(a, zero)) ^ key;
|
||||
}
|
||||
|
||||
FORCE_INLINE rx_vec_i128 rx_aesdec_vec_i128(rx_vec_i128 a, rx_vec_i128 key) {
|
||||
const uint8x16_t zero = { 0 };
|
||||
return vaesimcq_u8(vaesdq_u8(a, zero)) ^ key;
|
||||
}
|
||||
|
||||
#define HAVE_AES
|
||||
|
||||
#endif
|
||||
|
||||
#define rx_xor_vec_i128 veorq_u8
|
||||
|
||||
FORCE_INLINE int rx_vec_i128_x(rx_vec_i128 a) {
|
||||
return vgetq_lane_s32(vreinterpretq_s32_u8(a), 0);
|
||||
}
|
||||
|
||||
FORCE_INLINE int rx_vec_i128_y(rx_vec_i128 a) {
|
||||
return vgetq_lane_s32(vreinterpretq_s32_u8(a), 1);
|
||||
}
|
||||
|
||||
FORCE_INLINE int rx_vec_i128_z(rx_vec_i128 a) {
|
||||
return vgetq_lane_s32(vreinterpretq_s32_u8(a), 2);
|
||||
}
|
||||
|
||||
FORCE_INLINE int rx_vec_i128_w(rx_vec_i128 a) {
|
||||
return vgetq_lane_s32(vreinterpretq_s32_u8(a), 3);
|
||||
}
|
||||
|
||||
FORCE_INLINE rx_vec_i128 rx_set_int_vec_i128(int _I3, int _I2, int _I1, int _I0) {
|
||||
int32_t data[4];
|
||||
data[0] = _I0;
|
||||
data[1] = _I1;
|
||||
data[2] = _I2;
|
||||
data[3] = _I3;
|
||||
return vreinterpretq_u8_s32(vld1q_s32(data));
|
||||
};
|
||||
|
||||
#define rx_xor_vec_i128 veorq_u8
|
||||
|
||||
FORCE_INLINE rx_vec_i128 rx_load_vec_i128(const rx_vec_i128* mem_addr) {
|
||||
return vld1q_u8((const uint8_t*)mem_addr);
|
||||
}
|
||||
|
||||
FORCE_INLINE void rx_store_vec_i128(rx_vec_i128* mem_addr, rx_vec_i128 val) {
|
||||
vst1q_u8((uint8_t*)mem_addr, val);
|
||||
}
|
||||
|
||||
FORCE_INLINE rx_vec_f128 rx_cvt_packed_int_vec_f128(const void* addr) {
|
||||
double lo = unsigned32ToSigned2sCompl(load32((uint8_t*)addr + 0));
|
||||
double hi = unsigned32ToSigned2sCompl(load32((uint8_t*)addr + 4));
|
||||
rx_vec_f128 x;
|
||||
x = vsetq_lane_f64(lo, x, 0);
|
||||
x = vsetq_lane_f64(hi, x, 1);
|
||||
return x;
|
||||
}
|
||||
|
||||
#define RANDOMX_DEFAULT_FENV
|
||||
|
||||
#else //portable fallback
|
||||
|
||||
#include <cstdint>
|
||||
#include <stdexcept>
|
||||
@@ -487,7 +614,6 @@ FORCE_INLINE rx_vec_f128 rx_set1_vec_f128(uint64_t x) {
|
||||
return v;
|
||||
}
|
||||
|
||||
|
||||
FORCE_INLINE rx_vec_f128 rx_xor_vec_f128(rx_vec_f128 a, rx_vec_f128 b) {
|
||||
rx_vec_f128 x;
|
||||
x.i.u64[0] = a.i.u64[0] ^ b.i.u64[0];
|
||||
@@ -578,10 +704,6 @@ FORCE_INLINE rx_vec_f128 rx_cvt_packed_int_vec_f128(const void* addr) {
|
||||
|
||||
#define RANDOMX_DEFAULT_FENV
|
||||
|
||||
void rx_reset_float_state();
|
||||
|
||||
void rx_set_rounding_mode(uint32_t mode);
|
||||
|
||||
#endif
|
||||
|
||||
#ifndef HAVE_AES
|
||||
@@ -598,6 +720,14 @@ FORCE_INLINE rx_vec_i128 rx_aesdec_vec_i128(rx_vec_i128 v, rx_vec_i128 rkey) {
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef RANDOMX_DEFAULT_FENV
|
||||
|
||||
void rx_reset_float_state();
|
||||
|
||||
void rx_set_rounding_mode(uint32_t mode);
|
||||
|
||||
#endif
|
||||
|
||||
double loadDoublePortable(const void* addr);
|
||||
uint64_t mulh(uint64_t, uint64_t);
|
||||
int64_t smulh(int64_t, int64_t);
|
||||
|
||||
1020
src/crypto/randomx/jit_compiler_a64.cpp
Normal file
1020
src/crypto/randomx/jit_compiler_a64.cpp
Normal file
File diff suppressed because it is too large
Load Diff
@@ -1,5 +1,6 @@
|
||||
/*
|
||||
Copyright (c) 2018-2019, tevador <tevador@gmail.com>
|
||||
Copyright (c) 2019, SChernykh <https://github.com/SChernykh>
|
||||
|
||||
All rights reserved.
|
||||
|
||||
@@ -32,42 +33,91 @@ OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
#include <vector>
|
||||
#include <stdexcept>
|
||||
#include "crypto/randomx/common.hpp"
|
||||
#include "crypto/randomx/jit_compiler_a64_static.hpp"
|
||||
|
||||
namespace randomx {
|
||||
|
||||
class Program;
|
||||
class ProgramConfiguration;
|
||||
class SuperscalarProgram;
|
||||
class Instruction;
|
||||
|
||||
typedef void(JitCompilerA64::*InstructionGeneratorA64)(Instruction&, uint32_t&);
|
||||
|
||||
class JitCompilerA64 {
|
||||
public:
|
||||
JitCompilerA64() {
|
||||
throw std::runtime_error("ARM64 JIT compiler is not implemented yet.");
|
||||
}
|
||||
void generateProgram(Program&, ProgramConfiguration&) {
|
||||
JitCompilerA64();
|
||||
~JitCompilerA64();
|
||||
|
||||
void generateProgram(Program&, ProgramConfiguration&);
|
||||
void generateProgramLight(Program&, ProgramConfiguration&, uint32_t);
|
||||
|
||||
}
|
||||
void generateProgramLight(Program&, ProgramConfiguration&, uint32_t) {
|
||||
|
||||
}
|
||||
template<size_t N>
|
||||
void generateSuperscalarHash(SuperscalarProgram(&programs)[N], std::vector<uint64_t> &) {
|
||||
void generateSuperscalarHash(SuperscalarProgram(&programs)[N], std::vector<uint64_t> &);
|
||||
|
||||
}
|
||||
void generateDatasetInitCode() {
|
||||
void generateDatasetInitCode() {}
|
||||
|
||||
ProgramFunc* getProgramFunc() { return reinterpret_cast<ProgramFunc*>(code); }
|
||||
DatasetInitFunc* getDatasetInitFunc();
|
||||
uint8_t* getCode() { return code; }
|
||||
size_t getCodeSize();
|
||||
|
||||
static InstructionGeneratorA64 engine[256];
|
||||
uint32_t reg_changed_offset[8];
|
||||
uint8_t* code;
|
||||
uint32_t literalPos;
|
||||
uint32_t num32bitLiterals;
|
||||
|
||||
static void emit32(uint32_t val, uint8_t* code, uint32_t& codePos)
|
||||
{
|
||||
*(uint32_t*)(code + codePos) = val;
|
||||
codePos += sizeof(val);
|
||||
}
|
||||
ProgramFunc* getProgramFunc() {
|
||||
return nullptr;
|
||||
}
|
||||
DatasetInitFunc* getDatasetInitFunc() {
|
||||
return nullptr;
|
||||
}
|
||||
uint8_t* getCode() {
|
||||
return nullptr;
|
||||
}
|
||||
size_t getCodeSize() {
|
||||
return 0;
|
||||
|
||||
static void emit64(uint64_t val, uint8_t* code, uint32_t& codePos)
|
||||
{
|
||||
*(uint64_t*)(code + codePos) = val;
|
||||
codePos += sizeof(val);
|
||||
}
|
||||
|
||||
void emitMovImmediate(uint32_t dst, uint32_t imm, uint8_t* code, uint32_t& codePos);
|
||||
void emitAddImmediate(uint32_t dst, uint32_t src, uint32_t imm, uint8_t* code, uint32_t& codePos);
|
||||
|
||||
template<uint32_t tmp_reg>
|
||||
void emitMemLoad(uint32_t dst, uint32_t src, Instruction& instr, uint8_t* code, uint32_t& codePos);
|
||||
|
||||
template<uint32_t tmp_reg_fp>
|
||||
void emitMemLoadFP(uint32_t src, Instruction& instr, uint8_t* code, uint32_t& codePos);
|
||||
|
||||
void h_IADD_RS(Instruction&, uint32_t&);
|
||||
void h_IADD_M(Instruction&, uint32_t&);
|
||||
void h_ISUB_R(Instruction&, uint32_t&);
|
||||
void h_ISUB_M(Instruction&, uint32_t&);
|
||||
void h_IMUL_R(Instruction&, uint32_t&);
|
||||
void h_IMUL_M(Instruction&, uint32_t&);
|
||||
void h_IMULH_R(Instruction&, uint32_t&);
|
||||
void h_IMULH_M(Instruction&, uint32_t&);
|
||||
void h_ISMULH_R(Instruction&, uint32_t&);
|
||||
void h_ISMULH_M(Instruction&, uint32_t&);
|
||||
void h_IMUL_RCP(Instruction&, uint32_t&);
|
||||
void h_INEG_R(Instruction&, uint32_t&);
|
||||
void h_IXOR_R(Instruction&, uint32_t&);
|
||||
void h_IXOR_M(Instruction&, uint32_t&);
|
||||
void h_IROR_R(Instruction&, uint32_t&);
|
||||
void h_IROL_R(Instruction&, uint32_t&);
|
||||
void h_ISWAP_R(Instruction&, uint32_t&);
|
||||
void h_FSWAP_R(Instruction&, uint32_t&);
|
||||
void h_FADD_R(Instruction&, uint32_t&);
|
||||
void h_FADD_M(Instruction&, uint32_t&);
|
||||
void h_FSUB_R(Instruction&, uint32_t&);
|
||||
void h_FSUB_M(Instruction&, uint32_t&);
|
||||
void h_FSCAL_R(Instruction&, uint32_t&);
|
||||
void h_FMUL_R(Instruction&, uint32_t&);
|
||||
void h_FDIV_M(Instruction&, uint32_t&);
|
||||
void h_FSQRT_R(Instruction&, uint32_t&);
|
||||
void h_CBRANCH(Instruction&, uint32_t&);
|
||||
void h_CFROUND(Instruction&, uint32_t&);
|
||||
void h_ISTORE(Instruction&, uint32_t&);
|
||||
void h_NOP(Instruction&, uint32_t&);
|
||||
};
|
||||
}
|
||||
|
||||
577
src/crypto/randomx/jit_compiler_a64_static.S
Normal file
577
src/crypto/randomx/jit_compiler_a64_static.S
Normal file
@@ -0,0 +1,577 @@
|
||||
# Copyright (c) 2018-2019, tevador <tevador@gmail.com>
|
||||
# Copyright (c) 2019, SChernykh <https://github.com/SChernykh>
|
||||
#
|
||||
# All rights reserved.
|
||||
#
|
||||
# Redistribution and use in source and binary forms, with or without
|
||||
# modification, are permitted provided that the following conditions are met:
|
||||
# * Redistributions of source code must retain the above copyright
|
||||
# notice, this list of conditions and the following disclaimer.
|
||||
# * Redistributions in binary form must reproduce the above copyright
|
||||
# notice, this list of conditions and the following disclaimer in the
|
||||
# documentation and/or other materials provided with the distribution.
|
||||
# * Neither the name of the copyright holder nor the
|
||||
# names of its contributors may be used to endorse or promote products
|
||||
# derived from this software without specific prior written permission.
|
||||
#
|
||||
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
|
||||
# ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
|
||||
# WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
# DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||
# FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
# DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||
# SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||
# CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||
# OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
|
||||
.arch armv8-a
|
||||
.text
|
||||
.global randomx_program_aarch64
|
||||
.global randomx_program_aarch64_main_loop
|
||||
.global randomx_program_aarch64_vm_instructions
|
||||
.global randomx_program_aarch64_imul_rcp_literals_end
|
||||
.global randomx_program_aarch64_vm_instructions_end
|
||||
.global randomx_program_aarch64_cacheline_align_mask1
|
||||
.global randomx_program_aarch64_cacheline_align_mask2
|
||||
.global randomx_program_aarch64_update_spMix1
|
||||
.global randomx_program_aarch64_vm_instructions_end_light
|
||||
.global randomx_program_aarch64_light_cacheline_align_mask
|
||||
.global randomx_program_aarch64_light_dataset_offset
|
||||
.global randomx_init_dataset_aarch64
|
||||
.global randomx_init_dataset_aarch64_end
|
||||
.global randomx_calc_dataset_item_aarch64
|
||||
.global randomx_calc_dataset_item_aarch64_prefetch
|
||||
.global randomx_calc_dataset_item_aarch64_mix
|
||||
.global randomx_calc_dataset_item_aarch64_store_result
|
||||
.global randomx_calc_dataset_item_aarch64_end
|
||||
|
||||
# Register allocation
|
||||
|
||||
# x0 -> pointer to reg buffer and then literal for IMUL_RCP
|
||||
# x1 -> pointer to mem buffer and then to dataset
|
||||
# x2 -> pointer to scratchpad
|
||||
# x3 -> loop counter
|
||||
# x4 -> "r0"
|
||||
# x5 -> "r1"
|
||||
# x6 -> "r2"
|
||||
# x7 -> "r3"
|
||||
# x8 -> fpcr (reversed bits)
|
||||
# x9 -> mx, ma
|
||||
# x10 -> spMix1
|
||||
# x11 -> literal for IMUL_RCP
|
||||
# x12 -> "r4"
|
||||
# x13 -> "r5"
|
||||
# x14 -> "r6"
|
||||
# x15 -> "r7"
|
||||
# x16 -> spAddr0
|
||||
# x17 -> spAddr1
|
||||
# x18 -> temporary
|
||||
# x19 -> temporary
|
||||
# x20 -> literal for IMUL_RCP
|
||||
# x21 -> literal for IMUL_RCP
|
||||
# x22 -> literal for IMUL_RCP
|
||||
# x23 -> literal for IMUL_RCP
|
||||
# x24 -> literal for IMUL_RCP
|
||||
# x25 -> literal for IMUL_RCP
|
||||
# x26 -> literal for IMUL_RCP
|
||||
# x27 -> literal for IMUL_RCP
|
||||
# x28 -> literal for IMUL_RCP
|
||||
# x29 -> literal for IMUL_RCP
|
||||
# x30 -> literal for IMUL_RCP
|
||||
|
||||
# v0-v15 -> store 32-bit literals
|
||||
# v16 -> "f0"
|
||||
# v17 -> "f1"
|
||||
# v18 -> "f2"
|
||||
# v19 -> "f3"
|
||||
# v20 -> "e0"
|
||||
# v21 -> "e1"
|
||||
# v22 -> "e2"
|
||||
# v23 -> "e3"
|
||||
# v24 -> "a0"
|
||||
# v25 -> "a1"
|
||||
# v26 -> "a2"
|
||||
# v27 -> "a3"
|
||||
# v28 -> temporary
|
||||
# v29 -> E 'and' mask = 0x00ffffffffffffff00ffffffffffffff
|
||||
# v30 -> E 'or' mask = 0x3*00000000******3*00000000******
|
||||
# v31 -> scale mask = 0x81f000000000000081f0000000000000
|
||||
|
||||
randomx_program_aarch64:
|
||||
# Save callee-saved registers
|
||||
sub sp, sp, 192
|
||||
stp x16, x17, [sp]
|
||||
stp x18, x19, [sp, 16]
|
||||
stp x20, x21, [sp, 32]
|
||||
stp x22, x23, [sp, 48]
|
||||
stp x24, x25, [sp, 64]
|
||||
stp x26, x27, [sp, 80]
|
||||
stp x28, x29, [sp, 96]
|
||||
stp x8, x30, [sp, 112]
|
||||
stp d8, d9, [sp, 128]
|
||||
stp d10, d11, [sp, 144]
|
||||
stp d12, d13, [sp, 160]
|
||||
stp d14, d15, [sp, 176]
|
||||
|
||||
# Zero integer registers
|
||||
mov x4, xzr
|
||||
mov x5, xzr
|
||||
mov x6, xzr
|
||||
mov x7, xzr
|
||||
mov x12, xzr
|
||||
mov x13, xzr
|
||||
mov x14, xzr
|
||||
mov x15, xzr
|
||||
|
||||
# Load ma, mx and dataset pointer
|
||||
ldp x9, x1, [x1]
|
||||
|
||||
# Load initial spMix value
|
||||
mov x10, x9
|
||||
|
||||
# Load group A registers
|
||||
ldp q24, q25, [x0, 192]
|
||||
ldp q26, q27, [x0, 224]
|
||||
|
||||
# Load E 'and' mask
|
||||
mov x16, 0x00FFFFFFFFFFFFFF
|
||||
ins v29.d[0], x16
|
||||
ins v29.d[1], x16
|
||||
|
||||
# Load E 'or' mask (stored in reg.f[0])
|
||||
ldr q30, [x0, 64]
|
||||
|
||||
# Load scale mask
|
||||
mov x16, 0x80f0000000000000
|
||||
ins v31.d[0], x16
|
||||
ins v31.d[1], x16
|
||||
|
||||
# Read fpcr
|
||||
mrs x8, fpcr
|
||||
rbit x8, x8
|
||||
|
||||
# Save x0
|
||||
str x0, [sp, -16]!
|
||||
|
||||
# Read literals
|
||||
ldr x0, literal_x0
|
||||
ldr x11, literal_x11
|
||||
ldr x20, literal_x20
|
||||
ldr x21, literal_x21
|
||||
ldr x22, literal_x22
|
||||
ldr x23, literal_x23
|
||||
ldr x24, literal_x24
|
||||
ldr x25, literal_x25
|
||||
ldr x26, literal_x26
|
||||
ldr x27, literal_x27
|
||||
ldr x28, literal_x28
|
||||
ldr x29, literal_x29
|
||||
ldr x30, literal_x30
|
||||
|
||||
ldr q0, literal_v0
|
||||
ldr q1, literal_v1
|
||||
ldr q2, literal_v2
|
||||
ldr q3, literal_v3
|
||||
ldr q4, literal_v4
|
||||
ldr q5, literal_v5
|
||||
ldr q6, literal_v6
|
||||
ldr q7, literal_v7
|
||||
ldr q8, literal_v8
|
||||
ldr q9, literal_v9
|
||||
ldr q10, literal_v10
|
||||
ldr q11, literal_v11
|
||||
ldr q12, literal_v12
|
||||
ldr q13, literal_v13
|
||||
ldr q14, literal_v14
|
||||
ldr q15, literal_v15
|
||||
|
||||
randomx_program_aarch64_main_loop:
|
||||
# spAddr0 = spMix1 & ScratchpadL3Mask64;
|
||||
# spAddr1 = (spMix1 >> 32) & ScratchpadL3Mask64;
|
||||
lsr x18, x10, 32
|
||||
|
||||
# Actual mask will be inserted by JIT compiler
|
||||
and w16, w10, 1
|
||||
and w17, w18, 1
|
||||
|
||||
# x16 = scratchpad + spAddr0
|
||||
# x17 = scratchpad + spAddr1
|
||||
add x16, x16, x2
|
||||
add x17, x17, x2
|
||||
|
||||
# xor integer registers with scratchpad data (spAddr0)
|
||||
ldp x18, x19, [x16]
|
||||
eor x4, x4, x18
|
||||
eor x5, x5, x19
|
||||
ldp x18, x19, [x16, 16]
|
||||
eor x6, x6, x18
|
||||
eor x7, x7, x19
|
||||
ldp x18, x19, [x16, 32]
|
||||
eor x12, x12, x18
|
||||
eor x13, x13, x19
|
||||
ldp x18, x19, [x16, 48]
|
||||
eor x14, x14, x18
|
||||
eor x15, x15, x19
|
||||
|
||||
# Load group F registers (spAddr1)
|
||||
ldpsw x18, x19, [x17]
|
||||
ins v16.d[0], x18
|
||||
ins v16.d[1], x19
|
||||
ldpsw x18, x19, [x17, 8]
|
||||
ins v17.d[0], x18
|
||||
ins v17.d[1], x19
|
||||
ldpsw x18, x19, [x17, 16]
|
||||
ins v18.d[0], x18
|
||||
ins v18.d[1], x19
|
||||
ldpsw x18, x19, [x17, 24]
|
||||
ins v19.d[0], x18
|
||||
ins v19.d[1], x19
|
||||
scvtf v16.2d, v16.2d
|
||||
scvtf v17.2d, v17.2d
|
||||
scvtf v18.2d, v18.2d
|
||||
scvtf v19.2d, v19.2d
|
||||
|
||||
# Load group E registers (spAddr1)
|
||||
ldpsw x18, x19, [x17, 32]
|
||||
ins v20.d[0], x18
|
||||
ins v20.d[1], x19
|
||||
ldpsw x18, x19, [x17, 40]
|
||||
ins v21.d[0], x18
|
||||
ins v21.d[1], x19
|
||||
ldpsw x18, x19, [x17, 48]
|
||||
ins v22.d[0], x18
|
||||
ins v22.d[1], x19
|
||||
ldpsw x18, x19, [x17, 56]
|
||||
ins v23.d[0], x18
|
||||
ins v23.d[1], x19
|
||||
scvtf v20.2d, v20.2d
|
||||
scvtf v21.2d, v21.2d
|
||||
scvtf v22.2d, v22.2d
|
||||
scvtf v23.2d, v23.2d
|
||||
and v20.16b, v20.16b, v29.16b
|
||||
and v21.16b, v21.16b, v29.16b
|
||||
and v22.16b, v22.16b, v29.16b
|
||||
and v23.16b, v23.16b, v29.16b
|
||||
orr v20.16b, v20.16b, v30.16b
|
||||
orr v21.16b, v21.16b, v30.16b
|
||||
orr v22.16b, v22.16b, v30.16b
|
||||
orr v23.16b, v23.16b, v30.16b
|
||||
|
||||
# Execute VM instructions
|
||||
randomx_program_aarch64_vm_instructions:
|
||||
|
||||
# 16 KB buffer for generated instructions
|
||||
.fill 4096,4,0
|
||||
|
||||
literal_x0: .fill 1,8,0
|
||||
literal_x11: .fill 1,8,0
|
||||
literal_x20: .fill 1,8,0
|
||||
literal_x21: .fill 1,8,0
|
||||
literal_x22: .fill 1,8,0
|
||||
literal_x23: .fill 1,8,0
|
||||
literal_x24: .fill 1,8,0
|
||||
literal_x25: .fill 1,8,0
|
||||
literal_x26: .fill 1,8,0
|
||||
literal_x27: .fill 1,8,0
|
||||
literal_x28: .fill 1,8,0
|
||||
literal_x29: .fill 1,8,0
|
||||
literal_x30: .fill 1,8,0
|
||||
randomx_program_aarch64_imul_rcp_literals_end:
|
||||
|
||||
literal_v0: .fill 2,8,0
|
||||
literal_v1: .fill 2,8,0
|
||||
literal_v2: .fill 2,8,0
|
||||
literal_v3: .fill 2,8,0
|
||||
literal_v4: .fill 2,8,0
|
||||
literal_v5: .fill 2,8,0
|
||||
literal_v6: .fill 2,8,0
|
||||
literal_v7: .fill 2,8,0
|
||||
literal_v8: .fill 2,8,0
|
||||
literal_v9: .fill 2,8,0
|
||||
literal_v10: .fill 2,8,0
|
||||
literal_v11: .fill 2,8,0
|
||||
literal_v12: .fill 2,8,0
|
||||
literal_v13: .fill 2,8,0
|
||||
literal_v14: .fill 2,8,0
|
||||
literal_v15: .fill 2,8,0
|
||||
|
||||
randomx_program_aarch64_vm_instructions_end:
|
||||
|
||||
# mx ^= r[readReg2] ^ r[readReg3];
|
||||
eor x9, x9, x18
|
||||
|
||||
# Calculate dataset pointer for dataset prefetch
|
||||
mov w18, w9
|
||||
randomx_program_aarch64_cacheline_align_mask1:
|
||||
# Actual mask will be inserted by JIT compiler
|
||||
and x18, x18, 1
|
||||
add x18, x18, x1
|
||||
|
||||
# Prefetch dataset data
|
||||
prfm pldl2strm, [x18]
|
||||
|
||||
# mx <-> ma
|
||||
ror x9, x9, 32
|
||||
|
||||
# Calculate dataset pointer for dataset read
|
||||
mov w10, w9
|
||||
randomx_program_aarch64_cacheline_align_mask2:
|
||||
# Actual mask will be inserted by JIT compiler
|
||||
and x10, x10, 1
|
||||
add x10, x10, x1
|
||||
|
||||
randomx_program_aarch64_xor_with_dataset_line:
|
||||
# xor integer registers with dataset data
|
||||
ldp x18, x19, [x10]
|
||||
eor x4, x4, x18
|
||||
eor x5, x5, x19
|
||||
ldp x18, x19, [x10, 16]
|
||||
eor x6, x6, x18
|
||||
eor x7, x7, x19
|
||||
ldp x18, x19, [x10, 32]
|
||||
eor x12, x12, x18
|
||||
eor x13, x13, x19
|
||||
ldp x18, x19, [x10, 48]
|
||||
eor x14, x14, x18
|
||||
eor x15, x15, x19
|
||||
|
||||
randomx_program_aarch64_update_spMix1:
|
||||
# JIT compiler will replace it with "eor x10, config.readReg0, config.readReg1"
|
||||
eor x10, x0, x0
|
||||
|
||||
# Store integer registers to scratchpad (spAddr1)
|
||||
stp x4, x5, [x17, 0]
|
||||
stp x6, x7, [x17, 16]
|
||||
stp x12, x13, [x17, 32]
|
||||
stp x14, x15, [x17, 48]
|
||||
|
||||
# xor group F and group E registers
|
||||
eor v16.16b, v16.16b, v20.16b
|
||||
eor v17.16b, v17.16b, v21.16b
|
||||
eor v18.16b, v18.16b, v22.16b
|
||||
eor v19.16b, v19.16b, v23.16b
|
||||
|
||||
# Store FP registers to scratchpad (spAddr0)
|
||||
stp q16, q17, [x16, 0]
|
||||
stp q18, q19, [x16, 32]
|
||||
|
||||
subs x3, x3, 1
|
||||
bne randomx_program_aarch64_main_loop
|
||||
|
||||
# Restore x0
|
||||
ldr x0, [sp], 16
|
||||
|
||||
# Store integer registers
|
||||
stp x4, x5, [x0, 0]
|
||||
stp x6, x7, [x0, 16]
|
||||
stp x12, x13, [x0, 32]
|
||||
stp x14, x15, [x0, 48]
|
||||
|
||||
# Store FP registers
|
||||
stp q16, q17, [x0, 64]
|
||||
stp q18, q19, [x0, 96]
|
||||
stp q20, q21, [x0, 128]
|
||||
stp q22, q23, [x0, 160]
|
||||
|
||||
# Restore callee-saved registers
|
||||
ldp x16, x17, [sp]
|
||||
ldp x18, x19, [sp, 16]
|
||||
ldp x20, x21, [sp, 32]
|
||||
ldp x22, x23, [sp, 48]
|
||||
ldp x24, x25, [sp, 64]
|
||||
ldp x26, x27, [sp, 80]
|
||||
ldp x28, x29, [sp, 96]
|
||||
ldp x8, x30, [sp, 112]
|
||||
ldp d8, d9, [sp, 128]
|
||||
ldp d10, d11, [sp, 144]
|
||||
ldp d12, d13, [sp, 160]
|
||||
ldp d14, d15, [sp, 176]
|
||||
add sp, sp, 192
|
||||
|
||||
ret
|
||||
|
||||
randomx_program_aarch64_vm_instructions_end_light:
|
||||
sub sp, sp, 96
|
||||
stp x0, x1, [sp, 64]
|
||||
stp x2, x30, [sp, 80]
|
||||
|
||||
# mx ^= r[readReg2] ^ r[readReg3];
|
||||
eor x9, x9, x18
|
||||
|
||||
# mx <-> ma
|
||||
ror x9, x9, 32
|
||||
|
||||
# x0 -> pointer to cache memory
|
||||
mov x0, x1
|
||||
|
||||
# x1 -> pointer to output
|
||||
mov x1, sp
|
||||
|
||||
randomx_program_aarch64_light_cacheline_align_mask:
|
||||
# Actual mask will be inserted by JIT compiler
|
||||
and w2, w9, 1
|
||||
|
||||
# x2 -> item number
|
||||
lsr x2, x2, 6
|
||||
|
||||
randomx_program_aarch64_light_dataset_offset:
|
||||
# Apply dataset offset (filled in by JIT compiler)
|
||||
add x2, x2, 0
|
||||
add x2, x2, 0
|
||||
|
||||
bl randomx_calc_dataset_item_aarch64
|
||||
|
||||
mov x10, sp
|
||||
ldp x0, x1, [sp, 64]
|
||||
ldp x2, x30, [sp, 80]
|
||||
add sp, sp, 96
|
||||
|
||||
b randomx_program_aarch64_xor_with_dataset_line
|
||||
|
||||
|
||||
|
||||
# Input parameters
|
||||
#
|
||||
# x0 -> pointer to cache
|
||||
# x1 -> pointer to dataset memory at startItem
|
||||
# x2 -> start item
|
||||
# x3 -> end item
|
||||
|
||||
randomx_init_dataset_aarch64:
|
||||
# Save x30 (return address)
|
||||
str x30, [sp, -16]!
|
||||
|
||||
# Load pointer to cache memory
|
||||
ldr x0, [x0]
|
||||
|
||||
randomx_init_dataset_aarch64_main_loop:
|
||||
bl randomx_calc_dataset_item_aarch64
|
||||
add x1, x1, 64
|
||||
add x2, x2, 1
|
||||
cmp x2, x3
|
||||
bne randomx_init_dataset_aarch64_main_loop
|
||||
|
||||
# Restore x30 (return address)
|
||||
ldr x30, [sp], 16
|
||||
|
||||
ret
|
||||
|
||||
randomx_init_dataset_aarch64_end:
|
||||
|
||||
# Input parameters
|
||||
#
|
||||
# x0 -> pointer to cache memory
|
||||
# x1 -> pointer to output
|
||||
# x2 -> item number
|
||||
#
|
||||
# Register allocation
|
||||
#
|
||||
# x0-x7 -> output value (calculated dataset item)
|
||||
# x8 -> pointer to cache memory
|
||||
# x9 -> pointer to output
|
||||
# x10 -> registerValue
|
||||
# x11 -> mixBlock
|
||||
# x12 -> temporary
|
||||
# x13 -> temporary
|
||||
|
||||
randomx_calc_dataset_item_aarch64:
|
||||
sub sp, sp, 112
|
||||
stp x0, x1, [sp]
|
||||
stp x2, x3, [sp, 16]
|
||||
stp x4, x5, [sp, 32]
|
||||
stp x6, x7, [sp, 48]
|
||||
stp x8, x9, [sp, 64]
|
||||
stp x10, x11, [sp, 80]
|
||||
stp x12, x13, [sp, 96]
|
||||
|
||||
ldr x12, superscalarMul0
|
||||
|
||||
mov x8, x0
|
||||
mov x9, x1
|
||||
mov x10, x2
|
||||
|
||||
# rl[0] = (itemNumber + 1) * superscalarMul0;
|
||||
madd x0, x2, x12, x12
|
||||
|
||||
# rl[1] = rl[0] ^ superscalarAdd1;
|
||||
ldr x12, superscalarAdd1
|
||||
eor x1, x0, x12
|
||||
|
||||
# rl[2] = rl[0] ^ superscalarAdd2;
|
||||
ldr x12, superscalarAdd2
|
||||
eor x2, x0, x12
|
||||
|
||||
# rl[3] = rl[0] ^ superscalarAdd3;
|
||||
ldr x12, superscalarAdd3
|
||||
eor x3, x0, x12
|
||||
|
||||
# rl[4] = rl[0] ^ superscalarAdd4;
|
||||
ldr x12, superscalarAdd4
|
||||
eor x4, x0, x12
|
||||
|
||||
# rl[5] = rl[0] ^ superscalarAdd5;
|
||||
ldr x12, superscalarAdd5
|
||||
eor x5, x0, x12
|
||||
|
||||
# rl[6] = rl[0] ^ superscalarAdd6;
|
||||
ldr x12, superscalarAdd6
|
||||
eor x6, x0, x12
|
||||
|
||||
# rl[7] = rl[0] ^ superscalarAdd7;
|
||||
ldr x12, superscalarAdd7
|
||||
eor x7, x0, x12
|
||||
|
||||
b randomx_calc_dataset_item_aarch64_prefetch
|
||||
|
||||
superscalarMul0: .quad 6364136223846793005
|
||||
superscalarAdd1: .quad 9298411001130361340
|
||||
superscalarAdd2: .quad 12065312585734608966
|
||||
superscalarAdd3: .quad 9306329213124626780
|
||||
superscalarAdd4: .quad 5281919268842080866
|
||||
superscalarAdd5: .quad 10536153434571861004
|
||||
superscalarAdd6: .quad 3398623926847679864
|
||||
superscalarAdd7: .quad 9549104520008361294
|
||||
|
||||
# Prefetch -> SuperScalar hash -> Mix will be repeated N times
|
||||
|
||||
randomx_calc_dataset_item_aarch64_prefetch:
|
||||
# Actual mask will be inserted by JIT compiler
|
||||
and x11, x10, 1
|
||||
add x11, x8, x11, lsl 6
|
||||
prfm pldl2strm, [x11]
|
||||
|
||||
# Generated SuperScalar hash program goes here
|
||||
|
||||
randomx_calc_dataset_item_aarch64_mix:
|
||||
ldp x12, x13, [x11]
|
||||
eor x0, x0, x12
|
||||
eor x1, x1, x13
|
||||
ldp x12, x13, [x11, 16]
|
||||
eor x2, x2, x12
|
||||
eor x3, x3, x13
|
||||
ldp x12, x13, [x11, 32]
|
||||
eor x4, x4, x12
|
||||
eor x5, x5, x13
|
||||
ldp x12, x13, [x11, 48]
|
||||
eor x6, x6, x12
|
||||
eor x7, x7, x13
|
||||
|
||||
randomx_calc_dataset_item_aarch64_store_result:
|
||||
stp x0, x1, [x9]
|
||||
stp x2, x3, [x9, 16]
|
||||
stp x4, x5, [x9, 32]
|
||||
stp x6, x7, [x9, 48]
|
||||
|
||||
ldp x0, x1, [sp]
|
||||
ldp x2, x3, [sp, 16]
|
||||
ldp x4, x5, [sp, 32]
|
||||
ldp x6, x7, [sp, 48]
|
||||
ldp x8, x9, [sp, 64]
|
||||
ldp x10, x11, [sp, 80]
|
||||
ldp x12, x13, [sp, 96]
|
||||
add sp, sp, 112
|
||||
|
||||
ret
|
||||
|
||||
randomx_calc_dataset_item_aarch64_end:
|
||||
51
src/crypto/randomx/jit_compiler_a64_static.hpp
Normal file
51
src/crypto/randomx/jit_compiler_a64_static.hpp
Normal file
@@ -0,0 +1,51 @@
|
||||
/*
|
||||
Copyright (c) 2018-2019, tevador <tevador@gmail.com>
|
||||
Copyright (c) 2019, SChernykh <https://github.com/SChernykh>
|
||||
|
||||
All rights reserved.
|
||||
|
||||
Redistribution and use in source and binary forms, with or without
|
||||
modification, are permitted provided that the following conditions are met:
|
||||
* Redistributions of source code must retain the above copyright
|
||||
notice, this list of conditions and the following disclaimer.
|
||||
* Redistributions in binary form must reproduce the above copyright
|
||||
notice, this list of conditions and the following disclaimer in the
|
||||
documentation and/or other materials provided with the distribution.
|
||||
* Neither the name of the copyright holder nor the
|
||||
names of its contributors may be used to endorse or promote products
|
||||
derived from this software without specific prior written permission.
|
||||
|
||||
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
|
||||
ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
|
||||
WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||
FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||
SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||
CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||
OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
#pragma once
|
||||
|
||||
extern "C" {
|
||||
void randomx_program_aarch64(void* reg, void* mem, void* scratchpad, uint64_t iterations);
|
||||
void randomx_program_aarch64_main_loop();
|
||||
void randomx_program_aarch64_vm_instructions();
|
||||
void randomx_program_aarch64_imul_rcp_literals_end();
|
||||
void randomx_program_aarch64_vm_instructions_end();
|
||||
void randomx_program_aarch64_cacheline_align_mask1();
|
||||
void randomx_program_aarch64_cacheline_align_mask2();
|
||||
void randomx_program_aarch64_update_spMix1();
|
||||
void randomx_program_aarch64_vm_instructions_end_light();
|
||||
void randomx_program_aarch64_light_cacheline_align_mask();
|
||||
void randomx_program_aarch64_light_dataset_offset();
|
||||
void randomx_init_dataset_aarch64();
|
||||
void randomx_init_dataset_aarch64_end();
|
||||
void randomx_calc_dataset_item_aarch64();
|
||||
void randomx_calc_dataset_item_aarch64_prefetch();
|
||||
void randomx_calc_dataset_item_aarch64_mix();
|
||||
void randomx_calc_dataset_item_aarch64_store_result();
|
||||
void randomx_calc_dataset_item_aarch64_end();
|
||||
}
|
||||
@@ -26,6 +26,7 @@ OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
#include "crypto/randomx/common.hpp"
|
||||
#include "crypto/randomx/randomx.h"
|
||||
#include "crypto/randomx/dataset.hpp"
|
||||
#include "crypto/randomx/vm_interpreted.hpp"
|
||||
@@ -33,7 +34,13 @@ OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
#include "crypto/randomx/vm_compiled.hpp"
|
||||
#include "crypto/randomx/vm_compiled_light.hpp"
|
||||
#include "crypto/randomx/blake2/blake2.h"
|
||||
|
||||
#if defined(_M_X64) || defined(__x86_64__)
|
||||
#include "crypto/randomx/jit_compiler_x86_static.hpp"
|
||||
#elif defined(XMRIG_ARM)
|
||||
#include "crypto/randomx/jit_compiler_a64_static.hpp"
|
||||
#endif
|
||||
|
||||
#include <cassert>
|
||||
|
||||
RandomX_ConfigurationWownero::RandomX_ConfigurationWownero()
|
||||
@@ -156,19 +163,10 @@ RandomX_ConfigurationBase::RandomX_ConfigurationBase()
|
||||
#endif
|
||||
}
|
||||
|
||||
static uint32_t Log2(size_t value) { return (value > 1) ? (Log2(value / 2) + 1) : 0; }
|
||||
|
||||
void RandomX_ConfigurationBase::Apply()
|
||||
{
|
||||
#if defined(_M_X64) || defined(__x86_64__)
|
||||
*(uint32_t*)(codeShhPrefetchTweaked + 3) = ArgonMemory * 16 - 1;
|
||||
const uint32_t DatasetBaseMask = DatasetBaseSize - RANDOMX_DATASET_ITEM_SIZE;
|
||||
*(uint32_t*)(codeReadDatasetTweaked + 7) = DatasetBaseMask;
|
||||
*(uint32_t*)(codeReadDatasetTweaked + 23) = DatasetBaseMask;
|
||||
*(uint32_t*)(codeReadDatasetLightSshInitTweaked + 59) = DatasetBaseMask;
|
||||
#endif
|
||||
|
||||
CacheLineAlignMask_Calculated = (DatasetBaseSize - 1) & ~(RANDOMX_DATASET_ITEM_SIZE - 1);
|
||||
DatasetExtraItems_Calculated = DatasetExtraSize / RANDOMX_DATASET_ITEM_SIZE;
|
||||
|
||||
ScratchpadL1Mask_Calculated = (ScratchpadL1_Size / sizeof(uint64_t) - 1) * 8;
|
||||
ScratchpadL1Mask16_Calculated = (ScratchpadL1_Size / sizeof(uint64_t) / 2 - 1) * 16;
|
||||
ScratchpadL2Mask_Calculated = (ScratchpadL2_Size / sizeof(uint64_t) - 1) * 8;
|
||||
@@ -176,22 +174,40 @@ void RandomX_ConfigurationBase::Apply()
|
||||
ScratchpadL3Mask_Calculated = (((ScratchpadL3_Size / sizeof(uint64_t)) - 1) * 8);
|
||||
ScratchpadL3Mask64_Calculated = ((ScratchpadL3_Size / sizeof(uint64_t)) / 8 - 1) * 64;
|
||||
|
||||
#if defined(_M_X64) || defined(__x86_64__)
|
||||
*(uint32_t*)(codePrefetchScratchpadTweaked + 4) = ScratchpadL3Mask64_Calculated;
|
||||
*(uint32_t*)(codePrefetchScratchpadTweaked + 18) = ScratchpadL3Mask64_Calculated;
|
||||
#endif
|
||||
CacheLineAlignMask_Calculated = (DatasetBaseSize - 1) & ~(RANDOMX_DATASET_ITEM_SIZE - 1);
|
||||
DatasetExtraItems_Calculated = DatasetExtraSize / RANDOMX_DATASET_ITEM_SIZE;
|
||||
|
||||
ConditionMask_Calculated = (1 << JumpBits) - 1;
|
||||
|
||||
constexpr int CEIL_NULL = 0;
|
||||
int k = 0;
|
||||
|
||||
#if defined(_M_X64) || defined(__x86_64__)
|
||||
*(uint32_t*)(codeShhPrefetchTweaked + 3) = ArgonMemory * 16 - 1;
|
||||
const uint32_t DatasetBaseMask = DatasetBaseSize - RANDOMX_DATASET_ITEM_SIZE;
|
||||
*(uint32_t*)(codeReadDatasetTweaked + 7) = DatasetBaseMask;
|
||||
*(uint32_t*)(codeReadDatasetTweaked + 23) = DatasetBaseMask;
|
||||
*(uint32_t*)(codeReadDatasetLightSshInitTweaked + 59) = DatasetBaseMask;
|
||||
|
||||
*(uint32_t*)(codePrefetchScratchpadTweaked + 4) = ScratchpadL3Mask64_Calculated;
|
||||
*(uint32_t*)(codePrefetchScratchpadTweaked + 18) = ScratchpadL3Mask64_Calculated;
|
||||
|
||||
#define JIT_HANDLE(x, prev) randomx::JitCompilerX86::engine[k] = &randomx::JitCompilerX86::h_##x
|
||||
|
||||
#elif defined(XMRIG_ARM)
|
||||
|
||||
Log2_ScratchpadL1 = Log2(ScratchpadL1_Size);
|
||||
Log2_ScratchpadL2 = Log2(ScratchpadL2_Size);
|
||||
Log2_ScratchpadL3 = Log2(ScratchpadL3_Size);
|
||||
Log2_DatasetBaseSize = Log2(DatasetBaseSize);
|
||||
Log2_CacheSize = Log2((ArgonMemory * randomx::ArgonBlockSize) / randomx::CacheLineSize);
|
||||
|
||||
#define JIT_HANDLE(x, prev) randomx::JitCompilerA64::engine[k] = &randomx::JitCompilerA64::h_##x
|
||||
|
||||
#else
|
||||
#define JIT_HANDLE(x, prev)
|
||||
#endif
|
||||
|
||||
constexpr int CEIL_NULL = 0;
|
||||
int k = 0;
|
||||
|
||||
#define INST_HANDLE(x, prev) \
|
||||
CEIL_##x = CEIL_##prev + RANDOMX_FREQ_##x; \
|
||||
for (; k < CEIL_##x; ++k) { JIT_HANDLE(x, prev); }
|
||||
@@ -435,12 +451,12 @@ extern "C" {
|
||||
assert(inputSize == 0 || input != nullptr);
|
||||
assert(output != nullptr);
|
||||
alignas(16) uint64_t tempHash[8];
|
||||
rx_blake2b(tempHash, sizeof(tempHash), input, inputSize, nullptr, 0);
|
||||
rx_blake2b(tempHash, sizeof(tempHash), input, inputSize, nullptr, 0);
|
||||
machine->initScratchpad(&tempHash);
|
||||
machine->resetRoundingMode();
|
||||
for (uint32_t chain = 0; chain < RandomX_CurrentConfig.ProgramCount - 1; ++chain) {
|
||||
machine->run(&tempHash);
|
||||
rx_blake2b(tempHash, sizeof(tempHash), machine->getRegisterFile(), sizeof(randomx::RegisterFile), nullptr, 0);
|
||||
rx_blake2b(tempHash, sizeof(tempHash), machine->getRegisterFile(), sizeof(randomx::RegisterFile), nullptr, 0);
|
||||
}
|
||||
machine->run(&tempHash);
|
||||
machine->getFinalResult(output, RANDOMX_HASH_SIZE);
|
||||
|
||||
@@ -133,6 +133,14 @@ struct RandomX_ConfigurationBase
|
||||
|
||||
uint32_t ConditionMask_Calculated;
|
||||
|
||||
#ifdef XMRIG_ARM
|
||||
uint32_t Log2_ScratchpadL1;
|
||||
uint32_t Log2_ScratchpadL2;
|
||||
uint32_t Log2_ScratchpadL3;
|
||||
uint32_t Log2_DatasetBaseSize;
|
||||
uint32_t Log2_CacheSize;
|
||||
#endif
|
||||
|
||||
int CEIL_IADD_RS;
|
||||
int CEIL_IADD_M;
|
||||
int CEIL_ISUB_R;
|
||||
|
||||
@@ -64,7 +64,7 @@ protected:
|
||||
alignas(64) randomx::RegisterFile reg;
|
||||
alignas(16) randomx::ProgramConfiguration config;
|
||||
randomx::MemoryRegisters mem;
|
||||
uint8_t* scratchpad;
|
||||
uint8_t* scratchpad = nullptr;
|
||||
union {
|
||||
randomx_cache* cachePtr = nullptr;
|
||||
randomx_dataset* datasetPtr;
|
||||
|
||||
@@ -50,6 +50,9 @@ namespace randomx {
|
||||
|
||||
template<bool softAes>
|
||||
void CompiledVm<softAes>::execute() {
|
||||
#ifdef XMRIG_ARM
|
||||
memcpy(reg.f, config.eMask, sizeof(config.eMask));
|
||||
#endif
|
||||
compiler.getProgramFunc()(reg, mem, scratchpad, RandomX_CurrentConfig.ProgramIterations);
|
||||
}
|
||||
|
||||
|
||||
@@ -33,11 +33,9 @@
|
||||
|
||||
xmrig::RxVm::RxVm(RxDataset *dataset, uint8_t *scratchpad, bool softAes)
|
||||
{
|
||||
# ifndef XMRIG_ARM
|
||||
if (!softAes) {
|
||||
m_flags |= RANDOMX_FLAG_HARD_AES;
|
||||
}
|
||||
# endif
|
||||
|
||||
if (dataset->get()) {
|
||||
m_flags |= RANDOMX_FLAG_FULL_MEM;
|
||||
|
||||
@@ -28,14 +28,14 @@
|
||||
#define APP_ID "xmrig"
|
||||
#define APP_NAME "XMRig"
|
||||
#define APP_DESC "XMRig miner"
|
||||
#define APP_VERSION "4.0.0-beta"
|
||||
#define APP_VERSION "4.1.0-beta"
|
||||
#define APP_DOMAIN "xmrig.com"
|
||||
#define APP_SITE "www.xmrig.com"
|
||||
#define APP_COPYRIGHT "Copyright (C) 2016-2019 xmrig.com"
|
||||
#define APP_KIND "miner"
|
||||
|
||||
#define APP_VER_MAJOR 4
|
||||
#define APP_VER_MINOR 0
|
||||
#define APP_VER_MINOR 1
|
||||
#define APP_VER_PATCH 0
|
||||
|
||||
#ifdef _MSC_VER
|
||||
|
||||
Reference in New Issue
Block a user