1
0
mirror of https://github.com/xmrig/xmrig.git synced 2025-12-06 23:52:38 -05:00

Compare commits

...

1007 Commits

Author SHA1 Message Date
XMRig
847d08cdbc v6.3.2 2020-08-20 12:54:22 +07:00
XMRig
81af1e964d Merge branch 'dev' 2020-08-20 12:53:45 +07:00
xmrig
3662e45435 Update CHANGELOG.md 2020-08-20 12:49:31 +07:00
XMRig
f06e30e343 Merge branch 'battery-macos' of https://github.com/jtgrassie/xmrig into dev 2020-08-20 12:46:09 +07:00
xmrig
34d4aa4012 Update CHANGELOG.md 2020-08-19 07:42:10 +07:00
XMRig
3e4bf8cd6c Fix compile warning 2020-08-17 06:08:14 +07:00
XMRig
206b675892 Always use all available threads on ARM. 2020-08-16 17:36:38 +07:00
XMRig
00b4ae9c36 Fixed compile warning and updated build.uv.sh. 2020-08-16 16:03:27 +07:00
XMRig
8d5ea745bb Merge branch 'dev' of github.com:xmrig/xmrig into dev 2020-08-16 15:47:57 +07:00
XMRig
cac48cdd27 Added ARM CPU name detection based on lscpu code. 2020-08-16 15:47:29 +07:00
xmrig
c20010ed54 Merge pull request #1807 from SChernykh/dev
RandomX JIT: optimized address mask calculation
2020-08-12 21:48:20 +07:00
SChernykh
5926dee354 RandomX JIT: optimized address mask calculation 2020-08-12 16:45:16 +02:00
Jethro Grassie
b78b0b5c6b fix macos battery detection 2020-08-11 18:04:56 -04:00
XMRig
43afa437e4 Merge branch 'dev' of github.com:xmrig/xmrig into dev 2020-08-07 21:55:06 +07:00
XMRig
050568a4ab Fixed rare protocol error in HTTP client. 2020-08-07 21:54:22 +07:00
xmrig
8bf40cea36 Update CHANGELOG.md 2020-08-01 13:02:11 +07:00
XMRig
ae3ff0f570 Fixed RandomX cache initialization if 1GB pages fails to allocate on a first NUMA node. 2020-08-01 12:30:02 +07:00
xmrig
0addf91a70 Merge pull request #1794 from SChernykh/dev
More robust 1 GB pages handling
2020-07-31 20:45:27 +07:00
SChernykh
abb78302b8 Try to allocate scratchpad from dataset's 1 GB huge pages, if normal huge pages are not available 2020-07-31 13:37:22 +02:00
XMRig
e5579d8635 v6.3.2-dev 2020-07-31 16:50:23 +07:00
XMRig
3986c43fa5 Merge branch 'master' into dev 2020-07-31 16:48:54 +07:00
SChernykh
838cc08680 Force 2 MB pages size in allocateLargePagesMemory() on Linux 2020-07-31 09:55:49 +02:00
XMRig
a0fe49f946 v6.3.1 2020-07-31 13:20:56 +07:00
XMRig
70dbe8562c Merge branch 'dev' 2020-07-31 13:20:11 +07:00
xmrig
41fcd1e49a Update CHANGELOG.md 2020-07-31 13:16:58 +07:00
xmrig
90195caa1d Merge pull request #1792 from SChernykh/dev
Fixed crash in RelWithDbgInfo MSVC build
2020-07-29 15:42:09 +07:00
SChernykh
cdb6287d89 Fixed crash in RelWithDbgInfo MSVC build
Same problem as in https://github.com/xmrig/xmrig/pull/1784 , fixed with compiler flags this time.
2020-07-29 10:39:58 +02:00
XMRig
32e9b7e34a Added command line option --pause-on-battery and renamed config option. 2020-07-23 15:45:01 +07:00
XMRig
6484bbb716 Add tags 2020-07-23 10:26:56 +07:00
xmrig
e59806d6ae Merge pull request #1786 from SChernykh/dev
Added mining on battery setting
2020-07-23 09:20:06 +07:00
SChernykh
299b180b28 Added mining on battery setting 2020-07-22 20:21:42 +02:00
XMRig
1acd88ed39 Cleanup 2020-07-22 21:27:40 +07:00
XMRig
109c088e8a Cleanup usage output. 2020-07-22 19:58:08 +07:00
xmrig
bb18239642 Update README.md 2020-07-22 09:14:25 +07:00
xmrig
ccded7cc0a Merge pull request #1784 from SChernykh/dev
Fixed RandomX initialization for VS debug builds
2020-07-21 19:04:02 +07:00
SChernykh
5bc89fdc8b Fixed RandomX initialization for VS debug builds 2020-07-21 10:10:07 +02:00
XMRig
70c7f33a20 Added command line options --cache-qos (--randomx-cache-qos) and --argon2-impl (--cpu-argon2-impl). 2020-07-20 09:17:59 +07:00
XMRig
1ec185a3a0 v6.3.1-dev 2020-07-17 03:13:02 +07:00
XMRig
6aa4eeefbb Merge branch 'master' into dev 2020-07-17 03:12:36 +07:00
XMRig
10ea567084 v6.3.0 2020-07-17 00:17:55 +07:00
XMRig
028d6503aa Merge branch 'dev' 2020-07-17 00:17:24 +07:00
XMRig
51346c2b2b v6.3.0-dev 2020-07-17 00:04:31 +07:00
XMRig
ca535c7813 Sync changes with the proxy. 2020-07-16 23:29:21 +07:00
xmrig
ba80e27349 Merge pull request #1780 from SChernykh/dev
Cryptonight OpenCL: fix for long input data
2020-07-16 19:56:20 +07:00
SChernykh
bd8cf54a0b Cryptonight OpenCL: fix for long input data 2020-07-16 10:39:32 +02:00
XMRig
e0eed7d5d6 Fixed build without MSR support. 2020-07-16 05:15:35 +07:00
XMRig
8dff08f15f Merge branch 'haven-protocol-org-master' into dev 2020-07-15 23:33:53 +07:00
XMRig
47d68b068b Merge branch 'master' of https://github.com/haven-protocol-org/xmrig into haven-protocol-org-master 2020-07-15 23:33:17 +07:00
Neil Coggins
a648a8b9be Increased max blob size to support Haven offshore capability 2020-07-14 11:52:43 +01:00
xmrig
7eefccc6bc Merge pull request #1776 from SChernykh/dev
Removed cache QoS warning at exit on unsupported CPUs
2020-07-14 01:45:18 +07:00
SChernykh
1bf159d1e8 Removed cache QoS warning at exit on unsupported CPUs 2020-07-13 20:43:49 +02:00
xmrig
bf46cb8684 Merge pull request #1774 from SChernykh/dev
RandomX: added cache QoS support
2020-07-14 01:35:46 +07:00
SChernykh
72c385c870 Cache QoS: fix for seting MSR 2020-07-13 20:30:44 +02:00
SChernykh
c83429c55c RandomX: added cache QoS support
False by default. If set to true, all non-mining CPU cores will not have access to L3 cache.
2020-07-13 17:23:18 +02:00
xmrig
e5a2689052 Merge pull request #1771 from jserv/update-sse2neon
Adopt new SSE2NEON and reduce ARM-specific changes
2020-07-11 02:32:56 +07:00
Jim Huang
b665d2d865 Adopt new SSE2NEON and reduce ARM-specific changes
This patch updated SSE2NEON [1], which contains more functions
provided by Intel intrinsics, only implemented with NEON-based
counterparts to produce the exact semantics of the intrinsics.
Consequently, ARM-specific changes against CryptoNight_arm can
be reduced as well.

[1] https://github.com/DLTcollab/sse2neon/
2020-07-11 01:55:11 +08:00
XMRig
e06a76ef1c v6.2.4-dev 2020-07-10 03:12:00 +07:00
XMRig
f523fddbfd Merge branch 'master' into dev 2020-07-10 02:49:33 +07:00
XMRig
30165ce4be v6.2.3 2020-07-09 22:24:35 +07:00
XMRig
83a10cce8c Merge branch 'dev' 2020-07-09 22:24:01 +07:00
xmrig
71cc486553 Update CHANGELOG.md 2020-07-09 22:23:16 +07:00
xmrig
2eaf8edf0e Merge pull request #1766 from SChernykh/dev
RandomX: tweaked Ryzen code
2020-07-05 21:16:21 +07:00
SChernykh
3d740e81a2 RandomX: tweaked Ryzen code
Very small speedup
2020-07-05 16:06:59 +02:00
xmrig
ef475d98da Update CHANGELOG.md 2020-07-04 19:11:29 +07:00
xmrig
5e92acab34 Merge pull request #1763 from SChernykh/dev
KawPow: fixed more duplicate share errors
2020-07-04 02:37:03 +07:00
SChernykh
935b8a1106 KawPow: fixed more duplicate share errors 2020-07-03 21:33:44 +02:00
xmrig
c371a7a2bb Update CHANGELOG.md 2020-07-04 00:29:50 +07:00
XMRig
4fe011b469 Fix tab/space inconsistency. 2020-07-03 21:36:06 +07:00
XMRig
bf32802a82 #1754 Fixed GPU health readings for pre Vega GPUs. 2020-07-03 21:14:21 +07:00
xmrig
ccfbba94f2 Merge pull request #1761 from SChernykh/dev
Fix typo
2020-07-02 19:41:19 +07:00
SChernykh
70d7fe9b59 Fix typo 2020-07-02 14:29:52 +02:00
xmrig
34a5c89ee2 Merge pull request #1760 from SChernykh/dev
KawPow: fixed rare duplicate share errors
2020-07-02 19:23:28 +07:00
SChernykh
39ed25cf7b KawPow: fixed rare duplicate share errors 2020-07-02 11:36:31 +02:00
XMRig
26c2200af3 #1756 Added results and connection reports. 2020-07-01 23:10:37 +07:00
xmrig
aa5a7c3c13 Merge pull request #1759 from SChernykh/dev
Fixed DAG initialization on slower AMD GPUs
2020-06-30 21:59:32 +07:00
SChernykh
08ca51ec4c Fixed DAG initialization on slower AMD GPUs
Display driver could reset on GPUs with screen connected.
2020-06-30 16:53:56 +02:00
xmrig
bbd9945866 Merge pull request #1752 from SChernykh/dev
Print error message when MSR mod fails
2020-06-27 00:59:25 +07:00
SChernykh
59313d9cc3 Print error message when MSR mod fails
Make sure user knows that hashrate is worse than it could be.
2020-06-26 19:54:06 +02:00
xmrig
2da5d31a5d Merge pull request #1749 from SChernykh/dev
KawPow: optimized CPU share verification
2020-06-26 17:39:37 +07:00
SChernykh
5724d8beb6 KawPow: optimized CPU share verification
- 2 times faster CPU share verification (11 -> 5 ms)
- 1.5 times faster light cache initialization
2020-06-26 12:31:26 +02:00
XMRig
03e9797b92 Merge branch 'dev' of https://github.com/SChernykh/xmrig into dev 2020-06-23 19:12:34 +07:00
XMRig
74bd9460d7 v6.2.3-dev 2020-06-23 19:05:54 +07:00
XMRig
f033cb7f46 Merge branch 'master' into dev 2020-06-23 19:05:21 +07:00
SChernykh
38cf5b6324 Fixed AstroBWT OpenCL compilation on some systems 2020-06-23 13:55:43 +02:00
XMRig
16863763d3 #1742 Fixed crash when use HTTP API. 2020-06-23 16:17:06 +07:00
xmrig
aa1934d273 Update CHANGELOG.md 2020-06-23 12:55:48 +07:00
XMRig
4bfe7c7090 v6.2.1 2020-06-23 11:26:38 +07:00
XMRig
c61dafce60 Merge branch 'dev' 2020-06-23 11:26:05 +07:00
XMRig
a4d086c451 Merge branch 'evo' into dev 2020-06-23 11:24:17 +07:00
xmrig
12394c7c78 Update CHANGELOG.md 2020-06-23 09:46:32 +07:00
XMRig
a83f2c809c Merge branch 'dev' into evo 2020-06-18 11:18:30 +07:00
XMRig
416c9eff69 Fixed AMD GPU health readings on Linux. 2020-06-18 11:16:26 +07:00
xmrig
cee3aeb116 Update CHANGELOG.md 2020-06-17 07:25:49 +07:00
xmrig
77ca380697 Merge pull request #1732 from SChernykh/evo
Fixed NiceHash disconnects for KawPow
2020-06-13 01:27:17 +07:00
SChernykh
28c81f2c53 Fixed NiceHash disconnects for KawPow 2020-06-12 14:08:00 +02:00
xmrig
945d1db05c Merge pull request #1730 from SChernykh/evo
Show GPU # when compute error happens
2020-06-12 00:52:07 +07:00
SChernykh
5324761e06 Show GPU # when compute error happens 2020-06-11 19:48:53 +02:00
xmrig
f7d1d50a25 Merge pull request #1729 from SChernykh/evo
KawPow: fixed crash on old CPUs
2020-06-11 03:03:47 +07:00
SChernykh
dc0aee1432 KawPow: fixed crash on old CPUs
- Use `popcnt` instruction only when it's supported
2020-06-10 21:49:43 +02:00
SChernykh
e4c8714daa Merge remote-tracking branch 'upstream/evo' into evo 2020-06-10 20:55:59 +02:00
XMRig
b974f1dc73 Merge branch 'dev' into evo 2020-06-10 23:15:27 +07:00
XMRig
1b928e8bf1 #1728 Fixed x86 crash on Windows. 2020-06-10 23:09:11 +07:00
SChernykh
8ac03a0d89 Merge remote-tracking branch 'upstream/evo' into evo 2020-06-10 08:19:36 +02:00
XMRig
69a6111a4f Merge branch 'dev' into evo 2020-06-10 00:58:29 +07:00
XMRig
78476c5da0 Merge branch 'beta' into evo 2020-06-10 00:56:47 +07:00
XMRig
e4779ab6ca v5.11.4-dev 2020-06-10 00:55:15 +07:00
XMRig
1c63a8e7c3 Merge branch 'master' into dev 2020-06-10 00:49:58 +07:00
xmrig
f42a100937 Merge pull request #1726 from SChernykh/dev
Fixed detection of AVX2/AVX512
2020-06-09 23:07:45 +07:00
SChernykh
2d2f3d4eb2 Fixed detection of AVX2/AVX512 2020-06-09 17:47:23 +02:00
xmrig
3472bd9f02 Merge pull request #1725 from SChernykh/dev
Disabled AVX-512F for Argon2
2020-06-09 19:16:38 +07:00
SChernykh
8c979d3bc7 Disabled AVX-512F for Argon2
See #1722
2020-06-09 13:53:14 +02:00
XMRig
11ed37ea63 v6.2.0-beta 2020-06-09 00:18:22 +07:00
XMRig
1afec10c7c Merge branch 'evo' into beta 2020-06-09 00:17:58 +07:00
XMRig
12728649ff v5.11.3 2020-06-09 00:16:33 +07:00
XMRig
fa2461ba73 Merge branch 'dev' 2020-06-09 00:15:50 +07:00
xmrig
7ec14f249d Update CHANGELOG.md 2020-06-08 02:12:01 +07:00
XMRig
e2a5b40793 Merge branch 'dev' into evo 2020-06-08 02:08:43 +07:00
xmrig
d30bf207e9 Update CHANGELOG.md 2020-06-08 02:00:22 +07:00
XMRig
dbc8e20e53 Merge branch 'dev' into evo 2020-06-07 21:25:31 +07:00
xmrig
2170b58b6f Merge pull request #1720 from SChernykh/dev
Fixed GCC 10.1 issues
2020-06-07 21:24:15 +07:00
SChernykh
75c57f7563 Fixed GCC 10.1 issues
- Fixed uninitialized `state->x` warning
- Fixed broken code with `-O3` or `-Ofast`
2020-06-07 16:23:17 +02:00
SChernykh
baa3384d12 Fixed GCC 10.1 issues
- Fixed uninitialized `state->x` warning
- Fixed broken code with `-O3` or `-Ofast`
2020-06-07 16:16:09 +02:00
XMRig
5e1199ea48 Merge branch 'dev' into evo 2020-06-07 20:15:12 +07:00
XMRig
5c5d841776 Merge branch 'noexecstack' of https://github.com/gentoo-monero/xmrig into dev 2020-06-07 20:11:37 +07:00
Matt Smith
a28bddcbdf Stop linker from making stack executable
Add .note.GNU-stack section to end of AstroBWT ASM.

Signed-off-by: Matt Smith <matt@offtopica.uk>
2020-06-07 13:57:37 +01:00
XMRig
0bfe501dac Add "cn/conceal" alias for hashvault.pro pool. 2020-06-07 15:22:05 +07:00
XMRig
3f237ae348 v6.2.0-evo 2020-06-07 15:13:46 +07:00
XMRig
f4f88ea1f7 Merge branch 'beta' into evo 2020-06-07 15:10:13 +07:00
xmrig
0e7bf5913b Merge pull request #1717 from SChernykh/evo
Conceal (CCX) support
2020-06-07 15:09:19 +07:00
SChernykh
7f00cb59d2 Conceal (CCX) support 2020-06-07 01:01:45 +02:00
XMRig
2198beff59 v6.0.1-beta 2020-06-06 15:09:41 +07:00
XMRig
0b304c1584 Merge branch 'evo' into beta 2020-06-06 15:08:53 +07:00
xmrig
5ea0de2410 Update CHANGELOG.md 2020-06-06 15:08:01 +07:00
XMRig
958224255a Merge branch 'evo' of github.com:xmrig/xmrig into evo 2020-06-06 00:25:41 +07:00
XMRig
ea72052f50 #1708 Added "title" option. 2020-06-06 00:24:58 +07:00
xmrig
9a02caf248 Update CHANGELOG.md 2020-06-05 19:45:31 +07:00
XMRig
33bfecd49b Merge branch 'pr1713' into evo 2020-06-05 19:17:48 +07:00
XMRig
f18bfeb77d Merge branch 'evo' of https://github.com/SChernykh/xmrig into pr1713 2020-06-05 19:17:01 +07:00
XMRig
ba017708bb Add tag to error message. 2020-06-05 19:02:32 +07:00
SChernykh
0dbf41f761 Reduced memory for KawPow 2020-06-05 14:01:49 +02:00
xmrig
936670f0fd Merge pull request #1711 from SChernykh/evo
Print errors from KawPow DAG initialization
2020-06-05 15:55:42 +07:00
SChernykh
ba405d1984 Print errors from KawPow DAG initialization 2020-06-05 09:33:36 +02:00
XMRig
e17f686d4f v6.0.1-evo 2020-06-05 00:42:48 +07:00
XMRig
74aff6b8f4 Merge branch 'beta' into evo 2020-06-05 00:40:53 +07:00
XMRig
4f74675a19 Merge branch 'evo' into beta 2020-06-03 20:31:33 +07:00
XMRig
4209aeb94d Change API version for CUDA plugin. 2020-06-03 19:01:21 +07:00
xmrig
9a98c31514 Update CHANGELOG.md 2020-06-03 02:07:39 +07:00
xmrig
fdbb2debd8 Update ALGORITHMS.md 2020-06-02 00:59:08 +07:00
xmrig
958f50c372 Update ALGORITHMS.md 2020-06-02 00:57:10 +07:00
XMRig
bbd3f05bf6 Implemented donate for KawPow. 2020-06-01 00:56:26 +07:00
xmrig
dd8777c11b Merge pull request #1705 from SChernykh/evo
KawPow: reduced stale/expired shares
2020-05-31 23:58:22 +07:00
SChernykh
9cbdb7f1f2 KawPow: reduced stale/expired shares 2020-05-31 18:22:21 +02:00
XMRig
95ef32c913 Network code cleanup 2020-05-30 03:06:19 +07:00
XMRig
6370d71ebe Network code cleanup (WIP). 2020-05-30 01:22:22 +07:00
XMRig
169fad3a5c Fix compile warnings. 2020-05-29 20:02:57 +07:00
xmrig
2fae0e1319 Merge pull request #1703 from SChernykh/evo
KawPow: fixed switch back from dev donate
2020-05-29 18:16:54 +07:00
SChernykh
297ff13810 Tuned KawPow OpenCL kernel
Removed unnecessary memory barrier.
2020-05-29 13:10:24 +02:00
SChernykh
77a7f144c0 KawPow: fixed switch back from dev donate 2020-05-29 10:49:22 +02:00
xmrig
aa101b6e00 Merge pull request #1702 from SChernykh/evo
Added missing listener callbacks to EthStratumClient
2020-05-29 13:42:13 +07:00
SChernykh
4edcaa03be Update EthStratumClient.cpp 2020-05-29 08:39:03 +02:00
SChernykh
9864ba8696 Added listener verify callback 2020-05-29 08:36:59 +02:00
SChernykh
bdbb7f891f Fixed stratum login notification 2020-05-29 08:31:53 +02:00
xmrig
06809df4a0 Merge pull request #1700 from SChernykh/evo
Fixed hashrate and diff display for KawPow
2020-05-29 13:14:14 +07:00
SChernykh
c9730faa49 Hashrate display fixes 2020-05-28 22:23:31 +02:00
SChernykh
2e3d087750 Merge remote-tracking branch 'upstream/evo' into evo 2020-05-28 22:06:10 +02:00
SChernykh
6676126376 Fixed hashrate and diff display for KawPow 2020-05-28 22:03:28 +02:00
XMRig
eb1ed497e7 Log cleanup. 2020-05-29 02:11:29 +07:00
xmrig
32442db099 Merge pull request #1699 from SChernykh/evo
KawPow fix for retarted AMD OpenCL compiler
2020-05-29 01:32:47 +07:00
SChernykh
734f142b47 KawPow fix for retarted AMD OpenCL compiler 2020-05-28 20:27:25 +02:00
xmrig
340437b6d2 Merge pull request #1698 from SChernykh/evo
KawPow performance fix for AMD Navi
2020-05-28 23:31:13 +07:00
SChernykh
fb0ce0bf61 KawPow performance fix for AMD Navi 2020-05-28 18:28:23 +02:00
XMRig
7a3233ab4b Use long tags. 2020-05-28 20:32:41 +07:00
xmrig
0ad4257113 Merge pull request #1697 from SChernykh/evo
KawPow: tuned work group size for OpenCL
2020-05-28 16:58:18 +07:00
SChernykh
e3d727cdb6 KawPow: tuned work group size for OpenCL 2020-05-28 10:58:06 +02:00
XMRig
df24b25b64 Fixed code style. 2020-05-27 23:30:17 +07:00
XMRig
c3c475cdcc v6.0.0-evo 2020-05-27 22:19:07 +07:00
XMRig
15000e2c22 Fix Linux build. 2020-05-27 22:08:23 +07:00
xmrig
def045adda Merge pull request #1694 from SChernykh/evo
KawPow support
2020-05-27 22:05:46 +07:00
SChernykh
22b937cc1c KawPow WIP 2020-05-27 16:19:57 +02:00
XMRig
07025dc41b Merge branch 'dev' into evo 2020-05-23 14:36:27 +07:00
XMRig
e6e1028017 v5.11.3-dev 2020-05-23 12:02:32 +07:00
XMRig
5c4cdfd80c Merge branch 'master' into dev 2020-05-23 12:01:58 +07:00
XMRig
636b2e3cfa v5.11.2 2020-05-23 11:10:09 +07:00
XMRig
0a7324f500 Merge branch 'dev' 2020-05-23 11:08:53 +07:00
xmrig
532520f626 Update CHANGELOG.md 2020-05-23 11:06:35 +07:00
xmrig
5905dd63cc Update CHANGELOG.md 2020-05-23 10:58:53 +07:00
XMRig
52e2890824 Update hwloc for MSVC builds. 2020-05-22 20:47:12 +07:00
XMRig
0d7820f61a Update build scripts. 2020-05-22 19:14:38 +07:00
xmrig
65dc8f3d85 Update CHANGELOG.md 2020-05-22 12:00:18 +07:00
xmrig
e4aa1fad3f Merge pull request #1675 from ybh1998/master
Fix Windows include files cases
2020-05-13 23:32:21 +07:00
Bohan Yu
a797d808b5 Change cases of Windows include file and link library
When cross-compiling on case sensitive systems, such as Linux, there will be an Error.
2020-05-13 21:00:52 +08:00
XMRig
2e34bf7a1b Removed unnecessary check. 2020-05-09 01:36:57 +07:00
XMRig
7f31f45b6d Fix build. 2020-05-09 01:26:05 +07:00
XMRig
3cbf0dc0ee Removed code duplicate. 2020-05-09 01:13:46 +07:00
XMRig
85af4e27ec Fix ARM build. 2020-05-08 23:42:53 +07:00
XMRig
a7caf4cc66 Fix build. 2020-05-08 23:05:44 +07:00
XMRig
628506e266 ICpuInfo refactoring. 2020-05-08 22:25:13 +07:00
XMRig
39ae24b138 Fix memory leak. 2020-05-05 16:05:50 +07:00
XMRig
dd7789763f Fix MSVC build. 2020-05-05 02:06:49 +07:00
XMRig
c828e6b793 Code cleanup. 2020-05-05 01:55:00 +07:00
XMRig
4326ba3c38 Add prefixes to argon2 to avoid potential conflicts with other implementations. 2020-05-04 18:09:34 +07:00
XMRig
b34e3e1a7b Remove unused code. 2020-05-04 02:07:38 +07:00
xmrig
29966fb491 Merge pull request #1668 from SChernykh/dev
Optimized RandomX dataset initialization
2020-05-04 01:55:06 +07:00
SChernykh
80d944bf82 Optimized RandomX dataset initialization
- Use single Argon2 implemenation
- Auto-select the fastest Argon2 implementation for RandomX
2020-05-03 20:44:59 +02:00
XMRig
c18478a6b4 Small cleanups. 2020-05-03 13:38:34 +07:00
XMRig
a0eb766238 Merge branch 'base-update' into dev 2020-05-03 13:32:12 +07:00
XMRig
781f08a034 Remove code duplication. 2020-04-29 17:40:51 +07:00
XMRig
d33c91684d Fixed MSYS build. 2020-04-29 16:29:30 +07:00
xmrig
bbee212970 Merge pull request #1664 from SChernykh/dev
Improved JSON config error reporting
2020-04-29 16:23:49 +07:00
SChernykh
05d3f17f15 Improved JSON config error reporting
Show incorrect lines in config.json together with line number and position.
2020-04-29 11:08:45 +02:00
XMRig
8aeba61706 Add 3rdparty prefix to all rapidjson includes. 2020-04-29 14:55:04 +07:00
XMRig
46e49cde0b Update base. 2020-04-29 14:17:33 +07:00
XMRig
b38046db46 v5.11.2-dev 2020-04-23 14:32:13 +07:00
XMRig
72861e353b Merge branch 'master' into dev 2020-04-23 14:31:41 +07:00
XMRig
a8e91bb888 Merge branch 'dev' 2020-04-23 12:46:41 +07:00
XMRig
0cc90b152d Move CnAlgo 2020-04-23 12:34:26 +07:00
XMRig
11ac59331f #1654 Fixed build with LibreSSL. 2020-04-22 14:49:15 +07:00
XMRig
ca7ff4e90b Fixed memory leak in some conditions. 2020-04-22 10:16:54 +07:00
XMRig
0e7036cf24 Fixed bug in log. 2020-04-22 09:04:48 +07:00
xmrig
c8c874dadf Merge pull request #1652 from SChernykh/dev
Refactored CFROUND
2020-04-22 00:18:13 +07:00
SChernykh
bfd017d064 Refactored CFROUND 2020-04-21 15:44:04 +02:00
XMRig
37f44b4da5 Fixed keepalive extension for initial login response. 2020-04-19 04:34:43 +07:00
XMRig
2da551e1e9 v5.11.1-dev 2020-04-14 03:24:10 +07:00
XMRig
fb4b4a56e2 v5.11.0 2020-04-13 20:13:46 +07:00
XMRig
b025bca185 Merge branch 'dev' 2020-04-13 20:13:19 +07:00
XMRig
87bb1aa4d3 #1643 Fixed build on CentOS 7 2020-04-12 20:37:58 +07:00
XMRig
2d95a394a6 Code cleanup. 2020-04-12 19:50:11 +07:00
XMRig
9634907676 Fixed build with old Clang. 2020-04-12 19:41:25 +07:00
xmrig
d27647e408 Update CHANGELOG.md 2020-04-12 19:26:27 +07:00
XMRig
9c9e7fa998 v5.11.0-dev 2020-04-12 19:02:37 +07:00
xmrig
1a495e351c Merge pull request #1641 from SChernykh/dev
RandomX JIT refactoring
2020-04-09 19:34:31 +07:00
SChernykh
680e4dd865 Fix code style 2020-04-09 14:31:42 +02:00
SChernykh
abb3340cc7 RandomX JIT refactoring
- Smaller memory footprint
- A bit faster overall
2020-04-09 14:24:54 +02:00
xmrig
70a3a83c26 Merge pull request #1635 from SChernykh/dev
Pooled allocation of RandomX VMs
2020-04-08 17:04:25 +07:00
SChernykh
92810ad761 Fixed VM destruction 2020-04-08 08:31:53 +02:00
SChernykh
39bd3ca1da Fix off-by-one error 2020-04-07 18:53:08 +02:00
SChernykh
4d0edde66d Fixed pool lock 2020-04-07 18:48:02 +02:00
SChernykh
69cbfd682a Use node number instead of affinity 2020-04-07 18:46:22 +02:00
SChernykh
6ae37a9519 Pooled allocation of RandomX VMs
+0.5% speedup on Zen2 when the whole L3 cache is used (16 threads on 3700X/3800X, 32 threads on 3950X).
2020-04-07 18:31:35 +02:00
XMRig
97305f11a8 Merge branch 'feature-astrobwt-cuda' into dev 2020-04-04 17:21:45 +07:00
XMRig
2e6c518a1c Code style cleanup 2020-04-04 17:19:23 +07:00
SChernykh
7f01c5c6f3 AstroBWT CUDA support 2020-04-04 11:05:44 +02:00
XMRig
f19b2f7248 Removed CnAlgo dependency from Algorithm class. 2020-04-03 00:25:41 +07:00
XMRig
914b7023a2 Code cleanup. 2020-04-02 21:19:39 +07:00
XMRig
4dddd3a44f Merge branch 'dev' of github.com:xmrig/xmrig into dev 2020-04-02 21:05:25 +07:00
XMRig
01236bc40b Added missing newline in --help output. 2020-03-25 04:03:18 +07:00
xmrig
618ca6525b Merge pull request #1605 from SChernykh/dev
Fixed AstroBWT OpenCL for NVIDIA GPUs
2020-03-25 03:58:07 +07:00
XMRig
c71ef8197f v5.10.1-dev 2020-03-25 03:56:01 +07:00
XMRig
1eccb9d66f Merge branch 'master' into dev 2020-03-25 03:55:15 +07:00
SChernykh
c0f7e881ba Fixed AstroBWT OpenCL for NVIDIA GPUs 2020-03-24 15:55:54 +01:00
XMRig
f9c65f3bbf Merge branch 'dev' 2020-03-23 05:38:43 +07:00
xmrig
f19fcb4407 Update CHANGELOG.md 2020-03-23 05:38:05 +07:00
XMRig
382bfb0957 Fixed gcc build. 2020-03-23 05:30:11 +07:00
xmrig
b7fbb28a47 Merge pull request #1602 from SChernykh/dev
AstroBWT OpenCL code
2020-03-23 05:24:49 +07:00
SChernykh
fbedf197ab AstroBWT OpenCL code 2020-03-22 22:36:21 +01:00
XMRig
fc68ed15bc v5.10.0 2020-03-23 04:10:35 +07:00
XMRig
53ac6f7ee7 Merge branch 'dev' 2020-03-23 04:08:57 +07:00
XMRig
50eb7ba2fd #1601 Fixed compatibility with OpenSSL 1.0.x. 2020-03-22 05:58:59 +07:00
XMRig
1b875fdabb Reduced memory consumption on network level. 2020-03-20 20:53:27 +07:00
xmrig
bb96684daf Update CHANGELOG.md 2020-03-19 03:39:12 +07:00
XMRig
1e88b8447f v5.10.0-dev 2020-03-18 20:10:12 +07:00
XMRig
5b610e4dfe Added TLS support for API and many other TLS related changes. 2020-03-18 20:09:11 +07:00
XMRig
92a258f142 Added command line option --astrobwt-avx2 2020-03-12 00:04:07 +07:00
xmrig
1986b45acd Merge pull request #1593 from SChernykh/dev
Fix MacOS compilation
2020-03-11 22:49:46 +07:00
SChernykh
539943c655 Fix MacOS compilation 2020-03-11 16:35:52 +01:00
xmrig
adb3c22e80 Merge pull request #1592 from SChernykh/dev
AVX2 optimized code for AstroBWT
2020-03-11 19:14:19 +07:00
SChernykh
e22f798085 AVX2 optimized code for AstroBWT
Added "astrobwt-avx2" parameter in config.json, it's turned off ("false") by default.

4-5% speedup on CPUs with proper AVX2 support (AMD Ryzen starting with Zen2, Intel Core starting with Haswell).

There will be no speedup on the following CPUs:

- Intel Pentium/Celeron don't support AVX2
- AMD Zen/Zen+ have only half-speed AVX

GCC compiled version is faster without AVX2, MSVC compiled version is faster with AVX2
2020-03-10 22:35:14 +01:00
XMRig
8698b73036 Added command line option --data-dir. 2020-03-10 15:57:47 +07:00
xmrig
64650bf121 Merge pull request #1590 from SChernykh/dev
Activate MSR mod only for RandomX algorithms
2020-03-10 01:15:13 +07:00
SChernykh
9405d8ed92 Activate MSR mod only for RandomX algorithms 2020-03-09 19:10:26 +01:00
XMRig
219f033647 "cn/gpu" algorithm now disabled by default and will be removed in next major release. 2020-03-09 01:45:18 +07:00
XMRig
16a83a9f61 Move files. 2020-03-09 01:22:34 +07:00
XMRig
abfed74af9 v5.9.1-dev 2020-03-08 22:27:35 +07:00
XMRig
ba4a11c619 Merge branch 'master' into dev 2020-03-08 22:26:46 +07:00
XMRig
f1b8351a63 v5.9.0 2020-03-08 13:09:51 +07:00
XMRig
a620dfc955 Merge branch 'dev' 2020-03-08 13:09:14 +07:00
XMRig
f1e688724e #1585 Fixed build without HTTP support. 2020-03-08 12:29:32 +07:00
XMRig
e8355e1a1c Sync changes with proxy. 2020-03-08 02:43:16 +07:00
XMRig
6cb27e9662 Added command line option --astrobwt-max-size 2020-03-08 00:13:47 +07:00
xmrig
5fee8ba288 Merge pull request #1584 from SChernykh/dev
Fixed invalid AstroBWT hashes after algo switching
2020-03-07 22:47:17 +07:00
SChernykh
b7840d9ab6 Fixed invalid AstroBWT hashes after algo switching 2020-03-07 16:41:33 +01:00
XMRig
d591832eea Merge branch 'feature-rx-keva' into dev 2020-03-07 21:29:29 +07:00
XMRig
13ac54ada9 v5.9.0-dev 2020-03-07 21:27:55 +07:00
XMRig
1f36ea2a8e Added "coin": "keva" and post PR cleanup. 2020-03-07 20:38:44 +07:00
XMRig
ab90af37b3 Merge branch 'master' of https://github.com/kevacoin-project/xmrig into feature-rx-keva 2020-03-07 17:13:08 +07:00
xmrig
88031650b4 Update README.md 2020-03-07 15:24:55 +07:00
XMRig
4a5493e12f Added the wizard suggestion. 2020-03-07 03:24:35 +07:00
XMRig
6a97aeaf1b v5.8.3-dev 2020-03-07 03:00:34 +07:00
XMRig
6ac3534fd5 Merge branch 'master' into dev 2020-03-07 02:59:53 +07:00
XMRig
e210067660 Merge branch 'dev' 2020-03-06 13:26:52 +07:00
xmrig
50c66083a7 Merge pull request #1582 from SChernykh/dev
Fixed compilation withut randomx/argon2
2020-03-06 13:24:49 +07:00
SChernykh
05dc9821c5 Fixed compilation withut randomx/argon2 2020-03-06 07:22:57 +01:00
XMRig
c623dc7c92 v5.8.2 2020-03-06 13:18:30 +07:00
XMRig
4a7897b8bc Merge branch 'dev' 2020-03-06 13:17:44 +07:00
xmrig
33a7530f9b Update CHANGELOG.md 2020-03-06 13:04:38 +07:00
XMRig
44f0daf384 Fixed Linux build. 2020-03-06 12:59:30 +07:00
XMRig
6a45d5dcc9 Update year. 2020-03-06 12:57:21 +07:00
XMRig
7bf12dc81f #1581 Fixed macOS build. 2020-03-06 12:51:16 +07:00
XMRig
2020b71eeb Merge branch 'feature-fetch' into dev 2020-03-06 12:45:13 +07:00
XMRig
cad5fef1ea HTTP subsystem refactoring. 2020-03-06 12:38:09 +07:00
kevacoin
56e88f57fb Fixed scratchpad L2/L3 bit, from 18, 21 to 17 and 20. 2020-03-05 11:23:49 -08:00
xmrig
bc09aa5ad0 Merge pull request #1580 from SChernykh/dev
AstroBWT 20-50% speedup
2020-03-05 18:26:19 +07:00
SChernykh
eeadea53e2 AstroBWT 20-50% speedup
Skips hashes with large stage 2 size. Added configurable `astrobwt-max-size` parameter, default value is 550, min 400, max 1200, optimal value ranges from 500 to 600 depending on CPU.

- Intel CPUs get 20-25% speedup
- 1st- and 2nd-gen Ryzens get 30% speedup
- 3rd-gen Ryzens get up to 50% speedup
2020-03-05 12:20:21 +01:00
kevacoin
0528ccd01e Added Keva. 2020-03-04 16:23:33 -08:00
XMRig
5486300db7 Code cleanup. 2020-03-04 21:00:49 +07:00
XMRig
b0dda2b5b3 http-parser updated to latest version. 2020-03-04 18:30:53 +07:00
XMRig
c80ef54b60 v5.8.2-dev 2020-03-04 12:31:27 +07:00
XMRig
31383861cd Merge branch 'master' into dev 2020-03-04 12:31:00 +07:00
XMRig
b2b18ce22d v5.8.1 2020-03-04 10:19:51 +07:00
XMRig
8496f5b631 Merge branch 'dev' 2020-03-04 10:19:14 +07:00
xmrig
ec17bc4d40 Update CHANGELOG.md 2020-03-04 00:08:38 +07:00
XMRig
5fa6a034d5 Formatting. 2020-03-04 00:06:20 +07:00
xmrig
24c25b7d2e Merge pull request #1575 from SChernykh/dev
Fixed new block detection for Dero solo mining
2020-03-04 00:03:12 +07:00
SChernykh
874cff3d51 Fixed new block detection for Dero solo mining 2020-03-03 17:53:19 +01:00
XMRig
297d884482 v5.8.1-dev 2020-03-03 23:12:13 +07:00
XMRig
26c72cd7d8 Merge branch 'master' into dev 2020-03-03 23:11:39 +07:00
XMRig
fa91cff515 v5.8.0 2020-03-03 12:09:10 +07:00
XMRig
f415814069 Merge branch 'dev' 2020-03-03 12:07:42 +07:00
xmrig
9cf78cf14b Update CHANGELOG.md 2020-03-03 10:07:44 +07:00
XMRig
8dc87576c5 Sync changes with proxy. 2020-03-01 14:04:58 +07:00
XMRig
f0db17be87 Move "Content-Type" header setting. 2020-03-01 12:57:19 +07:00
XMRig
616c52f266 #1572 Fix compile warning. 2020-03-01 11:59:53 +07:00
XMRig
5bad45925a v5.8.0-dev 2020-03-01 11:48:30 +07:00
XMRig
cdd9ea2496 Make "astrobwt" as primary user visible algorithm name. 2020-03-01 10:21:29 +07:00
SChernykh
14ef99ca67 AstroBWT algorithm (DERO) support
To test:

- Download https://github.com/deroproject/derosuite/releases/tag/AstroBWT
- Run daemon with `--testnet` in command line

In config.json:
- "coin":"dero"
- "url":"127.0.0.1:30306"
- "daemon:"true"
2020-02-29 22:41:24 +01:00
XMRig
2cd45a9e38 v5.7.1-dev 2020-02-25 15:25:31 +07:00
XMRig
a070035d97 Merge branch 'master' into dev 2020-02-25 15:24:51 +07:00
XMRig
012d7124cd v5.7.0 2020-02-25 05:41:43 +07:00
XMRig
cde1e2c5f3 Merge branch 'dev' 2020-02-25 05:41:12 +07:00
XMRig
ead441f5db Optimize file log. 2020-02-23 06:52:23 +07:00
xmrig
031e09fede Update CHANGELOG.md 2020-02-23 03:26:25 +07:00
XMRig
1ee27a564b HTTP subsystem refactoring, fixed possible crashes shortly after destroying daemon or self-select client. 2020-02-23 01:40:19 +07:00
XMRig
23c51c9a11 Fixed regression. 2020-02-22 04:51:37 +07:00
xmrig
f9e653ea9f Merge pull request #1563 from SChernykh/dev
Optimized CFROUND
2020-02-22 01:45:52 +07:00
SChernykh
131085be80 Optimized CFROUND
Shorter version using BMI2 instructionns
2020-02-21 19:00:58 +01:00
xmrig
12081e4f5b Merge pull request #1562 from SChernykh/dev
Fixed 32-bit compilation
2020-02-21 22:09:21 +07:00
SChernykh
e1b8f52e59 Fixed 32-bit compilation 2020-02-21 16:08:23 +01:00
XMRig
6dad42a4db v5.7.0-dev 2020-02-21 21:58:41 +07:00
xmrig
799d95d67a Update CHANGELOG.md 2020-02-21 21:51:29 +07:00
xmrig
b131c60f08 Merge pull request #1560 from SChernykh/dev
Tuned JIT compiler
2020-02-21 03:04:12 +07:00
SChernykh
1e2e247789 Merge branch 'dev' of https://github.com/SChernykh/xmrig into dev 2020-02-20 20:59:25 +01:00
SChernykh
0caeb41bff Tuned JIT compiler
0.3-0.4% speedup depending on CPU.
2020-02-20 20:59:22 +01:00
XMRig
fd0cbd448b Use "extra_nonce" for daemon client. 2020-02-21 01:31:22 +07:00
XMRig
bdf6e87dc5 Update default config example. 2020-02-19 01:28:13 +07:00
xmrig
88c7aca6f5 Merge pull request #1557 from SChernykh/dev
Refactored fma_soft() in randomx_vm.cl
2020-02-19 00:28:17 +07:00
SChernykh
887c891ab2 Refactored fma_soft() in randomx_vm.cl
Fixes #1554 (hopefully)
2020-02-18 18:19:03 +01:00
XMRig
2bc5fb10a7 Added "-x" and "--proxy" command line options. 2020-02-18 21:42:01 +07:00
XMRig
8497e9c54f Merge branch 'feature-socks5' into dev 2020-02-18 20:38:07 +07:00
XMRig
2e07e69697 Added IPv4 and IPv6 support for SOCKS5. 2020-02-18 19:24:49 +07:00
XMRig
2fea4e72b5 Implemented donate over SOCKS5. 2020-02-18 17:58:14 +07:00
xmrig
2863ade0c2 Merge pull request #1555 from SChernykh/dev
Fix crash when share is found before pool login
2020-02-18 02:26:40 +07:00
SChernykh
fb0b638cbb Fix crash when share is found before pool login 2020-02-17 20:22:09 +01:00
XMRig
1e2d011705 Initial SOCKS5 implementation. 2020-02-18 02:16:21 +07:00
XMRig
dfaca04167 v5.6.1-dev 2020-02-16 16:13:05 +07:00
XMRig
33b1d5f4b3 Merge branch 'master' into dev 2020-02-16 15:49:11 +07:00
XMRig
2499822106 v5.6.0 2020-02-15 21:24:56 +07:00
XMRig
9fe9e8989d Merge branch 'dev' 2020-02-15 21:23:59 +07:00
XMRig
311d3e1c18 Fixed wrong OpenCL platform on macOS. 2020-02-15 04:32:32 +07:00
XMRig
5e444553b1 Fixed build without NVML. 2020-02-15 04:07:11 +07:00
XMRig
16f011a47f v5.6.0-dev 2020-02-15 03:08:08 +07:00
xmrig
488049e695 Update CHANGELOG.md 2020-02-15 03:06:45 +07:00
XMRig
d23e5e15ba Added AMD GPUs health information for Linux (via sysfs). 2020-02-14 23:37:44 +07:00
XMRig
5ad52192fe Update year. 2020-02-14 02:41:21 +07:00
xmrig
937dc7b7c3 Merge pull request #1551 from SChernykh/dev
Added RandomX JIT for AMD Navi GPUs
2020-02-14 02:32:21 +07:00
SChernykh
7fa5e8706e Added RandomX JIT for AMD Navi GPUs 2020-02-13 20:15:08 +01:00
XMRig
2f27d5d108 Added printHealth to IBackend interface. 2020-02-14 01:11:53 +07:00
XMRig
56f23db878 Added ADL support for Windows. 2020-02-14 00:16:32 +07:00
xmrig
264e3928c2 Merge pull request #1546 from SChernykh/dev
Fixed generic OpenCL code for AMD Navi
2020-02-11 17:12:18 +07:00
SChernykh
ef629ba0d0 Fixed generic OpenCL code for AMD Navi 2020-02-10 22:00:40 +01:00
XMRig
aacdbc360b Merge branch 'bug-nonce-overflow' into dev 2020-02-06 22:00:53 +07:00
XMRig
e2e37c8cfb Fixed nicehash nonce overflow for GPU backends. 2020-02-06 22:00:03 +07:00
XMRig
c307433900 Fixed nicehash nonce overflow for CPU backend. 2020-02-06 17:19:08 +07:00
XMRig
97e6a6669f Merge branch 'network-stats' into dev 2020-02-05 18:44:43 +07:00
xmrig
e8f5cc67f8 Merge pull request #1536 from SChernykh/dev
Workaround for new AMD drivers (OpenCL)
2020-02-05 17:37:14 +07:00
SChernykh
8f9c1dd781 Workaround for new AMD drivers (OpenCL) 2020-02-04 23:11:46 +01:00
XMRig
60634366c1 v5.5.4-dev 2020-02-03 00:07:03 +07:00
XMRig
78bd280666 Merge branch 'master' into dev 2020-02-03 00:06:32 +07:00
XMRig
217540296f v5.5.3 2020-02-02 23:40:26 +07:00
XMRig
7eaabd4e00 Merge branch 'dev' 2020-02-02 23:39:49 +07:00
xmrig
ff59f3dbb4 Update CHANGELOG.md 2020-02-02 23:38:54 +07:00
xmrig
9c8da1d4d3 Merge pull request #1529 from SChernykh/dev
Crash fix for Bullodzer CPUs
2020-02-02 23:19:49 +07:00
SChernykh
ffc9f67751 Crash fix for Bullodzer CPUs 2020-02-02 17:16:59 +01:00
XMRig
bf1a0a0b83 v5.5.2 2020-02-02 13:30:29 +07:00
XMRig
f864687a96 Merge branch 'dev' 2020-02-02 13:29:13 +07:00
XMRig
030d6e5962 Update year. 2020-02-01 20:24:00 +07:00
xmrig
f609be6ec3 Update CHANGELOG.md 2020-02-01 18:47:11 +07:00
xmrig
aa4a4c9fd0 Merge pull request #1520 from SChernykh/dev
Fixed setThreadAffinity()
2020-01-29 17:48:37 +07:00
SChernykh
269d12d1be Fixed setThreadAffinity()
Added 1 ms sleep to guarantee thread rescheduling to the correct CPU core before returning.
2020-01-28 19:39:02 +01:00
xmrig
23a1ae0337 Merge pull request #1519 from SChernykh/dev
Removed MSR mod for Bulldozer
2020-01-27 22:20:21 +07:00
SChernykh
4571899664 Removed MSR mod for Bulldozer
It turned out to be useless: https://www.reddit.com/r/MoneroMining/comments/et7s7w/psa_amd_opteronfxa6a8a10_owners_needed_to_test/
2020-01-27 09:39:39 +01:00
xmrig
6d9b50b938 Merge pull request #1516 from SChernykh/dev
Fix compile error
2020-01-24 20:52:29 +07:00
SChernykh
cd763be05b Fix compile error 2020-01-24 14:09:07 +01:00
xmrig
4e6b24d67d Merge pull request #1515 from SChernykh/dev
Fix crash on Linux
2020-01-24 19:35:40 +07:00
SChernykh
42a7194e93 Fix crash on Linux 2020-01-24 13:34:12 +01:00
xmrig
01e063f6f5 Update CHANGELOG.md 2020-01-24 11:42:32 +07:00
xmrig
81e3f6e7d9 Merge pull request #1510 from SChernykh/dev
Optimized CFROUND
2020-01-23 12:49:13 +07:00
SChernykh
9f1753cc4f Optimized CFROUND 2020-01-22 20:11:00 +01:00
xmrig
39eafc3255 Merge pull request #1508 from SChernykh/dev
Added support for BMI2 instructions
2020-01-22 12:00:45 +07:00
SChernykh
d342968211 Added support for BMI2 instructions 2020-01-21 19:44:56 +01:00
XMRig
c5968e8896 New NetworkState. 2020-01-16 21:48:39 +07:00
xmrig
8e6f4d4ecb Merge pull request #1502 from SChernykh/dev
Optimizations for AMD Bulldozer
2020-01-15 20:26:06 +07:00
SChernykh
f80177cbd3 Optimizations for AMD Bulldozer
- Added support for XOP instructions
- Enabled Ryzen code for Bulldozer because it's faster there too
2020-01-15 13:04:26 +01:00
xmrig
32b0314990 Merge pull request #1501 from SChernykh/dev
MSR preset for Bulldozer CPUs
2020-01-15 08:57:14 +07:00
SChernykh
665e43fecc MSR preset for Bulldozer CPUs
Also fixed verbose output for MSR presets with masks.
2020-01-14 19:27:34 +01:00
xmrig
b5fb96dca0 Merge pull request #1500 from SChernykh/dev
JIT compiler: removed unnecessary memcpy from generateProgram()
2020-01-14 07:59:08 +07:00
SChernykh
73722ce186 JIT compiler: removed unnecessary memcpy from generateProgram() 2020-01-13 18:00:41 +01:00
XMRig
638ed7b4f2 v5.5.2-dev 2020-01-12 12:55:50 +07:00
XMRig
b5b12216d6 Merge branch 'master' into dev 2020-01-12 12:55:04 +07:00
xmrig
d2867a2ed8 Merge pull request #1495 from jtgrassie/missed-script-change
add intel change to boost script
2020-01-12 09:56:37 +07:00
Jethro Grassie
e290995999 add change to boost script 2020-01-11 21:42:48 -05:00
XMRig
9ae8907b3e v5.5.1 2020-01-12 08:34:01 +07:00
XMRig
a80f3e8190 Merge branch 'dev' 2020-01-12 08:32:16 +07:00
xmrig
b3d1ca6cb2 Update CHANGELOG.md 2020-01-12 07:43:29 +07:00
xmrig
0290b1ed3c Merge pull request #1493 from SChernykh/dev
Update MSR preset for Intel
2020-01-09 14:24:11 +07:00
SChernykh
869209389e Update MSR preset for Intel
As per https://github.com/xmrig/xmrig/issues/1433#issuecomment-572126184
2020-01-09 08:10:36 +01:00
XMRig
c6530e352f Code cleanup. 2020-01-07 10:13:01 +07:00
xmrig
706f588b36 Merge pull request #1489 from SChernykh/dev
JIT compiler tweaks
2020-01-07 02:41:40 +07:00
SChernykh
eb20dfbc94 JIT compiler tweaks 2020-01-06 13:57:48 +01:00
xmrig
f69ba3ea1d Update CHANGELOG.md 2020-01-03 19:54:28 +07:00
XMRig
88ff807700 Fix compile warnings. 2020-01-03 19:11:48 +07:00
XMRig
e76e75cdff Merge branch 'dev' of github.com:xmrig/xmrig into dev 2020-01-03 05:36:47 +07:00
XMRig
083c61754b Fixed unwanted resume after dataset change. 2020-01-03 05:36:22 +07:00
xmrig
146bbda33f Merge pull request #1477 from SChernykh/dev
Refactor Ryzen fix to fix compilation issues
2019-12-31 17:07:37 +07:00
SChernykh
c9f90e6770 Refactor Ryzen fix to fix compilation issues 2019-12-31 11:55:07 +02:00
xmrig
6a2a8579ae Merge pull request #1473 from SChernykh/dev
Auto-config for mobile Ryzen APUs
2019-12-31 02:36:30 +07:00
SChernykh
29dd2c2138 Cleanup 2019-12-30 20:55:03 +02:00
SChernykh
4e5aef0a8a Auto-config for mobile Ryzen APUs 2019-12-30 20:53:21 +02:00
XMRig
039c42b1fe v5.5.1-dev 2019-12-30 16:05:51 +07:00
XMRig
1e45349890 Merge branch 'master' into dev 2019-12-30 16:05:24 +07:00
XMRig
d64bbfa9c0 #1469 Fixed build with gcc 4.8. 2019-12-30 16:04:07 +07:00
XMRig
d5605a29b4 v5.5.0 2019-12-29 21:42:11 +07:00
XMRig
4c28fa6009 Merge branch 'dev' 2019-12-29 21:41:40 +07:00
XMRig
ad9ae6a143 Merge branch 'dev' of github.com:xmrig/xmrig into dev 2019-12-29 15:36:39 +07:00
XMRig
a5b0bc04cc Add "cn/ultra" alias for tlo-pool.raasu.org pool. 2019-12-29 15:36:05 +07:00
xmrig
f491e99bf9 Update CHANGELOG.md 2019-12-29 03:43:10 +07:00
XMRig
402c44b547 Added "cn-pico/tlo". 2019-12-29 00:29:19 +07:00
XMRig
ac4086b273 Fix build. 2019-12-28 02:00:08 +07:00
XMRig
f00769f758 Code style cleanup. 2019-12-28 01:45:54 +07:00
xmrig
6ceb4dfc4f Merge pull request #1465 from SChernykh/dev
Fix for 1st-gen Ryzen crashes
2019-12-27 18:26:26 +07:00
SChernykh
3a2941b719 Fix for 1st-gen Ryzen crashes 2019-12-27 12:40:38 +02:00
xmrig
99826a6b51 Update CHANGELOG.md 2019-12-27 15:03:24 +07:00
XMRig
4a9a7434f6 Revert Platform::setProcessPriority 2019-12-27 03:19:03 +07:00
XMRig
dbb721cb5e Removed "rx/v" algorithm. 2019-12-26 22:34:19 +07:00
xmrig
2a93bb2cee Update CHANGELOG.md 2019-12-25 05:01:19 +07:00
XMRig
7dfb4d9dc0 v5.5.0-dev 2019-12-25 04:53:38 +07:00
XMRig
22eca8e0d5 Fixed memory allocation checks. 2019-12-25 04:39:21 +07:00
XMRig
ecb46643e2 Added support for alternative CUDA plugin API. 2019-12-25 00:35:43 +07:00
xmrig
73d959a259 Update ALGORITHMS.md 2019-12-24 03:48:39 +07:00
XMRig
a95b179a60 Merge branch 'dev' of github.com:xmrig/xmrig into dev 2019-12-24 02:05:00 +07:00
XMRig
2e4a83547d Add console title for Windows. 2019-12-24 02:04:34 +07:00
xmrig
fd30294ca0 Merge pull request #1461 from suanlian1/patch-1
Monero already changed PoW on Nov 30, 2019
2019-12-24 01:07:44 +07:00
sairog
9b16a2736a Update README.md
Monero already changed PoW on Nov 30, 2019. Also minor text corrections.
2019-12-23 23:23:16 +05:30
XMRig
ea7aa4ccef Fixed MSVC build. 2019-12-23 00:37:43 +07:00
XMRig
d81845e1ab Merge branch 'feature-env' into dev 2019-12-23 00:29:38 +07:00
XMRig
f9d07229b4 Add extra variables. 2019-12-23 00:28:57 +07:00
XMRig
2d15c10e0f Added ENV support for "loader" option. 2019-12-22 19:48:33 +07:00
XMRig
5bd6a1c028 Added ENV support for "user", "pass" and "rig-id" fields. 2019-12-22 19:09:30 +07:00
XMRig
356e666e61 Added Env class. 2019-12-22 18:09:26 +07:00
XMRig
bdf12bca0f Make Process::location static. 2019-12-22 13:26:06 +07:00
XMRig
c44ae06d54 Added --randomx-no-rdmsr command line option. 2019-12-21 23:57:25 +07:00
XMRig
c7de9e6561 v5.4.1-dev 2019-12-21 23:42:18 +07:00
XMRig
00c9f89213 Merge branch 'master' into dev 2019-12-21 23:41:44 +07:00
XMRig
8f2a92c3ec v5.4.0 2019-12-21 16:12:02 +07:00
XMRig
69e67784d3 Merge branch 'dev' 2019-12-21 16:11:25 +07:00
xmrig
cd7f73a31c Update ALGORITHMS.md 2019-12-21 13:40:42 +07:00
XMRig
98cfe7ed37 Added extra error message. 2019-12-20 23:44:32 +07:00
XMRig
449617d717 Allow use old CUDA plugin. 2019-12-20 21:10:13 +07:00
xmrig
a25042db72 Update CHANGELOG.md 2019-12-20 04:16:28 +07:00
XMRig
049caabdae Add missing algorithm name alias. 2019-12-20 04:08:47 +07:00
XMRig
81b1cccb0b Merge branch 'Spudz76-dev-rxv' into dev 2019-12-20 04:06:25 +07:00
XMRig
2911bb3a81 Fix OpenCL. 2019-12-20 04:05:09 +07:00
Tony Butler
45412a2ace Add MoneroV (rx/v) algorithm [based on MoneroOcean/master] 2019-12-18 16:17:22 -07:00
XMRig
f4cedd7b63 Fixed MsrItem serialization. 2019-12-19 03:49:32 +07:00
XMRig
3e3d34b3ce Allow number value for "wrmsr" option only for Intel. 2019-12-19 03:28:05 +07:00
XMRig
12fb27e2cf Use MsrItem::kNoMask. 2019-12-19 03:20:48 +07:00
xmrig
a1e8c1353f Merge pull request #1443 from SChernykh/dev
Fixed crash with GCC compiler
2019-12-18 23:45:36 +07:00
SChernykh
c01c035269 Fixed crash with GCC compiler 2019-12-18 17:32:57 +01:00
xmrig
eeb8bbe5bc Merge pull request #1439 from SChernykh/dev
Add vzeroupper for processors with AVX
2019-12-18 18:32:17 +07:00
SChernykh
f85aba5d21 Fixed AVX detection 2019-12-18 12:20:21 +01:00
SChernykh
f8bf8fddd9 Update jit_compiler_x86_static.S 2019-12-18 09:13:21 +01:00
SChernykh
7459677fd5 Add vzeroupper for processors with AVX
To avoid false dependencies on upper 128 bits of YMM registers.
2019-12-18 09:12:25 +01:00
xmrig
c0b0628d59 Merge pull request #1438 from SChernykh/dev
Added bit masks for MSR registers
2019-12-18 11:44:06 +07:00
SChernykh
59e8fdb9ed Added bit masks for MSR registers 2019-12-17 23:55:22 +01:00
XMRig
5142a406b0 Less error prone log interface. 2019-12-18 02:20:31 +07:00
XMRig
3cc8b19ca0 Added command line option --verbose. 2019-12-17 22:03:50 +07:00
XMRig
f8865b1498 Added "verbose" option. 2019-12-17 21:46:11 +07:00
XMRig
969821296f Merge branch 'feature-custom-msr' into dev 2019-12-17 16:53:28 +07:00
XMRig
a877b1d269 Added save/restore MSR registers on Linux. 2019-12-17 16:17:11 +07:00
XMRig
9cea70b77c Rename Rx_windows.cpp to Rx_win.cpp. 2019-12-17 15:16:37 +07:00
XMRig
d2d501c821 Added RandomX option "rdmsr" and save/restore MSR registers on Windows. 2019-12-17 14:45:01 +07:00
XMRig
a5089638ea #1421 Added limit for maximum send buffer size. 2019-12-17 03:18:25 +07:00
XMRig
17f82280d0 v5.4.0-dev 2019-12-17 02:52:47 +07:00
xmrig
c78d800392 Merge pull request #1434 from SChernykh/dev
RandomSFX (Safex Cash variant) support
2019-12-17 02:46:26 +07:00
XMRig
8bef964f68 Added support for write custom MSR. 2019-12-17 02:27:07 +07:00
SChernykh
4da37baf8c RandomSFX (Safex Cash variant) support 2019-12-16 19:36:29 +01:00
XMRig
33e7a54c29 #1421 Use dynamic size send buffer. 2019-12-16 14:09:03 +07:00
XMRig
1d4c8dda96 #1423 Implemented driver reuse. 2019-12-16 03:41:58 +07:00
XMRig
b633b593ad Strict wrmsr error handling. 2019-12-16 02:45:07 +07:00
XMRig
8dbb83f99b Revert changes. 2019-12-16 02:17:57 +07:00
xmrig
f24e4f6462 Merge pull request #1424 from SChernykh/dev
Use unique service name for WinRing0 driver
2019-12-16 01:32:32 +07:00
SChernykh
2e001677df Use unique service name for WinRing0 driver
To avoid error 1072
2019-12-15 19:28:14 +01:00
XMRig
be253808d4 v5.3.1-dev 2019-12-16 00:17:08 +07:00
XMRig
e07cbe858b Merge branch 'master' into dev 2019-12-16 00:15:49 +07:00
xmrig
271a12dcca Update CHANGELOG.md 2019-12-15 15:39:52 +07:00
xmrig
06c70a7cd9 Merge pull request #1418 from jtgrassie/buffer-size
increase stratum send buffer size
2019-12-15 15:38:27 +07:00
XMRig
dccf7f9ae7 v5.3.0 2019-12-15 15:34:27 +07:00
XMRig
aa1f0077d8 Merge branch 'dev' 2019-12-15 15:33:51 +07:00
Jethro Grassie
348916040c increase stratum send buffer size 2019-12-15 03:23:07 -05:00
xmrig
014c80f15d Update CHANGELOG.md 2019-12-15 15:02:49 +07:00
XMRig
6adba6dad4 Removed unnecessary check. 2019-12-15 12:02:45 +07:00
XMRig
b346507975 Added enable_1gb_pages.sh 2019-12-15 03:13:52 +07:00
XMRig
fb5b873524 Added missing tag. 2019-12-15 01:52:20 +07:00
XMRig
a6f381403c Added WinRing0 driver binary. 2019-12-15 01:48:48 +07:00
XMRig
5d0fd2dc8e Unified Linux/Windows MSR log messages. 2019-12-15 01:32:41 +07:00
xmrig
1ad6b5504c Merge pull request #1416 from SChernykh/dev
Fixed thread count for MSR mod
2019-12-14 22:41:00 +07:00
SChernykh
222fcfae87 Fixed thread count for MSR mod 2019-12-14 16:30:46 +01:00
XMRig
5a2c3d8396 v5.3.0-dev 2019-12-14 22:30:41 +07:00
XMRig
687617de25 Merge branch 'master' into dev 2019-12-14 22:29:57 +07:00
xmrig
a682ae3299 Merge pull request #1414 from SChernykh/dev
MSR mod for Windows
2019-12-14 22:12:08 +07:00
SChernykh
2e6523aa10 MSR mod for Windows 2019-12-14 16:04:37 +01:00
XMRig
29591609f5 v5.2.1 2019-12-14 13:15:19 +07:00
XMRig
b15da20f9c Merge branch 'dev' 2019-12-14 13:14:09 +07:00
xmrig
8f2f3d73df Update CHANGELOG.md 2019-12-14 02:27:19 +07:00
XMRig
7d7459100b Removed extra space. 2019-12-13 00:38:07 +07:00
xmrig
8a0c8d9709 Merge pull request #1408 from SChernykh/dev
RandomX boost script for Linux
2019-12-13 00:32:03 +07:00
SChernykh
8592561b7a RandomX boost script for Linux 2019-12-12 18:25:28 +01:00
XMRig
7ff465053b Added additional MSR registers for Ryzen CPUs. 2019-12-12 14:21:15 +07:00
XMRig
c62ac89081 Fixed potential division by 0. 2019-12-12 14:09:18 +07:00
XMRig
1c58e28124 Don't build Rx_linux.cpp on ARM. 2019-12-11 21:20:37 +07:00
XMRig
96ee721d21 Fixed MSR. 2019-12-11 20:09:25 +07:00
XMRig
de7ed2b968 Added support for AMD specific MSR registers. 2019-12-11 19:37:13 +07:00
XMRig
4fb3086c1c Fixed --randomx-wrmsr option without parameters. 2019-12-11 19:16:01 +07:00
XMRig
5ab17fcd46 v5.2.1 2019-12-11 17:58:44 +07:00
XMRig
ff1849b63b Merge branch 'master' into dev 2019-12-11 17:58:03 +07:00
xmrig
9db3fb280e Update CHANGELOG.md 2019-12-11 16:22:05 +07:00
XMRig
06e105821a v5.2.0 2019-12-11 14:06:53 +07:00
XMRig
a0046e325c Merge branch 'dev' 2019-12-11 14:06:21 +07:00
xmrig
e84bad4eca Update CHANGELOG.md 2019-12-11 13:41:48 +07:00
XMRig
fc5b339f04 Added new screenshot. 2019-12-11 13:15:31 +07:00
XMRig
96cfdda9a1 Added RandomX option "wrmsr" with command line equivalent --randomx-wrmsr=N. 2019-12-10 23:57:29 +07:00
XMRig
3b4b230cab Added CPU vendor enum. 2019-12-10 12:49:42 +07:00
XMRig
6163d27f14 Added command line option --randomx-1gb-pages 2019-12-10 11:56:31 +07:00
xmrig
f3f75fb788 Update CHANGELOG.md 2019-12-10 11:19:11 +07:00
xmrig
d07a806123 Merge pull request #1401 from SChernykh/dev
More optimizations for Ryzen
2019-12-10 09:55:52 +07:00
SChernykh
ef522f6404 Update jit_compiler_x86_static.S 2019-12-09 20:30:37 +01:00
SChernykh
763691fa4b More optimizations for Ryzen 2019-12-09 20:29:05 +01:00
xmrig
2491149d61 Merge pull request #1400 from SChernykh/dev
Fixed assembly selection for RandomX when it's on Auto
2019-12-10 01:01:12 +07:00
SChernykh
9bc13813ba Fixed assembly selection for RandomX when it's on Auto 2019-12-09 18:59:49 +01:00
XMRig
3edaebb4cf Move "1gb-pages" option to "randomx" object. 2019-12-09 21:42:40 +07:00
XMRig
558c524e2a Added missing Cpu::release call. 2019-12-09 01:07:42 +07:00
XMRig
d6582de09b v5.2.0-dev 2019-12-08 23:23:03 +07:00
XMRig
d32df84ca5 Memory allocation refactoring. 2019-12-08 23:17:39 +07:00
xmrig
8a13e0febd Merge pull request #1397 from SChernykh/dev
Fix GCC compilation
2019-12-08 22:52:18 +07:00
SChernykh
028b335bac Fix GCC compilation 2019-12-08 16:51:37 +01:00
xmrig
d7d09159c1 Merge pull request #1396 from SChernykh/dev
Optimized dataset read for Ryzen CPUs
2019-12-08 22:24:26 +07:00
SChernykh
ffec421408 Fixed indentation 2019-12-08 16:20:46 +01:00
SChernykh
d0df824599 Optimized dataset read for Ryzen CPUs
Removed register dependency in dataset read, +0.8% speedup on average.
2019-12-08 16:14:02 +01:00
XMRig
4dec063472 Fix summary. 2019-12-08 14:30:44 +07:00
XMRig
86e25a13e3 New summary information about 1GB pages. 2019-12-08 14:21:28 +07:00
XMRig
91b50f1ac8 Added os.cmake 2019-12-08 13:30:26 +07:00
XMRig
8ef3e2ec14 Fixed build without hwloc. 2019-12-08 10:20:23 +07:00
XMRig
e9e747f0d1 #1385 "max-threads-hint" option now also limit RandomX dataset initialization threads. 2019-12-07 22:18:06 +07:00
XMRig
3a75f39935 #1386 Added priority for RandomX dataset initialization threads. 2019-12-06 22:17:04 +07:00
xmrig
529f394c02 Merge pull request #1391 from SChernykh/dev
Fixed compilation on systems without 1GB pages support
2019-12-06 19:58:48 +07:00
SChernykh
e3422979d1 Fixed compilation on systems without 1GB pages support 2019-12-06 13:55:33 +01:00
xmrig
bf248caa47 Merge pull request #1390 from SChernykh/dev
Fix ARM compilation
2019-12-06 19:48:58 +07:00
SChernykh
aa3dc75434 Fix ARM compilation 2019-12-06 13:43:59 +01:00
XMRig
118b2e4a68 Updated libuv version in build_deps.sh. 2019-12-06 18:39:14 +07:00
XMRig
f1827e925e Removed strdup from FileLog. 2019-12-06 11:56:13 +07:00
XMRig
b8762ed428 #1306 Added some network workarounds. 2019-12-06 10:56:43 +07:00
xmrig
38d20ea5f4 Merge pull request #1388 from SChernykh/dev
1GB hugepages support for Linux
2019-12-06 07:58:00 +07:00
SChernykh
1fbbae1e4a Added 1GB hugepages support for Linux 2019-12-05 19:39:47 +01:00
SChernykh
caa2da8bb3 Merge remote-tracking branch 'upstream/dev' into dev 2019-12-05 16:33:45 +01:00
xmrig
66734c7d3f Update issue templates 2019-12-05 20:24:38 +07:00
XMRig
a066f9a49c hwloc for MSVC updated to v2.1.0. 2019-12-05 12:47:31 +07:00
XMRig
99d995fdab v5.1.2-dev 2019-12-05 12:16:05 +07:00
XMRig
381e907ca0 Merge branch 'master' into dev 2019-12-05 12:15:20 +07:00
XMRig
9126504c76 v5.1.1 2019-12-04 16:59:48 +07:00
XMRig
d0f88c6068 Merge branch 'dev' 2019-12-04 16:57:23 +07:00
SChernykh
a789316bbb Merge remote-tracking branch 'upstream/dev' into dev 2019-12-04 10:24:10 +01:00
xmrig
f9bbdeeff9 Update CHANGELOG.md 2019-12-04 10:52:35 +07:00
XMRig
a4d35065d9 Use normalize for load average values. 2019-12-04 10:25:26 +07:00
XMRig
901f1a7ab1 Option "yield" enabled by default and added command line option --cpu-no-yield. 2019-12-04 08:50:54 +07:00
SChernykh
450b9ec19a Update VirtualMemory_unix.cpp 2019-12-03 20:25:51 +01:00
XMRig
a556070b42 Removed unused code. 2019-12-03 21:11:27 +07:00
XMRig
05421057ae #1363 Fixed main thread priority. 2019-12-03 18:28:10 +07:00
XMRig
c3fd5835c3 Added CPU option "yield". 2019-12-03 09:04:20 +07:00
XMRig
cf48a34065 v5.1.1-dev 2019-12-03 08:37:08 +07:00
XMRig
6245f86d7c Merge branch 'master' into dev 2019-12-02 21:06:17 +07:00
XMRig
84ebf9d372 Merge branch 'dev' 2019-12-01 15:30:06 +07:00
xmrig
2d5a7b6aa8 Update CHANGELOG.md 2019-12-01 15:28:05 +07:00
xmrig
e9b51b7baa Merge pull request #1351 from SChernykh/dev
RandomX fixes
2019-12-01 14:55:22 +07:00
SChernykh
84d7eb05f3 RandomX fixes
Intel JCC erratum fix and various other improvements, see more here: https://www.phoronix.com/scan.php?page=article&item=intel-jcc-microcode&num=1
2019-12-01 08:46:35 +01:00
XMRig
41e374f0d9 #1329 Revert version in master branch. 2019-11-29 19:06:50 +07:00
xmrig
c53fa07d2b Update CHANGELOG.md 2019-11-29 13:54:30 +07:00
XMRig
8791261220 Use total memory (Linux report low free memory) and fix typo. 2019-11-29 13:43:26 +07:00
XMRig
c7d2639010 Changed memory print format. 2019-11-29 13:25:24 +07:00
XMRig
c529770d38 Use uv_get_free_memory. 2019-11-29 13:12:36 +07:00
XMRig
64fb4f265b Added option "mode" (or --randomx-mode) for RandomX. 2019-11-29 13:00:17 +07:00
XMRig
ca9a3063d8 v5.1.0-dev 2019-11-29 11:27:09 +07:00
XMRig
33f6b91146 Added total memory size to summary. 2019-11-29 11:06:28 +07:00
XMRig
ada99a6dd1 Added "resources" field to API. 2019-11-29 10:50:30 +07:00
XMRig
7d1be2d234 Code cleanup. 2019-11-29 10:17:05 +07:00
XMRig
2b87a10cf2 Fixed zero size buffers handling. 2019-11-28 07:28:28 +07:00
XMRig
d224c0e7d8 Minor changes, based on https://github.com/xmrig/xmrig-nvidia/pull/305 2019-11-28 05:14:17 +07:00
XMRig
921abd4623 #1309 Fixed null pointer dereference. 2019-11-24 00:53:58 +07:00
XMRig
6e7b440630 Merge branch 'dev' of github.com:xmrig/xmrig into dev 2019-11-21 15:45:12 +07:00
XMRig
cd723e32e8 #1307 Fixed incorrect job method for SelfSelectClient. 2019-11-21 15:44:39 +07:00
xmrig
b13d9a04eb Update CMAKE_OPTIONS.md 2019-11-21 04:53:12 +07:00
XMRig
258f936272 Merge branch 'dev' 2019-11-21 00:32:40 +07:00
XMRig
997f90dae7 Added PGP key and signed hashes for 5.0.1 release. 2019-11-21 00:27:50 +07:00
XMRig
5d559971ca Fixed isTLS method. 2019-11-20 15:36:02 +07:00
XMRig
8102526abc Added build_deps.sh for creating xmrig-deps on Linux. 2019-11-19 22:21:24 +07:00
XMRig
af30f8cd4b v5.0.2-dev 2019-11-19 03:59:46 +07:00
XMRig
4418ee743a Merge branch 'master' into dev 2019-11-19 03:56:49 +07:00
XMRig
fa18a75177 v5.0.1 2019-11-18 21:44:51 +07:00
XMRig
0e7c0e2903 Merge branch 'dev' 2019-11-18 21:43:18 +07:00
xmrig
f3c1435b01 Update CHANGELOG.md 2019-11-18 15:24:50 +07:00
XMRig
fb28b931cc Use static OpenSSL libs on macOS. 2019-11-16 18:56:34 +07:00
xmrig
dd980fde49 Update CMAKE_OPTIONS.md 2019-11-16 14:47:09 +07:00
xmrig
ca77fda511 Merge pull request #1290 from SChernykh/dev
Fix for 32-bit ARM compilation
2019-11-15 22:27:14 +07:00
SChernykh
e3f726796b Use XMRIG_ARMv8 macro 2019-11-15 16:12:26 +01:00
SChernykh
3953568a0e Fix for 32-bit ARM compilation 2019-11-15 16:00:48 +01:00
XMRig
f9bc3fb09b Fixed memory allocation on old low memory AMD GPUs. 2019-11-15 19:42:35 +07:00
xmrig
0497ab072b Update CHANGELOG.md 2019-11-15 18:19:43 +07:00
XMRig
5431601cef Don't print health report if CUDA backend disabled. 2019-11-15 18:09:09 +07:00
XMRig
aeb2c6e8ec #1285 Added command line options --cuda-bfactor-hint and --cuda-bsleep-hint. 2019-11-15 03:10:58 +07:00
XMRig
79f4685d9a Fixed wrong line ending in generated CL code. 2019-11-15 01:27:30 +07:00
XMRig
5fa7a743f5 #1284 Fixed build without RandomX. 2019-11-14 15:11:47 +07:00
XMRig
9124ed9348 v5.0.1-dev 2019-11-14 14:46:54 +07:00
XMRig
55133d03cf Merge branch 'master' into dev 2019-11-14 14:46:25 +07:00
XMRig
77eb79ced5 v5.0.0 2019-11-13 13:29:22 +07:00
XMRig
9d24d181d7 Merge branch 'dev' 2019-11-13 13:25:09 +07:00
XMRig
b011b935b4 Merge branch 'evo' into dev 2019-11-13 13:17:52 +07:00
XMRig
d807ba27a6 v5.0.0-evo 2019-11-13 12:22:02 +07:00
XMRig
7c4b76f3f7 v4.6.2-beta 2019-11-13 02:35:00 +07:00
XMRig
835228d9f7 Merge branch 'evo' into beta 2019-11-13 02:34:33 +07:00
XMRig
2847c814d2 v4.6.2-evo 2019-11-13 02:15:55 +07:00
xmrig
f77c4c67f2 Update CHANGELOG.md 2019-11-13 02:00:03 +07:00
XMRig
13d256e737 Merge branch 'beta' into evo 2019-11-13 00:41:58 +07:00
XMRig
ed4cfd55ac #1274 Added --cuda-devices command line option. 2019-11-13 00:40:22 +07:00
xmrig
f965fd5a8c Merge pull request #1277 from SChernykh/evo
Fix function names for clang on Apple
2019-11-12 20:45:48 +07:00
SChernykh
472ec1a0e6 Fix function names for clang on Apple 2019-11-12 14:42:21 +01:00
XMRig
74d62c92cd v4.6.1-beta 2019-11-10 22:10:51 +07:00
XMRig
7e47b04676 Merge branch 'evo' into beta 2019-11-10 22:10:15 +07:00
xmrig
d19c152d9a Update CHANGELOG.md 2019-11-10 22:09:18 +07:00
XMRig
2abea46a87 #1273 Fixed crash when use "GET /2/backends" API endpoint with disabled CUDA. 2019-11-10 22:05:52 +07:00
XMRig
e450e62b40 v4.6.1 2019-11-10 13:54:10 +07:00
XMRig
e6afd12d4f Merge branch 'beta' into evo 2019-11-10 13:28:26 +07:00
xmrig
2ba19c9827 Merge pull request #1272 from SChernykh/evo
Optimized hashrate calculation
2019-11-09 23:38:46 +07:00
SChernykh
426bc8f0c4 Optimized hashrate calculation 2019-11-09 17:29:12 +01:00
XMRig
f9f7567b17 v4.6.0-beta 2019-11-09 20:40:59 +07:00
XMRig
d2b3ffc710 Merge branch 'evo' into beta 2019-11-09 20:39:30 +07:00
xmrig
ed2f2c5a60 Update CHANGELOG.md 2019-11-09 20:36:29 +07:00
XMRig
c235145121 Make option "dataset_host" available only for RandomX. 2019-11-06 19:00:50 +07:00
xmrig
f8d1488e33 Merge pull request #1263 from SChernykh/evo
RandomX: added support for dataset on host
2019-11-06 17:53:06 +07:00
SChernykh
0013e610d5 Updated required API version 2019-11-05 23:27:15 +01:00
SChernykh
2c9b034c08 RandomX: added support for dataset on host 2019-11-05 22:24:48 +01:00
XMRig
455cdf96f0 v4.5.0-beta 2019-11-02 19:32:25 +07:00
XMRig
5519e97e6e Merge branch 'evo' into beta 2019-11-02 19:30:47 +07:00
xmrig
4c4a674a4b Update CHANGELOG.md 2019-11-02 04:22:57 +07:00
xmrig
239aecb0bb Update README.md 2019-11-02 04:08:07 +07:00
xmrig
b1e23b46dd Update README.md 2019-11-02 04:03:03 +07:00
XMRig
9d679462ed Sync changes with proxy. 2019-11-01 21:51:03 +07:00
XMRig
be31811920 Merge branch 'feature-nvml' into evo 2019-11-01 04:09:36 +07:00
XMRig
26ed6254dc Added "health-print-time" option. 2019-11-01 04:08:52 +07:00
XMRig
1cb4d73fe3 Added manual (e key) health reports. 2019-11-01 00:09:28 +07:00
XMRig
f110b5000b Fixed switching from non RandomX algorithm to RandomX. 2019-10-30 22:40:09 +07:00
XMRig
83f437f979 Implemented NvmlLib. 2019-10-30 20:26:21 +07:00
XMRig
175a7b06b7 Added initial NVML stub. 2019-10-30 15:33:06 +07:00
xmrig
9d580693db Update CMAKE_OPTIONS.md 2019-10-29 17:26:03 +07:00
XMRig
3bdf7111ce Fixed singular form for threads. 2019-10-29 17:18:46 +07:00
XMRig
23ebcfb2db Display backend for shares. 2019-10-29 15:43:13 +07:00
XMRig
b1eac17d60 Added version information to API. 2019-10-29 14:25:40 +07:00
XMRig
9dfa38f1e7 Added command line options --cuda and --cuda-loader. 2019-10-29 00:42:49 +07:00
XMRig
80fd0f9fab Fix CUDA plugin name for Linux. 2019-10-28 14:54:24 +07:00
XMRig
58174e5e91 v4.5.0-evo 2019-10-28 13:30:03 +07:00
XMRig
ab7f0cb4cc Merge branch 'feature-cuda' into evo 2019-10-28 13:29:15 +07:00
XMRig
f6f480264e Merge branch 'evo' of github.com:xmrig/xmrig into evo 2019-10-28 13:28:43 +07:00
XMRig
8cd265c38c Added CUDA threads to API. 2019-10-28 13:18:00 +07:00
XMRig
99fe304c1f Don't generate CUDA config on fly. 2019-10-28 01:47:55 +07:00
XMRig
7889634b40 Added RandomX support. 2019-10-28 01:18:08 +07:00
XMRig
0e224abb0a Improved error handling. 2019-10-27 19:51:21 +07:00
XMRig
c9f7cbae09 Implemented cryptonight mining. 2019-10-27 17:53:00 +07:00
xmrig
2e537013a2 Merge pull request #1253 from SChernykh/evo
Fix VS2019 compilation
2019-10-27 02:08:09 +07:00
SChernykh
7cb9b92347 Fix VS2019 compilation 2019-10-26 13:32:30 +02:00
XMRig
bb2cc0deb7 Added CudaWorker and CudaLaunchData. 2019-10-26 17:37:54 +07:00
XMRig
d4a3024996 Implemented CUDA config generation. 2019-10-26 03:12:55 +07:00
XMRig
77d5b73724 Added CudaDevice class. 2019-10-26 00:49:59 +07:00
XMRig
ec717f27b5 Added CudaLib stub. 2019-10-25 16:46:49 +07:00
XMRig
0fc215c457 Added initial CUDA backend stub. 2019-10-23 16:37:56 +07:00
XMRig
534a764023 Merge branch 'beta' into evo 2019-10-23 11:53:02 +07:00
XMRig
dc705d88ab Fixed "coin" option for self select mode. 2019-10-22 16:54:36 +07:00
xmrig
6e9fd5a430 Update CHANGELOG.md 2019-10-22 15:28:15 +07:00
XMRig
e3f37bc2f9 v4.4.0-beta 2019-10-22 14:15:40 +07:00
XMRig
f6d58c7d46 Merge branch 'evo' into beta 2019-10-22 14:15:01 +07:00
XMRig
48545c5916 Fixed compile warnings. 2019-10-22 13:09:58 +07:00
XMRig
f7dcfffdb1 Removed unused class member. 2019-10-22 12:30:04 +07:00
XMRig
52281906c6 Fixed "huge-pages" option. 2019-10-21 23:01:30 +07:00
XMRig
487b2a3655 Merge branch 'evo' of github.com:xmrig/xmrig into evo 2019-10-21 21:27:51 +07:00
XMRig
71ee145f70 Added "paused" field to API. 2019-10-21 21:27:05 +07:00
xmrig
da20d74145 Update CHANGELOG.md 2019-10-21 20:22:35 +07:00
XMRig
c29fa62260 #1241 Revert changes in ConsoleLog for Windows. 2019-10-20 23:59:29 +07:00
XMRig
5613912ec4 Added "self-select" to config example. 2019-10-20 16:04:22 +07:00
xmrig
b77c5428f9 Update CHANGELOG.md 2019-10-20 16:02:49 +07:00
xmrig
2012ce384e Update README.md 2019-10-20 11:48:23 +07:00
XMRig
6b40ede2bc Don't add "self-select" field to generated config if it not supported. 2019-10-19 02:39:46 +07:00
xmrig
128c5f67ad Merge pull request #1248 from SChernykh/evo
Fixed code cache cleanup on iOS/Darwin
2019-10-18 23:27:39 +07:00
SChernykh
578bebb04d Prefer sys_icache_invalidate on iOS
Also break compilation with error if clear cache is not available
2019-10-18 18:17:57 +02:00
SChernykh
5611249af7 Fixed __builtin___clear_cache detection 2019-10-18 18:04:13 +02:00
SChernykh
a56febcd13 Force HAVE_BUILTIN_CLEAR_CACHE for GNU compilers
They always have __builtin___clear_cache
2019-10-18 17:39:57 +02:00
SChernykh
0ad992985c Update jit_compiler_a64.cpp 2019-10-18 16:36:50 +02:00
SChernykh
1a66c3f1a1 Update jit_compiler_a64.cpp 2019-10-18 16:32:01 +02:00
SChernykh
a2ef2fd9d9 Update jit_compiler_a64.cpp 2019-10-18 16:28:49 +02:00
XMRig
5c02cb50da Fix copy/paste typo. 2019-10-18 21:26:15 +07:00
SChernykh
998c55030a Fixed code cache cleanup on iOS/Darwin 2019-10-18 16:26:15 +02:00
xmrig
079de97fab Merge pull request #1247 from SChernykh/evo
Fix ARM64 code alignment
2019-10-18 21:24:14 +07:00
SChernykh
432addab33 Fix ARM64 code alignemtn 2019-10-18 16:18:45 +02:00
XMRig
10d292092a #1246 Fixed build on iOS. 2019-10-18 12:02:10 +07:00
XMRig
a02ee96651 Merge branch 'feature-self-select' into evo 2019-10-17 00:59:05 +07:00
XMRig
d783febad6 Added error handling for self-select mode. 2019-10-17 00:57:35 +07:00
xmrig
ea6d9073b7 Merge pull request #1243 from komatom/evo_globalmemsize_fix
Fixes OclDevice::globalMemSize() that sometimes returns 0
2019-10-16 20:33:54 +07:00
XMRig
83a5923568 Added send with callback. 2019-10-16 19:34:33 +07:00
Anton Kamenov
9e2b63890c Use functions to get memory variables 2019-10-14 14:14:12 +03:00
Anton Kamenov
ed08895d4a Fixes OclDevice::globalMemSize() that sometimes returns 0 2019-10-14 13:34:17 +03:00
xmrig
5b4026694d Merge pull request #1240 from SChernykh/evo
Sync with latest RandomX code
2019-10-14 10:07:20 +07:00
SChernykh
c9798ba2e9 Sync with latest RandomX code
Fix a possible out-of-bounds access in superscalar generator
2019-10-13 22:13:29 +02:00
XMRig
3752551e53 Self-select initial working implementation. 2019-10-12 19:48:18 +07:00
XMRig
a62f6f9552 Merge branch 'evo' into feature-self-select 2019-10-12 13:08:12 +07:00
XMRig
e9d2e194f3 Added SelfSelectClient stub. 2019-10-12 00:24:47 +07:00
XMRig
6009fffa7b v4.3.1-beta 2019-10-11 23:23:44 +07:00
XMRig
fad1e5fb3c Merge branch 'evo' into beta 2019-10-11 23:23:22 +07:00
XMRig
228f02c361 Fixed regression. 2019-10-11 23:21:02 +07:00
XMRig
72c45d882b Prepare for self select. 2019-10-11 14:55:12 +07:00
XMRig
4dc7a8103b Added class Url. 2019-10-11 09:58:11 +07:00
XMRig
71108e1bde v4.4.0-evo 2019-10-10 17:12:13 +07:00
XMRig
72b7d934f6 v4.3.0-beta 2019-10-10 13:58:43 +07:00
XMRig
08e9e834b9 Merge branch 'evo' into beta 2019-10-10 13:34:18 +07:00
xmrig
c26c4ce714 Update CHANGELOG.md 2019-10-09 13:11:35 +07:00
XMRig
61ab47cc95 Improved CPU profile generation. 2019-10-09 12:58:11 +07:00
XMRig
7db7b3727d Improved OpenCL profile generation, don't create unnecessary (equal to main profile) profiles. 2019-10-09 11:11:43 +07:00
xmrig
1d03b942a5 Update ALGORITHMS.md 2019-10-09 09:26:56 +07:00
XMRig
ee87f73d5e #1227 Added "arqma" value for "coin" option. 2019-10-09 09:20:54 +07:00
XMRig
bb7bff9115 Added command line option --cpu-memory-pool. 2019-10-09 08:45:06 +07:00
xmrig
1e5fdde9ba Merge pull request #1227 from SChernykh/evo
RandomX (Arqma variant) support
2019-10-09 07:56:00 +07:00
SChernykh
2b29a4c20f RandomX (Arqma variant) support 2019-10-08 19:00:19 +02:00
XMRig
119e7ea7bf Merge branch 'feature-hugepages-pool' into evo 2019-10-08 09:47:01 +07:00
XMRig
58c81be1f1 Updated default config and docs. 2019-10-08 09:41:36 +07:00
XMRig
d3b137c817 Fixed crash. 2019-10-08 08:50:33 +07:00
XMRig
9dce868fb9 Added "memory-pool" option. 2019-10-07 23:38:01 +07:00
XMRig
c4170fbb86 Removed unnecessary error message. 2019-10-07 21:11:58 +07:00
XMRig
2dc4ceae29 Added class NUMAMemoryPool. 2019-10-07 20:39:04 +07:00
XMRig
0e0a26f644 Fixed Linux build. 2019-10-07 13:37:12 +07:00
XMRig
68d77b02d7 Added initial memory pool support. 2019-10-07 12:36:40 +07:00
XMRig
c13c83b902 VirtualMemory class refactoring. 2019-10-06 17:49:15 +07:00
XMRig
72c9d94390 Use hwloc for set thread affinity. 2019-10-06 14:40:42 +07:00
xmrig
9101469308 Update CHANGELOG.md 2019-10-06 12:02:43 +07:00
XMRig
759573ace3 Merge branch 'optimize-numa' into evo 2019-10-06 11:21:31 +07:00
XMRig
0a1836e5a8 Fixed exit condition for RxQueue. 2019-10-06 11:19:32 +07:00
XMRig
8af1075c98 Removed uv_try_write for console log. 2019-10-06 11:03:01 +07:00
xmrig
91498ec690 Merge pull request #1220 from SChernykh/evo
Refactored JIT compiler for x86, small RandomX speedup
2019-10-06 08:16:40 +07:00
XMRig
59b62dcb77 Added class RxQueue, class Rx now thin static wrapper on top of RxQueue. 2019-10-06 07:47:41 +07:00
SChernykh
10f9b29e03 Refactored JIT compiler for x86, small RandomX speedup 2019-10-05 21:40:21 +02:00
XMRig
d5af5cf8f8 Fixed exit. 2019-10-05 11:24:22 +07:00
XMRig
05928ccc25 Implemented RxNUMAStorage. 2019-10-05 08:24:28 +07:00
XMRig
ad6dc876b3 Simplified VirtualMemory::bindToNUMANode. 2019-10-04 19:52:15 +07:00
XMRig
207dae418d Added RxNUMAStorage stub. 2019-10-04 18:43:03 +07:00
XMRig
7508411faf Extended "numa" option for RandomX. 2019-10-04 10:49:55 +07:00
XMRig
f34031a984 Added interface IRxStorage and RxBasicStorage class. 2019-10-04 08:45:13 +07:00
XMRig
d1aadc2e3b More cleanup. 2019-10-03 07:45:25 +07:00
XMRig
6d8cf91568 Added class RxSeed. 2019-10-03 04:48:36 +07:00
XMRig
96b2560f79 v4.2.1-beta 2019-10-02 10:33:12 +07:00
XMRig
923d47fff0 Merge branch 'evo' into beta 2019-10-02 10:32:34 +07:00
xmrig
542a27a032 Update CHANGELOG.md 2019-10-02 07:25:17 +07:00
xmrig
a7e8ac6cf8 Update CHANGELOG.md 2019-10-02 07:23:49 +07:00
XMRig
42fd146c2b #1212 Fixed RandomX dataset re-initialization. 2019-10-02 06:35:49 +07:00
XMRig
34468782cd Merge branch 'dev' into evo 2019-10-01 07:26:18 +07:00
XMRig
3badeb56a0 Fixed support for systems where total count of NUMA nodes not equal usable count. 2019-10-01 07:19:13 +07:00
XMRig
bc18b5d0be Fixed msvc build. 2019-10-01 01:25:47 +07:00
XMRig
158d2e4302 #1150 Fixed argon2 header conflict. 2019-10-01 01:18:22 +07:00
XMRig
f60118ee79 Merge branch 'opencl-shared-data' into evo 2019-09-30 08:33:02 +07:00
XMRig
6bc217e985 Fixed excessive memory allocation. 2019-09-30 08:28:25 +07:00
XMRig
3560b6a3c2 Added clRetainMemObject support. 2019-09-30 07:30:14 +07:00
XMRig
77eecdd2c2 RandomX dataset specific code moved into OclSharedData class. 2019-09-30 06:59:44 +07:00
XMRig
f4943b77f3 Class OclInterleave renamed to OclSharedData and added class OclSharedState. 2019-09-30 05:18:53 +07:00
XMRig
c908ef2489 v4.3.0-evo 2019-09-29 04:27:23 +07:00
XMRig
d21155f3c6 Merge branch 'beta' into evo 2019-09-29 04:26:57 +07:00
XMRig
da39ed2ce0 v3.2.1-dev 2019-09-29 04:25:35 +07:00
XMRig
06500761fb Merge branch 'master' into dev 2019-09-29 04:25:06 +07:00
xmrig
919a6c0cc4 Update README.md 2019-09-29 04:10:38 +07:00
XMRig
467e5115b0 v4.2.0-beta 2019-09-28 23:55:49 +07:00
XMRig
c495802f64 Merge branch 'evo' into beta 2019-09-28 23:34:12 +07:00
XMRig
66e48ed2d7 Fixed ARM build. 2019-09-28 23:26:03 +07:00
XMRig
ac4cd3eb9b v4.2.0 2019-09-28 23:10:07 +07:00
XMRig
5d73402651 Merge branch 'evo' into beta 2019-09-28 23:09:20 +07:00
XMRig
427b6516e0 v3.2.0 2019-09-28 23:03:12 +07:00
XMRig
eae9009b98 Merge branch 'dev' 2019-09-28 22:56:55 +07:00
xmrig
166d8dd53c Update CHANGELOG.md 2019-09-28 22:45:25 +07:00
XMRig
680081b93b #1202 Fixed algorithm verification in donate strategy. 2019-09-28 22:07:44 +07:00
XMRig
e66eeefb14 Fixed build on macOS. 2019-09-28 18:20:56 +07:00
xmrig
8e9e8cd169 Update ALGORITHMS.md 2019-09-28 09:00:50 +07:00
xmrig
f96538dfba Update ALGORITHMS.md 2019-09-28 08:43:31 +07:00
xmrig
9ad174c129 Update ALGORITHMS.md 2019-09-28 08:28:31 +07:00
XMRig
17b40ac4ad v3.2.0-dev 2019-09-28 03:40:53 +07:00
XMRig
4453727754 Merge branch 'dev' into evo 2019-09-28 03:25:59 +07:00
XMRig
d086318f4e Set "rx/0" as user visible RandomX name. 2019-09-28 03:25:03 +07:00
XMRig
5b7f1fe853 Updated default config example. 2019-09-28 02:34:10 +07:00
xmrig
4c357d2d60 Update CHANGELOG.md 2019-09-28 02:32:02 +07:00
xmrig
0eb5588454 Update CPU.md 2019-09-28 02:25:34 +07:00
xmrig
5ba8b43fb8 Update CPU.md 2019-09-28 02:25:00 +07:00
xmrig
0eb754d76e Create CPU_MAX_USAGE.md 2019-09-28 02:22:38 +07:00
XMRig
7c463849cc Added config option "cpu/max-threads-hint" and command line option "--cpu-max-threads-hint". 2019-09-28 02:02:20 +07:00
XMRig
daed23422e Merge branch 'dev' into evo 2019-09-27 23:40:36 +07:00
XMRig
550e332909 Fixed coin option in daemon mode. 2019-09-27 23:39:57 +07:00
XMRig
43f26dcd76 Merge branch 'dev' into evo 2019-09-27 05:54:33 +07:00
XMRig
e1d1a5226c Added coin option. 2019-09-27 05:41:45 +07:00
XMRig
82aaa89ab6 v4.2.0-evo 2019-09-27 02:56:22 +07:00
XMRig
aac384f54f Merge remote-tracking branch 'remotes/origin/beta' into evo 2019-09-27 02:55:57 +07:00
XMRig
ffccaa8817 v4.1.0-beta 2019-09-27 02:14:32 +07:00
XMRig
bd488a6182 Merge branch 'evo' into beta 2019-09-27 02:14:06 +07:00
XMRig
41ec1b4cb2 Fixed build with gcc 4.8. 2019-09-27 01:55:05 +07:00
XMRig
18bf9d3d95 Reduced PciTopology class size. 2019-09-27 01:03:37 +07:00
XMRig
56e070b3d1 v4.1.0-evo 2019-09-26 23:41:11 +07:00
xmrig
88a9f8d892 Update CHANGELOG.md 2019-09-26 23:40:01 +07:00
XMRig
0f367ab117 Added "restricted" field to "GET /1/summary" request. 2019-09-26 17:29:24 +07:00
XMRig
838f078fa5 Advanced opencl options postponed. 2019-09-26 01:53:16 +07:00
XMRig
d6f0555771 Added command line option --opencl-devices (hint mode) 2019-09-24 23:01:03 +07:00
XMRig
3ee3d13f0f Merge branch 'evo' of github.com:xmrig/xmrig into evo 2019-09-24 18:40:10 +07:00
XMRig
6267ecc3dc Implemented --opencl-no-cache, --opencl-loader, --opencl-platform command line options. 2019-09-24 18:39:43 +07:00
xmrig
1487a037ed Merge pull request #1191 from SChernykh/evo
Workaround for a bug in binutils-2.32-1 on ARM
2019-09-24 15:24:08 +07:00
SChernykh
1bba25e080 Set scratchpad pointer to null by default
To avoid freeing random blocks of memory in some cases.
2019-09-24 08:53:00 +02:00
SChernykh
c6096c3c34 Workaround for a bug in binutils-2.32-1 on ARM
ldr/madd instruction sequence makes compiled binary crash, so separate them.
2019-09-23 23:12:40 +02:00
XMRig
2604705bab Added command line option --opencl. 2019-09-24 03:14:35 +07:00
XMRig
5f948d0d96 Fixed potential truncation. 2019-09-24 00:03:50 +07:00
XMRig
3e42fa28df OpenCL backend disabled by default. 2019-09-23 05:51:46 +07:00
XMRig
d9dc6a396f Add support for initialize OpenCL in runtime. 2019-09-23 05:33:48 +07:00
XMRig
bdb72684b0 Added command line option --no-cpu 2019-09-23 05:08:59 +07:00
XMRig
0f05936e63 Removed option --http-enabled. 2019-09-23 04:53:33 +07:00
xmrig
290493e485 Update CHANGELOG.md 2019-09-23 03:57:33 +07:00
XMRig
637301d340 Improved/restructured --help output. 2019-09-23 03:47:40 +07:00
XMRig
c7e4815d79 Use more JS friendly names. 2019-09-23 01:27:05 +07:00
XMRig
54d73b7ac5 Extended OpenCL threads information. 2019-09-22 02:10:14 +07:00
XMRig
cbdf1e6c09 Revert instructions_portable.cpp to avoid warning on gcc compilers. 2019-09-22 00:59:53 +07:00
XMRig
2e49930b94 Optimized initialization. 2019-09-21 19:26:27 +07:00
XMRig
9da0cb2ad1 Merge branch 'dev' into evo 2019-09-21 19:08:10 +07:00
XMRig
cf6bd0e772 #1183 Fixed crash in background mode. 2019-09-21 19:05:52 +07:00
xmrig
dc686bd1bf Merge pull request #1185 from SChernykh/evo
Added JIT compiler for RandomX on ARMv8
2019-09-21 16:36:12 +07:00
SChernykh
e002dbf57e Update CMakeLists.txt 2019-09-21 10:48:14 +02:00
SChernykh
38f4f4f695 Added JIT compiler for RandomX on ARMv8 2019-09-21 10:10:52 +02:00
XMRig
a4bc548fe5 Merge branch 'dev' into evo 2019-09-21 03:24:34 +07:00
XMRig
e57798360f #1183 Disable stdin handler if not available. 2019-09-21 03:22:19 +07:00
xmrig
3cbbc94249 Merge pull request #1184 from msembinelli/master
Improve grammar and spelling on usage section
2019-09-21 03:19:17 +07:00
Matthew Sembinelli
cbc08e696f Improve grammar and spelling on usage section 2019-09-20 14:06:38 -06:00
XMRig
6e45ab599e v4.0.2-evo 2019-09-20 16:46:56 +07:00
XMRig
e55fb68a29 Merge branch 'beta' into evo 2019-09-20 16:46:06 +07:00
XMRig
7a1ff6bfed v3.1.4-dev 2019-09-20 16:45:17 +07:00
XMRig
18809ddf0b Merge branch 'master' into dev 2019-09-20 16:44:51 +07:00
XMRig
7158514d48 v4.0.1-beta 2019-09-20 15:48:23 +07:00
XMRig
3445f47482 Merge branch 'evo' into beta 2019-09-20 15:44:21 +07:00
XMRig
5b33443607 Updated default config example. 2019-09-20 15:09:24 +07:00
XMRig
05b2c66aaf v3.1.3 2019-09-20 15:02:20 +07:00
XMRig
50038516cb Merge branch 'dev' 2019-09-20 15:01:59 +07:00
XMRig
f6752310b4 Backport fixes from v4. 2019-09-20 14:54:18 +07:00
xmrig
e5c75fa2f7 Update CHANGELOG.md 2019-09-20 14:30:38 +07:00
XMRig
40e8bfe443 Added global backends hashrate to "GET /2/backends" endpoint. 2019-09-20 14:15:35 +07:00
XMRig
ed11c0a6da Fixed config file permissions after write (MSYS only). 2019-09-20 02:54:33 +07:00
XMRig
365667ee0a #1180 Fixed race condition in nonce reset. 2019-09-20 00:30:20 +07:00
XMRig
1cfd5f0735 [opencl] Better cn/r specific resource management. 2019-09-19 03:42:11 +07:00
XMRig
e8ee091e5a Fixes for Intel OpenCL platform. 2019-09-19 02:05:42 +07:00
XMRig
133cd30b2e #1177 Fixed unroll syntax for old drivers. 2019-09-18 23:46:51 +07:00
XMRig
e3fcb99d84 Allow partially started threads. 2019-09-17 02:22:59 +07:00
XMRig
e8acb8a2a9 Simplify code. 2019-09-16 23:53:39 +07:00
XMRig
2a107cc463 Improved thread self test error message. 2019-09-16 01:27:51 +07:00
XMRig
1cd1f13fee v3.1.3-dev 2019-09-16 00:29:46 +07:00
XMRig
7af3e4e340 Merge branch 'master' into dev 2019-09-16 00:29:18 +07:00
XMRig
d8b07570a3 v4.0.1-evo 2019-09-16 00:28:40 +07:00
XMRig
95c960574a Merge branch 'beta' into evo 2019-09-16 00:27:57 +07:00
XMRig
8266cd893b v4.0.0-beta 2019-09-15 19:14:01 +07:00
XMRig
cb07469f4a Merge branch 'evo' into beta 2019-09-15 19:05:00 +07:00
xmrig
e2fb6dd288 Update CHANGELOG.md 2019-09-15 18:54:13 +07:00
XMRig
5b1613997a Update APP_DESC 2019-09-15 18:23:41 +07:00
XMRig
7bec469948 Change APP_KIND to miner. 2019-09-15 18:11:25 +07:00
XMRig
cc10a9cb4d Merge branch 'dev' into evo 2019-09-15 18:05:15 +07:00
XMRig
171762d1aa v3.1.2 2019-09-15 18:04:18 +07:00
XMRig
78fd2fd0ac Merge branch 'dev' 2019-09-15 18:01:30 +07:00
xmrig
ff981ecb5c Update CHANGELOG.md 2019-09-15 16:25:05 +07:00
xmrig
62d184a377 Update CMAKE_OPTIONS.md 2019-09-15 15:57:02 +07:00
xmrig
c6accf5151 Create CMAKE_OPTIONS.md 2019-09-15 15:26:22 +07:00
XMRig
a8f5b8ac8b #1132 Fixed CentOS 7 compatibility. 2019-09-15 13:26:26 +07:00
XMRig
179ef31b80 Fixed cmake 2.8 support. 2019-09-14 20:34:15 +07:00
xmrig
f4ba1e35e1 Update CHANGELOG.md 2019-09-14 15:57:50 +07:00
XMRig
8a69c23646 Use RxAlgo:base instead of switch. 2019-09-14 12:00:33 +07:00
xmrig
bee01544c5 Merge pull request #1171 from SChernykh/evo
RandomX config generator for OpenCL
2019-09-14 11:17:05 +07:00
SChernykh
9e22c2609c RandomX config generator for OpenCL
Also fixed compilation errors on VS2019
2019-09-13 21:05:00 +02:00
SChernykh
6eba700ecf Merge remote-tracking branch 'upstream/evo' into evo 2019-09-13 15:27:14 +02:00
XMRig
6f5d175d12 Fix compile warning, mostly struct/class inconsistency. 2019-09-13 18:21:05 +07:00
XMRig
66fd532ee6 Fixed Linux build. 2019-09-13 17:23:33 +07:00
XMRig
29f605e8ae Fixed MSVC build. 2019-09-13 17:17:48 +07:00
XMRig
1013c23f46 Merge branch 'feature-opencl' into evo 2019-09-13 17:00:05 +07:00
XMRig
8d61374311 Enable OpenCL by default. 2019-09-13 16:55:44 +07:00
XMRig
9399491a64 Use sub buffers. 2019-09-13 16:10:12 +07:00
XMRig
5a91552060 OclLib improvements. 2019-09-13 10:35:32 +07:00
XMRig
bd1ffa56dc Added OpenCL code minification . 2019-09-12 18:50:35 +07:00
XMRig
046eb4d9fd Added autoconfig stub for RandomX. 2019-09-12 15:21:14 +07:00
XMRig
ad7141fe21 Implemented option "dataset_host". 2019-09-12 13:49:27 +07:00
XMRig
7f0891a0f0 Merge branch 'dev' into feature-opencl 2019-09-12 13:16:42 +07:00
XMRig
04a4a6cadc Implemented OpenCL JIT mode. 2019-09-12 13:10:50 +07:00
XMRig
db79911c4b Fixed invalid shares. 2019-09-12 10:00:12 +07:00
XMRig
82595ee256 Cleanup. 2019-09-12 01:09:30 +07:00
xmrig
f3b55d6b08 Merge pull request #1168 from SChernykh/dev
RandomX: optimized loading from scratchpad
2019-09-12 00:15:41 +07:00
SChernykh
2322e3bcf7 RandomX: optimized loading from scratchpad
Prefetches scratchpad data as soon as possible to calculate data address for the next load.

Up to ~1.4% speedup on Ryzen 7 3700X @ 4.1 GHz, RAM 3200 MHz 14-14-14-28 with optimized sub-timings:
Variant|Before H/S|After H/S
-------|----------|---------
rx/0|8663|8777
rx/wow|9867|10009
rx/loki|8652|8731
2019-09-11 19:10:01 +02:00
XMRig
95daab4bc0 Implemented VM mode for OpenCL RandomX. 2019-09-12 00:01:03 +07:00
XMRig
4c90f9960e OpenCL RandomX WIP 2019-09-11 15:48:02 +07:00
xmrig
01b2c952ea Merge pull request #1166 from SChernykh/dev
RandomX: fix for 272 initialization threads
2019-09-09 13:19:12 +07:00
SChernykh
edb2c98ad7 Fix for 272 initialization threads 2019-09-09 08:15:46 +02:00
XMRig
ff89ec660c Initial RandomX source code prepare and compile. 2019-09-08 21:56:18 +07:00
XMRig
29790da63d Added autoconfig for cn/gpu. 2019-09-08 16:28:51 +07:00
XMRig
859626cbe3 Added basic cn/gpu support. 2019-09-08 08:59:17 +07:00
XMRig
3d3a32087f Fix for ROCm. 2019-09-07 09:46:50 +07:00
XMRig
002fd008a6 Update OpenCL headers to recent version. 2019-09-06 22:58:09 +07:00
XMRig
d9adf14551 Improved OpenCL startup time. 2019-09-06 21:48:15 +07:00
XMRig
62f086f607 Split config generator to separated files. 2019-09-06 19:38:22 +07:00
XMRig
9dc2525ce1 Restored OpenCL interleave. 2019-09-06 11:43:02 +07:00
xmrig
03946b42fa Merge pull request #1163 from SChernykh/dev
RandomX optimizations
2019-09-05 14:30:04 +07:00
XMRig
0e362f38bc Print detailed information about OpenCL threads. 2019-09-05 13:00:40 +07:00
XMRig
1ad30d50a6 Define double OpenCL threads in simple way. 2019-09-05 09:27:29 +07:00
SChernykh
dc5843651b Optimized CFROUND
One less micro-op
2019-09-04 20:47:47 +02:00
SChernykh
d3f98ef7bc RandomX optimizations
- Optimized soft AES code, up to +30% hashrate on CPU without AES support
- Added prefetch for the first dataset access, up to +0.1% hashrate
2019-09-04 19:24:12 +02:00
XMRig
e7b2b4fc3d Relax cn algorithm constants definition. 2019-09-04 13:22:20 +07:00
XMRig
13daf095d9 Fixed Linux build. 2019-09-04 12:13:04 +07:00
XMRig
57f82f7504 cn/r part 2 of 2. 2019-09-04 11:23:04 +07:00
XMRig
a8c2e908a2 #1158 Potential fix for segmentation fault. 2019-09-03 15:31:32 +07:00
XMRig
b9e15389ca cn/r part 1 of 2. 2019-09-03 14:36:27 +07:00
XMRig
9b6ab55936 Restored all cn/2 based algorithms, except cn/r. 2019-09-02 19:42:00 +07:00
XMRig
235cda1051 * Restored all cn/1 based algorithms (cn/1, cn-lite/1, cn/rto, cn-heavy/tube) 2019-09-02 18:30:13 +07:00
XMRig
28d1eaf8da Restored all cn/0 based algorithms (cn/0, cn-lite/0, cn/xao, cn-heavy/0, cn-heavy/xhv) 2019-09-02 12:55:41 +07:00
XMRig
fc4f43ac7f Fixed compute errors. 2019-09-02 11:58:56 +07:00
XMRig
eef5d91606 Implemented verification on CPU. 2019-09-01 19:31:25 +07:00
XMRig
e2d2591281 Implemented remaining kernels. 2019-09-01 14:16:19 +07:00
XMRig
138304ff51 Implemented cn1 kernel launch. 2019-09-01 09:34:37 +07:00
XMRig
fdaa0b7ba1 Cleanup OpenCL code. 2019-09-01 08:49:28 +07:00
XMRig
10d2c0285c Better cl_context wrapping. 2019-09-01 07:37:02 +07:00
XMRig
b541960611 Implemented cn0 kernel launch. 2019-09-01 07:05:49 +07:00
XMRig
ce3e2401cb Merge branch 'dev' into feature-opencl 2019-08-31 09:36:58 +07:00
XMRig
96f3df3929 Simplify branch buffers. 2019-08-31 09:36:06 +07:00
XMRig
f1a9302c3e v3.1.2-dev 2019-08-31 08:29:15 +07:00
XMRig
3a10c0546f Merge branch 'master' into dev 2019-08-31 08:28:51 +07:00
XMRig
5439f2d7b8 v3.1.1 2019-08-31 07:54:09 +07:00
XMRig
1a8abf054e Merge branch 'dev' 2019-08-31 07:51:57 +07:00
XMRig
13e38df391 Fixed command line options for single pool, free order allowed again. 2019-08-31 06:18:32 +07:00
xmrig
53a71f7226 Update CHANGELOG.md 2019-08-30 19:16:05 +07:00
XMRig
df90b299f2 Fixed, for Argon2 algorithms command line options, like --threads was ignored. 2019-08-30 18:55:53 +07:00
XMRig
71329718e4 Merge branch 'dev' into feature-opencl 2019-08-30 16:47:51 +07:00
xmrig
fa983eee0e Update CHANGELOG.md 2019-08-30 15:14:52 +07:00
XMRig
372183555b #1141 Fixed log in background mode. 2019-08-30 14:46:38 +07:00
XMRig
9cfbce5e09 Removed Linux specific code from Windows only ASM file. 2019-08-30 13:49:58 +07:00
xmrig
f3c9b0e888 Merge pull request #1148 from 00-matt/fix-execstack
Fix linker marking entire executable as having an executable stack
2019-08-30 13:47:45 +07:00
XMRig
5678d15841 #1138 Fixed reconnect. 2019-08-30 10:04:12 +07:00
XMRig
df91a85128 Fixed bug in keepalive feature. 2019-08-30 07:09:14 +07:00
Matt Smith
df973763bb Fix linker marking entire executable as executable stack
See: https://wiki.ubuntu.com/SecurityTeam/Roadmap/ExecutableStacks
See: https://wiki.gentoo.org/wiki/Hardened/GNU_stack_quickstart
2019-08-29 14:12:43 +01:00
xmrig
76fdc4fc4b Update CHANGELOG.md 2019-08-29 04:22:55 +07:00
xmrig
af52e454e7 Merge pull request #1146 from SChernykh/dev
Fixed race condition in RandomX thread init
2019-08-29 04:20:46 +07:00
SChernykh
d5e7ab4985 Fixed race condition in RandomX thread init
Thread could deadlock if it started before dataset struct was allocated.
2019-08-28 18:28:04 +02:00
xmrig
b89a6cc077 Merge pull request #1144 from SChernykh/dev
Fix ARM compilation
2019-08-28 16:11:40 +07:00
SChernykh
0a58781b0c Reverted intrin_portable.h 2019-08-28 07:20:01 +02:00
XMRig
b755218837 Added Cn0Kernel and OclKernel classes. 2019-08-28 08:57:55 +07:00
xmrig
87fe8a4f7e Update CHANGELOG.md 2019-08-28 04:14:57 +07:00
xmrig
b953d8db05 Merge pull request #1142 from SChernykh/dev
Updated and optimized RandomX
2019-08-28 03:29:53 +07:00
XMRig
aa294ff066 Initial stub for setting job in OpenCL backend. 2019-08-28 02:05:19 +07:00
SChernykh
8b84d7650b Optimized RandomX JIT compiler
Hashrate improved by 0.5-1.5% depending on RandomX version and CPU.
2019-08-27 20:18:56 +02:00
XMRig
fcfb738ded Use external script to prepare OpenCL source. 2019-08-28 00:33:49 +07:00
SChernykh
21a56c9cbf Updated RandomX 2019-08-27 16:12:13 +02:00
XMRig
82696000e4 Removed cn/wow algorithm (coin forked to rx/wow). 2019-08-27 09:34:08 +07:00
XMRig
ec1839d580 Restored OclCache. 2019-08-27 06:31:40 +07:00
XMRig
47b8cb6044 Added classes IOclRunner, OclBaseRunner, OclCnRunner, OclRxRunner. 2019-08-26 04:44:01 +07:00
XMRig
27e862da62 Added OpenCL source. 2019-08-25 23:06:04 +07:00
XMRig
2a5110aa04 Start mining threads only after RandomX dataset initialization. 2019-08-25 20:28:15 +07:00
XMRig
4a5e185973 Make CpuLaunchStatus more high level. 2019-08-25 16:47:25 +07:00
XMRig
4f1d4695cd Improved detailed hashrate report. 2019-08-25 04:14:34 +07:00
XMRig
d27990b273 Added OclWorker class. 2019-08-25 03:50:49 +07:00
XMRig
cf123b7d88 Added OclContext class. 2019-08-24 14:58:50 +07:00
XMRig
2a07bc4ef3 Added OclCache class stub. 2019-08-24 04:02:18 +07:00
XMRig
797d90c4dd Implemented OclLaunchData creation. 2019-08-24 00:14:41 +07:00
XMRig
55e12fb34b Extended information about OpenCL devices. 2019-08-23 20:19:55 +07:00
XMRig
92bc46f232 Print OpenCL platform and devices in summary. 2019-08-23 17:28:48 +07:00
xmrig
ebdf650450 Create PERSISTENT_OPTIONS.md 2019-08-23 03:28:31 +07:00
XMRig
fac7f8d56e Special handle for cn/2 based algorithms. 2019-08-23 00:56:51 +07:00
XMRig
39e69c2723 #1133 Fixed syslog regression. 2019-08-23 00:16:11 +07:00
XMRig
ed7216575c Added OclDevice and partially autoconfig. 2019-08-22 22:39:36 +07:00
XMRig
166a68244e Added platform option. 2019-08-19 22:35:58 +07:00
XMRig
83c7fad882 v3.1.1-dev 2019-08-19 04:26:37 +07:00
XMRig
a15f050e1b Merge branch 'master' into dev 2019-08-19 04:26:11 +07:00
XMRig
476e5dcb18 Improved --print-platforms option. 2019-08-19 02:49:43 +07:00
XMRig
d8d173db4d Added OclPlatform class. 2019-08-18 04:36:34 +07:00
XMRig
d89404ee6d Move files. 2019-08-18 04:02:31 +07:00
XMRig
fe9d2a0e1d Added ConfigPrivate class. 2019-08-18 01:01:28 +07:00
XMRig
bd07f1d455 Merge branch 'dev' into feature-opencl 2019-08-17 23:33:48 +07:00
XMRig
1d4d62afb7 v2.99.6-beta 2019-08-14 02:47:42 +07:00
XMRig
deec6cf51e Merge branch 'dev' into beta 2019-08-14 02:47:00 +07:00
SChernykh
5a738af607 Merge remote-tracking branch 'upstream/evo' into evo 2019-08-13 19:50:33 +02:00
XMRig
d5f57c35e2 Added OclBackend, OclConfig, OclLaunchData, OclThread and OclThreads stubs. 2019-08-13 19:47:22 +07:00
XMRig
eda05edd6d Merge branch 'dev' into feature-opencl 2019-08-13 18:11:57 +07:00
XMRig
f9f04e4b2e More flexible API handling for mining backends. 2019-08-13 02:38:10 +07:00
XMRig
36da54b8ce Added initial OpenCL stub. 2019-08-13 01:44:52 +07:00
XMRig
a9103dd1ae v4.0.0-evo 2019-08-13 00:37:44 +07:00
XMRig
d219840650 Merge branch 'dev' into evo 2019-08-13 00:36:50 +07:00
XMRig
3d9cef24cd Merge branch 'beta' into evo 2019-08-10 23:56:44 +07:00
689 changed files with 80056 additions and 13724 deletions

26
.github/ISSUE_TEMPLATE/bug_report.md vendored Normal file
View File

@@ -0,0 +1,26 @@
---
name: Bug report
about: Create a report to help us improve
title: ''
labels: ''
assignees: ''
---
**Describe the bug**
A clear and concise description of what the bug is.
**To Reproduce**
Steps to reproduce the behavior.
**Expected behavior**
A clear and concise description of what you expected to happen.
**Required data**
- Miner log as text or screenshot
- Config file or command line (without wallets)
- OS: [e.g. Windows]
- For GPU related issues: information about GPUs and driver version.
**Additional context**
Add any other context about the problem here.

2
.gitignore vendored
View File

@@ -1,2 +1,4 @@
/build
/CMakeLists.txt.user
/.idea
/src/backend/opencl/cl/cn/cryptonight_gen.cl

View File

@@ -1,28 +1,226 @@
# v3.1.0
- [#1107](https://github.com/xmrig/xmrig/issues/1107#issuecomment-522235892) Added Argon2 algorithm family: `argon2/chukwa` and `argon2/wrkz`.
# v6.3.2
- [#1794](https://github.com/xmrig/xmrig/pull/1794) More robust 1 GB pages handling.
- Don't allocate 1 GB per thread if 1 GB is the default huge page size.
- Try to allocate scratchpad from dataset's 1 GB huge pages, if normal huge pages are not available.
- Correctly initialize RandomX cache if 1 GB pages fail to allocate on a first NUMA node.
- [#1806](https://github.com/xmrig/xmrig/pull/1806) Fixed macOS battery detection.
- [#1809](https://github.com/xmrig/xmrig/issues/1809) Improved auto configuration on ARM CPUs.
- Added retrieving ARM CPU names, based on lscpu code and database.
# v3.0.0
- **[#1111](https://github.com/xmrig/xmrig/pull/1111) Added RandomX (`rx/test`) algorithm for testing and benchmarking.**
- **[#1036](https://github.com/xmrig/xmrig/pull/1036) Added RandomWOW (`rx/wow`) algorithm for [Wownero](http://wownero.org/).**
- **[#1050](https://github.com/xmrig/xmrig/pull/1050) Added RandomXL (`rx/loki`) algorithm for [Loki](https://loki.network/).**
- **[#1077](https://github.com/xmrig/xmrig/issues/1077) Added NUMA support via hwloc**.
- **Added flexible [multi algorithm](doc/CPU.md) configuration.**
- **Added unlimited switching between incompatible algorithms, all mining options can be changed in runtime.**
- [#257](https://github.com/xmrig/xmrig-nvidia/pull/257) New logging subsystem, file and syslog now always without colors.
- [#314](https://github.com/xmrig/xmrig-proxy/issues/314) Added donate over proxy feature.
- [#1007](https://github.com/xmrig/xmrig/issues/1007) Old HTTP API backend based on libmicrohttpd, replaced to custom HTTP server (libuv + http_parser).
- [#1010](https://github.com/xmrig/xmrig/pull/1010#issuecomment-482632107) Added daemon support (solo mining).
- [#1066](https://github.com/xmrig/xmrig/issues/1066#issuecomment-518080529) Added error message if pool not ready for RandomX.
- [#1105](https://github.com/xmrig/xmrig/issues/1105) Improved auto configuration for `cn-pico` algorithm.
- Added commands `pause` and `resume` via JSON RPC 2.0 API (`POST /json_rpc`).
- Added command line option `--export-topology` for export hwloc topology to a XML file.
- Breaked backward compatibility with previous configs and command line, `variant` option replaced to `algo`, global option `algo` removed, all CPU related settings moved to `cpu` object.
- Options `av`, `safe` and `max-cpu-usage` removed.
- Algorithm `cn/msr` renamed to `cn/fast`.
- Algorithm `cn/xtl` removed.
- API endpoint `GET /1/threads` replaced to `GET /2/backends`.
- Added global uptime and extended connection information in API.
- API now return current algorithm.
# v6.3.1
- [#1786](https://github.com/xmrig/xmrig/pull/1786) Added `pause-on-battery` option, supported on Windows and Linux.
- Added command line options `--randomx-cache-qos` and `--argon2-impl`.
# v6.3.0
- [#1771](https://github.com/xmrig/xmrig/pull/1771) Adopted new SSE2NEON and reduced ARM-specific changes.
- [#1774](https://github.com/xmrig/xmrig/pull/1774) RandomX: Added new option `cache_qos` in `randomx` object for cache QoS support.
- [#1777](https://github.com/xmrig/xmrig/pull/1777) Added support for upcoming Haven offshore fork.
- [#1780](https://github.com/xmrig/xmrig/pull/1780) CryptoNight OpenCL: fix for long input data.
# v6.2.3
- [#1745](https://github.com/xmrig/xmrig/pull/1745) AstroBWT: fixed OpenCL compilation on some systems.
- [#1749](https://github.com/xmrig/xmrig/pull/1749) KawPow: optimized CPU share verification.
- [#1752](https://github.com/xmrig/xmrig/pull/1752) RandomX: added error message when MSR mod fails.
- [#1754](https://github.com/xmrig/xmrig/issues/1754) Fixed GPU health readings for pre Vega GPUs on Linux.
- [#1756](https://github.com/xmrig/xmrig/issues/1756) Added results and connection reports.
- [#1759](https://github.com/xmrig/xmrig/pull/1759) KawPow: fixed DAG initialization on slower AMD GPUs.
- [#1763](https://github.com/xmrig/xmrig/pull/1763) KawPow: fixed rare duplicate share errors.
- [#1766](https://github.com/xmrig/xmrig/pull/1766) RandomX: small speedup on Ryzen CPUs.
# v6.2.2
- [#1742](https://github.com/xmrig/xmrig/issues/1742) Fixed crash when use HTTP API.
# v6.2.1
- [#1726](https://github.com/xmrig/xmrig/issues/1726) Fixed detection of AVX2/AVX512.
- [#1728](https://github.com/xmrig/xmrig/issues/1728) Fixed, 32 bit Windows builds was crash on start.
- [#1729](https://github.com/xmrig/xmrig/pull/1729) Fixed KawPow crash on old CPUs.
- [#1730](https://github.com/xmrig/xmrig/pull/1730) Improved displaying information for compute errors on GPUs.
- [#1732](https://github.com/xmrig/xmrig/pull/1732) Fixed NiceHash disconnects for KawPow.
- Fixed AMD GPU health (temperatures/power/clocks/fans) readings on Linux.
# v6.2.0-beta
- [#1717](https://github.com/xmrig/xmrig/pull/1717) Added new algorithm `cn/ccx` for Conceal.
- [#1718](https://github.com/xmrig/xmrig/pull/1718) Fixed, linker on Linux was marking entire executable as having an executable stack.
- [#1720](https://github.com/xmrig/xmrig/pull/1720) Fixed broken CryptoNight algorithms family with gcc 10.1.
# v6.0.1-beta
- [#1708](https://github.com/xmrig/xmrig/issues/1708) Added `title` option.
- [#1711](https://github.com/xmrig/xmrig/pull/1711) [cuda] Print errors from KawPow DAG initialization.
- [#1713](https://github.com/xmrig/xmrig/pull/1713) [cuda] Reduced memory usage for KawPow, minimum CUDA plugin version now is 6.1.0.
# v6.0.0-beta
- [#1694](https://github.com/xmrig/xmrig/pull/1694) Added support for KawPow algorithm (Ravencoin) on AMD/NVIDIA.
- Removed previously deprecated `cn/gpu` algorithm.
- Default donation level reduced to 1% but you still can increase it if you like.
# v5.11.3
- [#1718](https://github.com/xmrig/xmrig/pull/1718) Fixed, linker on Linux was marking entire executable as having an executable stack.
- [#1720](https://github.com/xmrig/xmrig/pull/1720) Fixed broken CryptoNight algorithms family with gcc 10.1.
# v5.11.2
- [#1664](https://github.com/xmrig/xmrig/pull/1664) Improved JSON config error reporting.
- [#1668](https://github.com/xmrig/xmrig/pull/1668) Optimized RandomX dataset initialization.
- [#1675](https://github.com/xmrig/xmrig/pull/1675) Fixed cross-compiling on Linux.
- Fixed memory leak in HTTP client.
- Build [dependencies](https://github.com/xmrig/xmrig-deps/releases/tag/v4.1) updated to recent versions.
- Compiler for Windows gcc builds updated to v10.1.
# v5.11.1
- [#1652](https://github.com/xmrig/xmrig/pull/1652) Up to 1% RandomX perfomance improvement on recent AMD CPUs.
- [#1306](https://github.com/xmrig/xmrig/issues/1306) Fixed possible double connection to a pool.
- [#1654](https://github.com/xmrig/xmrig/issues/1654) Fixed build with LibreSSL.
# v5.11.0
- **[#1632](https://github.com/xmrig/xmrig/pull/1632) Added AstroBWT CUDA support ([CUDA plugin](https://github.com/xmrig/xmrig-cuda) v3.0.0 or newer required).**
- [#1605](https://github.com/xmrig/xmrig/pull/1605) Fixed AstroBWT OpenCL for NVIDIA GPUs.
- [#1635](https://github.com/xmrig/xmrig/pull/1635) Added pooled memory allocation of RandomX VMs (+0.5% speedup on Zen2).
- [#1641](https://github.com/xmrig/xmrig/pull/1641) RandomX JIT refactoring, smaller memory footprint and a bit faster overall.
- [#1643](https://github.com/xmrig/xmrig/issues/1643) Fixed build on CentOS 7.
# v5.10.0
- [#1602](https://github.com/xmrig/xmrig/pull/1602) Added AMD GPUs support for AstroBWT algorithm.
- [#1590](https://github.com/xmrig/xmrig/pull/1590) MSR mod automatically deactivated after switching from RandomX algorithms.
- [#1592](https://github.com/xmrig/xmrig/pull/1592) Added AVX2 optimized code for AstroBWT algorithm.
- Added new config option `astrobwt-avx2` in `cpu` object and command line option `--astrobwt-avx2`.
- [#1596](https://github.com/xmrig/xmrig/issues/1596) Major TLS (Transport Layer Security) subsystem update.
- Added new TLS options, please check [xmrig-proxy documentation](https://xmrig.com/docs/proxy/tls) for details.
- `cn/gpu` algorithm now disabled by default and will be removed in next major (v6.x.x) release, no ETA for it right now.
- Added command line option `--data-dir`.
# v5.9.0
- [#1578](https://github.com/xmrig/xmrig/pull/1578) Added new RandomKEVA algorithm for upcoming Kevacoin fork, as `"algo": "rx/keva"` or `"coin": "keva"`.
- [#1584](https://github.com/xmrig/xmrig/pull/1584) Fixed invalid AstroBWT hashes after algorithm switching.
- [#1585](https://github.com/xmrig/xmrig/issues/1585) Fixed build without HTTP support.
- Added command line option `--astrobwt-max-size`.
# v5.8.2
- [#1580](https://github.com/xmrig/xmrig/pull/1580) AstroBWT algorithm 20-50% speedup.
- Added new option `astrobwt-max-size`.
- [#1581](https://github.com/xmrig/xmrig/issues/1581) Fixed macOS build.
# v5.8.1
- [#1575](https://github.com/xmrig/xmrig/pull/1575) Fixed new block detection for DERO solo mining.
# v5.8.0
- [#1573](https://github.com/xmrig/xmrig/pull/1573) Added new AstroBWT algorithm for upcoming DERO fork, as `"algo": "astrobwt"` or `"coin": "dero"`.
# v5.7.0
- **Added SOCKS5 proxies support for Tor https://xmrig.com/docs/miner/tor.**
- [#377](https://github.com/xmrig/xmrig-proxy/issues/377) Fixed duplicate jobs in daemon (solo) mining client.
- [#1560](https://github.com/xmrig/xmrig/pull/1560) RandomX 0.3-0.4% speedup depending on CPU.
- Fixed possible crashes in HTTP client.
# v5.6.0
- [#1536](https://github.com/xmrig/xmrig/pull/1536) Added workaround for new AMD GPU drivers.
- [#1546](https://github.com/xmrig/xmrig/pull/1546) Fixed generic OpenCL code for AMD Navi GPUs.
- [#1551](https://github.com/xmrig/xmrig/pull/1551) Added RandomX JIT for AMD Navi GPUs.
- Added health information for AMD GPUs (clocks/power/fan/temperature) via ADL (Windows) and sysfs (Linux).
- Fixed possible nicehash nonce overflow in some conditions.
- Fixed wrong OpenCL platform on macOS, option `platform` now ignored on this OS.
# v5.5.3
- [#1529](https://github.com/xmrig/xmrig/pull/1529) Fixed crash on Bulldozer CPUs.
# v5.5.2
- [#1500](https://github.com/xmrig/xmrig/pull/1500) Removed unnecessary code from RandomX JIT compiler.
- [#1502](https://github.com/xmrig/xmrig/pull/1502) Optimizations for AMD Bulldozer.
- [#1508](https://github.com/xmrig/xmrig/pull/1508) Added support for BMI2 instructions.
- [#1510](https://github.com/xmrig/xmrig/pull/1510) Optimized `CFROUND` instruction for RandomX.
- [#1520](https://github.com/xmrig/xmrig/pull/1520) Fixed thread affinity.
# v5.5.1
- [#1469](https://github.com/xmrig/xmrig/issues/1469) Fixed build with gcc 4.8.
- [#1473](https://github.com/xmrig/xmrig/pull/1473) Added RandomX auto-config for mobile Ryzen APUs.
- [#1477](https://github.com/xmrig/xmrig/pull/1477) Fixed build with Clang.
- [#1489](https://github.com/xmrig/xmrig/pull/1489) RandomX JIT compiler tweaks.
- [#1493](https://github.com/xmrig/xmrig/pull/1493) Default value for Intel MSR preset changed to `15`.
- Fixed unwanted resume after RandomX dataset change.
# v5.5.0
- [#179](https://github.com/xmrig/xmrig/issues/179) Added support for [environment variables](https://xmrig.com/docs/miner/environment-variables) in config file.
- [#1445](https://github.com/xmrig/xmrig/pull/1445) Removed `rx/v` algorithm.
- [#1453](https://github.com/xmrig/xmrig/issues/1453) Fixed crash on 32bit systems.
- [#1459](https://github.com/xmrig/xmrig/issues/1459) Fixed crash on very low memory systems.
- [#1465](https://github.com/xmrig/xmrig/pull/1465) Added fix for 1st-gen Ryzen crashes.
- [#1466](https://github.com/xmrig/xmrig/pull/1466) Added `cn-pico/tlo` algorithm.
- Added `--randomx-no-rdmsr` command line option.
- Added console title for Windows with miner name and version.
- On Windows `priority` option now also change base priority.
# v5.4.0
- [#1434](https://github.com/xmrig/xmrig/pull/1434) Added RandomSFX (`rx/sfx`) algorithm for Safex Cash.
- [#1445](https://github.com/xmrig/xmrig/pull/1445) Added RandomV (`rx/v`) algorithm for *new* MoneroV.
- [#1419](https://github.com/xmrig/xmrig/issues/1419) Added reverting MSR changes on miner exit, use `"rdmsr": false,` in `"randomx"` object to disable this feature.
- [#1423](https://github.com/xmrig/xmrig/issues/1423) Fixed conflicts with exists WinRing0 driver service.
- [#1425](https://github.com/xmrig/xmrig/issues/1425) Fixed crash on first generation Zen CPUs (MSR mod accidentally enable Opcache), additionally now you can disable Opcache and enable MSR mod via config `"wrmsr": ["0xc0011020:0x0", "0xc0011021:0x60", "0xc0011022:0x510000", "0xc001102b:0x1808cc16"],`.
- Added advanced usage for `wrmsr` option, for example: `"wrmsr": ["0x1a4:0x6"],` (Intel) and `"wrmsr": ["0xc0011020:0x0", "0xc0011021:0x40:0xffffffffffffffdf", "0xc0011022:0x510000", "0xc001102b:0x1808cc16"],` (Ryzen).
- Added new config option `"verbose"` and command line option `--verbose`.
# v5.3.0
- [#1414](https://github.com/xmrig/xmrig/pull/1414) Added native MSR support for Windows, by using signed **WinRing0 driver** (© 2007-2009 OpenLibSys.org).
- Added new [MSR documentation](https://xmrig.com/docs/miner/randomx-optimization-guide/msr).
- [#1418](https://github.com/xmrig/xmrig/pull/1418) Increased stratum send buffer size.
# v5.2.1
- [#1408](https://github.com/xmrig/xmrig/pull/1408) Added RandomX boost script for Linux (if you don't like run miner with root privileges).
- Added support for [AMD Ryzen MSR registers](https://www.reddit.com/r/MoneroMining/comments/e962fu/9526_hs_on_ryzen_7_3700x_xmrig_520_1gb_pages_msr/) (Linux only).
- Fixed command line option `--randomx-wrmsr` option without parameters.
# v5.2.0
- **[#1388](https://github.com/xmrig/xmrig/pull/1388) Added [1GB huge pages support](https://xmrig.com/docs/miner/hugepages#onegb-huge-pages) for Linux.**
- Added new option `1gb-pages` in `randomx` object with command line equivalent `--randomx-1gb-pages`.
- Added automatic huge pages configuration on Linux if use the miner with root privileges.
- **Added [automatic Intel prefetchers configuration](https://xmrig.com/docs/miner/randomx-optimization-guide#intel-specific-optimizations) on Linux.**
- Added new option `wrmsr` in `randomx` object with command line equivalent `--randomx-wrmsr=6`.
- [#1396](https://github.com/xmrig/xmrig/pull/1396) [#1401](https://github.com/xmrig/xmrig/pull/1401) New performance optimizations for Ryzen CPUs.
- [#1385](https://github.com/xmrig/xmrig/issues/1385) Added `max-threads-hint` option support for RandomX dataset initialization threads.
- [#1386](https://github.com/xmrig/xmrig/issues/1386) Added `priority` option support for RandomX dataset initialization threads.
- For official builds all dependencies (libuv, hwloc, openssl) updated to recent versions.
- Windows `msvc` builds now use Visual Studio 2019 instead of 2017.
# v5.1.1
- [#1365](https://github.com/xmrig/xmrig/issues/1365) Fixed various system response/stability issues.
- Added new CPU option `yield` and command line equivalent `--cpu-no-yield`.
- [#1363](https://github.com/xmrig/xmrig/issues/1363) Fixed wrong priority of main miner thread.
# v5.1.0
- [#1351](https://github.com/xmrig/xmrig/pull/1351) RandomX optimizations and fixes.
- Improved RandomX performance (up to +6-7% on Intel CPUs, +2-3% on Ryzen CPUs)
- Added workaround for Intel JCC erratum bug see https://www.phoronix.com/scan.php?page=article&item=intel-jcc-microcode&num=1 for details.
- Note! Always disable "Hardware prefetcher" and "Adjacent cacheline prefetch" in BIOS for Intel CPUs to get the optimal RandomX performance.
- [#1307](https://github.com/xmrig/xmrig/issues/1307) Fixed mining resume after donation round for pools with `self-select` feature.
- [#1318](https://github.com/xmrig/xmrig/issues/1318#issuecomment-559676080) Added option `"mode"` (or `--randomx-mode`) for RandomX.
- Added memory information on miner startup.
- Added `resources` field to summary API with memory information and load average.
# v5.0.1
- [#1234](https://github.com/xmrig/xmrig/issues/1234) Fixed compatibility with some AMD GPUs.
- [#1284](https://github.com/xmrig/xmrig/issues/1284) Fixed build without RandomX.
- [#1285](https://github.com/xmrig/xmrig/issues/1285) Added command line options `--cuda-bfactor-hint` and `--cuda-bsleep-hint`.
- [#1290](https://github.com/xmrig/xmrig/pull/1290) Fixed 32-bit ARM compilation.
# v5.0.0
This version is first stable unified 3 in 1 GPU+CPU release, OpenCL support built in in miner and not require additional external dependencies on compile time, NVIDIA CUDA available as external [CUDA plugin](https://github.com/xmrig/xmrig-cuda), for convenient, 3 in 1 downloads with recent CUDA version also provided.
This release based on 4.x.x series and include all features from v4.6.2-beta, changelog below include only the most important changes, [full changelog](doc/CHANGELOG_OLD.md) available separately.
- [#1272](https://github.com/xmrig/xmrig/pull/1272) Optimized hashrate calculation.
- [#1263](https://github.com/xmrig/xmrig/pull/1263) Added new option `dataset_host` for NVIDIA GPUs with less than 4 GB memory (RandomX only).
- [#1068](https://github.com/xmrig/xmrig/pull/1068) Added support for `self-select` stratum protocol extension.
- [#1227](https://github.com/xmrig/xmrig/pull/1227) Added new algorithm `rx/arq`, RandomX variant for upcoming ArQmA fork.
- [#808](https://github.com/xmrig/xmrig/issues/808#issuecomment-539297156) Added experimental support for persistent memory for CPU mining threads.
- [#1221](https://github.com/xmrig/xmrig/issues/1221) Improved RandomX dataset memory usage and initialization speed for NUMA machines.
- [#1175](https://github.com/xmrig/xmrig/issues/1175) Fixed support for systems where total count of NUMA nodes not equal usable nodes count.
- Added config option `cpu/max-threads-hint` and command line option `--cpu-max-threads-hint`.
- [#1185](https://github.com/xmrig/xmrig/pull/1185) Added JIT compiler for RandomX on ARMv8.
- Improved API endpoint `GET /2/backends` and added support for this endpoint to [workers.xmrig.info](http://workers.xmrig.info).
- Added command line option `--no-cpu` to disable CPU backend.
- Added OpenCL specific command line options: `--opencl`, `--opencl-devices`, `--opencl-platform`, `--opencl-loader` and `--opencl-no-cache`.
- Added CUDA specific command line options: `--cuda`, `--cuda-loader` and `--no-nvml`.
- Removed command line option `--http-enabled`, HTTP API enabled automatically if any other `--http-*` option provided.
- [#1172](https://github.com/xmrig/xmrig/issues/1172) **Added OpenCL mining backend.**
- [#268](https://github.com/xmrig/xmrig-amd/pull/268) [#270](https://github.com/xmrig/xmrig-amd/pull/270) [#271](https://github.com/xmrig/xmrig-amd/pull/271) [#273](https://github.com/xmrig/xmrig-amd/pull/273) [#274](https://github.com/xmrig/xmrig-amd/pull/274) [#1171](https://github.com/xmrig/xmrig/pull/1171) Added RandomX support for OpenCL, thanks [@SChernykh](https://github.com/SChernykh).
- Algorithm `cn/wow` removed, as no longer alive.
# Previous versions
[doc/CHANGELOG_OLD.md](doc/CHANGELOG_OLD.md)

View File

@@ -6,14 +6,23 @@ option(WITH_HWLOC "Enable hwloc support" ON)
option(WITH_CN_LITE "Enable CryptoNight-Lite algorithms family" ON)
option(WITH_CN_HEAVY "Enable CryptoNight-Heavy algorithms family" ON)
option(WITH_CN_PICO "Enable CryptoNight-Pico algorithm" ON)
option(WITH_CN_GPU "Enable CryptoNight-GPU algorithm" ON)
option(WITH_RANDOMX "Enable RandomX algorithms family" ON)
option(WITH_ARGON2 "Enable Argon2 algorithms family" ON)
option(WITH_ASTROBWT "Enable AstroBWT algorithms family" ON)
option(WITH_KAWPOW "Enable KawPow algorithms family" ON)
option(WITH_HTTP "Enable HTTP protocol support (client/server)" ON)
option(WITH_DEBUG_LOG "Enable debug log output" OFF)
option(WITH_TLS "Enable OpenSSL support" ON)
option(WITH_ASM "Enable ASM PoW implementations" ON)
option(WITH_MSR "Enable MSR mod & 1st-gen Ryzen fix" ON)
option(WITH_ENV_VARS "Enable environment variables support in config file" ON)
option(WITH_EMBEDDED_CONFIG "Enable internal embedded JSON config" OFF)
option(WITH_OPENCL "Enable OpenCL backend" ON)
option(WITH_CUDA "Enable CUDA backend" ON)
option(WITH_NVML "Enable NVML (NVIDIA Management Library) support (only if CUDA backend enabled)" ON)
option(WITH_ADL "Enable ADL (AMD Display Library) or sysfs support (only if OpenCL backend enabled)" ON)
option(WITH_STRICT_CACHE "Enable strict checks for OpenCL cache" ON)
option(WITH_INTERLEAVE_DEBUG_LOG "Enable debug log for threads interleave" OFF)
option(BUILD_STATIC "Build static binary" OFF)
option(ARM_TARGET "Force use specific ARM target 8 or 7" 0)
@@ -25,6 +34,7 @@ set(CMAKE_MODULE_PATH ${CMAKE_MODULE_PATH} "${CMAKE_SOURCE_DIR}/cmake")
include (CheckIncludeFile)
include (cmake/cpu.cmake)
include (cmake/os.cmake)
include (src/base/base.cmake)
include (src/backend/backend.cmake)
@@ -45,13 +55,13 @@ set(HEADERS
src/net/JobResult.h
src/net/JobResults.h
src/net/Network.h
src/net/NetworkState.h
src/net/strategies/DonateStrategy.h
src/Summary.h
src/version.h
)
set(HEADERS_CRYPTO
src/backend/common/interfaces/IMemoryPool.h
src/crypto/cn/asm/CryptonightR_template.h
src/crypto/cn/c_blake256.h
src/crypto/cn/c_groestl.h
@@ -67,8 +77,8 @@ set(HEADERS_CRYPTO
src/crypto/cn/hash.h
src/crypto/cn/skein_port.h
src/crypto/cn/soft_aes.h
src/crypto/common/Algorithm.h
src/crypto/common/keccak.h
src/crypto/common/HugePagesInfo.h
src/crypto/common/MemoryPool.h
src/crypto/common/Nonce.h
src/crypto/common/portable/mm_malloc.h
src/crypto/common/VirtualMemory.h
@@ -91,7 +101,6 @@ set(SOURCES
src/core/Miner.cpp
src/net/JobResults.cpp
src/net/Network.cpp
src/net/NetworkState.cpp
src/net/strategies/DonateStrategy.cpp
src/Summary.cpp
src/xmrig.cpp
@@ -104,60 +113,70 @@ set(SOURCES_CRYPTO
src/crypto/cn/c_skein.c
src/crypto/cn/CnCtx.cpp
src/crypto/cn/CnHash.cpp
src/crypto/common/Algorithm.cpp
src/crypto/common/keccak.cpp
src/crypto/common/HugePagesInfo.cpp
src/crypto/common/MemoryPool.cpp
src/crypto/common/Nonce.cpp
src/crypto/common/VirtualMemory.cpp
)
if (WIN32)
set(SOURCES_OS
"${SOURCES_OS}"
if (WITH_HWLOC)
list(APPEND HEADERS_CRYPTO
src/crypto/common/NUMAMemoryPool.h
)
list(APPEND SOURCES_CRYPTO
src/crypto/common/NUMAMemoryPool.cpp
src/crypto/common/VirtualMemory_hwloc.cpp
)
endif()
if (XMRIG_OS_WIN)
list(APPEND SOURCES_OS
res/app.rc
src/App_win.cpp
src/crypto/common/VirtualMemory_win.cpp
)
add_definitions(/DWIN32)
set(EXTRA_LIBS ws2_32 psapi iphlpapi userenv)
elseif (APPLE)
set(SOURCES_OS
"${SOURCES_OS}"
elseif (XMRIG_OS_APPLE)
list(APPEND SOURCES_OS
src/App_unix.cpp
src/crypto/common/VirtualMemory_unix.cpp
)
find_library(IOKIT_LIBRARY IOKit)
set(EXTRA_LIBS ${IOKIT_LIBRARY})
else()
set(SOURCES_OS
"${SOURCES_OS}"
list(APPEND SOURCES_OS
src/App_unix.cpp
src/crypto/common/VirtualMemory_unix.cpp
)
if (CMAKE_SYSTEM_NAME STREQUAL FreeBSD)
set(EXTRA_LIBS kvm pthread)
else()
if (XMRIG_OS_ANDROID)
set(EXTRA_LIBS pthread rt dl log)
elseif (XMRIG_OS_LINUX)
list(APPEND SOURCES_OS
src/crypto/common/LinuxMemory.h
src/crypto/common/LinuxMemory.cpp
)
set(EXTRA_LIBS pthread rt dl)
elseif (XMRIG_OS_FREEBSD)
set(EXTRA_LIBS kvm pthread)
endif()
endif()
if (CMAKE_SYSTEM_NAME MATCHES "Linux")
EXECUTE_PROCESS(COMMAND uname -o COMMAND tr -d '\n' OUTPUT_VARIABLE OPERATING_SYSTEM)
if (OPERATING_SYSTEM MATCHES "Android")
set(EXTRA_LIBS ${EXTRA_LIBS} log)
endif()
endif()
add_definitions(/D__STDC_FORMAT_MACROS)
add_definitions(/DUNICODE)
add_definitions(-DXMRIG_MINER_PROJECT)
add_definitions(-D__STDC_FORMAT_MACROS -DUNICODE)
find_package(UV REQUIRED)
include(cmake/flags.cmake)
include(cmake/randomx.cmake)
include(cmake/argon2.cmake)
include(cmake/astrobwt.cmake)
include(cmake/kawpow.cmake)
include(cmake/OpenSSL.cmake)
include(cmake/asm.cmake)
include(cmake/cn-gpu.cmake)
if (WITH_CN_LITE)
add_definitions(/DXMRIG_ALGO_CN_LITE)
@@ -187,5 +206,10 @@ if (WITH_DEBUG_LOG)
add_definitions(/DAPP_DEBUG)
endif()
add_executable(${CMAKE_PROJECT_NAME} ${HEADERS} ${SOURCES} ${SOURCES_OS} ${SOURCES_CPUID} ${HEADERS_CRYPTO} ${SOURCES_CRYPTO} ${SOURCES_SYSLOG} ${TLS_SOURCES} ${XMRIG_ASM_SOURCES} ${CN_GPU_SOURCES})
target_link_libraries(${CMAKE_PROJECT_NAME} ${XMRIG_ASM_LIBRARY} ${OPENSSL_LIBRARIES} ${UV_LIBRARIES} ${EXTRA_LIBS} ${CPUID_LIB} ${ARGON2_LIBRARY})
add_executable(${CMAKE_PROJECT_NAME} ${HEADERS} ${SOURCES} ${SOURCES_OS} ${SOURCES_CPUID} ${HEADERS_CRYPTO} ${SOURCES_CRYPTO} ${SOURCES_SYSLOG} ${TLS_SOURCES} ${XMRIG_ASM_SOURCES})
target_link_libraries(${CMAKE_PROJECT_NAME} ${XMRIG_ASM_LIBRARY} ${OPENSSL_LIBRARIES} ${UV_LIBRARIES} ${EXTRA_LIBS} ${CPUID_LIB} ${ARGON2_LIBRARY} ${ETHASH_LIBRARY})
if (WIN32)
add_custom_command(TARGET ${CMAKE_PROJECT_NAME} POST_BUILD
COMMAND ${CMAKE_COMMAND} -E copy_if_different "${CMAKE_SOURCE_DIR}/bin/WinRing0/WinRing0x64.sys" $<TARGET_FILE_DIR:${CMAKE_PROJECT_NAME}>)
endif()

View File

@@ -7,18 +7,14 @@
[![GitHub stars](https://img.shields.io/github/stars/xmrig/xmrig.svg)](https://github.com/xmrig/xmrig/stargazers)
[![GitHub forks](https://img.shields.io/github/forks/xmrig/xmrig.svg)](https://github.com/xmrig/xmrig/network)
XMRig is a high performance RandomX and CryptoNight CPU miner, with official support for Windows.
XMRig High performance, open source, cross platform RandomX, KawPow, CryptoNight, AstroBWT and Argon2 CPU/GPU miner, with official support for Windows.
* This is the **CPU-mining** version, there is also a [NVIDIA GPU version](https://github.com/xmrig/xmrig-nvidia) and [AMD GPU version]( https://github.com/xmrig/xmrig-amd).
## Mining backends
- **CPU** (x64/x86/ARM)
- **OpenCL** for AMD GPUs.
- **CUDA** for NVIDIA GPUs via external [CUDA plugin](https://github.com/xmrig/xmrig-cuda).
<img src="doc/screenshot.png" width="808" >
#### Table of contents
* [Download](#download)
* [Usage](#usage)
* [Build](https://github.com/xmrig/xmrig/wiki/Build)
* [Donations](#donations)
* [Contacts](#contacts)
<img src="doc/screenshot_v5_2_0.png" width="833" >
## Download
* Binary releases: https://github.com/xmrig/xmrig/releases
@@ -26,57 +22,11 @@ XMRig is a high performance RandomX and CryptoNight CPU miner, with official sup
* Clone with `git clone https://github.com/xmrig/xmrig.git` :hammer: [Build instructions](https://github.com/xmrig/xmrig/wiki/Build).
## Usage
Preferend way to configure miner is [JSON config file](src/config.json) as more flexible and human frendly, command line interface not cover all features, for example mining profiles for different algorithms. Most impotant options can be changed in runtime without miner restart by editing config or via API.
The preferred way to configure the miner is the [JSON config file](src/config.json) as it is more flexible and human friendly. The command line interface does not cover all features, such as mining profiles for different algorithms. Important options can be changed during runtime without miner restart by editing the config file or executing API calls.
### Options
```
-a, --algo=ALGO specify the algorithm to use
cn/r, cn/2, cn/1, cn/0, cn/double, cn/half, cn/fast,
cn/rwz, cn/zls, cn/xao, cn/rto, cn/gpu,
cn-lite/1,
cn-heavy/xhv, cn-heavy/tube, cn-heavy/0,
cn-pico,
rx/wow, rx/loki
-o, --url=URL URL of mining server
-O, --userpass=U:P username:password pair for mining server
-u, --user=USERNAME username for mining server
-p, --pass=PASSWORD password for mining server
--rig-id=ID rig identifier for pool-side statistics (needs pool support)
-t, --threads=N number of miner threads
-v, --av=N algorithm variation, 0 auto select
-k, --keepalive send keepalived packet for prevent timeout (needs pool support)
--nicehash enable nicehash.com support
--tls enable SSL/TLS support (needs pool support)
--tls-fingerprint=F pool TLS certificate fingerprint, if set enable strict certificate pinning
--daemon use daemon RPC instead of pool for solo mining
--daemon-poll-interval=N daemon poll interval in milliseconds (default: 1000)
-r, --retries=N number of times to retry before switch to backup server (default: 5)
-R, --retry-pause=N time to pause between retries (default: 5)
--cpu-affinity set process affinity to CPU core(s), mask 0x3 for cores 0 and 1
--cpu-priority set process priority (0 idle, 2 normal to 5 highest)
--no-huge-pages disable huge pages support
--no-color disable colored output
--donate-level=N donate level, default 5% (5 minutes in 100 minutes)
--user-agent set custom user-agent string for pool
-B, --background run the miner in the background
-c, --config=FILE load a JSON-format configuration file
-l, --log-file=FILE log all output to a file
--asm=ASM ASM optimizations, possible values: auto, none, intel, ryzen, bulldozer.
--print-time=N print hashrate report every N seconds
--api-worker-id=ID custom worker-id for API
--api-id=ID custom instance ID for API
--http-enabled enable HTTP API
--http-host=HOST bind host for HTTP API (default: 127.0.0.1)
--http-port=N bind port for HTTP API
--http-access-token=T access token for HTTP API
--http-no-restricted enable full remote access to HTTP API (only if access token set)
--randomx-init=N threads count to initialize RandomX dataset
--randomx-no-numa disable NUMA support for RandomX
--export-topology export hwloc topology to a XML file and exit
--dry-run test configuration and exit
-h, --help display this help and exit
-V, --version output version information and exit
```
* **[xmrig.com/wizard](https://xmrig.com/wizard)** helps you create initial configuration for the miner.
* **[workers.xmrig.info](http://workers.xmrig.info)** helps manage your miners via HTTP API.
* **[Command line options](https://xmrig.com/docs/miner/command-line-options)**
## Donations
* Default donation 5% (5 minutes in 100 minutes) can be reduced to 1% via option `donate-level` or disabled in source code.

21
bin/WinRing0/LICENSE Normal file
View File

@@ -0,0 +1,21 @@
Copyright (c) 2007-2009 OpenLibSys.org. All rights reserved.
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions
are met:
1. Redistributions of source code must retain the above copyright
notice, this list of conditions and the following disclaimer.
2. Redistributions in binary form must reproduce the above copyright
notice, this list of conditions and the following disclaimer in the
documentation and/or other materials provided with the distribution.
THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

Binary file not shown.

View File

@@ -5,17 +5,38 @@ if (WITH_TLS)
set(OPENSSL_USE_STATIC_LIBS TRUE)
set(OPENSSL_MSVC_STATIC_RT TRUE)
set(EXTRA_LIBS ${EXTRA_LIBS} Crypt32)
set(EXTRA_LIBS ${EXTRA_LIBS} crypt32)
elseif (APPLE)
set(OPENSSL_USE_STATIC_LIBS TRUE)
endif()
find_package(OpenSSL)
if (OPENSSL_FOUND)
set(TLS_SOURCES src/base/net/stratum/Tls.h src/base/net/stratum/Tls.cpp)
set(TLS_SOURCES
src/base/net/stratum/Tls.cpp
src/base/net/stratum/Tls.h
src/base/net/tls/ServerTls.cpp
src/base/net/tls/ServerTls.h
src/base/net/tls/TlsConfig.cpp
src/base/net/tls/TlsConfig.h
src/base/net/tls/TlsContext.cpp
src/base/net/tls/TlsContext.h
src/base/net/tls/TlsGen.cpp
src/base/net/tls/TlsGen.h
)
include_directories(${OPENSSL_INCLUDE_DIR})
if (WITH_HTTP)
set(TLS_SOURCES ${TLS_SOURCES} src/base/net/http/HttpsClient.h src/base/net/http/HttpsClient.cpp)
set(TLS_SOURCES ${TLS_SOURCES}
src/base/net/https/HttpsClient.cpp
src/base/net/https/HttpsClient.h
src/base/net/https/HttpsContext.cpp
src/base/net/https/HttpsContext.h
src/base/net/https/HttpsServer.cpp
src/base/net/https/HttpsServer.h
)
endif()
else()
message(FATAL_ERROR "OpenSSL NOT found: use `-DWITH_TLS=OFF` to build without TLS support")
@@ -27,5 +48,12 @@ else()
set(OPENSSL_LIBRARIES "")
remove_definitions(/DXMRIG_FEATURE_TLS)
if (WITH_HTTP)
set(TLS_SOURCES ${TLS_SOURCES}
src/base/net/http/HttpServer.cpp
src/base/net/http/HttpServer.h
)
endif()
set(CMAKE_PROJECT_NAME "${CMAKE_PROJECT_NAME}-notls")
endif()

45
cmake/astrobwt.cmake Normal file
View File

@@ -0,0 +1,45 @@
if (WITH_ASTROBWT)
add_definitions(/DXMRIG_ALGO_ASTROBWT)
list(APPEND HEADERS_CRYPTO
src/crypto/astrobwt/AstroBWT.h
)
list(APPEND SOURCES_CRYPTO
src/crypto/astrobwt/AstroBWT.cpp
)
if (XMRIG_ARM)
list(APPEND HEADERS_CRYPTO
src/crypto/astrobwt/salsa20_ref/ecrypt-config.h
src/crypto/astrobwt/salsa20_ref/ecrypt-machine.h
src/crypto/astrobwt/salsa20_ref/ecrypt-portable.h
src/crypto/astrobwt/salsa20_ref/ecrypt-sync.h
)
list(APPEND SOURCES_CRYPTO
src/crypto/astrobwt/salsa20_ref/salsa20.c
)
else()
if (CMAKE_SIZEOF_VOID_P EQUAL 8)
add_definitions(/DASTROBWT_AVX2)
if (CMAKE_C_COMPILER_ID MATCHES MSVC)
enable_language(ASM_MASM)
list(APPEND SOURCES_CRYPTO src/crypto/astrobwt/sha3_256_avx2.asm)
else()
enable_language(ASM)
list(APPEND SOURCES_CRYPTO src/crypto/astrobwt/sha3_256_avx2.S)
endif()
endif()
list(APPEND HEADERS_CRYPTO
src/crypto/astrobwt/Salsa20.hpp
)
list(APPEND SOURCES_CRYPTO
src/crypto/astrobwt/Salsa20.cpp
)
endif()
else()
remove_definitions(/DXMRIG_ALGO_ASTROBWT)
endif()

View File

@@ -1,25 +0,0 @@
if (WITH_CN_GPU AND CMAKE_SIZEOF_VOID_P EQUAL 8)
if (XMRIG_ARM)
set(CN_GPU_SOURCES src/crypto/cn/gpu/cn_gpu_arm.cpp)
if (CMAKE_CXX_COMPILER_ID MATCHES GNU OR CMAKE_CXX_COMPILER_ID MATCHES Clang)
set_source_files_properties(src/crypto/cn/gpu/cn_gpu_arm.cpp PROPERTIES COMPILE_FLAGS "-O3")
endif()
else()
set(CN_GPU_SOURCES src/crypto/cn/gpu/cn_gpu_avx.cpp src/crypto/cn/gpu/cn_gpu_ssse3.cpp)
if (CMAKE_CXX_COMPILER_ID MATCHES GNU OR CMAKE_CXX_COMPILER_ID MATCHES Clang)
set_source_files_properties(src/crypto/cn/gpu/cn_gpu_avx.cpp PROPERTIES COMPILE_FLAGS "-O3 -mavx2")
set_source_files_properties(src/crypto/cn/gpu/cn_gpu_ssse3.cpp PROPERTIES COMPILE_FLAGS "-O3")
elseif (CMAKE_CXX_COMPILER_ID MATCHES MSVC)
set_source_files_properties(src/crypto/cn/gpu/cn_gpu_avx.cpp PROPERTIES COMPILE_FLAGS "/arch:AVX")
endif()
endif()
add_definitions(/DXMRIG_ALGO_CN_GPU)
else()
set(CN_GPU_SOURCES "")
remove_definitions(/DXMRIG_ALGO_CN_GPU)
endif()

View File

@@ -2,6 +2,9 @@ set(CMAKE_CXX_STANDARD_REQUIRED ON)
set(CMAKE_CXX_EXTENSIONS OFF)
set(CMAKE_CXX_STANDARD 11)
set(CMAKE_C_STANDARD 99)
set(CMAKE_C_STANDARD_REQUIRED ON)
if ("${CMAKE_BUILD_TYPE}" STREQUAL "")
set(CMAKE_BUILD_TYPE Release)
endif()
@@ -13,11 +16,10 @@ endif()
include(CheckSymbolExists)
if (CMAKE_CXX_COMPILER_ID MATCHES GNU)
set(CMAKE_C_FLAGS "${CMAKE_C_FLAGS} -Wall -Wno-strict-aliasing")
set(CMAKE_C_FLAGS_RELEASE "${CMAKE_C_FLAGS_RELEASE} -Ofast")
set(CMAKE_CXX_FLAGS "${CMAKE_CXX_FLAGS} -Wall -fexceptions -fno-rtti -Wno-class-memaccess")
set(CMAKE_CXX_FLAGS "${CMAKE_CXX_FLAGS} -Wall -fexceptions -fno-rtti -Wno-strict-aliasing -Wno-class-memaccess")
set(CMAKE_CXX_FLAGS_RELEASE "${CMAKE_CXX_FLAGS_RELEASE} -Ofast -s")
if (XMRIG_ARMv8)
@@ -46,15 +48,21 @@ if (CMAKE_CXX_COMPILER_ID MATCHES GNU)
add_definitions(/D_GNU_SOURCE)
if (${CMAKE_VERSION} VERSION_LESS "3.1.0")
set(CMAKE_C_FLAGS "${CMAKE_C_FLAGS} -std=c99")
set(CMAKE_CXX_FLAGS "${CMAKE_CXX_FLAGS} -std=c++11")
endif()
#set(CMAKE_C_FLAGS_RELEASE "${CMAKE_CXX_FLAGS_RELEASE} -gdwarf-2")
elseif (CMAKE_CXX_COMPILER_ID MATCHES MSVC)
add_definitions(/DHAVE_BUILTIN_CLEAR_CACHE)
elseif (CMAKE_CXX_COMPILER_ID MATCHES MSVC)
set(CMAKE_C_FLAGS_RELEASE "/MT /O2 /Oi /DNDEBUG /GL")
set(CMAKE_CXX_FLAGS_RELEASE "/MT /O2 /Oi /DNDEBUG /GL")
set(CMAKE_C_FLAGS_RELWITHDEBINFO "/Ob1 /GL")
set(CMAKE_CXX_FLAGS_RELWITHDEBINFO "/Ob1 /GL")
set(CMAKE_C_FLAGS_RELEASE "${CMAKE_C_FLAGS_RELEASE} /Ox /Ot /Oi /MT /GL")
set(CMAKE_CXX_FLAGS_RELEASE "${CMAKE_CXX_FLAGS_RELEASE} /Ox /Ot /Oi /MT /GL")
add_definitions(/D_CRT_SECURE_NO_WARNINGS)
add_definitions(/D_CRT_NONSTDC_NO_WARNINGS)
add_definitions(/DNOMINMAX)

19
cmake/kawpow.cmake Normal file
View File

@@ -0,0 +1,19 @@
if (WITH_KAWPOW)
add_definitions(/DXMRIG_ALGO_KAWPOW)
list(APPEND HEADERS_CRYPTO
src/crypto/kawpow/KPCache.h
src/crypto/kawpow/KPHash.h
)
list(APPEND SOURCES_CRYPTO
src/crypto/kawpow/KPCache.cpp
src/crypto/kawpow/KPHash.cpp
)
add_subdirectory(src/3rdparty/libethash)
set(ETHASH_LIBRARY ethash)
else()
remove_definitions(/DXMRIG_ALGO_KAWPOW)
set(ETHASH_LIBRARY "")
endif()

45
cmake/os.cmake Normal file
View File

@@ -0,0 +1,45 @@
if (WIN32)
set(XMRIG_OS_WIN ON)
elseif (APPLE)
set(XMRIG_OS_APPLE ON)
if (IOS OR CMAKE_SYSTEM_NAME STREQUAL iOS)
set(XMRIG_OS_IOS ON)
else()
set(XMRIG_OS_MACOS ON)
endif()
else()
set(XMRIG_OS_UNIX ON)
if (ANDROID OR CMAKE_SYSTEM_NAME MATCHES "Android")
set(XMRIG_OS_ANDROID ON)
elseif(CMAKE_SYSTEM_NAME MATCHES "Linux")
set(XMRIG_OS_LINUX ON)
elseif(CMAKE_SYSTEM_NAME STREQUAL FreeBSD)
set(XMRIG_OS_FREEBSD ON)
endif()
endif()
if (XMRIG_OS_WIN)
add_definitions(/DWIN32)
add_definitions(/DXMRIG_OS_WIN)
elseif(XMRIG_OS_APPLE)
add_definitions(/DXMRIG_OS_APPLE)
if (XMRIG_OS_IOS)
add_definitions(/DXMRIG_OS_IOS)
else()
add_definitions(/DXMRIG_OS_MACOS)
endif()
elseif(XMRIG_OS_UNIX)
add_definitions(/DXMRIG_OS_UNIX)
if (XMRIG_OS_ANDROID)
add_definitions(/DXMRIG_OS_ANDROID)
elseif (XMRIG_OS_LINUX)
add_definitions(/DXMRIG_OS_LINUX)
elseif (XMRIG_OS_FREEBSD)
add_definitions(/DXMRIG_OS_FREEBSD)
endif()
endif()

View File

@@ -1,20 +1,22 @@
if (WITH_RANDOMX)
add_definitions(/DXMRIG_ALGO_RANDOMX)
set(WITH_ARGON2 ON)
list(APPEND HEADERS_CRYPTO
src/crypto/rx/Rx.h
src/crypto/rx/RxAlgo.h
src/crypto/rx/RxBasicStorage.h
src/crypto/rx/RxCache.h
src/crypto/rx/RxConfig.h
src/crypto/rx/RxDataset.h
src/crypto/rx/RxQueue.h
src/crypto/rx/RxSeed.h
src/crypto/rx/RxVm.h
)
list(APPEND SOURCES_CRYPTO
src/crypto/randomx/aes_hash.cpp
src/crypto/randomx/allocator.cpp
src/crypto/randomx/argon2_core.c
src/crypto/randomx/argon2_ref.c
src/crypto/randomx/blake2_generator.cpp
src/crypto/randomx/blake2/blake2b.c
src/crypto/randomx/bytecode_machine.cpp
@@ -32,9 +34,11 @@ if (WITH_RANDOMX)
src/crypto/randomx/vm_interpreted.cpp
src/crypto/rx/Rx.cpp
src/crypto/rx/RxAlgo.cpp
src/crypto/rx/RxBasicStorage.cpp
src/crypto/rx/RxCache.cpp
src/crypto/rx/RxConfig.cpp
src/crypto/rx/RxDataset.cpp
src/crypto/rx/RxQueue.cpp
src/crypto/rx/RxVm.cpp
)
@@ -51,6 +55,46 @@ if (WITH_RANDOMX)
)
# cheat because cmake and ccache hate each other
set_property(SOURCE src/crypto/randomx/jit_compiler_x86_static.S PROPERTY LANGUAGE C)
elseif (XMRIG_ARM AND CMAKE_SIZEOF_VOID_P EQUAL 8)
list(APPEND SOURCES_CRYPTO
src/crypto/randomx/jit_compiler_a64_static.S
src/crypto/randomx/jit_compiler_a64.cpp
)
# cheat because cmake and ccache hate each other
set_property(SOURCE src/crypto/randomx/jit_compiler_a64_static.S PROPERTY LANGUAGE C)
endif()
if (CMAKE_CXX_COMPILER_ID MATCHES Clang)
set_source_files_properties(src/crypto/randomx/jit_compiler_x86.cpp PROPERTIES COMPILE_FLAGS -Wno-unused-const-variable)
endif()
if (WITH_HWLOC)
list(APPEND HEADERS_CRYPTO
src/crypto/rx/RxNUMAStorage.h
)
list(APPEND SOURCES_CRYPTO
src/crypto/rx/RxNUMAStorage.cpp
)
endif()
if (WITH_MSR AND NOT XMRIG_ARM AND CMAKE_SIZEOF_VOID_P EQUAL 8 AND (XMRIG_OS_WIN OR XMRIG_OS_LINUX))
add_definitions(/DXMRIG_FEATURE_MSR)
add_definitions(/DXMRIG_FIX_RYZEN)
message("-- WITH_MSR=ON")
if (XMRIG_OS_WIN)
list(APPEND SOURCES_CRYPTO src/crypto/rx/Rx_win.cpp)
elseif (XMRIG_OS_LINUX)
list(APPEND SOURCES_CRYPTO src/crypto/rx/Rx_linux.cpp)
endif()
list(APPEND HEADERS_CRYPTO src/crypto/rx/msr/MsrItem.h)
list(APPEND SOURCES_CRYPTO src/crypto/rx/msr/MsrItem.cpp)
else()
remove_definitions(/DXMRIG_FEATURE_MSR)
remove_definitions(/DXMRIG_FIX_RYZEN)
message("-- WITH_MSR=OFF")
endif()
else()
remove_definitions(/DXMRIG_ALGO_RANDOMX)

View File

@@ -1,5 +1,47 @@
# Algorithms
Algorithm can be defined in 3 ways:
1. By pool, using algorithm negotiation, in this case no need specify algorithm on miner side.
2. Per pool `coin` option, currently only usable values for this option is `monero` and `arqma`.
3. Per pool `algo` option.
Option `coin` useful for pools without [algorithm negotiation](https://xmrig.com/docs/extensions/algorithm-negotiation) support or daemon to allow automatically switch algorithm in next hard fork. If you use xmrig-proxy don't need specify algorithm on miner side.
## Algorithm names
| Name | Memory | Version | Description | Notes |
|------|--------|---------|-------------|-------|
| `kawpow` | - | 6.0.0+ | KawPow (Ravencoin) | GPU only |
| `rx/keva` | 1 MB | 5.9.0+ | RandomKEVA (RandomX variant for Keva). | |
| `astrobwt` | 20 MB | 5.8.0+ | AstroBWT (Dero). | |
| `cn-pico/tlo` | 256 KB | 5.5.0+ | CryptoNight-Pico (Talleo). | |
| `rx/sfx` | 2 MB | 5.4.0+ | RandomSFX (RandomX variant for Safex). | |
| `rx/arq` | 256 KB | 4.3.0+ | RandomARQ (RandomX variant for ArQmA). | |
| `rx/0` | 2 MB | 3.2.0+ | RandomX (Monero). | |
| `argon2/chukwa` | 512 KB | 3.1.0+ | Argon2id (Chukwa). | CPU only |
| `argon2/wrkz` | 256 KB | 3.1.0+ | Argon2id (WRKZ) | CPU only |
| `rx/wow` | 1 MB | 3.0.0+ | RandomWOW (RandomX variant for Wownero). | |
| `rx/loki` | 2 MB | 3.0.0+ | RandomXL (RandomX variant for Loki). | |
| `cn/fast` | 2 MB | 3.0.0+ | CryptoNight variant 1 with half iterations. | |
| `cn/rwz` | 2 MB | 2.14.0+ | CryptoNight variant 2 with 3/4 iterations and reversed shuffle operation. | |
| `cn/zls` | 2 MB | 2.14.0+ | CryptoNight variant 2 with 3/4 iterations. | |
| `cn/double` | 2 MB | 2.14.0+ | CryptoNight variant 2 with double iterations. | |
| `cn/r` | 2 MB | 2.13.0+ | CryptoNightR (Monero's variant 4). | |
| `cn-pico` | 256 KB | 2.10.0+ | CryptoNight-Pico. | |
| `cn/half` | 2 MB | 2.9.0+ | CryptoNight variant 2 with half iterations. | |
| `cn/2` | 2 MB | 2.8.0+ | CryptoNight variant 2. | |
| `cn/xao` | 2 MB | 2.6.4+ | CryptoNight variant 0 (modified). | |
| `cn/rto` | 2 MB | 2.6.4+ | CryptoNight variant 1 (modified). | |
| `cn-heavy/tube` | 4 MB | 2.6.4+ | CryptoNight-Heavy (modified). | |
| `cn-heavy/xhv` | 4 MB | 2.6.3+ | CryptoNight-Heavy (modified). | |
| `cn-heavy/0` | 4 MB | 2.6.0+ | CryptoNight-Heavy. | |
| `cn/1` | 2 MB | 2.5.0+ | CryptoNight variant 1. | |
| `cn-lite/1` | 1 MB | 2.5.0+ | CryptoNight-Lite variant 1. | |
| `cn-lite/0` | 1 MB | 0.8.0+ | CryptoNight-Lite variant 0. | |
| `cn/0` | 2 MB | 0.5.0+ | CryptoNight (original). | |
## Migration to v3
Since version 3 mining [algorithm](#algorithm-names) should specified for each pool separately (`algo` option), earlier versions was use one global `algo` option and per pool `variant` option (this option was removed in v3). If your pool support [mining algorithm negotiation](https://github.com/xmrig/xmrig-proxy/issues/168) you may not specify this option at all.
#### Example
@@ -9,44 +51,10 @@ Since version 3 mining [algorithm](#algorithm-names) should specified for each p
{
"url": "...",
"algo": "cn/r",
"coin": null
...
}
],
...
}
```
#### Pools with mining algorithm negotiation support.
* [www.hashvault.pro](https://www.hashvault.pro/)
* [moneroocean.stream](https://moneroocean.stream)
## Algorithm names
| Name | Memory | Version | Notes |
|------|--------|---------|-------|
| `argon2/chukwa` | 512 KB | 3.1.0+ | Argon2id (Chukwa). |
| `argon2/wrkz` | 256 KB | 3.1.0+ | Argon2id (WRKZ) |
| `rx/test` | 2 MB | 3.0.0+ | RandomX (reference configuration). |
| `rx/0` | 2 MB | 3.0.0+ | RandomX (reference configuration), reserved for future use. |
| `rx/wow` | 1 MB | 3.0.0+ | RandomWOW. |
| `rx/loki` | 2 MB | 3.0.0+ | RandomXL. |
| `cn/fast` | 2 MB | 3.0.0+ | CryptoNight variant 1 with half iterations. |
| `cn/rwz` | 2 MB | 2.14.0+ | CryptoNight variant 2 with 3/4 iterations and reversed shuffle operation. |
| `cn/zls` | 2 MB | 2.14.0+ | CryptoNight variant 2 with 3/4 iterations. |
| `cn/double` | 2 MB | 2.14.0+ | CryptoNight variant 2 with double iterations. |
| `cn/r` | 2 MB | 2.13.0+ | CryptoNightR (Monero's variant 4). |
| `cn/wow` | 2 MB | 2.12.0+ | CryptoNightR (Wownero). |
| `cn/gpu` | 2 MB | 2.11.0+ | CryptoNight-GPU. |
| `cn-pico` | 256 KB | 2.10.0+ | CryptoNight-Pico. |
| `cn/half` | 2 MB | 2.9.0+ | CryptoNight variant 2 with half iterations. |
| `cn/2` | 2 MB | 2.8.0+ | CryptoNight variant 2. |
| `cn/xao` | 2 MB | 2.6.4+ | CryptoNight variant 0 (modified). |
| `cn/rto` | 2 MB | 2.6.4+ | CryptoNight variant 1 (modified). |
| `cn-heavy/tube` | 4 MB | 2.6.4+ | CryptoNight-Heavy (modified). |
| `cn-heavy/xhv` | 4 MB | 2.6.3+ | CryptoNight-Heavy (modified). |
| `cn-heavy/0` | 4 MB | 2.6.0+ | CryptoNight-Heavy. |
| `cn/1` | 2 MB | 2.5.0+ | CryptoNight variant 1. |
| `cn-lite/1` | 1 MB | 2.5.0+ | CryptoNight-Lite variant 1. |
| `cn-lite/0` | 1 MB | 0.8.0+ | CryptoNight-Lite variant 0. |
| `cn/0` | 2 MB | 0.5.0+ | CryptoNight (original). |

View File

@@ -1,3 +1,116 @@
# v4.6.2-beta
- [#1274](https://github.com/xmrig/xmrig/issues/1274) Added `--cuda-devices` command line option.
- [#1277](https://github.com/xmrig/xmrig/pull/1277) Fixed function names for clang on Apple.
# v4.6.1-beta
- [#1272](https://github.com/xmrig/xmrig/pull/1272) Optimized hashrate calculation.
- [#1273](https://github.com/xmrig/xmrig/issues/1273) Fixed crash when use `GET /2/backends` API endpoint with disabled CUDA.
# v4.6.0-beta
- [#1263](https://github.com/xmrig/xmrig/pull/1263) Added new option `dataset_host` for NVIDIA GPUs with less than 4 GB memory (RandomX only).
# v4.5.0-beta
- Added NVIDIA CUDA support via external [CUDA plugun](https://github.com/xmrig/xmrig-cuda). XMRig now is unified 3 in 1 miner.
# v4.4.0-beta
- [#1068](https://github.com/xmrig/xmrig/pull/1068) Added support for `self-select` stratum protocol extension.
- [#1240](https://github.com/xmrig/xmrig/pull/1240) Sync with the latest RandomX code.
- [#1241](https://github.com/xmrig/xmrig/issues/1241) Fixed regression with colors on old Windows systems.
- [#1243](https://github.com/xmrig/xmrig/pull/1243) Fixed incorrect OpenCL memory size detection in some cases.
- [#1247](https://github.com/xmrig/xmrig/pull/1247) Fixed ARM64 RandomX code alignment.
- [#1248](https://github.com/xmrig/xmrig/pull/1248) Fixed RandomX code cache cleanup on iOS/Darwin.
# v4.3.1-beta
- Fixed regression in v4.3.0, miner didn't create `cn` mining profile with default config example.
# v4.3.0-beta
- [#1227](https://github.com/xmrig/xmrig/pull/1227) Added new algorithm `rx/arq`, RandomX variant for upcoming ArQmA fork.
- [#808](https://github.com/xmrig/xmrig/issues/808#issuecomment-539297156) Added experimental support for persistent memory for CPU mining threads.
- [#1221](https://github.com/xmrig/xmrig/issues/1221) Improved RandomX dataset memory usage and initialization speed for NUMA machines.
# v4.2.1-beta
- [#1150](https://github.com/xmrig/xmrig/issues/1150) Fixed build on FreeBSD.
- [#1175](https://github.com/xmrig/xmrig/issues/1175) Fixed support for systems where total count of NUMA nodes not equal usable nodes count.
- [#1199](https://github.com/xmrig/xmrig/issues/1199) Fixed excessive memory allocation for OpenCL threads with low intensity.
- [#1212](https://github.com/xmrig/xmrig/issues/1212) Fixed low RandomX performance after fast algorithm switching.
# v4.2.0-beta
- [#1202](https://github.com/xmrig/xmrig/issues/1202) Fixed algorithm verification in donate strategy.
- Added per pool option `coin` with single possible value `monero` for pools without algorithm negotiation, for upcoming Monero fork.
- Added config option `cpu/max-threads-hint` and command line option `--cpu-max-threads-hint`.
# v4.1.0-beta
- **OpenCL backend disabled by default.**.
- [#1183](https://github.com/xmrig/xmrig/issues/1183) Fixed compatibility with systemd.
- [#1185](https://github.com/xmrig/xmrig/pull/1185) Added JIT compiler for RandomX on ARMv8.
- Improved API endpoint `GET /2/backends` and added support for this endpoint to [workers.xmrig.info](http://workers.xmrig.info).
- Added command line option `--no-cpu` to disable CPU backend.
- Added OpenCL specific command line options: `--opencl`, `--opencl-devices`, `--opencl-platform`, `--opencl-loader` and `--opencl-no-cache`.
- Removed command line option `--http-enabled`, HTTP API enabled automatically if any other `--http-*` option provided.
# v4.0.1-beta
- [#1177](https://github.com/xmrig/xmrig/issues/1177) Fixed compatibility with old AMD drivers.
- [#1180](https://github.com/xmrig/xmrig/issues/1180) Fixed possible duplicated shares after algorithm switching.
- Added support for case if not all backend threads successfully started.
- Fixed wrong config file permissions after write (only gcc builds on recent Windows 10 affected).
# v4.0.0-beta
- [#1172](https://github.com/xmrig/xmrig/issues/1172) **Added OpenCL mining backend.**
- [#268](https://github.com/xmrig/xmrig-amd/pull/268) [#270](https://github.com/xmrig/xmrig-amd/pull/270) [#271](https://github.com/xmrig/xmrig-amd/pull/271) [#273](https://github.com/xmrig/xmrig-amd/pull/273) [#274](https://github.com/xmrig/xmrig-amd/pull/274) [#1171](https://github.com/xmrig/xmrig/pull/1171) Added RandomX support for OpenCL, thanks [@SChernykh](https://github.com/SChernykh).
- Algorithm `cn/wow` removed, as no longer alive.
# v3.2.0
- Added per pool option `coin` with single possible value `monero` for pools without algorithm negotiation, for upcoming Monero fork.
- [#1183](https://github.com/xmrig/xmrig/issues/1183) Fixed compatibility with systemd.
# v3.1.3
- [#1180](https://github.com/xmrig/xmrig/issues/1180) Fixed possible duplicated shares after algorithm switching.
- Fixed wrong config file permissions after write (only gcc builds on recent Windows 10 affected).
# v3.1.2
- Many RandomX optimizations and fixes.
- [#1132](https://github.com/xmrig/xmrig/issues/1132) Fixed build on CentOS 7.
- [#1163](https://github.com/xmrig/xmrig/pull/1163) Optimized soft AES code, up to +30% hashrate on CPU without AES support and other optimizations.
- [#1166](https://github.com/xmrig/xmrig/pull/1166) Fixed crash when initialize dataset with big threads count (eg 272).
- [#1168](https://github.com/xmrig/xmrig/pull/1168) Optimized loading from scratchpad.
- [#1128](https://github.com/xmrig/xmrig/issues/1128) Fixed CMake 2.8 compatibility.
# v3.1.1
- [#1133](https://github.com/xmrig/xmrig/issues/1133) Fixed syslog regression.
- [#1138](https://github.com/xmrig/xmrig/issues/1138) Fixed multiple network bugs.
- [#1141](https://github.com/xmrig/xmrig/issues/1141) Fixed log in background mode.
- [#1142](https://github.com/xmrig/xmrig/pull/1142) RandomX hashrate improved by 0.5-1.5% depending on variant and CPU.
- [#1146](https://github.com/xmrig/xmrig/pull/1146) Fixed race condition in RandomX thread init.
- [#1148](https://github.com/xmrig/xmrig/pull/1148) Fixed, on Linux linker marking entire executable as having an executable stack.
- Fixed, for Argon2 algorithms command line options like `--threads` was ignored.
- Fixed command line options for single pool, free order allowed again.
# v3.1.0
- [#1107](https://github.com/xmrig/xmrig/issues/1107#issuecomment-522235892) Added Argon2 algorithm family: `argon2/chukwa` and `argon2/wrkz`.
# v3.0.0
- **[#1111](https://github.com/xmrig/xmrig/pull/1111) Added RandomX (`rx/test`) algorithm for testing and benchmarking.**
- **[#1036](https://github.com/xmrig/xmrig/pull/1036) Added RandomWOW (`rx/wow`) algorithm for [Wownero](http://wownero.org/).**
- **[#1050](https://github.com/xmrig/xmrig/pull/1050) Added RandomXL (`rx/loki`) algorithm for [Loki](https://loki.network/).**
- **[#1077](https://github.com/xmrig/xmrig/issues/1077) Added NUMA support via hwloc**.
- **Added flexible [multi algorithm](doc/CPU.md) configuration.**
- **Added unlimited switching between incompatible algorithms, all mining options can be changed in runtime.**
- [#257](https://github.com/xmrig/xmrig-nvidia/pull/257) New logging subsystem, file and syslog now always without colors.
- [#314](https://github.com/xmrig/xmrig-proxy/issues/314) Added donate over proxy feature.
- [#1007](https://github.com/xmrig/xmrig/issues/1007) Old HTTP API backend based on libmicrohttpd, replaced to custom HTTP server (libuv + http_parser).
- [#1010](https://github.com/xmrig/xmrig/pull/1010#issuecomment-482632107) Added daemon support (solo mining).
- [#1066](https://github.com/xmrig/xmrig/issues/1066#issuecomment-518080529) Added error message if pool not ready for RandomX.
- [#1105](https://github.com/xmrig/xmrig/issues/1105) Improved auto configuration for `cn-pico` algorithm.
- Added commands `pause` and `resume` via JSON RPC 2.0 API (`POST /json_rpc`).
- Added command line option `--export-topology` for export hwloc topology to a XML file.
- Breaked backward compatibility with previous configs and command line, `variant` option replaced to `algo`, global option `algo` removed, all CPU related settings moved to `cpu` object.
- Options `av`, `safe` and `max-cpu-usage` removed.
- Algorithm `cn/msr` renamed to `cn/fast`.
- Algorithm `cn/xtl` removed.
- API endpoint `GET /1/threads` replaced to `GET /2/backends`.
- Added global uptime and extended connection information in API.
- API now return current algorithm.
# v2.99.6-beta
- Added commands `pause` and `resume` via JSON RPC 2.0 API (`POST /json_rpc`).
- Fixed autoconfig regression (since 2.99.5), mostly `rx/wow` was affected by this bug.

View File

@@ -94,3 +94,12 @@ Enable/configure or disable ASM optimizations. Possible values: `true`, `false`,
#### `argon2-impl` (since v3.1.0)
Allow override automatically detected Argon2 implementation, this option added mostly for debug purposes, default value `null` means autodetect. Other possible values: `"x86_64"`, `"SSE2"`, `"SSSE3"`, `"XOP"`, `"AVX2"`, `"AVX-512F"`. Manual selection has no safe guards, if you CPU not support required instuctions, miner will crash.
#### `max-threads-hint` (since v4.2.0)
Maximum CPU threads count (in percentage) hint for autoconfig. [CPU_MAX_USAGE.md](CPU_MAX_USAGE.md)
#### `memory-pool` (since v4.3.0)
Use continuous, persistent memory block for mining threads, useful for preserve huge pages allocation while algorithm swithing. Possible values `false` (feature disabled, by default) or `true` or specific count of 2 MB huge pages.
#### `yield` (since v5.1.1)
Prefer system better system response/stability `true` (default value) or maximum hashrate `false`.

26
doc/CPU_MAX_USAGE.md Normal file
View File

@@ -0,0 +1,26 @@
# Maximum CPU usage
Please read this document carefully, `max-threads-hint` (was known as `max-cpu-usage`) option is most confusing option in the miner with many myth and legends.
This option is just hint for automatic configuration and can't precise define CPU usage.
### Option definition
#### Config file:
```json
{
...
"cpu": {
"max-threads-hint": 100,
...
},
...
}
```
#### Command line
`--cpu-max-threads-hint 100`
### Known issues and usage
* This option has no effect if miner already generated CPU configuration, to prevent config generation use `"autosave":false,`.
* Only threads count can be changed, for 1 core CPU this option has no effect, for 2 core CPU only 2 values possible 50% and 100%, for 4 cores: 25%, 50%, 75%, 100%. etc.
* You CPU may limited by other factors, eg cache.

View File

@@ -0,0 +1,9 @@
# Persistent options
Options in list below can't changed in runtime by watching config file or via API.
* `background`
* `donate-level`
* `cpu/argon2-impl`
* `opencl/loader`
* `opencl/platform`

40
doc/build/CMAKE_OPTIONS.md vendored Normal file
View File

@@ -0,0 +1,40 @@
# CMake options
**Recent version of this document: https://xmrig.com/docs/miner/cmake-options**
## Algorithms
* **`-DWITH_CN_LITE=OFF`** disable all CryptoNight-Lite algorithms (`cn-lite/0`, `cn-lite/1`).
* **`-DWITH_CN_HEAVY=OFF`** disable all CryptoNight-Heavy algorithms (`cn-heavy/0`, `cn-heavy/xhv`, `cn-heavy/tube`).
* **`-DWITH_CN_PICO=OFF`** disable CryptoNight-Pico algorithm (`cn-pico`).
* **`-DWITH_RANDOMX=OFF`** disable RandomX algorithms (`rx/loki`, `rx/wow`).
* **`-DWITH_ARGON2=OFF`** disable Argon2 algorithms (`argon2/chukwa`, `argon2/wrkz`).
## Features
* **`-DWITH_HWLOC=OFF`**
disable [hwloc](https://github.com/xmrig/xmrig/issues/1077) support.
Disabling this feature is not recommended in most cases.
This feature add external dependency to libhwloc (1.10.0+) (except MSVC builds).
* **`-DWITH_LIBCPUID=OFF`** disable built in libcpuid support, this feature always disabled if hwloc enabled, if both hwloc and libcpuid disabled auto configuration for CPU will very limited.
* **`-DWITH_HTTP=OFF`** disable built in HTTP support, this feature used for HTTP API and daemon (solo mining) support.
* **`-DWITH_TLS=OFF`** disable SSL/TLS support (secure connections to pool). This feature add external dependency to OpenSSL.
* **`-DWITH_ASM=OFF`** disable assembly optimizations for modern CryptoNight algorithms.
* **`-DWITH_EMBEDDED_CONFIG=ON`** Enable [embedded](https://github.com/xmrig/xmrig/issues/957) config support.
* **`-DWITH_OPENCL=OFF`** Disable OpenCL backend.
* **`-DWITH_CUDA=OFF`** Disable CUDA backend.
## Debug options
* **`-DWITH_DEBUG_LOG=ON`** enable debug log (mostly network requests).
* **`-DHWLOC_DEBUG=ON`** enable some debug log for hwloc.
* **`-DCMAKE_BUILD_TYPE=Debug`** enable debug build, only useful for investigate crashes, this option slow down miner.
## Special build options
* **`-DXMRIG_DEPS=<path>`** path to precompiled dependencies https://github.com/xmrig/xmrig-deps
* **`-DARM_TARGET=<number>`** override ARM target, possible values `7` (ARMv7) and `8` (ARMv8).
* **`-DUV_INCLUDE_DIR=<path>`** custom path to libuv headers.
* **`-DUV_LIBRARY=<path>`** custom path to libuv library.
* **`-DHWLOC_INCLUDE_DIR=<path>`** custom path to hwloc headers.
* **`-DHWLOC_LIBRARY=<path>`** custom path to hwloc library.
* **`-DOPENSSL_ROOT_DIR=<path>`** custom path to OpenSSL.

30
doc/gpg_keys/xmrig.asc Normal file
View File

@@ -0,0 +1,30 @@
-----BEGIN PGP PUBLIC KEY BLOCK-----
mQENBF3VSRIBCADfFjDUbq0WLGulFeSou0A+jTvweNllPyLNOn3SNCC0XLEYyEcu
JiEBK80DlvR06TVr8Aw1rT5S2iH0i5Tl8DqShH2mmcN1rBp1M0Y95D89KVj3BIhE
nxmgmD4N3Wgm+5FmEH4W/RpG1xdYWJx3eJhtWPdFJqpg083E2D5P30wIQem+EnTR
5YrtTZPh5cPj2KRY+UmsDE3ahmxCgP7LYgnnpZQlWBBiMV932s7MvYBPJQc1wecS
0wi1zxyS81xHc3839EkA7wueCeNo+5jha+KH66tMKsfrI2WvfPHTCPjK9v7WJc/O
/eRp9d+wacn09D1L6CoRO0ers5p10GO84VhTABEBAAG0GVhNUmlnIDxzdXBwb3J0
QHhtcmlnLmNvbT6JAU4EEwEIADgWIQSaxM6o5m41pcfN3BtEalNji+lECQUCXdVJ
EgIbAwULCQgHAgYVCgkICwIEFgIDAQIeAQIXgAAKCRBEalNji+lECbkQB/9nRou0
tOlBwYn8xVgBu7IiDWNVETRWfrjrtdTvSahgbbo6lWgjA/vBLkjN9fISdBQ/n/Mt
hNDJbEtxHHt2baJhvT8du1eWcIHHXCV/rmv+iY/hTXa1gKqHiHDJrtYSVBG3BMme
1rdsUHTiKf3t5yRHOXAfY2C+XNblKAV7mhlxQBiKxdFDIkFEQKNrHNUvnzkOqoCT
2kTZZ2tPUMQdOn1eek6zG/+C7SwcBpJnakJ8jce4yA/xZbOVKetNWO3Ufu3TE34k
OdA+H4PU9+fV77XfOY8DtXeS3boUI97ei+4s/mwX/NFC0i8CPXyefxl3WRUBGDOI
w//kPNQVh4HobOCeuQENBF3VSRIBCADl29WorEi+vRA/3kg9VUXtxSU6caibFS3N
VXANiFRjrOmICdfrIgOSGNrYCQFsXu0Xe0udDYVX8yX6WJk+CT02Pdg0gkXiKoze
KrnK15mo3xXbb2tr1o9ROPgwY/o2AwQHj0o1JhdS2cybfuRiUQRoGgBX7a9X0cTY
r4ZJvOjzgAajl3ciwB3yWUmDiRlzZpO7YWESXbOhGVzyCnP5MlMEJ/fPRw9h38vK
HNKLhzcRfsLpXk34ghY3SxIv4NWUfuZXFWqpSdC9JgNc5zA72lJEQcF4DHJCKl7B
ddmrfsr9mdiIpo+/ZZFPPngdeZ2kvkJ2YKaZNVu2XooJARPQ8B8tABEBAAGJATYE
GAEIACAWIQSaxM6o5m41pcfN3BtEalNji+lECQUCXdVJEgIbDAAKCRBEalNji+lE
CdPUB/4nH1IdhHGmfko2kxdaHqQgCGLqh3pcrQXD9mBv/LYVnoHZpVRHsIDgg2Z4
lQYrIRRqe69FjVxo7sA2eMIlV0GRDlUrw+HeURFpEhKPEdwFy6i/cti2MY0YxOrB
TvQoRutUoMnyjM4TBJWaaqccbTsavMdLmG3JHdAkiHtUis/fUwVctmEQwN+d/J2b
wJAtliqw3nXchUfdIfwHF/7hg8seUuYUaifzkazBZhVWvRkTVLVanzZ51HRfuzwD
ntaa7kfYGdE+4TKOylAPh+8E6WnR19RRTpsaW0dVBgOiBTE0uc7rUv2HWS/u6RUR
t7ldSBzkuDTlM2V59Iq2hXoSC6dT
=cIG9
-----END PGP PUBLIC KEY BLOCK-----

View File

@@ -0,0 +1,5 @@
6bb1a2e3a0fbca5195be6022f2a9fbff8a353c37c7542e7ab89420cb45b64505 xmrig-5.0.1-gcc-win32.zip
24dba9ec281acfb2ea2c401ebd0e4e2d1f1ee5fd557da5ff3c7049020c1f78b6 xmrig-5.0.1-gcc-win64.zip
86d65c6693ec9e35cd7547329580638b85c9eb0cf8383892a1c15199de5b556f xmrig-5.0.1-msvc-cuda10_1-win64.zip
0fbfe518b1c4b6993b0f66ff01302626375b15620ccf8f64d6fb97845068ffca xmrig-5.0.1-msvc-win64.zip
aa34890738a3494de2fa0e44db346937fea7339852f5f10b5d4655f95e2d8f1f xmrig-5.0.1-xenial-x64.tar.gz

View File

@@ -0,0 +1,11 @@
-----BEGIN PGP SIGNATURE-----
iQEzBAABCgAdFiEEmsTOqOZuNaXHzdwbRGpTY4vpRAkFAl3VcsoACgkQRGpTY4vp
RAm9vQgA1MyTUU2jley2TCYLUzQy2Fffc8fbXYv64r44jbWOjC/6qo2iIlRgPhIc
oVyPKr5TYS3QjDzCEm8IvozS0YudS6soESbPzqDonboK8pd0K4bsML9TQY2feV7A
NL5vln0rfVHp1wxLLrQpfBqAgvJUXEyaHece6gFQN79JOGhEo2bHL2NyrOl+FViS
b2BaMtXq410Fh+XT6ShnOaG/2EuO8ZqSGdCO6A/2LHQw1UY+mZiCvue6P6B06HmB
WD/urOv38V389v+V+Sp4UlEW6VpBOOjvtChoVWtLt+tKzydrnt2EmoWWWg475pka
4G6whHuMWS8CTt5/PDhJpvVXNQTIOw==
=C764
-----END PGP SIGNATURE-----

BIN
doc/screenshot_v5_2_0.png Normal file

Binary file not shown.

After

Width:  |  Height:  |  Size: 48 KiB

View File

@@ -0,0 +1,262 @@
<?xml version="1.0" encoding="UTF-8"?>
<!DOCTYPE topology SYSTEM "hwloc2.dtd">
<topology version="2.0">
<object type="Machine" os_index="0" cpuset="0x00ffffff" complete_cpuset="0x00ffffff" allowed_cpuset="0x00ffffff" nodeset="0x0000000f" complete_nodeset="0x0000000f" allowed_nodeset="0x0000000f" gp_index="1">
<info name="Backend" value="Windows"/>
<info name="hwlocVersion" value="2.0.4"/>
<object type="Package" cpuset="0x00000fff" complete_cpuset="0x00000fff" nodeset="0x00000003" complete_nodeset="0x00000003" gp_index="36">
<info name="CPUVendor" value="AuthenticAMD"/>
<info name="CPUFamilyNumber" value="21"/>
<info name="CPUModelNumber" value="2"/>
<info name="CPUModel" value="AMD Opteron(tm) Processor 6344 "/>
<info name="CPUStepping" value="0"/>
<object type="L3Cache" cpuset="0x0000003f" complete_cpuset="0x0000003f" nodeset="0x00000001" complete_nodeset="0x00000001" gp_index="20" cache_size="12582912" depth="3" cache_linesize="64" cache_associativity="1" cache_type="0">
<info name="Inclusive" value="0"/>
<object type="NUMANode" os_index="0" cpuset="0x0000003f" complete_cpuset="0x0000003f" nodeset="0x00000001" complete_nodeset="0x00000001" gp_index="80" local_memory="7009357824">
<page_type size="4096" count="0"/>
</object>
<object type="L2Cache" cpuset="0x00000001" complete_cpuset="0x00000001" nodeset="0x00000001" complete_nodeset="0x00000001" gp_index="4" cache_size="2097152" depth="2" cache_linesize="64" cache_associativity="16" cache_type="0">
<info name="Inclusive" value="0"/>
<object type="L1Cache" cpuset="0x00000001" complete_cpuset="0x00000001" nodeset="0x00000001" complete_nodeset="0x00000001" gp_index="3" cache_size="16384" depth="1" cache_linesize="64" cache_associativity="4" cache_type="1">
<info name="Inclusive" value="0"/>
<object type="Core" cpuset="0x00000001" complete_cpuset="0x00000001" nodeset="0x00000001" complete_nodeset="0x00000001" gp_index="2">
<object type="PU" os_index="0" cpuset="0x00000001" complete_cpuset="0x00000001" nodeset="0x00000001" complete_nodeset="0x00000001" gp_index="85"/>
</object>
</object>
</object>
<object type="L2Cache" cpuset="0x00000002" complete_cpuset="0x00000002" nodeset="0x00000001" complete_nodeset="0x00000001" gp_index="7" cache_size="2097152" depth="2" cache_linesize="64" cache_associativity="16" cache_type="0">
<info name="Inclusive" value="0"/>
<object type="L1Cache" cpuset="0x00000002" complete_cpuset="0x00000002" nodeset="0x00000001" complete_nodeset="0x00000001" gp_index="6" cache_size="16384" depth="1" cache_linesize="64" cache_associativity="4" cache_type="1">
<info name="Inclusive" value="0"/>
<object type="Core" cpuset="0x00000002" complete_cpuset="0x00000002" nodeset="0x00000001" complete_nodeset="0x00000001" gp_index="5">
<object type="PU" os_index="1" cpuset="0x00000002" complete_cpuset="0x00000002" nodeset="0x00000001" complete_nodeset="0x00000001" gp_index="86"/>
</object>
</object>
</object>
<object type="L2Cache" cpuset="0x00000004" complete_cpuset="0x00000004" nodeset="0x00000001" complete_nodeset="0x00000001" gp_index="10" cache_size="2097152" depth="2" cache_linesize="64" cache_associativity="16" cache_type="0">
<info name="Inclusive" value="0"/>
<object type="L1Cache" cpuset="0x00000004" complete_cpuset="0x00000004" nodeset="0x00000001" complete_nodeset="0x00000001" gp_index="9" cache_size="16384" depth="1" cache_linesize="64" cache_associativity="4" cache_type="1">
<info name="Inclusive" value="0"/>
<object type="Core" cpuset="0x00000004" complete_cpuset="0x00000004" nodeset="0x00000001" complete_nodeset="0x00000001" gp_index="8">
<object type="PU" os_index="2" cpuset="0x00000004" complete_cpuset="0x00000004" nodeset="0x00000001" complete_nodeset="0x00000001" gp_index="87"/>
</object>
</object>
</object>
<object type="L2Cache" cpuset="0x00000008" complete_cpuset="0x00000008" nodeset="0x00000001" complete_nodeset="0x00000001" gp_index="13" cache_size="2097152" depth="2" cache_linesize="64" cache_associativity="16" cache_type="0">
<info name="Inclusive" value="0"/>
<object type="L1Cache" cpuset="0x00000008" complete_cpuset="0x00000008" nodeset="0x00000001" complete_nodeset="0x00000001" gp_index="12" cache_size="16384" depth="1" cache_linesize="64" cache_associativity="4" cache_type="1">
<info name="Inclusive" value="0"/>
<object type="Core" cpuset="0x00000008" complete_cpuset="0x00000008" nodeset="0x00000001" complete_nodeset="0x00000001" gp_index="11">
<object type="PU" os_index="3" cpuset="0x00000008" complete_cpuset="0x00000008" nodeset="0x00000001" complete_nodeset="0x00000001" gp_index="88"/>
</object>
</object>
</object>
<object type="L2Cache" cpuset="0x00000010" complete_cpuset="0x00000010" nodeset="0x00000001" complete_nodeset="0x00000001" gp_index="16" cache_size="2097152" depth="2" cache_linesize="64" cache_associativity="16" cache_type="0">
<info name="Inclusive" value="0"/>
<object type="L1Cache" cpuset="0x00000010" complete_cpuset="0x00000010" nodeset="0x00000001" complete_nodeset="0x00000001" gp_index="15" cache_size="16384" depth="1" cache_linesize="64" cache_associativity="4" cache_type="1">
<info name="Inclusive" value="0"/>
<object type="Core" cpuset="0x00000010" complete_cpuset="0x00000010" nodeset="0x00000001" complete_nodeset="0x00000001" gp_index="14">
<object type="PU" os_index="4" cpuset="0x00000010" complete_cpuset="0x00000010" nodeset="0x00000001" complete_nodeset="0x00000001" gp_index="89"/>
</object>
</object>
</object>
<object type="L2Cache" cpuset="0x00000020" complete_cpuset="0x00000020" nodeset="0x00000001" complete_nodeset="0x00000001" gp_index="19" cache_size="2097152" depth="2" cache_linesize="64" cache_associativity="16" cache_type="0">
<info name="Inclusive" value="0"/>
<object type="L1Cache" cpuset="0x00000020" complete_cpuset="0x00000020" nodeset="0x00000001" complete_nodeset="0x00000001" gp_index="18" cache_size="16384" depth="1" cache_linesize="64" cache_associativity="4" cache_type="1">
<info name="Inclusive" value="0"/>
<object type="Core" cpuset="0x00000020" complete_cpuset="0x00000020" nodeset="0x00000001" complete_nodeset="0x00000001" gp_index="17">
<object type="PU" os_index="5" cpuset="0x00000020" complete_cpuset="0x00000020" nodeset="0x00000001" complete_nodeset="0x00000001" gp_index="90"/>
</object>
</object>
</object>
</object>
<object type="L3Cache" cpuset="0x00000fc0" complete_cpuset="0x00000fc0" nodeset="0x00000002" complete_nodeset="0x00000002" gp_index="40" cache_size="12582912" depth="3" cache_linesize="64" cache_associativity="1" cache_type="0">
<info name="Inclusive" value="0"/>
<object type="NUMANode" os_index="1" cpuset="0x00000fc0" complete_cpuset="0x00000fc0" nodeset="0x00000002" complete_nodeset="0x00000002" gp_index="81" local_memory="8018194432">
<page_type size="4096" count="0"/>
</object>
<object type="L2Cache" cpuset="0x00000040" complete_cpuset="0x00000040" nodeset="0x00000002" complete_nodeset="0x00000002" gp_index="23" cache_size="2097152" depth="2" cache_linesize="64" cache_associativity="16" cache_type="0">
<info name="Inclusive" value="0"/>
<object type="L1Cache" cpuset="0x00000040" complete_cpuset="0x00000040" nodeset="0x00000002" complete_nodeset="0x00000002" gp_index="22" cache_size="16384" depth="1" cache_linesize="64" cache_associativity="4" cache_type="1">
<info name="Inclusive" value="0"/>
<object type="Core" cpuset="0x00000040" complete_cpuset="0x00000040" nodeset="0x00000002" complete_nodeset="0x00000002" gp_index="21">
<object type="PU" os_index="6" cpuset="0x00000040" complete_cpuset="0x00000040" nodeset="0x00000002" complete_nodeset="0x00000002" gp_index="91"/>
</object>
</object>
</object>
<object type="L2Cache" cpuset="0x00000080" complete_cpuset="0x00000080" nodeset="0x00000002" complete_nodeset="0x00000002" gp_index="26" cache_size="2097152" depth="2" cache_linesize="64" cache_associativity="16" cache_type="0">
<info name="Inclusive" value="0"/>
<object type="L1Cache" cpuset="0x00000080" complete_cpuset="0x00000080" nodeset="0x00000002" complete_nodeset="0x00000002" gp_index="25" cache_size="16384" depth="1" cache_linesize="64" cache_associativity="4" cache_type="1">
<info name="Inclusive" value="0"/>
<object type="Core" cpuset="0x00000080" complete_cpuset="0x00000080" nodeset="0x00000002" complete_nodeset="0x00000002" gp_index="24">
<object type="PU" os_index="7" cpuset="0x00000080" complete_cpuset="0x00000080" nodeset="0x00000002" complete_nodeset="0x00000002" gp_index="92"/>
</object>
</object>
</object>
<object type="L2Cache" cpuset="0x00000100" complete_cpuset="0x00000100" nodeset="0x00000002" complete_nodeset="0x00000002" gp_index="29" cache_size="2097152" depth="2" cache_linesize="64" cache_associativity="16" cache_type="0">
<info name="Inclusive" value="0"/>
<object type="L1Cache" cpuset="0x00000100" complete_cpuset="0x00000100" nodeset="0x00000002" complete_nodeset="0x00000002" gp_index="28" cache_size="16384" depth="1" cache_linesize="64" cache_associativity="4" cache_type="1">
<info name="Inclusive" value="0"/>
<object type="Core" cpuset="0x00000100" complete_cpuset="0x00000100" nodeset="0x00000002" complete_nodeset="0x00000002" gp_index="27">
<object type="PU" os_index="8" cpuset="0x00000100" complete_cpuset="0x00000100" nodeset="0x00000002" complete_nodeset="0x00000002" gp_index="93"/>
</object>
</object>
</object>
<object type="L2Cache" cpuset="0x00000200" complete_cpuset="0x00000200" nodeset="0x00000002" complete_nodeset="0x00000002" gp_index="32" cache_size="2097152" depth="2" cache_linesize="64" cache_associativity="16" cache_type="0">
<info name="Inclusive" value="0"/>
<object type="L1Cache" cpuset="0x00000200" complete_cpuset="0x00000200" nodeset="0x00000002" complete_nodeset="0x00000002" gp_index="31" cache_size="16384" depth="1" cache_linesize="64" cache_associativity="4" cache_type="1">
<info name="Inclusive" value="0"/>
<object type="Core" cpuset="0x00000200" complete_cpuset="0x00000200" nodeset="0x00000002" complete_nodeset="0x00000002" gp_index="30">
<object type="PU" os_index="9" cpuset="0x00000200" complete_cpuset="0x00000200" nodeset="0x00000002" complete_nodeset="0x00000002" gp_index="94"/>
</object>
</object>
</object>
<object type="L2Cache" cpuset="0x00000400" complete_cpuset="0x00000400" nodeset="0x00000002" complete_nodeset="0x00000002" gp_index="35" cache_size="2097152" depth="2" cache_linesize="64" cache_associativity="16" cache_type="0">
<info name="Inclusive" value="0"/>
<object type="L1Cache" cpuset="0x00000400" complete_cpuset="0x00000400" nodeset="0x00000002" complete_nodeset="0x00000002" gp_index="34" cache_size="16384" depth="1" cache_linesize="64" cache_associativity="4" cache_type="1">
<info name="Inclusive" value="0"/>
<object type="Core" cpuset="0x00000400" complete_cpuset="0x00000400" nodeset="0x00000002" complete_nodeset="0x00000002" gp_index="33">
<object type="PU" os_index="10" cpuset="0x00000400" complete_cpuset="0x00000400" nodeset="0x00000002" complete_nodeset="0x00000002" gp_index="95"/>
</object>
</object>
</object>
<object type="L2Cache" cpuset="0x00000800" complete_cpuset="0x00000800" nodeset="0x00000002" complete_nodeset="0x00000002" gp_index="39" cache_size="2097152" depth="2" cache_linesize="64" cache_associativity="16" cache_type="0">
<info name="Inclusive" value="0"/>
<object type="L1Cache" cpuset="0x00000800" complete_cpuset="0x00000800" nodeset="0x00000002" complete_nodeset="0x00000002" gp_index="38" cache_size="16384" depth="1" cache_linesize="64" cache_associativity="4" cache_type="1">
<info name="Inclusive" value="0"/>
<object type="Core" cpuset="0x00000800" complete_cpuset="0x00000800" nodeset="0x00000002" complete_nodeset="0x00000002" gp_index="37">
<object type="PU" os_index="11" cpuset="0x00000800" complete_cpuset="0x00000800" nodeset="0x00000002" complete_nodeset="0x00000002" gp_index="96"/>
</object>
</object>
</object>
</object>
</object>
<object type="Package" cpuset="0x00fff000" complete_cpuset="0x00fff000" nodeset="0x0000000c" complete_nodeset="0x0000000c" gp_index="75">
<info name="CPUVendor" value="AuthenticAMD"/>
<info name="CPUFamilyNumber" value="21"/>
<info name="CPUModelNumber" value="2"/>
<info name="CPUModel" value="AMD Opteron(tm) Processor 6344 "/>
<info name="CPUStepping" value="0"/>
<object type="L3Cache" cpuset="0x0003f000" complete_cpuset="0x0003f000" nodeset="0x00000004" complete_nodeset="0x00000004" gp_index="59" cache_size="12582912" depth="3" cache_linesize="64" cache_associativity="1" cache_type="0">
<info name="Inclusive" value="0"/>
<object type="NUMANode" os_index="2" cpuset="0x0003f000" complete_cpuset="0x0003f000" nodeset="0x00000004" complete_nodeset="0x00000004" gp_index="82" local_memory="8035020800">
<page_type size="4096" count="0"/>
</object>
<object type="L2Cache" cpuset="0x00001000" complete_cpuset="0x00001000" nodeset="0x00000004" complete_nodeset="0x00000004" gp_index="43" cache_size="2097152" depth="2" cache_linesize="64" cache_associativity="16" cache_type="0">
<info name="Inclusive" value="0"/>
<object type="L1Cache" cpuset="0x00001000" complete_cpuset="0x00001000" nodeset="0x00000004" complete_nodeset="0x00000004" gp_index="42" cache_size="16384" depth="1" cache_linesize="64" cache_associativity="4" cache_type="1">
<info name="Inclusive" value="0"/>
<object type="Core" cpuset="0x00001000" complete_cpuset="0x00001000" nodeset="0x00000004" complete_nodeset="0x00000004" gp_index="41">
<object type="PU" os_index="12" cpuset="0x00001000" complete_cpuset="0x00001000" nodeset="0x00000004" complete_nodeset="0x00000004" gp_index="97"/>
</object>
</object>
</object>
<object type="L2Cache" cpuset="0x00002000" complete_cpuset="0x00002000" nodeset="0x00000004" complete_nodeset="0x00000004" gp_index="46" cache_size="2097152" depth="2" cache_linesize="64" cache_associativity="16" cache_type="0">
<info name="Inclusive" value="0"/>
<object type="L1Cache" cpuset="0x00002000" complete_cpuset="0x00002000" nodeset="0x00000004" complete_nodeset="0x00000004" gp_index="45" cache_size="16384" depth="1" cache_linesize="64" cache_associativity="4" cache_type="1">
<info name="Inclusive" value="0"/>
<object type="Core" cpuset="0x00002000" complete_cpuset="0x00002000" nodeset="0x00000004" complete_nodeset="0x00000004" gp_index="44">
<object type="PU" os_index="13" cpuset="0x00002000" complete_cpuset="0x00002000" nodeset="0x00000004" complete_nodeset="0x00000004" gp_index="98"/>
</object>
</object>
</object>
<object type="L2Cache" cpuset="0x00004000" complete_cpuset="0x00004000" nodeset="0x00000004" complete_nodeset="0x00000004" gp_index="49" cache_size="2097152" depth="2" cache_linesize="64" cache_associativity="16" cache_type="0">
<info name="Inclusive" value="0"/>
<object type="L1Cache" cpuset="0x00004000" complete_cpuset="0x00004000" nodeset="0x00000004" complete_nodeset="0x00000004" gp_index="48" cache_size="16384" depth="1" cache_linesize="64" cache_associativity="4" cache_type="1">
<info name="Inclusive" value="0"/>
<object type="Core" cpuset="0x00004000" complete_cpuset="0x00004000" nodeset="0x00000004" complete_nodeset="0x00000004" gp_index="47">
<object type="PU" os_index="14" cpuset="0x00004000" complete_cpuset="0x00004000" nodeset="0x00000004" complete_nodeset="0x00000004" gp_index="99"/>
</object>
</object>
</object>
<object type="L2Cache" cpuset="0x00008000" complete_cpuset="0x00008000" nodeset="0x00000004" complete_nodeset="0x00000004" gp_index="52" cache_size="2097152" depth="2" cache_linesize="64" cache_associativity="16" cache_type="0">
<info name="Inclusive" value="0"/>
<object type="L1Cache" cpuset="0x00008000" complete_cpuset="0x00008000" nodeset="0x00000004" complete_nodeset="0x00000004" gp_index="51" cache_size="16384" depth="1" cache_linesize="64" cache_associativity="4" cache_type="1">
<info name="Inclusive" value="0"/>
<object type="Core" cpuset="0x00008000" complete_cpuset="0x00008000" nodeset="0x00000004" complete_nodeset="0x00000004" gp_index="50">
<object type="PU" os_index="15" cpuset="0x00008000" complete_cpuset="0x00008000" nodeset="0x00000004" complete_nodeset="0x00000004" gp_index="100"/>
</object>
</object>
</object>
<object type="L2Cache" cpuset="0x00010000" complete_cpuset="0x00010000" nodeset="0x00000004" complete_nodeset="0x00000004" gp_index="55" cache_size="2097152" depth="2" cache_linesize="64" cache_associativity="16" cache_type="0">
<info name="Inclusive" value="0"/>
<object type="L1Cache" cpuset="0x00010000" complete_cpuset="0x00010000" nodeset="0x00000004" complete_nodeset="0x00000004" gp_index="54" cache_size="16384" depth="1" cache_linesize="64" cache_associativity="4" cache_type="1">
<info name="Inclusive" value="0"/>
<object type="Core" cpuset="0x00010000" complete_cpuset="0x00010000" nodeset="0x00000004" complete_nodeset="0x00000004" gp_index="53">
<object type="PU" os_index="16" cpuset="0x00010000" complete_cpuset="0x00010000" nodeset="0x00000004" complete_nodeset="0x00000004" gp_index="101"/>
</object>
</object>
</object>
<object type="L2Cache" cpuset="0x00020000" complete_cpuset="0x00020000" nodeset="0x00000004" complete_nodeset="0x00000004" gp_index="58" cache_size="2097152" depth="2" cache_linesize="64" cache_associativity="16" cache_type="0">
<info name="Inclusive" value="0"/>
<object type="L1Cache" cpuset="0x00020000" complete_cpuset="0x00020000" nodeset="0x00000004" complete_nodeset="0x00000004" gp_index="57" cache_size="16384" depth="1" cache_linesize="64" cache_associativity="4" cache_type="1">
<info name="Inclusive" value="0"/>
<object type="Core" cpuset="0x00020000" complete_cpuset="0x00020000" nodeset="0x00000004" complete_nodeset="0x00000004" gp_index="56">
<object type="PU" os_index="17" cpuset="0x00020000" complete_cpuset="0x00020000" nodeset="0x00000004" complete_nodeset="0x00000004" gp_index="102"/>
</object>
</object>
</object>
</object>
<object type="L3Cache" cpuset="0x00fc0000" complete_cpuset="0x00fc0000" nodeset="0x00000008" complete_nodeset="0x00000008" gp_index="79" cache_size="12582912" depth="3" cache_linesize="64" cache_associativity="1" cache_type="0">
<info name="Inclusive" value="0"/>
<object type="NUMANode" os_index="3" cpuset="0x00fc0000" complete_cpuset="0x00fc0000" nodeset="0x00000008" complete_nodeset="0x00000008" gp_index="83" local_memory="8097337344">
<page_type size="4096" count="0"/>
</object>
<object type="L2Cache" cpuset="0x00040000" complete_cpuset="0x00040000" nodeset="0x00000008" complete_nodeset="0x00000008" gp_index="62" cache_size="2097152" depth="2" cache_linesize="64" cache_associativity="16" cache_type="0">
<info name="Inclusive" value="0"/>
<object type="L1Cache" cpuset="0x00040000" complete_cpuset="0x00040000" nodeset="0x00000008" complete_nodeset="0x00000008" gp_index="61" cache_size="16384" depth="1" cache_linesize="64" cache_associativity="4" cache_type="1">
<info name="Inclusive" value="0"/>
<object type="Core" cpuset="0x00040000" complete_cpuset="0x00040000" nodeset="0x00000008" complete_nodeset="0x00000008" gp_index="60">
<object type="PU" os_index="18" cpuset="0x00040000" complete_cpuset="0x00040000" nodeset="0x00000008" complete_nodeset="0x00000008" gp_index="103"/>
</object>
</object>
</object>
<object type="L2Cache" cpuset="0x00080000" complete_cpuset="0x00080000" nodeset="0x00000008" complete_nodeset="0x00000008" gp_index="65" cache_size="2097152" depth="2" cache_linesize="64" cache_associativity="16" cache_type="0">
<info name="Inclusive" value="0"/>
<object type="L1Cache" cpuset="0x00080000" complete_cpuset="0x00080000" nodeset="0x00000008" complete_nodeset="0x00000008" gp_index="64" cache_size="16384" depth="1" cache_linesize="64" cache_associativity="4" cache_type="1">
<info name="Inclusive" value="0"/>
<object type="Core" cpuset="0x00080000" complete_cpuset="0x00080000" nodeset="0x00000008" complete_nodeset="0x00000008" gp_index="63">
<object type="PU" os_index="19" cpuset="0x00080000" complete_cpuset="0x00080000" nodeset="0x00000008" complete_nodeset="0x00000008" gp_index="104"/>
</object>
</object>
</object>
<object type="L2Cache" cpuset="0x00100000" complete_cpuset="0x00100000" nodeset="0x00000008" complete_nodeset="0x00000008" gp_index="68" cache_size="2097152" depth="2" cache_linesize="64" cache_associativity="16" cache_type="0">
<info name="Inclusive" value="0"/>
<object type="L1Cache" cpuset="0x00100000" complete_cpuset="0x00100000" nodeset="0x00000008" complete_nodeset="0x00000008" gp_index="67" cache_size="16384" depth="1" cache_linesize="64" cache_associativity="4" cache_type="1">
<info name="Inclusive" value="0"/>
<object type="Core" cpuset="0x00100000" complete_cpuset="0x00100000" nodeset="0x00000008" complete_nodeset="0x00000008" gp_index="66">
<object type="PU" os_index="20" cpuset="0x00100000" complete_cpuset="0x00100000" nodeset="0x00000008" complete_nodeset="0x00000008" gp_index="105"/>
</object>
</object>
</object>
<object type="L2Cache" cpuset="0x00200000" complete_cpuset="0x00200000" nodeset="0x00000008" complete_nodeset="0x00000008" gp_index="71" cache_size="2097152" depth="2" cache_linesize="64" cache_associativity="16" cache_type="0">
<info name="Inclusive" value="0"/>
<object type="L1Cache" cpuset="0x00200000" complete_cpuset="0x00200000" nodeset="0x00000008" complete_nodeset="0x00000008" gp_index="70" cache_size="16384" depth="1" cache_linesize="64" cache_associativity="4" cache_type="1">
<info name="Inclusive" value="0"/>
<object type="Core" cpuset="0x00200000" complete_cpuset="0x00200000" nodeset="0x00000008" complete_nodeset="0x00000008" gp_index="69">
<object type="PU" os_index="21" cpuset="0x00200000" complete_cpuset="0x00200000" nodeset="0x00000008" complete_nodeset="0x00000008" gp_index="106"/>
</object>
</object>
</object>
<object type="L2Cache" cpuset="0x00400000" complete_cpuset="0x00400000" nodeset="0x00000008" complete_nodeset="0x00000008" gp_index="74" cache_size="2097152" depth="2" cache_linesize="64" cache_associativity="16" cache_type="0">
<info name="Inclusive" value="0"/>
<object type="L1Cache" cpuset="0x00400000" complete_cpuset="0x00400000" nodeset="0x00000008" complete_nodeset="0x00000008" gp_index="73" cache_size="16384" depth="1" cache_linesize="64" cache_associativity="4" cache_type="1">
<info name="Inclusive" value="0"/>
<object type="Core" cpuset="0x00400000" complete_cpuset="0x00400000" nodeset="0x00000008" complete_nodeset="0x00000008" gp_index="72">
<object type="PU" os_index="22" cpuset="0x00400000" complete_cpuset="0x00400000" nodeset="0x00000008" complete_nodeset="0x00000008" gp_index="107"/>
</object>
</object>
</object>
<object type="L2Cache" cpuset="0x00800000" complete_cpuset="0x00800000" nodeset="0x00000008" complete_nodeset="0x00000008" gp_index="78" cache_size="2097152" depth="2" cache_linesize="64" cache_associativity="16" cache_type="0">
<info name="Inclusive" value="0"/>
<object type="L1Cache" cpuset="0x00800000" complete_cpuset="0x00800000" nodeset="0x00000008" complete_nodeset="0x00000008" gp_index="77" cache_size="16384" depth="1" cache_linesize="64" cache_associativity="4" cache_type="1">
<info name="Inclusive" value="0"/>
<object type="Core" cpuset="0x00800000" complete_cpuset="0x00800000" nodeset="0x00000008" complete_nodeset="0x00000008" gp_index="76">
<object type="PU" os_index="23" cpuset="0x00800000" complete_cpuset="0x00800000" nodeset="0x00000008" complete_nodeset="0x00000008" gp_index="108"/>
</object>
</object>
</object>
</object>
</object>
</object>
</topology>

View File

@@ -0,0 +1,399 @@
<?xml version="1.0" encoding="UTF-8"?>
<!DOCTYPE topology SYSTEM "hwloc2.dtd">
<topology version="2.0">
<object type="Machine" os_index="0" cpuset="0xffffffff" complete_cpuset="0xffffffff" allowed_cpuset="0xffffffff" nodeset="0x00000066" complete_nodeset="0x000000ff" allowed_nodeset="0x00000066" gp_index="1">
<info name="DMIProductName" value="H8QG6"/>
<info name="DMIProductVersion" value="1234567890"/>
<info name="DMIProductSerial" value="1234567890"/>
<info name="DMIProductUUID" value="0"/>
<info name="DMIBoardVendor" value="Supermicro"/>
<info name="DMIBoardName" value="H8QG6"/>
<info name="DMIBoardVersion" value="1234567890"/>
<info name="DMIBoardSerial" value="0"/>
<info name="DMIBoardAssetTag" value="1234567890"/>
<info name="DMIChassisVendor" value="Supermicro"/>
<info name="DMIChassisType" value="3"/>
<info name="DMIChassisVersion" value="1234567890"/>
<info name="DMIChassisSerial" value="1234567890."/>
<info name="DMIChassisAssetTag" value="1234567890"/>
<info name="DMIBIOSVendor" value="American Megatrends Inc."/>
<info name="DMIBIOSVersion" value="080016 "/>
<info name="DMIBIOSDate" value="10/11/2010"/>
<info name="DMISysVendor" value="Supermicro"/>
<info name="Backend" value="Linux"/>
<info name="LinuxCgroup" value="/"/>
<info name="OSName" value="Linux"/>
<info name="OSRelease" value="4.15.0-20-generic"/>
<info name="OSVersion" value="#21-Ubuntu SMP Tue Apr 24 06:16:15 UTC 2018"/>
<info name="HostName" value="host"/>
<info name="Architecture" value="x86_64"/>
<info name="hwlocVersion" value="2.0.4"/>
<info name="ProcessName" value="xmrig"/>
<object type="Package" os_index="0" cpuset="0x000000ff" complete_cpuset="0x000000ff" nodeset="0x00000002" complete_nodeset="0x00000003" gp_index="2">
<info name="CPUVendor" value="AuthenticAMD"/>
<info name="CPUFamilyNumber" value="16"/>
<info name="CPUModelNumber" value="9"/>
<info name="CPUModel" value="AMD Opteron(tm) Processor 6128"/>
<info name="CPUStepping" value="1"/>
<object type="L3Cache" cpuset="0x0000000f" complete_cpuset="0x0000000f" nodeset="0x0" complete_nodeset="0x00000001" gp_index="7" cache_size="5240832" depth="3" cache_linesize="64" cache_associativity="48" cache_type="0">
<info name="Inclusive" value="0"/>
<object type="L2Cache" cpuset="0x00000001" complete_cpuset="0x00000001" nodeset="0x0" complete_nodeset="0x00000001" gp_index="6" cache_size="524288" depth="2" cache_linesize="64" cache_associativity="16" cache_type="0">
<info name="Inclusive" value="0"/>
<object type="L1Cache" cpuset="0x00000001" complete_cpuset="0x00000001" nodeset="0x0" complete_nodeset="0x00000001" gp_index="5" cache_size="65536" depth="1" cache_linesize="64" cache_associativity="2" cache_type="1">
<info name="Inclusive" value="0"/>
<object type="Core" os_index="0" cpuset="0x00000001" complete_cpuset="0x00000001" nodeset="0x0" complete_nodeset="0x00000001" gp_index="3">
<object type="PU" os_index="0" cpuset="0x00000001" complete_cpuset="0x00000001" nodeset="0x0" complete_nodeset="0x00000001" gp_index="4"/>
</object>
</object>
</object>
<object type="L2Cache" cpuset="0x00000002" complete_cpuset="0x00000002" nodeset="0x0" complete_nodeset="0x00000001" gp_index="11" cache_size="524288" depth="2" cache_linesize="64" cache_associativity="16" cache_type="0">
<info name="Inclusive" value="0"/>
<object type="L1Cache" cpuset="0x00000002" complete_cpuset="0x00000002" nodeset="0x0" complete_nodeset="0x00000001" gp_index="10" cache_size="65536" depth="1" cache_linesize="64" cache_associativity="2" cache_type="1">
<info name="Inclusive" value="0"/>
<object type="Core" os_index="1" cpuset="0x00000002" complete_cpuset="0x00000002" nodeset="0x0" complete_nodeset="0x00000001" gp_index="8">
<object type="PU" os_index="1" cpuset="0x00000002" complete_cpuset="0x00000002" nodeset="0x0" complete_nodeset="0x00000001" gp_index="9"/>
</object>
</object>
</object>
<object type="L2Cache" cpuset="0x00000004" complete_cpuset="0x00000004" nodeset="0x0" complete_nodeset="0x00000001" gp_index="15" cache_size="524288" depth="2" cache_linesize="64" cache_associativity="16" cache_type="0">
<info name="Inclusive" value="0"/>
<object type="L1Cache" cpuset="0x00000004" complete_cpuset="0x00000004" nodeset="0x0" complete_nodeset="0x00000001" gp_index="14" cache_size="65536" depth="1" cache_linesize="64" cache_associativity="2" cache_type="1">
<info name="Inclusive" value="0"/>
<object type="Core" os_index="2" cpuset="0x00000004" complete_cpuset="0x00000004" nodeset="0x0" complete_nodeset="0x00000001" gp_index="12">
<object type="PU" os_index="2" cpuset="0x00000004" complete_cpuset="0x00000004" nodeset="0x0" complete_nodeset="0x00000001" gp_index="13"/>
</object>
</object>
</object>
<object type="L2Cache" cpuset="0x00000008" complete_cpuset="0x00000008" nodeset="0x0" complete_nodeset="0x00000001" gp_index="19" cache_size="524288" depth="2" cache_linesize="64" cache_associativity="16" cache_type="0">
<info name="Inclusive" value="0"/>
<object type="L1Cache" cpuset="0x00000008" complete_cpuset="0x00000008" nodeset="0x0" complete_nodeset="0x00000001" gp_index="18" cache_size="65536" depth="1" cache_linesize="64" cache_associativity="2" cache_type="1">
<info name="Inclusive" value="0"/>
<object type="Core" os_index="3" cpuset="0x00000008" complete_cpuset="0x00000008" nodeset="0x0" complete_nodeset="0x00000001" gp_index="16">
<object type="PU" os_index="3" cpuset="0x00000008" complete_cpuset="0x00000008" nodeset="0x0" complete_nodeset="0x00000001" gp_index="17"/>
</object>
</object>
</object>
</object>
<object type="L3Cache" cpuset="0x000000f0" complete_cpuset="0x000000f0" nodeset="0x00000002" complete_nodeset="0x00000002" gp_index="24" cache_size="5240832" depth="3" cache_linesize="64" cache_associativity="48" cache_type="0">
<info name="Inclusive" value="0"/>
<object type="NUMANode" os_index="1" cpuset="0x000000f0" complete_cpuset="0x000000f0" nodeset="0x00000002" complete_nodeset="0x00000002" gp_index="143" local_memory="4156817408">
<page_type size="4096" count="854592"/>
<page_type size="2097152" count="313"/>
<page_type size="1073741824" count="0"/>
</object>
<object type="L2Cache" cpuset="0x00000010" complete_cpuset="0x00000010" nodeset="0x00000002" complete_nodeset="0x00000002" gp_index="23" cache_size="524288" depth="2" cache_linesize="64" cache_associativity="16" cache_type="0">
<info name="Inclusive" value="0"/>
<object type="L1Cache" cpuset="0x00000010" complete_cpuset="0x00000010" nodeset="0x00000002" complete_nodeset="0x00000002" gp_index="22" cache_size="65536" depth="1" cache_linesize="64" cache_associativity="2" cache_type="1">
<info name="Inclusive" value="0"/>
<object type="Core" os_index="0" cpuset="0x00000010" complete_cpuset="0x00000010" nodeset="0x00000002" complete_nodeset="0x00000002" gp_index="20">
<object type="PU" os_index="4" cpuset="0x00000010" complete_cpuset="0x00000010" nodeset="0x00000002" complete_nodeset="0x00000002" gp_index="21"/>
</object>
</object>
</object>
<object type="L2Cache" cpuset="0x00000020" complete_cpuset="0x00000020" nodeset="0x00000002" complete_nodeset="0x00000002" gp_index="28" cache_size="524288" depth="2" cache_linesize="64" cache_associativity="16" cache_type="0">
<info name="Inclusive" value="0"/>
<object type="L1Cache" cpuset="0x00000020" complete_cpuset="0x00000020" nodeset="0x00000002" complete_nodeset="0x00000002" gp_index="27" cache_size="65536" depth="1" cache_linesize="64" cache_associativity="2" cache_type="1">
<info name="Inclusive" value="0"/>
<object type="Core" os_index="1" cpuset="0x00000020" complete_cpuset="0x00000020" nodeset="0x00000002" complete_nodeset="0x00000002" gp_index="25">
<object type="PU" os_index="5" cpuset="0x00000020" complete_cpuset="0x00000020" nodeset="0x00000002" complete_nodeset="0x00000002" gp_index="26"/>
</object>
</object>
</object>
<object type="L2Cache" cpuset="0x00000040" complete_cpuset="0x00000040" nodeset="0x00000002" complete_nodeset="0x00000002" gp_index="32" cache_size="524288" depth="2" cache_linesize="64" cache_associativity="16" cache_type="0">
<info name="Inclusive" value="0"/>
<object type="L1Cache" cpuset="0x00000040" complete_cpuset="0x00000040" nodeset="0x00000002" complete_nodeset="0x00000002" gp_index="31" cache_size="65536" depth="1" cache_linesize="64" cache_associativity="2" cache_type="1">
<info name="Inclusive" value="0"/>
<object type="Core" os_index="2" cpuset="0x00000040" complete_cpuset="0x00000040" nodeset="0x00000002" complete_nodeset="0x00000002" gp_index="29">
<object type="PU" os_index="6" cpuset="0x00000040" complete_cpuset="0x00000040" nodeset="0x00000002" complete_nodeset="0x00000002" gp_index="30"/>
</object>
</object>
</object>
<object type="L2Cache" cpuset="0x00000080" complete_cpuset="0x00000080" nodeset="0x00000002" complete_nodeset="0x00000002" gp_index="36" cache_size="524288" depth="2" cache_linesize="64" cache_associativity="16" cache_type="0">
<info name="Inclusive" value="0"/>
<object type="L1Cache" cpuset="0x00000080" complete_cpuset="0x00000080" nodeset="0x00000002" complete_nodeset="0x00000002" gp_index="35" cache_size="65536" depth="1" cache_linesize="64" cache_associativity="2" cache_type="1">
<info name="Inclusive" value="0"/>
<object type="Core" os_index="3" cpuset="0x00000080" complete_cpuset="0x00000080" nodeset="0x00000002" complete_nodeset="0x00000002" gp_index="33">
<object type="PU" os_index="7" cpuset="0x00000080" complete_cpuset="0x00000080" nodeset="0x00000002" complete_nodeset="0x00000002" gp_index="34"/>
</object>
</object>
</object>
</object>
</object>
<object type="Package" os_index="1" cpuset="0x0000ff00" complete_cpuset="0x0000ff00" nodeset="0x00000004" complete_nodeset="0x0000000c" gp_index="37">
<info name="CPUVendor" value="AuthenticAMD"/>
<info name="CPUFamilyNumber" value="16"/>
<info name="CPUModelNumber" value="9"/>
<info name="CPUModel" value="AMD Opteron(tm) Processor 6128"/>
<info name="CPUStepping" value="1"/>
<object type="L3Cache" cpuset="0x00000f00" complete_cpuset="0x00000f00" nodeset="0x00000004" complete_nodeset="0x00000004" gp_index="42" cache_size="5240832" depth="3" cache_linesize="64" cache_associativity="48" cache_type="0">
<info name="Inclusive" value="0"/>
<object type="NUMANode" os_index="2" cpuset="0x00000f00" complete_cpuset="0x00000f00" nodeset="0x00000004" complete_nodeset="0x00000004" gp_index="144" local_memory="4204060672">
<page_type size="4096" count="866126"/>
<page_type size="2097152" count="313"/>
<page_type size="1073741824" count="0"/>
</object>
<object type="L2Cache" cpuset="0x00000100" complete_cpuset="0x00000100" nodeset="0x00000004" complete_nodeset="0x00000004" gp_index="41" cache_size="524288" depth="2" cache_linesize="64" cache_associativity="16" cache_type="0">
<info name="Inclusive" value="0"/>
<object type="L1Cache" cpuset="0x00000100" complete_cpuset="0x00000100" nodeset="0x00000004" complete_nodeset="0x00000004" gp_index="40" cache_size="65536" depth="1" cache_linesize="64" cache_associativity="2" cache_type="1">
<info name="Inclusive" value="0"/>
<object type="Core" os_index="0" cpuset="0x00000100" complete_cpuset="0x00000100" nodeset="0x00000004" complete_nodeset="0x00000004" gp_index="38">
<object type="PU" os_index="8" cpuset="0x00000100" complete_cpuset="0x00000100" nodeset="0x00000004" complete_nodeset="0x00000004" gp_index="39"/>
</object>
</object>
</object>
<object type="L2Cache" cpuset="0x00000200" complete_cpuset="0x00000200" nodeset="0x00000004" complete_nodeset="0x00000004" gp_index="46" cache_size="524288" depth="2" cache_linesize="64" cache_associativity="16" cache_type="0">
<info name="Inclusive" value="0"/>
<object type="L1Cache" cpuset="0x00000200" complete_cpuset="0x00000200" nodeset="0x00000004" complete_nodeset="0x00000004" gp_index="45" cache_size="65536" depth="1" cache_linesize="64" cache_associativity="2" cache_type="1">
<info name="Inclusive" value="0"/>
<object type="Core" os_index="1" cpuset="0x00000200" complete_cpuset="0x00000200" nodeset="0x00000004" complete_nodeset="0x00000004" gp_index="43">
<object type="PU" os_index="9" cpuset="0x00000200" complete_cpuset="0x00000200" nodeset="0x00000004" complete_nodeset="0x00000004" gp_index="44"/>
</object>
</object>
</object>
<object type="L2Cache" cpuset="0x00000400" complete_cpuset="0x00000400" nodeset="0x00000004" complete_nodeset="0x00000004" gp_index="50" cache_size="524288" depth="2" cache_linesize="64" cache_associativity="16" cache_type="0">
<info name="Inclusive" value="0"/>
<object type="L1Cache" cpuset="0x00000400" complete_cpuset="0x00000400" nodeset="0x00000004" complete_nodeset="0x00000004" gp_index="49" cache_size="65536" depth="1" cache_linesize="64" cache_associativity="2" cache_type="1">
<info name="Inclusive" value="0"/>
<object type="Core" os_index="2" cpuset="0x00000400" complete_cpuset="0x00000400" nodeset="0x00000004" complete_nodeset="0x00000004" gp_index="47">
<object type="PU" os_index="10" cpuset="0x00000400" complete_cpuset="0x00000400" nodeset="0x00000004" complete_nodeset="0x00000004" gp_index="48"/>
</object>
</object>
</object>
<object type="L2Cache" cpuset="0x00000800" complete_cpuset="0x00000800" nodeset="0x00000004" complete_nodeset="0x00000004" gp_index="54" cache_size="524288" depth="2" cache_linesize="64" cache_associativity="16" cache_type="0">
<info name="Inclusive" value="0"/>
<object type="L1Cache" cpuset="0x00000800" complete_cpuset="0x00000800" nodeset="0x00000004" complete_nodeset="0x00000004" gp_index="53" cache_size="65536" depth="1" cache_linesize="64" cache_associativity="2" cache_type="1">
<info name="Inclusive" value="0"/>
<object type="Core" os_index="3" cpuset="0x00000800" complete_cpuset="0x00000800" nodeset="0x00000004" complete_nodeset="0x00000004" gp_index="51">
<object type="PU" os_index="11" cpuset="0x00000800" complete_cpuset="0x00000800" nodeset="0x00000004" complete_nodeset="0x00000004" gp_index="52"/>
</object>
</object>
</object>
</object>
<object type="L3Cache" cpuset="0x0000f000" complete_cpuset="0x0000f000" nodeset="0x0" complete_nodeset="0x00000008" gp_index="59" cache_size="5240832" depth="3" cache_linesize="64" cache_associativity="48" cache_type="0">
<info name="Inclusive" value="0"/>
<object type="L2Cache" cpuset="0x00001000" complete_cpuset="0x00001000" nodeset="0x0" complete_nodeset="0x00000008" gp_index="58" cache_size="524288" depth="2" cache_linesize="64" cache_associativity="16" cache_type="0">
<info name="Inclusive" value="0"/>
<object type="L1Cache" cpuset="0x00001000" complete_cpuset="0x00001000" nodeset="0x0" complete_nodeset="0x00000008" gp_index="57" cache_size="65536" depth="1" cache_linesize="64" cache_associativity="2" cache_type="1">
<info name="Inclusive" value="0"/>
<object type="Core" os_index="0" cpuset="0x00001000" complete_cpuset="0x00001000" nodeset="0x0" complete_nodeset="0x00000008" gp_index="55">
<object type="PU" os_index="12" cpuset="0x00001000" complete_cpuset="0x00001000" nodeset="0x0" complete_nodeset="0x00000008" gp_index="56"/>
</object>
</object>
</object>
<object type="L2Cache" cpuset="0x00002000" complete_cpuset="0x00002000" nodeset="0x0" complete_nodeset="0x00000008" gp_index="63" cache_size="524288" depth="2" cache_linesize="64" cache_associativity="16" cache_type="0">
<info name="Inclusive" value="0"/>
<object type="L1Cache" cpuset="0x00002000" complete_cpuset="0x00002000" nodeset="0x0" complete_nodeset="0x00000008" gp_index="62" cache_size="65536" depth="1" cache_linesize="64" cache_associativity="2" cache_type="1">
<info name="Inclusive" value="0"/>
<object type="Core" os_index="1" cpuset="0x00002000" complete_cpuset="0x00002000" nodeset="0x0" complete_nodeset="0x00000008" gp_index="60">
<object type="PU" os_index="13" cpuset="0x00002000" complete_cpuset="0x00002000" nodeset="0x0" complete_nodeset="0x00000008" gp_index="61"/>
</object>
</object>
</object>
<object type="L2Cache" cpuset="0x00004000" complete_cpuset="0x00004000" nodeset="0x0" complete_nodeset="0x00000008" gp_index="67" cache_size="524288" depth="2" cache_linesize="64" cache_associativity="16" cache_type="0">
<info name="Inclusive" value="0"/>
<object type="L1Cache" cpuset="0x00004000" complete_cpuset="0x00004000" nodeset="0x0" complete_nodeset="0x00000008" gp_index="66" cache_size="65536" depth="1" cache_linesize="64" cache_associativity="2" cache_type="1">
<info name="Inclusive" value="0"/>
<object type="Core" os_index="2" cpuset="0x00004000" complete_cpuset="0x00004000" nodeset="0x0" complete_nodeset="0x00000008" gp_index="64">
<object type="PU" os_index="14" cpuset="0x00004000" complete_cpuset="0x00004000" nodeset="0x0" complete_nodeset="0x00000008" gp_index="65"/>
</object>
</object>
</object>
<object type="L2Cache" cpuset="0x00008000" complete_cpuset="0x00008000" nodeset="0x0" complete_nodeset="0x00000008" gp_index="71" cache_size="524288" depth="2" cache_linesize="64" cache_associativity="16" cache_type="0">
<info name="Inclusive" value="0"/>
<object type="L1Cache" cpuset="0x00008000" complete_cpuset="0x00008000" nodeset="0x0" complete_nodeset="0x00000008" gp_index="70" cache_size="65536" depth="1" cache_linesize="64" cache_associativity="2" cache_type="1">
<info name="Inclusive" value="0"/>
<object type="Core" os_index="3" cpuset="0x00008000" complete_cpuset="0x00008000" nodeset="0x0" complete_nodeset="0x00000008" gp_index="68">
<object type="PU" os_index="15" cpuset="0x00008000" complete_cpuset="0x00008000" nodeset="0x0" complete_nodeset="0x00000008" gp_index="69"/>
</object>
</object>
</object>
</object>
</object>
<object type="Package" os_index="2" cpuset="0x00ff0000" complete_cpuset="0x00ff0000" nodeset="0x00000020" complete_nodeset="0x00000030" gp_index="72">
<info name="CPUVendor" value="AuthenticAMD"/>
<info name="CPUFamilyNumber" value="16"/>
<info name="CPUModelNumber" value="9"/>
<info name="CPUModel" value="AMD Opteron(tm) Processor 6128"/>
<info name="CPUStepping" value="1"/>
<object type="L3Cache" cpuset="0x000f0000" complete_cpuset="0x000f0000" nodeset="0x0" complete_nodeset="0x00000010" gp_index="77" cache_size="5240832" depth="3" cache_linesize="64" cache_associativity="48" cache_type="0">
<info name="Inclusive" value="0"/>
<object type="L2Cache" cpuset="0x00010000" complete_cpuset="0x00010000" nodeset="0x0" complete_nodeset="0x00000010" gp_index="76" cache_size="524288" depth="2" cache_linesize="64" cache_associativity="16" cache_type="0">
<info name="Inclusive" value="0"/>
<object type="L1Cache" cpuset="0x00010000" complete_cpuset="0x00010000" nodeset="0x0" complete_nodeset="0x00000010" gp_index="75" cache_size="65536" depth="1" cache_linesize="64" cache_associativity="2" cache_type="1">
<info name="Inclusive" value="0"/>
<object type="Core" os_index="0" cpuset="0x00010000" complete_cpuset="0x00010000" nodeset="0x0" complete_nodeset="0x00000010" gp_index="73">
<object type="PU" os_index="16" cpuset="0x00010000" complete_cpuset="0x00010000" nodeset="0x0" complete_nodeset="0x00000010" gp_index="74"/>
</object>
</object>
</object>
<object type="L2Cache" cpuset="0x00020000" complete_cpuset="0x00020000" nodeset="0x0" complete_nodeset="0x00000010" gp_index="81" cache_size="524288" depth="2" cache_linesize="64" cache_associativity="16" cache_type="0">
<info name="Inclusive" value="0"/>
<object type="L1Cache" cpuset="0x00020000" complete_cpuset="0x00020000" nodeset="0x0" complete_nodeset="0x00000010" gp_index="80" cache_size="65536" depth="1" cache_linesize="64" cache_associativity="2" cache_type="1">
<info name="Inclusive" value="0"/>
<object type="Core" os_index="1" cpuset="0x00020000" complete_cpuset="0x00020000" nodeset="0x0" complete_nodeset="0x00000010" gp_index="78">
<object type="PU" os_index="17" cpuset="0x00020000" complete_cpuset="0x00020000" nodeset="0x0" complete_nodeset="0x00000010" gp_index="79"/>
</object>
</object>
</object>
<object type="L2Cache" cpuset="0x00040000" complete_cpuset="0x00040000" nodeset="0x0" complete_nodeset="0x00000010" gp_index="85" cache_size="524288" depth="2" cache_linesize="64" cache_associativity="16" cache_type="0">
<info name="Inclusive" value="0"/>
<object type="L1Cache" cpuset="0x00040000" complete_cpuset="0x00040000" nodeset="0x0" complete_nodeset="0x00000010" gp_index="84" cache_size="65536" depth="1" cache_linesize="64" cache_associativity="2" cache_type="1">
<info name="Inclusive" value="0"/>
<object type="Core" os_index="2" cpuset="0x00040000" complete_cpuset="0x00040000" nodeset="0x0" complete_nodeset="0x00000010" gp_index="82">
<object type="PU" os_index="18" cpuset="0x00040000" complete_cpuset="0x00040000" nodeset="0x0" complete_nodeset="0x00000010" gp_index="83"/>
</object>
</object>
</object>
<object type="L2Cache" cpuset="0x00080000" complete_cpuset="0x00080000" nodeset="0x0" complete_nodeset="0x00000010" gp_index="89" cache_size="524288" depth="2" cache_linesize="64" cache_associativity="16" cache_type="0">
<info name="Inclusive" value="0"/>
<object type="L1Cache" cpuset="0x00080000" complete_cpuset="0x00080000" nodeset="0x0" complete_nodeset="0x00000010" gp_index="88" cache_size="65536" depth="1" cache_linesize="64" cache_associativity="2" cache_type="1">
<info name="Inclusive" value="0"/>
<object type="Core" os_index="3" cpuset="0x00080000" complete_cpuset="0x00080000" nodeset="0x0" complete_nodeset="0x00000010" gp_index="86">
<object type="PU" os_index="19" cpuset="0x00080000" complete_cpuset="0x00080000" nodeset="0x0" complete_nodeset="0x00000010" gp_index="87"/>
</object>
</object>
</object>
</object>
<object type="L3Cache" cpuset="0x00f00000" complete_cpuset="0x00f00000" nodeset="0x00000020" complete_nodeset="0x00000020" gp_index="94" cache_size="5240832" depth="3" cache_linesize="64" cache_associativity="48" cache_type="0">
<info name="Inclusive" value="0"/>
<object type="NUMANode" os_index="5" cpuset="0x00f00000" complete_cpuset="0x00f00000" nodeset="0x00000020" complete_nodeset="0x00000020" gp_index="147" local_memory="4226170880">
<page_type size="4096" count="872036"/>
<page_type size="2097152" count="312"/>
<page_type size="1073741824" count="0"/>
</object>
<object type="L2Cache" cpuset="0x00100000" complete_cpuset="0x00100000" nodeset="0x00000020" complete_nodeset="0x00000020" gp_index="93" cache_size="524288" depth="2" cache_linesize="64" cache_associativity="16" cache_type="0">
<info name="Inclusive" value="0"/>
<object type="L1Cache" cpuset="0x00100000" complete_cpuset="0x00100000" nodeset="0x00000020" complete_nodeset="0x00000020" gp_index="92" cache_size="65536" depth="1" cache_linesize="64" cache_associativity="2" cache_type="1">
<info name="Inclusive" value="0"/>
<object type="Core" os_index="0" cpuset="0x00100000" complete_cpuset="0x00100000" nodeset="0x00000020" complete_nodeset="0x00000020" gp_index="90">
<object type="PU" os_index="20" cpuset="0x00100000" complete_cpuset="0x00100000" nodeset="0x00000020" complete_nodeset="0x00000020" gp_index="91"/>
</object>
</object>
</object>
<object type="L2Cache" cpuset="0x00200000" complete_cpuset="0x00200000" nodeset="0x00000020" complete_nodeset="0x00000020" gp_index="98" cache_size="524288" depth="2" cache_linesize="64" cache_associativity="16" cache_type="0">
<info name="Inclusive" value="0"/>
<object type="L1Cache" cpuset="0x00200000" complete_cpuset="0x00200000" nodeset="0x00000020" complete_nodeset="0x00000020" gp_index="97" cache_size="65536" depth="1" cache_linesize="64" cache_associativity="2" cache_type="1">
<info name="Inclusive" value="0"/>
<object type="Core" os_index="1" cpuset="0x00200000" complete_cpuset="0x00200000" nodeset="0x00000020" complete_nodeset="0x00000020" gp_index="95">
<object type="PU" os_index="21" cpuset="0x00200000" complete_cpuset="0x00200000" nodeset="0x00000020" complete_nodeset="0x00000020" gp_index="96"/>
</object>
</object>
</object>
<object type="L2Cache" cpuset="0x00400000" complete_cpuset="0x00400000" nodeset="0x00000020" complete_nodeset="0x00000020" gp_index="102" cache_size="524288" depth="2" cache_linesize="64" cache_associativity="16" cache_type="0">
<info name="Inclusive" value="0"/>
<object type="L1Cache" cpuset="0x00400000" complete_cpuset="0x00400000" nodeset="0x00000020" complete_nodeset="0x00000020" gp_index="101" cache_size="65536" depth="1" cache_linesize="64" cache_associativity="2" cache_type="1">
<info name="Inclusive" value="0"/>
<object type="Core" os_index="2" cpuset="0x00400000" complete_cpuset="0x00400000" nodeset="0x00000020" complete_nodeset="0x00000020" gp_index="99">
<object type="PU" os_index="22" cpuset="0x00400000" complete_cpuset="0x00400000" nodeset="0x00000020" complete_nodeset="0x00000020" gp_index="100"/>
</object>
</object>
</object>
<object type="L2Cache" cpuset="0x00800000" complete_cpuset="0x00800000" nodeset="0x00000020" complete_nodeset="0x00000020" gp_index="106" cache_size="524288" depth="2" cache_linesize="64" cache_associativity="16" cache_type="0">
<info name="Inclusive" value="0"/>
<object type="L1Cache" cpuset="0x00800000" complete_cpuset="0x00800000" nodeset="0x00000020" complete_nodeset="0x00000020" gp_index="105" cache_size="65536" depth="1" cache_linesize="64" cache_associativity="2" cache_type="1">
<info name="Inclusive" value="0"/>
<object type="Core" os_index="3" cpuset="0x00800000" complete_cpuset="0x00800000" nodeset="0x00000020" complete_nodeset="0x00000020" gp_index="103">
<object type="PU" os_index="23" cpuset="0x00800000" complete_cpuset="0x00800000" nodeset="0x00000020" complete_nodeset="0x00000020" gp_index="104"/>
</object>
</object>
</object>
</object>
</object>
<object type="Package" os_index="3" cpuset="0xff000000" complete_cpuset="0xff000000" nodeset="0x00000040" complete_nodeset="0x000000c0" gp_index="107">
<info name="CPUVendor" value="AuthenticAMD"/>
<info name="CPUFamilyNumber" value="16"/>
<info name="CPUModelNumber" value="9"/>
<info name="CPUModel" value="AMD Opteron(tm) Processor 6128"/>
<info name="CPUStepping" value="1"/>
<object type="L3Cache" cpuset="0x0f000000" complete_cpuset="0x0f000000" nodeset="0x00000040" complete_nodeset="0x00000040" gp_index="112" cache_size="5240832" depth="3" cache_linesize="64" cache_associativity="48" cache_type="0">
<info name="Inclusive" value="0"/>
<object type="NUMANode" os_index="6" cpuset="0x0f000000" complete_cpuset="0x0f000000" nodeset="0x00000040" complete_nodeset="0x00000040" gp_index="148" local_memory="4221870080">
<page_type size="4096" count="870986"/>
<page_type size="2097152" count="312"/>
<page_type size="1073741824" count="0"/>
</object>
<object type="L2Cache" cpuset="0x01000000" complete_cpuset="0x01000000" nodeset="0x00000040" complete_nodeset="0x00000040" gp_index="111" cache_size="524288" depth="2" cache_linesize="64" cache_associativity="16" cache_type="0">
<info name="Inclusive" value="0"/>
<object type="L1Cache" cpuset="0x01000000" complete_cpuset="0x01000000" nodeset="0x00000040" complete_nodeset="0x00000040" gp_index="110" cache_size="65536" depth="1" cache_linesize="64" cache_associativity="2" cache_type="1">
<info name="Inclusive" value="0"/>
<object type="Core" os_index="0" cpuset="0x01000000" complete_cpuset="0x01000000" nodeset="0x00000040" complete_nodeset="0x00000040" gp_index="108">
<object type="PU" os_index="24" cpuset="0x01000000" complete_cpuset="0x01000000" nodeset="0x00000040" complete_nodeset="0x00000040" gp_index="109"/>
</object>
</object>
</object>
<object type="L2Cache" cpuset="0x02000000" complete_cpuset="0x02000000" nodeset="0x00000040" complete_nodeset="0x00000040" gp_index="116" cache_size="524288" depth="2" cache_linesize="64" cache_associativity="16" cache_type="0">
<info name="Inclusive" value="0"/>
<object type="L1Cache" cpuset="0x02000000" complete_cpuset="0x02000000" nodeset="0x00000040" complete_nodeset="0x00000040" gp_index="115" cache_size="65536" depth="1" cache_linesize="64" cache_associativity="2" cache_type="1">
<info name="Inclusive" value="0"/>
<object type="Core" os_index="1" cpuset="0x02000000" complete_cpuset="0x02000000" nodeset="0x00000040" complete_nodeset="0x00000040" gp_index="113">
<object type="PU" os_index="25" cpuset="0x02000000" complete_cpuset="0x02000000" nodeset="0x00000040" complete_nodeset="0x00000040" gp_index="114"/>
</object>
</object>
</object>
<object type="L2Cache" cpuset="0x04000000" complete_cpuset="0x04000000" nodeset="0x00000040" complete_nodeset="0x00000040" gp_index="120" cache_size="524288" depth="2" cache_linesize="64" cache_associativity="16" cache_type="0">
<info name="Inclusive" value="0"/>
<object type="L1Cache" cpuset="0x04000000" complete_cpuset="0x04000000" nodeset="0x00000040" complete_nodeset="0x00000040" gp_index="119" cache_size="65536" depth="1" cache_linesize="64" cache_associativity="2" cache_type="1">
<info name="Inclusive" value="0"/>
<object type="Core" os_index="2" cpuset="0x04000000" complete_cpuset="0x04000000" nodeset="0x00000040" complete_nodeset="0x00000040" gp_index="117">
<object type="PU" os_index="26" cpuset="0x04000000" complete_cpuset="0x04000000" nodeset="0x00000040" complete_nodeset="0x00000040" gp_index="118"/>
</object>
</object>
</object>
<object type="L2Cache" cpuset="0x08000000" complete_cpuset="0x08000000" nodeset="0x00000040" complete_nodeset="0x00000040" gp_index="124" cache_size="524288" depth="2" cache_linesize="64" cache_associativity="16" cache_type="0">
<info name="Inclusive" value="0"/>
<object type="L1Cache" cpuset="0x08000000" complete_cpuset="0x08000000" nodeset="0x00000040" complete_nodeset="0x00000040" gp_index="123" cache_size="65536" depth="1" cache_linesize="64" cache_associativity="2" cache_type="1">
<info name="Inclusive" value="0"/>
<object type="Core" os_index="3" cpuset="0x08000000" complete_cpuset="0x08000000" nodeset="0x00000040" complete_nodeset="0x00000040" gp_index="121">
<object type="PU" os_index="27" cpuset="0x08000000" complete_cpuset="0x08000000" nodeset="0x00000040" complete_nodeset="0x00000040" gp_index="122"/>
</object>
</object>
</object>
</object>
<object type="L3Cache" cpuset="0xf0000000" complete_cpuset="0xf0000000" nodeset="0x0" complete_nodeset="0x00000080" gp_index="129" cache_size="5240832" depth="3" cache_linesize="64" cache_associativity="48" cache_type="0">
<info name="Inclusive" value="0"/>
<object type="L2Cache" cpuset="0x10000000" complete_cpuset="0x10000000" nodeset="0x0" complete_nodeset="0x00000080" gp_index="128" cache_size="524288" depth="2" cache_linesize="64" cache_associativity="16" cache_type="0">
<info name="Inclusive" value="0"/>
<object type="L1Cache" cpuset="0x10000000" complete_cpuset="0x10000000" nodeset="0x0" complete_nodeset="0x00000080" gp_index="127" cache_size="65536" depth="1" cache_linesize="64" cache_associativity="2" cache_type="1">
<info name="Inclusive" value="0"/>
<object type="Core" os_index="0" cpuset="0x10000000" complete_cpuset="0x10000000" nodeset="0x0" complete_nodeset="0x00000080" gp_index="125">
<object type="PU" os_index="28" cpuset="0x10000000" complete_cpuset="0x10000000" nodeset="0x0" complete_nodeset="0x00000080" gp_index="126"/>
</object>
</object>
</object>
<object type="L2Cache" cpuset="0x20000000" complete_cpuset="0x20000000" nodeset="0x0" complete_nodeset="0x00000080" gp_index="133" cache_size="524288" depth="2" cache_linesize="64" cache_associativity="16" cache_type="0">
<info name="Inclusive" value="0"/>
<object type="L1Cache" cpuset="0x20000000" complete_cpuset="0x20000000" nodeset="0x0" complete_nodeset="0x00000080" gp_index="132" cache_size="65536" depth="1" cache_linesize="64" cache_associativity="2" cache_type="1">
<info name="Inclusive" value="0"/>
<object type="Core" os_index="1" cpuset="0x20000000" complete_cpuset="0x20000000" nodeset="0x0" complete_nodeset="0x00000080" gp_index="130">
<object type="PU" os_index="29" cpuset="0x20000000" complete_cpuset="0x20000000" nodeset="0x0" complete_nodeset="0x00000080" gp_index="131"/>
</object>
</object>
</object>
<object type="L2Cache" cpuset="0x40000000" complete_cpuset="0x40000000" nodeset="0x0" complete_nodeset="0x00000080" gp_index="137" cache_size="524288" depth="2" cache_linesize="64" cache_associativity="16" cache_type="0">
<info name="Inclusive" value="0"/>
<object type="L1Cache" cpuset="0x40000000" complete_cpuset="0x40000000" nodeset="0x0" complete_nodeset="0x00000080" gp_index="136" cache_size="65536" depth="1" cache_linesize="64" cache_associativity="2" cache_type="1">
<info name="Inclusive" value="0"/>
<object type="Core" os_index="2" cpuset="0x40000000" complete_cpuset="0x40000000" nodeset="0x0" complete_nodeset="0x00000080" gp_index="134">
<object type="PU" os_index="30" cpuset="0x40000000" complete_cpuset="0x40000000" nodeset="0x0" complete_nodeset="0x00000080" gp_index="135"/>
</object>
</object>
</object>
<object type="L2Cache" cpuset="0x80000000" complete_cpuset="0x80000000" nodeset="0x0" complete_nodeset="0x00000080" gp_index="141" cache_size="524288" depth="2" cache_linesize="64" cache_associativity="16" cache_type="0">
<info name="Inclusive" value="0"/>
<object type="L1Cache" cpuset="0x80000000" complete_cpuset="0x80000000" nodeset="0x0" complete_nodeset="0x00000080" gp_index="140" cache_size="65536" depth="1" cache_linesize="64" cache_associativity="2" cache_type="1">
<info name="Inclusive" value="0"/>
<object type="Core" os_index="3" cpuset="0x80000000" complete_cpuset="0x80000000" nodeset="0x0" complete_nodeset="0x00000080" gp_index="138">
<object type="PU" os_index="31" cpuset="0x80000000" complete_cpuset="0x80000000" nodeset="0x0" complete_nodeset="0x00000080" gp_index="139"/>
</object>
</object>
</object>
</object>
</object>
</object>
<distances2 type="NUMANode" nbobjs="4" kind="5" indexing="os">
<indexes length="8">1 2 5 6 </indexes>
<u64values length="30">10 22 16 22 22 10 22 16 16 22 </u64values>
<u64values length="18">10 22 22 16 22 10 </u64values>
</distances2>
</topology>

23
package.json Normal file
View File

@@ -0,0 +1,23 @@
{
"name": "xmrig",
"version": "3.0.0",
"description": "RandomX, CryptoNight and Argon2 miner",
"main": "index.js",
"directories": {
"doc": "doc"
},
"scripts": {
"build": "node scripts/generate_cl.js"
},
"repository": {
"type": "git",
"url": "git+https://github.com/xmrig/xmrig.git"
},
"keywords": [],
"author": "",
"license": "GPLv3",
"bugs": {
"url": "https://github.com/xmrig/xmrig/issues"
},
"homepage": "https://github.com/xmrig/xmrig#readme"
}

19
scripts/build.hwloc.sh Executable file
View File

@@ -0,0 +1,19 @@
#!/bin/bash -e
HWLOC_VERSION="2.2.0"
mkdir -p deps
mkdir -p deps/include
mkdir -p deps/lib
mkdir -p build && cd build
wget https://download.open-mpi.org/release/hwloc/v2.2/hwloc-${HWLOC_VERSION}.tar.bz2 -O hwloc-${HWLOC_VERSION}.tar.bz2
tar -xjf hwloc-${HWLOC_VERSION}.tar.bz2
cd hwloc-${HWLOC_VERSION}
./configure --disable-shared --enable-static --disable-io --disable-libudev --disable-libxml2
make -j$(nproc)
cp -fr include/ ../../deps
cp hwloc/.libs/libhwloc.a ../../deps/lib
cd ..

20
scripts/build.libressl.sh Executable file
View File

@@ -0,0 +1,20 @@
#!/bin/bash -e
LIBRESSL_VERSION="3.0.2"
mkdir -p deps
mkdir -p deps/include
mkdir -p deps/lib
mkdir -p build && cd build
wget https://ftp.openbsd.org/pub/OpenBSD/LibreSSL/libressl-${LIBRESSL_VERSION}.tar.gz -O libressl-${LIBRESSL_VERSION}.tar.gz
tar -xzf libressl-${LIBRESSL_VERSION}.tar.gz
cd libressl-${LIBRESSL_VERSION}
./configure --disable-shared
make -j$(nproc)
cp -fr include/ ../../deps
cp crypto/.libs/libcrypto.a ../../deps/lib
cp ssl/.libs/libssl.a ../../deps/lib
cd ..

20
scripts/build.openssl.sh Executable file
View File

@@ -0,0 +1,20 @@
#!/bin/bash -e
OPENSSL_VERSION="1.1.1g"
mkdir -p deps
mkdir -p deps/include
mkdir -p deps/lib
mkdir -p build && cd build
wget https://www.openssl.org/source/openssl-${OPENSSL_VERSION}.tar.gz -O openssl-${OPENSSL_VERSION}.tar.gz
tar -xzf openssl-${OPENSSL_VERSION}.tar.gz
cd openssl-${OPENSSL_VERSION}
./config -no-shared -no-asm -no-zlib -no-comp -no-dgram -no-filenames -no-cms
make -j$(nproc)
cp -fr include/ ../../deps
cp libcrypto.a ../../deps/lib
cp libssl.a ../../deps/lib
cd ..

20
scripts/build.uv.sh Executable file
View File

@@ -0,0 +1,20 @@
#!/bin/bash -e
UV_VERSION="1.38.1"
mkdir -p deps
mkdir -p deps/include
mkdir -p deps/lib
mkdir -p build && cd build
wget https://github.com/libuv/libuv/archive/v${UV_VERSION}.tar.gz -O v${UV_VERSION}.tar.gz
tar -xzf v${UV_VERSION}.tar.gz
cd libuv-${UV_VERSION}
sh autogen.sh
./configure --disable-shared
make -j$(nproc)
cp -fr include/ ../../deps
cp .libs/libuv.a ../../deps/lib
cd ..

5
scripts/build_deps.sh Executable file
View File

@@ -0,0 +1,5 @@
#!/bin/bash -e
./build.uv.sh
./build.hwloc.sh
./build.openssl.sh

12
scripts/enable_1gb_pages.sh Executable file
View File

@@ -0,0 +1,12 @@
#!/bin/bash -e
# https://xmrig.com/docs/miner/hugepages#onegb-huge-pages
sysctl -w vm.nr_hugepages=$(nproc)
for i in $(find /sys/devices/system/node/node* -maxdepth 0 -type d);
do
echo 3 > "$i/hugepages/hugepages-1048576kB/nr_hugepages";
done
echo "1GB pages successfully enabled"

108
scripts/generate_cl.js Normal file
View File

@@ -0,0 +1,108 @@
#!/usr/bin/env node
'use strict';
const fs = require('fs');
const path = require('path');
const { text2h, text2h_bundle, addIncludes } = require('./js/opencl');
const { opencl_minify } = require('./js/opencl_minify');
const cwd = process.cwd();
function cn()
{
const cn = opencl_minify(addIncludes('cryptonight.cl', [
'algorithm.cl',
'wolf-aes.cl',
'wolf-skein.cl',
'jh.cl',
'blake256.cl',
'groestl256.cl',
'fast_int_math_v2.cl',
'fast_div_heavy.cl',
'keccak.cl'
]));
// fs.writeFileSync('cryptonight_gen.cl', cn);
fs.writeFileSync('cryptonight_cl.h', text2h(cn, 'xmrig', 'cryptonight_cl'));
}
function cn_r()
{
const items = {};
items.cryptonight_r_defines_cl = opencl_minify(addIncludes('cryptonight_r_defines.cl', [ 'wolf-aes.cl' ]));
items.cryptonight_r_cl = opencl_minify(fs.readFileSync('cryptonight_r.cl', 'utf8'));
// for (let key in items) {
// fs.writeFileSync(key + '_gen.cl', items[key]);
// }
fs.writeFileSync('cryptonight_r_cl.h', text2h_bundle('xmrig', items));
}
function rx()
{
let rx = addIncludes('randomx.cl', [
'../cn/algorithm.cl',
'randomx_constants_monero.h',
'randomx_constants_wow.h',
'randomx_constants_loki.h',
'randomx_constants_arqma.h',
'randomx_constants_keva.h',
'aes.cl',
'blake2b.cl',
'randomx_vm.cl',
'randomx_jit.cl'
]);
rx = rx.replace(/(\t| )*#include "fillAes1Rx4.cl"/g, fs.readFileSync('fillAes1Rx4.cl', 'utf8'));
rx = rx.replace(/(\t| )*#include "blake2b_double_block.cl"/g, fs.readFileSync('blake2b_double_block.cl', 'utf8'));
rx = opencl_minify(rx);
//fs.writeFileSync('randomx_gen.cl', rx);
fs.writeFileSync('randomx_cl.h', text2h(rx, 'xmrig', 'randomx_cl'));
}
function astrobwt()
{
const astrobwt = opencl_minify(addIncludes('astrobwt.cl', [ 'BWT.cl', 'salsa20.cl', 'sha3.cl' ]));
// fs.writeFileSync('astrobwt_gen.cl', astrobwt);
fs.writeFileSync('astrobwt_cl.h', text2h(astrobwt, 'xmrig', 'astrobwt_cl'));
}
function kawpow()
{
const kawpow = opencl_minify(addIncludes('kawpow.cl', [ 'defs.h' ]));
const kawpow_dag = opencl_minify(addIncludes('kawpow_dag.cl', [ 'defs.h' ]));
// fs.writeFileSync('kawpow_gen.cl', kawpow);
fs.writeFileSync('kawpow_cl.h', text2h(kawpow, 'xmrig', 'kawpow_cl'));
fs.writeFileSync('kawpow_dag_cl.h', text2h(kawpow_dag, 'xmrig', 'kawpow_dag_cl'));
}
process.chdir(path.resolve('src/backend/opencl/cl/cn'));
cn();
cn_r();
process.chdir(cwd);
process.chdir(path.resolve('src/backend/opencl/cl/rx'));
rx();
process.chdir(cwd);
process.chdir(path.resolve('src/backend/opencl/cl/astrobwt'));
astrobwt();
process.chdir(cwd);
process.chdir(path.resolve('src/backend/opencl/cl/kawpow'));
kawpow();

91
scripts/js/opencl.js Normal file
View File

@@ -0,0 +1,91 @@
'use strict';
const fs = require('fs');
function bin2h(buf, namespace, name)
{
const size = buf.byteLength;
let out = `#pragma once\n\nnamespace ${namespace} {\n\nstatic const unsigned char ${name}[${size}] = {\n `;
let b = 32;
for (let i = 0; i < size; i++) {
out += `0x${buf.readUInt8(i).toString(16).padStart(2, '0')}${size - i > 1 ? ',' : ''}`;
if (--b === 0) {
b = 32;
out += '\n ';
}
}
out += `\n};\n\n} // namespace ${namespace}\n`;
return out;
}
function text2h_internal(text, name)
{
const buf = Buffer.from(text);
const size = buf.byteLength;
let out = `\nstatic const char ${name}[${size + 1}] = {\n `;
let b = 32;
for (let i = 0; i < size; i++) {
out += `0x${buf.readUInt8(i).toString(16).padStart(2, '0')},`;
if (--b === 0) {
b = 32;
out += '\n ';
}
}
out += '0x00';
out += '\n};\n';
return out;
}
function text2h(text, namespace, name)
{
return `#pragma once\n\nnamespace ${namespace} {\n` + text2h_internal(text, name) + `\n} // namespace ${namespace}\n`;
}
function text2h_bundle(namespace, items)
{
let out = `#pragma once\n\nnamespace ${namespace} {\n`;
for (let key in items) {
out += text2h_internal(items[key], key);
}
return out + `\n} // namespace ${namespace}\n`;
}
function addInclude(input, name)
{
return input.replace(`#include "${name}"`, fs.readFileSync(name, 'utf8'));
}
function addIncludes(inputFileName, names)
{
let data = fs.readFileSync(inputFileName, 'utf8');
for (let name of names) {
data = addInclude(data, name);
}
return data;
}
module.exports.bin2h = bin2h;
module.exports.text2h = text2h;
module.exports.text2h_bundle = text2h_bundle;
module.exports.addInclude = addInclude;
module.exports.addIncludes = addIncludes;

View File

@@ -0,0 +1,51 @@
'use strict';
function opencl_minify(input)
{
let out = input.replace(/\r/g, '');
out = out.replace(/\/\*[\s\S]*?\*\/|\/\/.*$/gm, ''); // comments
out = out.replace(/^#\s+/gm, '#'); // macros with spaces
out = out.replace(/\n{2,}/g, '\n'); // empty lines
out = out.replace(/^\s+/gm, ''); // leading whitespace
out = out.replace(/ {2,}/g, ' '); // extra whitespace
let array = out.split('\n').map(line => {
if (line[0] === '#') {
return line;
}
line = line.replace(/, /g, ',');
line = line.replace(/ \? /g, '?');
line = line.replace(/ : /g, ':');
line = line.replace(/ = /g, '=');
line = line.replace(/ != /g, '!=');
line = line.replace(/ >= /g, '>=');
line = line.replace(/ <= /g, '<=');
line = line.replace(/ == /g, '==');
line = line.replace(/ \+= /g, '+=');
line = line.replace(/ -= /g, '-=');
line = line.replace(/ \|= /g, '|=');
line = line.replace(/ \| /g, '|');
line = line.replace(/ \|\| /g, '||');
line = line.replace(/ & /g, '&');
line = line.replace(/ && /g, '&&');
line = line.replace(/ > /g, '>');
line = line.replace(/ < /g, '<');
line = line.replace(/ \+ /g, '+');
line = line.replace(/ - /g, '-');
line = line.replace(/ \* /g, '*');
line = line.replace(/ \^ /g, '^');
line = line.replace(/ & /g, '&');
line = line.replace(/ \/ /g, '/');
line = line.replace(/ << /g, '<<');
line = line.replace(/ >> /g, '>>');
line = line.replace(/if \(/g, 'if(');
return line;
});
return array.join('\n');
}
module.exports.opencl_minify = opencl_minify;

20
scripts/randomx_boost.sh Executable file
View File

@@ -0,0 +1,20 @@
#!/bin/bash
modprobe msr
if cat /proc/cpuinfo | grep "AMD Ryzen" > /dev/null;
then
echo "Detected Ryzen"
wrmsr -a 0xc0011022 0x510000
wrmsr -a 0xc001102b 0x1808cc16
wrmsr -a 0xc0011020 0
wrmsr -a 0xc0011021 0x40
echo "MSR register values for Ryzen applied"
elif cat /proc/cpuinfo | grep "Intel" > /dev/null;
then
echo "Detected Intel"
wrmsr -a 0x1a4 0xf
echo "MSR register values for Intel applied"
else
echo "No supported CPU detected"
fi

25
src/3rdparty/CL/LICENSE vendored Normal file
View File

@@ -0,0 +1,25 @@
Copyright (c) 2008-2015 The Khronos Group Inc.
Permission is hereby granted, free of charge, to any person obtaining a
copy of this software and/or associated documentation files (the
"Materials"), to deal in the Materials without restriction, including
without limitation the rights to use, copy, modify, merge, publish,
distribute, sublicense, and/or sell copies of the Materials, and to
permit persons to whom the Materials are furnished to do so, subject to
the following conditions:
The above copyright notice and this permission notice shall be included
in all copies or substantial portions of the Materials.
MODIFICATIONS TO THIS FILE MAY MEAN IT NO LONGER ACCURATELY REFLECTS
KHRONOS STANDARDS. THE UNMODIFIED, NORMATIVE VERSIONS OF KHRONOS
SPECIFICATIONS AND HEADER INFORMATION ARE LOCATED AT
https://www.khronos.org/registry/
THE MATERIALS ARE PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
MATERIALS OR THE USE OR OTHER DEALINGS IN THE MATERIALS.

50
src/3rdparty/CL/README.md vendored Normal file
View File

@@ -0,0 +1,50 @@
# OpenCL<sup>TM</sup> API Headers
This repository contains C language headers for the OpenCL API.
The authoritative public repository for these headers is located at:
https://github.com/KhronosGroup/OpenCL-Headers
Issues, proposed fixes for issues, and other suggested changes should be
created using Github.
## Branch Structure
The OpenCL API headers in this repository are Unified headers and are designed
to work with all released OpenCL versions. This differs from previous OpenCL
API headers, where version-specific API headers either existed in separate
branches, or in separate folders in a branch.
## Compiling for a Specific OpenCL Version
By default, the OpenCL API headers in this repository are for the latest
OpenCL version (currently OpenCL 2.2). To use these API headers to target
a different OpenCL version, an application may `#define` the preprocessor
value `CL_TARGET_OPENCL_VERSION` before including the OpenCL API headers.
The `CL_TARGET_OPENCL_VERSION` is a three digit decimal value representing
the OpenCL API version.
For example, to enforce usage of no more than the OpenCL 1.2 APIs, you may
include the OpenCL API headers as follows:
```
#define CL_TARGET_OPENCL_VERSION 120
#include <CL/opencl.h>
```
## Directory Structure
```
README.md This file
LICENSE Source license for the OpenCL API headers
CL/ Unified OpenCL API headers tree
```
## License
See [LICENSE](LICENSE).
---
OpenCL and the OpenCL logo are trademarks of Apple Inc. used by permission by Khronos.

1804
src/3rdparty/CL/cl.h vendored Normal file

File diff suppressed because it is too large Load Diff

131
src/3rdparty/CL/cl_d3d10.h vendored Normal file
View File

@@ -0,0 +1,131 @@
/**********************************************************************************
* Copyright (c) 2008-2015 The Khronos Group Inc.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and/or associated documentation files (the
* "Materials"), to deal in the Materials without restriction, including
* without limitation the rights to use, copy, modify, merge, publish,
* distribute, sublicense, and/or sell copies of the Materials, and to
* permit persons to whom the Materials are furnished to do so, subject to
* the following conditions:
*
* The above copyright notice and this permission notice shall be included
* in all copies or substantial portions of the Materials.
*
* MODIFICATIONS TO THIS FILE MAY MEAN IT NO LONGER ACCURATELY REFLECTS
* KHRONOS STANDARDS. THE UNMODIFIED, NORMATIVE VERSIONS OF KHRONOS
* SPECIFICATIONS AND HEADER INFORMATION ARE LOCATED AT
* https://www.khronos.org/registry/
*
* THE MATERIALS ARE PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
* IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
* CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
* TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
* MATERIALS OR THE USE OR OTHER DEALINGS IN THE MATERIALS.
**********************************************************************************/
/* $Revision: 11708 $ on $Date: 2010-06-13 23:36:24 -0700 (Sun, 13 Jun 2010) $ */
#ifndef __OPENCL_CL_D3D10_H
#define __OPENCL_CL_D3D10_H
#include <d3d10.h>
#include <CL/cl.h>
#include <CL/cl_platform.h>
#ifdef __cplusplus
extern "C" {
#endif
/******************************************************************************
* cl_khr_d3d10_sharing */
#define cl_khr_d3d10_sharing 1
typedef cl_uint cl_d3d10_device_source_khr;
typedef cl_uint cl_d3d10_device_set_khr;
/******************************************************************************/
/* Error Codes */
#define CL_INVALID_D3D10_DEVICE_KHR -1002
#define CL_INVALID_D3D10_RESOURCE_KHR -1003
#define CL_D3D10_RESOURCE_ALREADY_ACQUIRED_KHR -1004
#define CL_D3D10_RESOURCE_NOT_ACQUIRED_KHR -1005
/* cl_d3d10_device_source_nv */
#define CL_D3D10_DEVICE_KHR 0x4010
#define CL_D3D10_DXGI_ADAPTER_KHR 0x4011
/* cl_d3d10_device_set_nv */
#define CL_PREFERRED_DEVICES_FOR_D3D10_KHR 0x4012
#define CL_ALL_DEVICES_FOR_D3D10_KHR 0x4013
/* cl_context_info */
#define CL_CONTEXT_D3D10_DEVICE_KHR 0x4014
#define CL_CONTEXT_D3D10_PREFER_SHARED_RESOURCES_KHR 0x402C
/* cl_mem_info */
#define CL_MEM_D3D10_RESOURCE_KHR 0x4015
/* cl_image_info */
#define CL_IMAGE_D3D10_SUBRESOURCE_KHR 0x4016
/* cl_command_type */
#define CL_COMMAND_ACQUIRE_D3D10_OBJECTS_KHR 0x4017
#define CL_COMMAND_RELEASE_D3D10_OBJECTS_KHR 0x4018
/******************************************************************************/
typedef CL_API_ENTRY cl_int (CL_API_CALL *clGetDeviceIDsFromD3D10KHR_fn)(
cl_platform_id platform,
cl_d3d10_device_source_khr d3d_device_source,
void * d3d_object,
cl_d3d10_device_set_khr d3d_device_set,
cl_uint num_entries,
cl_device_id * devices,
cl_uint * num_devices) CL_API_SUFFIX__VERSION_1_0;
typedef CL_API_ENTRY cl_mem (CL_API_CALL *clCreateFromD3D10BufferKHR_fn)(
cl_context context,
cl_mem_flags flags,
ID3D10Buffer * resource,
cl_int * errcode_ret) CL_API_SUFFIX__VERSION_1_0;
typedef CL_API_ENTRY cl_mem (CL_API_CALL *clCreateFromD3D10Texture2DKHR_fn)(
cl_context context,
cl_mem_flags flags,
ID3D10Texture2D * resource,
UINT subresource,
cl_int * errcode_ret) CL_API_SUFFIX__VERSION_1_0;
typedef CL_API_ENTRY cl_mem (CL_API_CALL *clCreateFromD3D10Texture3DKHR_fn)(
cl_context context,
cl_mem_flags flags,
ID3D10Texture3D * resource,
UINT subresource,
cl_int * errcode_ret) CL_API_SUFFIX__VERSION_1_0;
typedef CL_API_ENTRY cl_int (CL_API_CALL *clEnqueueAcquireD3D10ObjectsKHR_fn)(
cl_command_queue command_queue,
cl_uint num_objects,
const cl_mem * mem_objects,
cl_uint num_events_in_wait_list,
const cl_event * event_wait_list,
cl_event * event) CL_API_SUFFIX__VERSION_1_0;
typedef CL_API_ENTRY cl_int (CL_API_CALL *clEnqueueReleaseD3D10ObjectsKHR_fn)(
cl_command_queue command_queue,
cl_uint num_objects,
const cl_mem * mem_objects,
cl_uint num_events_in_wait_list,
const cl_event * event_wait_list,
cl_event * event) CL_API_SUFFIX__VERSION_1_0;
#ifdef __cplusplus
}
#endif
#endif /* __OPENCL_CL_D3D10_H */

131
src/3rdparty/CL/cl_d3d11.h vendored Normal file
View File

@@ -0,0 +1,131 @@
/**********************************************************************************
* Copyright (c) 2008-2015 The Khronos Group Inc.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and/or associated documentation files (the
* "Materials"), to deal in the Materials without restriction, including
* without limitation the rights to use, copy, modify, merge, publish,
* distribute, sublicense, and/or sell copies of the Materials, and to
* permit persons to whom the Materials are furnished to do so, subject to
* the following conditions:
*
* The above copyright notice and this permission notice shall be included
* in all copies or substantial portions of the Materials.
*
* MODIFICATIONS TO THIS FILE MAY MEAN IT NO LONGER ACCURATELY REFLECTS
* KHRONOS STANDARDS. THE UNMODIFIED, NORMATIVE VERSIONS OF KHRONOS
* SPECIFICATIONS AND HEADER INFORMATION ARE LOCATED AT
* https://www.khronos.org/registry/
*
* THE MATERIALS ARE PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
* IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
* CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
* TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
* MATERIALS OR THE USE OR OTHER DEALINGS IN THE MATERIALS.
**********************************************************************************/
/* $Revision: 11708 $ on $Date: 2010-06-13 23:36:24 -0700 (Sun, 13 Jun 2010) $ */
#ifndef __OPENCL_CL_D3D11_H
#define __OPENCL_CL_D3D11_H
#include <d3d11.h>
#include <CL/cl.h>
#include <CL/cl_platform.h>
#ifdef __cplusplus
extern "C" {
#endif
/******************************************************************************
* cl_khr_d3d11_sharing */
#define cl_khr_d3d11_sharing 1
typedef cl_uint cl_d3d11_device_source_khr;
typedef cl_uint cl_d3d11_device_set_khr;
/******************************************************************************/
/* Error Codes */
#define CL_INVALID_D3D11_DEVICE_KHR -1006
#define CL_INVALID_D3D11_RESOURCE_KHR -1007
#define CL_D3D11_RESOURCE_ALREADY_ACQUIRED_KHR -1008
#define CL_D3D11_RESOURCE_NOT_ACQUIRED_KHR -1009
/* cl_d3d11_device_source */
#define CL_D3D11_DEVICE_KHR 0x4019
#define CL_D3D11_DXGI_ADAPTER_KHR 0x401A
/* cl_d3d11_device_set */
#define CL_PREFERRED_DEVICES_FOR_D3D11_KHR 0x401B
#define CL_ALL_DEVICES_FOR_D3D11_KHR 0x401C
/* cl_context_info */
#define CL_CONTEXT_D3D11_DEVICE_KHR 0x401D
#define CL_CONTEXT_D3D11_PREFER_SHARED_RESOURCES_KHR 0x402D
/* cl_mem_info */
#define CL_MEM_D3D11_RESOURCE_KHR 0x401E
/* cl_image_info */
#define CL_IMAGE_D3D11_SUBRESOURCE_KHR 0x401F
/* cl_command_type */
#define CL_COMMAND_ACQUIRE_D3D11_OBJECTS_KHR 0x4020
#define CL_COMMAND_RELEASE_D3D11_OBJECTS_KHR 0x4021
/******************************************************************************/
typedef CL_API_ENTRY cl_int (CL_API_CALL *clGetDeviceIDsFromD3D11KHR_fn)(
cl_platform_id platform,
cl_d3d11_device_source_khr d3d_device_source,
void * d3d_object,
cl_d3d11_device_set_khr d3d_device_set,
cl_uint num_entries,
cl_device_id * devices,
cl_uint * num_devices) CL_API_SUFFIX__VERSION_1_2;
typedef CL_API_ENTRY cl_mem (CL_API_CALL *clCreateFromD3D11BufferKHR_fn)(
cl_context context,
cl_mem_flags flags,
ID3D11Buffer * resource,
cl_int * errcode_ret) CL_API_SUFFIX__VERSION_1_2;
typedef CL_API_ENTRY cl_mem (CL_API_CALL *clCreateFromD3D11Texture2DKHR_fn)(
cl_context context,
cl_mem_flags flags,
ID3D11Texture2D * resource,
UINT subresource,
cl_int * errcode_ret) CL_API_SUFFIX__VERSION_1_2;
typedef CL_API_ENTRY cl_mem (CL_API_CALL *clCreateFromD3D11Texture3DKHR_fn)(
cl_context context,
cl_mem_flags flags,
ID3D11Texture3D * resource,
UINT subresource,
cl_int * errcode_ret) CL_API_SUFFIX__VERSION_1_2;
typedef CL_API_ENTRY cl_int (CL_API_CALL *clEnqueueAcquireD3D11ObjectsKHR_fn)(
cl_command_queue command_queue,
cl_uint num_objects,
const cl_mem * mem_objects,
cl_uint num_events_in_wait_list,
const cl_event * event_wait_list,
cl_event * event) CL_API_SUFFIX__VERSION_1_2;
typedef CL_API_ENTRY cl_int (CL_API_CALL *clEnqueueReleaseD3D11ObjectsKHR_fn)(
cl_command_queue command_queue,
cl_uint num_objects,
const cl_mem * mem_objects,
cl_uint num_events_in_wait_list,
const cl_event * event_wait_list,
cl_event * event) CL_API_SUFFIX__VERSION_1_2;
#ifdef __cplusplus
}
#endif
#endif /* __OPENCL_CL_D3D11_H */

132
src/3rdparty/CL/cl_dx9_media_sharing.h vendored Normal file
View File

@@ -0,0 +1,132 @@
/**********************************************************************************
* Copyright (c) 2008-2015 The Khronos Group Inc.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and/or associated documentation files (the
* "Materials"), to deal in the Materials without restriction, including
* without limitation the rights to use, copy, modify, merge, publish,
* distribute, sublicense, and/or sell copies of the Materials, and to
* permit persons to whom the Materials are furnished to do so, subject to
* the following conditions:
*
* The above copyright notice and this permission notice shall be included
* in all copies or substantial portions of the Materials.
*
* MODIFICATIONS TO THIS FILE MAY MEAN IT NO LONGER ACCURATELY REFLECTS
* KHRONOS STANDARDS. THE UNMODIFIED, NORMATIVE VERSIONS OF KHRONOS
* SPECIFICATIONS AND HEADER INFORMATION ARE LOCATED AT
* https://www.khronos.org/registry/
*
* THE MATERIALS ARE PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
* IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
* CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
* TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
* MATERIALS OR THE USE OR OTHER DEALINGS IN THE MATERIALS.
**********************************************************************************/
/* $Revision: 11708 $ on $Date: 2010-06-13 23:36:24 -0700 (Sun, 13 Jun 2010) $ */
#ifndef __OPENCL_CL_DX9_MEDIA_SHARING_H
#define __OPENCL_CL_DX9_MEDIA_SHARING_H
#include <CL/cl.h>
#include <CL/cl_platform.h>
#ifdef __cplusplus
extern "C" {
#endif
/******************************************************************************/
/* cl_khr_dx9_media_sharing */
#define cl_khr_dx9_media_sharing 1
typedef cl_uint cl_dx9_media_adapter_type_khr;
typedef cl_uint cl_dx9_media_adapter_set_khr;
#if defined(_WIN32)
#include <d3d9.h>
typedef struct _cl_dx9_surface_info_khr
{
IDirect3DSurface9 *resource;
HANDLE shared_handle;
} cl_dx9_surface_info_khr;
#endif
/******************************************************************************/
/* Error Codes */
#define CL_INVALID_DX9_MEDIA_ADAPTER_KHR -1010
#define CL_INVALID_DX9_MEDIA_SURFACE_KHR -1011
#define CL_DX9_MEDIA_SURFACE_ALREADY_ACQUIRED_KHR -1012
#define CL_DX9_MEDIA_SURFACE_NOT_ACQUIRED_KHR -1013
/* cl_media_adapter_type_khr */
#define CL_ADAPTER_D3D9_KHR 0x2020
#define CL_ADAPTER_D3D9EX_KHR 0x2021
#define CL_ADAPTER_DXVA_KHR 0x2022
/* cl_media_adapter_set_khr */
#define CL_PREFERRED_DEVICES_FOR_DX9_MEDIA_ADAPTER_KHR 0x2023
#define CL_ALL_DEVICES_FOR_DX9_MEDIA_ADAPTER_KHR 0x2024
/* cl_context_info */
#define CL_CONTEXT_ADAPTER_D3D9_KHR 0x2025
#define CL_CONTEXT_ADAPTER_D3D9EX_KHR 0x2026
#define CL_CONTEXT_ADAPTER_DXVA_KHR 0x2027
/* cl_mem_info */
#define CL_MEM_DX9_MEDIA_ADAPTER_TYPE_KHR 0x2028
#define CL_MEM_DX9_MEDIA_SURFACE_INFO_KHR 0x2029
/* cl_image_info */
#define CL_IMAGE_DX9_MEDIA_PLANE_KHR 0x202A
/* cl_command_type */
#define CL_COMMAND_ACQUIRE_DX9_MEDIA_SURFACES_KHR 0x202B
#define CL_COMMAND_RELEASE_DX9_MEDIA_SURFACES_KHR 0x202C
/******************************************************************************/
typedef CL_API_ENTRY cl_int (CL_API_CALL *clGetDeviceIDsFromDX9MediaAdapterKHR_fn)(
cl_platform_id platform,
cl_uint num_media_adapters,
cl_dx9_media_adapter_type_khr * media_adapter_type,
void * media_adapters,
cl_dx9_media_adapter_set_khr media_adapter_set,
cl_uint num_entries,
cl_device_id * devices,
cl_uint * num_devices) CL_API_SUFFIX__VERSION_1_2;
typedef CL_API_ENTRY cl_mem (CL_API_CALL *clCreateFromDX9MediaSurfaceKHR_fn)(
cl_context context,
cl_mem_flags flags,
cl_dx9_media_adapter_type_khr adapter_type,
void * surface_info,
cl_uint plane,
cl_int * errcode_ret) CL_API_SUFFIX__VERSION_1_2;
typedef CL_API_ENTRY cl_int (CL_API_CALL *clEnqueueAcquireDX9MediaSurfacesKHR_fn)(
cl_command_queue command_queue,
cl_uint num_objects,
const cl_mem * mem_objects,
cl_uint num_events_in_wait_list,
const cl_event * event_wait_list,
cl_event * event) CL_API_SUFFIX__VERSION_1_2;
typedef CL_API_ENTRY cl_int (CL_API_CALL *clEnqueueReleaseDX9MediaSurfacesKHR_fn)(
cl_command_queue command_queue,
cl_uint num_objects,
const cl_mem * mem_objects,
cl_uint num_events_in_wait_list,
const cl_event * event_wait_list,
cl_event * event) CL_API_SUFFIX__VERSION_1_2;
#ifdef __cplusplus
}
#endif
#endif /* __OPENCL_CL_DX9_MEDIA_SHARING_H */

View File

@@ -0,0 +1,182 @@
/**********************************************************************************
* Copyright (c) 2008-2019 The Khronos Group Inc.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and/or associated documentation files (the
* "Materials"), to deal in the Materials without restriction, including
* without limitation the rights to use, copy, modify, merge, publish,
* distribute, sublicense, and/or sell copies of the Materials, and to
* permit persons to whom the Materials are furnished to do so, subject to
* the following conditions:
*
* The above copyright notice and this permission notice shall be included
* in all copies or substantial portions of the Materials.
*
* MODIFICATIONS TO THIS FILE MAY MEAN IT NO LONGER ACCURATELY REFLECTS
* KHRONOS STANDARDS. THE UNMODIFIED, NORMATIVE VERSIONS OF KHRONOS
* SPECIFICATIONS AND HEADER INFORMATION ARE LOCATED AT
* https://www.khronos.org/registry/
*
* THE MATERIALS ARE PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
* IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
* CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
* TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
* MATERIALS OR THE USE OR OTHER DEALINGS IN THE MATERIALS.
**********************************************************************************/
/*****************************************************************************\
Copyright (c) 2013-2019 Intel Corporation All Rights Reserved.
THESE MATERIALS ARE PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
"AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL INTEL OR ITS
CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY OR TORT (INCLUDING
NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THESE
MATERIALS, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
File Name: cl_dx9_media_sharing_intel.h
Abstract:
Notes:
\*****************************************************************************/
#ifndef __OPENCL_CL_DX9_MEDIA_SHARING_INTEL_H
#define __OPENCL_CL_DX9_MEDIA_SHARING_INTEL_H
#include <CL/cl.h>
#include <CL/cl_platform.h>
#include <d3d9.h>
#include <dxvahd.h>
#include <wtypes.h>
#include <d3d9types.h>
#ifdef __cplusplus
extern "C" {
#endif
/***************************************
* cl_intel_dx9_media_sharing extension *
****************************************/
#define cl_intel_dx9_media_sharing 1
typedef cl_uint cl_dx9_device_source_intel;
typedef cl_uint cl_dx9_device_set_intel;
/* error codes */
#define CL_INVALID_DX9_DEVICE_INTEL -1010
#define CL_INVALID_DX9_RESOURCE_INTEL -1011
#define CL_DX9_RESOURCE_ALREADY_ACQUIRED_INTEL -1012
#define CL_DX9_RESOURCE_NOT_ACQUIRED_INTEL -1013
/* cl_dx9_device_source_intel */
#define CL_D3D9_DEVICE_INTEL 0x4022
#define CL_D3D9EX_DEVICE_INTEL 0x4070
#define CL_DXVA_DEVICE_INTEL 0x4071
/* cl_dx9_device_set_intel */
#define CL_PREFERRED_DEVICES_FOR_DX9_INTEL 0x4024
#define CL_ALL_DEVICES_FOR_DX9_INTEL 0x4025
/* cl_context_info */
#define CL_CONTEXT_D3D9_DEVICE_INTEL 0x4026
#define CL_CONTEXT_D3D9EX_DEVICE_INTEL 0x4072
#define CL_CONTEXT_DXVA_DEVICE_INTEL 0x4073
/* cl_mem_info */
#define CL_MEM_DX9_RESOURCE_INTEL 0x4027
#define CL_MEM_DX9_SHARED_HANDLE_INTEL 0x4074
/* cl_image_info */
#define CL_IMAGE_DX9_PLANE_INTEL 0x4075
/* cl_command_type */
#define CL_COMMAND_ACQUIRE_DX9_OBJECTS_INTEL 0x402A
#define CL_COMMAND_RELEASE_DX9_OBJECTS_INTEL 0x402B
/******************************************************************************/
extern CL_API_ENTRY cl_int CL_API_CALL
clGetDeviceIDsFromDX9INTEL(
cl_platform_id platform,
cl_dx9_device_source_intel dx9_device_source,
void* dx9_object,
cl_dx9_device_set_intel dx9_device_set,
cl_uint num_entries,
cl_device_id* devices,
cl_uint* num_devices) CL_EXT_SUFFIX__VERSION_1_1;
typedef CL_API_ENTRY cl_int (CL_API_CALL* clGetDeviceIDsFromDX9INTEL_fn)(
cl_platform_id platform,
cl_dx9_device_source_intel dx9_device_source,
void* dx9_object,
cl_dx9_device_set_intel dx9_device_set,
cl_uint num_entries,
cl_device_id* devices,
cl_uint* num_devices) CL_EXT_SUFFIX__VERSION_1_1;
extern CL_API_ENTRY cl_mem CL_API_CALL
clCreateFromDX9MediaSurfaceINTEL(
cl_context context,
cl_mem_flags flags,
IDirect3DSurface9* resource,
HANDLE sharedHandle,
UINT plane,
cl_int* errcode_ret) CL_EXT_SUFFIX__VERSION_1_1;
typedef CL_API_ENTRY cl_mem (CL_API_CALL *clCreateFromDX9MediaSurfaceINTEL_fn)(
cl_context context,
cl_mem_flags flags,
IDirect3DSurface9* resource,
HANDLE sharedHandle,
UINT plane,
cl_int* errcode_ret) CL_EXT_SUFFIX__VERSION_1_1;
extern CL_API_ENTRY cl_int CL_API_CALL
clEnqueueAcquireDX9ObjectsINTEL(
cl_command_queue command_queue,
cl_uint num_objects,
const cl_mem* mem_objects,
cl_uint num_events_in_wait_list,
const cl_event* event_wait_list,
cl_event* event) CL_EXT_SUFFIX__VERSION_1_1;
typedef CL_API_ENTRY cl_int (CL_API_CALL *clEnqueueAcquireDX9ObjectsINTEL_fn)(
cl_command_queue command_queue,
cl_uint num_objects,
const cl_mem* mem_objects,
cl_uint num_events_in_wait_list,
const cl_event* event_wait_list,
cl_event* event) CL_EXT_SUFFIX__VERSION_1_1;
extern CL_API_ENTRY cl_int CL_API_CALL
clEnqueueReleaseDX9ObjectsINTEL(
cl_command_queue command_queue,
cl_uint num_objects,
cl_mem* mem_objects,
cl_uint num_events_in_wait_list,
const cl_event* event_wait_list,
cl_event* event) CL_EXT_SUFFIX__VERSION_1_1;
typedef CL_API_ENTRY cl_int (CL_API_CALL *clEnqueueReleaseDX9ObjectsINTEL_fn)(
cl_command_queue command_queue,
cl_uint num_objects,
cl_mem* mem_objects,
cl_uint num_events_in_wait_list,
const cl_event* event_wait_list,
cl_event* event) CL_EXT_SUFFIX__VERSION_1_1;
#ifdef __cplusplus
}
#endif
#endif /* __OPENCL_CL_DX9_MEDIA_SHARING_INTEL_H */

132
src/3rdparty/CL/cl_egl.h vendored Normal file
View File

@@ -0,0 +1,132 @@
/*******************************************************************************
* Copyright (c) 2008-2019 The Khronos Group Inc.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and/or associated documentation files (the
* "Materials"), to deal in the Materials without restriction, including
* without limitation the rights to use, copy, modify, merge, publish,
* distribute, sublicense, and/or sell copies of the Materials, and to
* permit persons to whom the Materials are furnished to do so, subject to
* the following conditions:
*
* The above copyright notice and this permission notice shall be included
* in all copies or substantial portions of the Materials.
*
* MODIFICATIONS TO THIS FILE MAY MEAN IT NO LONGER ACCURATELY REFLECTS
* KHRONOS STANDARDS. THE UNMODIFIED, NORMATIVE VERSIONS OF KHRONOS
* SPECIFICATIONS AND HEADER INFORMATION ARE LOCATED AT
* https://www.khronos.org/registry/
*
* THE MATERIALS ARE PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
* IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
* CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
* TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
* MATERIALS OR THE USE OR OTHER DEALINGS IN THE MATERIALS.
******************************************************************************/
#ifndef __OPENCL_CL_EGL_H
#define __OPENCL_CL_EGL_H
#include <CL/cl.h>
#ifdef __cplusplus
extern "C" {
#endif
/* Command type for events created with clEnqueueAcquireEGLObjectsKHR */
#define CL_COMMAND_EGL_FENCE_SYNC_OBJECT_KHR 0x202F
#define CL_COMMAND_ACQUIRE_EGL_OBJECTS_KHR 0x202D
#define CL_COMMAND_RELEASE_EGL_OBJECTS_KHR 0x202E
/* Error type for clCreateFromEGLImageKHR */
#define CL_INVALID_EGL_OBJECT_KHR -1093
#define CL_EGL_RESOURCE_NOT_ACQUIRED_KHR -1092
/* CLeglImageKHR is an opaque handle to an EGLImage */
typedef void* CLeglImageKHR;
/* CLeglDisplayKHR is an opaque handle to an EGLDisplay */
typedef void* CLeglDisplayKHR;
/* CLeglSyncKHR is an opaque handle to an EGLSync object */
typedef void* CLeglSyncKHR;
/* properties passed to clCreateFromEGLImageKHR */
typedef intptr_t cl_egl_image_properties_khr;
#define cl_khr_egl_image 1
extern CL_API_ENTRY cl_mem CL_API_CALL
clCreateFromEGLImageKHR(cl_context context,
CLeglDisplayKHR egldisplay,
CLeglImageKHR eglimage,
cl_mem_flags flags,
const cl_egl_image_properties_khr * properties,
cl_int * errcode_ret) CL_API_SUFFIX__VERSION_1_0;
typedef CL_API_ENTRY cl_mem (CL_API_CALL *clCreateFromEGLImageKHR_fn)(
cl_context context,
CLeglDisplayKHR egldisplay,
CLeglImageKHR eglimage,
cl_mem_flags flags,
const cl_egl_image_properties_khr * properties,
cl_int * errcode_ret);
extern CL_API_ENTRY cl_int CL_API_CALL
clEnqueueAcquireEGLObjectsKHR(cl_command_queue command_queue,
cl_uint num_objects,
const cl_mem * mem_objects,
cl_uint num_events_in_wait_list,
const cl_event * event_wait_list,
cl_event * event) CL_API_SUFFIX__VERSION_1_0;
typedef CL_API_ENTRY cl_int (CL_API_CALL *clEnqueueAcquireEGLObjectsKHR_fn)(
cl_command_queue command_queue,
cl_uint num_objects,
const cl_mem * mem_objects,
cl_uint num_events_in_wait_list,
const cl_event * event_wait_list,
cl_event * event);
extern CL_API_ENTRY cl_int CL_API_CALL
clEnqueueReleaseEGLObjectsKHR(cl_command_queue command_queue,
cl_uint num_objects,
const cl_mem * mem_objects,
cl_uint num_events_in_wait_list,
const cl_event * event_wait_list,
cl_event * event) CL_API_SUFFIX__VERSION_1_0;
typedef CL_API_ENTRY cl_int (CL_API_CALL *clEnqueueReleaseEGLObjectsKHR_fn)(
cl_command_queue command_queue,
cl_uint num_objects,
const cl_mem * mem_objects,
cl_uint num_events_in_wait_list,
const cl_event * event_wait_list,
cl_event * event);
#define cl_khr_egl_event 1
extern CL_API_ENTRY cl_event CL_API_CALL
clCreateEventFromEGLSyncKHR(cl_context context,
CLeglSyncKHR sync,
CLeglDisplayKHR display,
cl_int * errcode_ret) CL_API_SUFFIX__VERSION_1_0;
typedef CL_API_ENTRY cl_event (CL_API_CALL *clCreateEventFromEGLSyncKHR_fn)(
cl_context context,
CLeglSyncKHR sync,
CLeglDisplayKHR display,
cl_int * errcode_ret);
#ifdef __cplusplus
}
#endif
#endif /* __OPENCL_CL_EGL_H */

762
src/3rdparty/CL/cl_ext.h vendored Normal file
View File

@@ -0,0 +1,762 @@
/*******************************************************************************
* Copyright (c) 2008-2019 The Khronos Group Inc.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and/or associated documentation files (the
* "Materials"), to deal in the Materials without restriction, including
* without limitation the rights to use, copy, modify, merge, publish,
* distribute, sublicense, and/or sell copies of the Materials, and to
* permit persons to whom the Materials are furnished to do so, subject to
* the following conditions:
*
* The above copyright notice and this permission notice shall be included
* in all copies or substantial portions of the Materials.
*
* MODIFICATIONS TO THIS FILE MAY MEAN IT NO LONGER ACCURATELY REFLECTS
* KHRONOS STANDARDS. THE UNMODIFIED, NORMATIVE VERSIONS OF KHRONOS
* SPECIFICATIONS AND HEADER INFORMATION ARE LOCATED AT
* https://www.khronos.org/registry/
*
* THE MATERIALS ARE PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
* IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
* CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
* TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
* MATERIALS OR THE USE OR OTHER DEALINGS IN THE MATERIALS.
******************************************************************************/
/* cl_ext.h contains OpenCL extensions which don't have external */
/* (OpenGL, D3D) dependencies. */
#ifndef __CL_EXT_H
#define __CL_EXT_H
#ifdef __cplusplus
extern "C" {
#endif
#include <CL/cl.h>
/* cl_khr_fp64 extension - no extension #define since it has no functions */
/* CL_DEVICE_DOUBLE_FP_CONFIG is defined in CL.h for OpenCL >= 120 */
#if CL_TARGET_OPENCL_VERSION <= 110
#define CL_DEVICE_DOUBLE_FP_CONFIG 0x1032
#endif
/* cl_khr_fp16 extension - no extension #define since it has no functions */
#define CL_DEVICE_HALF_FP_CONFIG 0x1033
/* Memory object destruction
*
* Apple extension for use to manage externally allocated buffers used with cl_mem objects with CL_MEM_USE_HOST_PTR
*
* Registers a user callback function that will be called when the memory object is deleted and its resources
* freed. Each call to clSetMemObjectCallbackFn registers the specified user callback function on a callback
* stack associated with memobj. The registered user callback functions are called in the reverse order in
* which they were registered. The user callback functions are called and then the memory object is deleted
* and its resources freed. This provides a mechanism for the application (and libraries) using memobj to be
* notified when the memory referenced by host_ptr, specified when the memory object is created and used as
* the storage bits for the memory object, can be reused or freed.
*
* The application may not call CL api's with the cl_mem object passed to the pfn_notify.
*
* Please check for the "cl_APPLE_SetMemObjectDestructor" extension using clGetDeviceInfo(CL_DEVICE_EXTENSIONS)
* before using.
*/
#define cl_APPLE_SetMemObjectDestructor 1
cl_int CL_API_ENTRY clSetMemObjectDestructorAPPLE( cl_mem memobj,
void (* pfn_notify)(cl_mem memobj, void * user_data),
void * user_data) CL_EXT_SUFFIX__VERSION_1_0;
/* Context Logging Functions
*
* The next three convenience functions are intended to be used as the pfn_notify parameter to clCreateContext().
* Please check for the "cl_APPLE_ContextLoggingFunctions" extension using clGetDeviceInfo(CL_DEVICE_EXTENSIONS)
* before using.
*
* clLogMessagesToSystemLog forwards on all log messages to the Apple System Logger
*/
#define cl_APPLE_ContextLoggingFunctions 1
extern void CL_API_ENTRY clLogMessagesToSystemLogAPPLE( const char * errstr,
const void * private_info,
size_t cb,
void * user_data) CL_EXT_SUFFIX__VERSION_1_0;
/* clLogMessagesToStdout sends all log messages to the file descriptor stdout */
extern void CL_API_ENTRY clLogMessagesToStdoutAPPLE( const char * errstr,
const void * private_info,
size_t cb,
void * user_data) CL_EXT_SUFFIX__VERSION_1_0;
/* clLogMessagesToStderr sends all log messages to the file descriptor stderr */
extern void CL_API_ENTRY clLogMessagesToStderrAPPLE( const char * errstr,
const void * private_info,
size_t cb,
void * user_data) CL_EXT_SUFFIX__VERSION_1_0;
/************************
* cl_khr_icd extension *
************************/
#define cl_khr_icd 1
/* cl_platform_info */
#define CL_PLATFORM_ICD_SUFFIX_KHR 0x0920
/* Additional Error Codes */
#define CL_PLATFORM_NOT_FOUND_KHR -1001
extern CL_API_ENTRY cl_int CL_API_CALL
clIcdGetPlatformIDsKHR(cl_uint num_entries,
cl_platform_id * platforms,
cl_uint * num_platforms);
typedef CL_API_ENTRY cl_int
(CL_API_CALL *clIcdGetPlatformIDsKHR_fn)(cl_uint num_entries,
cl_platform_id * platforms,
cl_uint * num_platforms);
/*******************************
* cl_khr_il_program extension *
*******************************/
#define cl_khr_il_program 1
/* New property to clGetDeviceInfo for retrieving supported intermediate
* languages
*/
#define CL_DEVICE_IL_VERSION_KHR 0x105B
/* New property to clGetProgramInfo for retrieving for retrieving the IL of a
* program
*/
#define CL_PROGRAM_IL_KHR 0x1169
extern CL_API_ENTRY cl_program CL_API_CALL
clCreateProgramWithILKHR(cl_context context,
const void * il,
size_t length,
cl_int * errcode_ret);
typedef CL_API_ENTRY cl_program
(CL_API_CALL *clCreateProgramWithILKHR_fn)(cl_context context,
const void * il,
size_t length,
cl_int * errcode_ret) CL_EXT_SUFFIX__VERSION_1_2;
/* Extension: cl_khr_image2d_from_buffer
*
* This extension allows a 2D image to be created from a cl_mem buffer without
* a copy. The type associated with a 2D image created from a buffer in an
* OpenCL program is image2d_t. Both the sampler and sampler-less read_image
* built-in functions are supported for 2D images and 2D images created from
* a buffer. Similarly, the write_image built-ins are also supported for 2D
* images created from a buffer.
*
* When the 2D image from buffer is created, the client must specify the
* width, height, image format (i.e. channel order and channel data type)
* and optionally the row pitch.
*
* The pitch specified must be a multiple of
* CL_DEVICE_IMAGE_PITCH_ALIGNMENT_KHR pixels.
* The base address of the buffer must be aligned to
* CL_DEVICE_IMAGE_BASE_ADDRESS_ALIGNMENT_KHR pixels.
*/
#define CL_DEVICE_IMAGE_PITCH_ALIGNMENT_KHR 0x104A
#define CL_DEVICE_IMAGE_BASE_ADDRESS_ALIGNMENT_KHR 0x104B
/**************************************
* cl_khr_initialize_memory extension *
**************************************/
#define CL_CONTEXT_MEMORY_INITIALIZE_KHR 0x2030
/**************************************
* cl_khr_terminate_context extension *
**************************************/
#define CL_DEVICE_TERMINATE_CAPABILITY_KHR 0x2031
#define CL_CONTEXT_TERMINATE_KHR 0x2032
#define cl_khr_terminate_context 1
extern CL_API_ENTRY cl_int CL_API_CALL
clTerminateContextKHR(cl_context context) CL_EXT_SUFFIX__VERSION_1_2;
typedef CL_API_ENTRY cl_int
(CL_API_CALL *clTerminateContextKHR_fn)(cl_context context) CL_EXT_SUFFIX__VERSION_1_2;
/*
* Extension: cl_khr_spir
*
* This extension adds support to create an OpenCL program object from a
* Standard Portable Intermediate Representation (SPIR) instance
*/
#define CL_DEVICE_SPIR_VERSIONS 0x40E0
#define CL_PROGRAM_BINARY_TYPE_INTERMEDIATE 0x40E1
/*****************************************
* cl_khr_create_command_queue extension *
*****************************************/
#define cl_khr_create_command_queue 1
typedef cl_bitfield cl_queue_properties_khr;
extern CL_API_ENTRY cl_command_queue CL_API_CALL
clCreateCommandQueueWithPropertiesKHR(cl_context context,
cl_device_id device,
const cl_queue_properties_khr* properties,
cl_int* errcode_ret) CL_EXT_SUFFIX__VERSION_1_2;
typedef CL_API_ENTRY cl_command_queue
(CL_API_CALL *clCreateCommandQueueWithPropertiesKHR_fn)(cl_context context,
cl_device_id device,
const cl_queue_properties_khr* properties,
cl_int* errcode_ret) CL_EXT_SUFFIX__VERSION_1_2;
/******************************************
* cl_nv_device_attribute_query extension *
******************************************/
/* cl_nv_device_attribute_query extension - no extension #define since it has no functions */
#define CL_DEVICE_COMPUTE_CAPABILITY_MAJOR_NV 0x4000
#define CL_DEVICE_COMPUTE_CAPABILITY_MINOR_NV 0x4001
#define CL_DEVICE_REGISTERS_PER_BLOCK_NV 0x4002
#define CL_DEVICE_WARP_SIZE_NV 0x4003
#define CL_DEVICE_GPU_OVERLAP_NV 0x4004
#define CL_DEVICE_KERNEL_EXEC_TIMEOUT_NV 0x4005
#define CL_DEVICE_INTEGRATED_MEMORY_NV 0x4006
/*********************************
* cl_amd_device_attribute_query *
*********************************/
#define CL_DEVICE_PROFILING_TIMER_OFFSET_AMD 0x4036
/*********************************
* cl_arm_printf extension
*********************************/
#define CL_PRINTF_CALLBACK_ARM 0x40B0
#define CL_PRINTF_BUFFERSIZE_ARM 0x40B1
/***********************************
* cl_ext_device_fission extension
***********************************/
#define cl_ext_device_fission 1
extern CL_API_ENTRY cl_int CL_API_CALL
clReleaseDeviceEXT(cl_device_id device) CL_EXT_SUFFIX__VERSION_1_1;
typedef CL_API_ENTRY cl_int
(CL_API_CALL *clReleaseDeviceEXT_fn)(cl_device_id device) CL_EXT_SUFFIX__VERSION_1_1;
extern CL_API_ENTRY cl_int CL_API_CALL
clRetainDeviceEXT(cl_device_id device) CL_EXT_SUFFIX__VERSION_1_1;
typedef CL_API_ENTRY cl_int
(CL_API_CALL *clRetainDeviceEXT_fn)(cl_device_id device) CL_EXT_SUFFIX__VERSION_1_1;
typedef cl_ulong cl_device_partition_property_ext;
extern CL_API_ENTRY cl_int CL_API_CALL
clCreateSubDevicesEXT(cl_device_id in_device,
const cl_device_partition_property_ext * properties,
cl_uint num_entries,
cl_device_id * out_devices,
cl_uint * num_devices) CL_EXT_SUFFIX__VERSION_1_1;
typedef CL_API_ENTRY cl_int
(CL_API_CALL * clCreateSubDevicesEXT_fn)(cl_device_id in_device,
const cl_device_partition_property_ext * properties,
cl_uint num_entries,
cl_device_id * out_devices,
cl_uint * num_devices) CL_EXT_SUFFIX__VERSION_1_1;
/* cl_device_partition_property_ext */
#define CL_DEVICE_PARTITION_EQUALLY_EXT 0x4050
#define CL_DEVICE_PARTITION_BY_COUNTS_EXT 0x4051
#define CL_DEVICE_PARTITION_BY_NAMES_EXT 0x4052
#define CL_DEVICE_PARTITION_BY_AFFINITY_DOMAIN_EXT 0x4053
/* clDeviceGetInfo selectors */
#define CL_DEVICE_PARENT_DEVICE_EXT 0x4054
#define CL_DEVICE_PARTITION_TYPES_EXT 0x4055
#define CL_DEVICE_AFFINITY_DOMAINS_EXT 0x4056
#define CL_DEVICE_REFERENCE_COUNT_EXT 0x4057
#define CL_DEVICE_PARTITION_STYLE_EXT 0x4058
/* error codes */
#define CL_DEVICE_PARTITION_FAILED_EXT -1057
#define CL_INVALID_PARTITION_COUNT_EXT -1058
#define CL_INVALID_PARTITION_NAME_EXT -1059
/* CL_AFFINITY_DOMAINs */
#define CL_AFFINITY_DOMAIN_L1_CACHE_EXT 0x1
#define CL_AFFINITY_DOMAIN_L2_CACHE_EXT 0x2
#define CL_AFFINITY_DOMAIN_L3_CACHE_EXT 0x3
#define CL_AFFINITY_DOMAIN_L4_CACHE_EXT 0x4
#define CL_AFFINITY_DOMAIN_NUMA_EXT 0x10
#define CL_AFFINITY_DOMAIN_NEXT_FISSIONABLE_EXT 0x100
/* cl_device_partition_property_ext list terminators */
#define CL_PROPERTIES_LIST_END_EXT ((cl_device_partition_property_ext) 0)
#define CL_PARTITION_BY_COUNTS_LIST_END_EXT ((cl_device_partition_property_ext) 0)
#define CL_PARTITION_BY_NAMES_LIST_END_EXT ((cl_device_partition_property_ext) 0 - 1)
/***********************************
* cl_ext_migrate_memobject extension definitions
***********************************/
#define cl_ext_migrate_memobject 1
typedef cl_bitfield cl_mem_migration_flags_ext;
#define CL_MIGRATE_MEM_OBJECT_HOST_EXT 0x1
#define CL_COMMAND_MIGRATE_MEM_OBJECT_EXT 0x4040
extern CL_API_ENTRY cl_int CL_API_CALL
clEnqueueMigrateMemObjectEXT(cl_command_queue command_queue,
cl_uint num_mem_objects,
const cl_mem * mem_objects,
cl_mem_migration_flags_ext flags,
cl_uint num_events_in_wait_list,
const cl_event * event_wait_list,
cl_event * event);
typedef CL_API_ENTRY cl_int
(CL_API_CALL *clEnqueueMigrateMemObjectEXT_fn)(cl_command_queue command_queue,
cl_uint num_mem_objects,
const cl_mem * mem_objects,
cl_mem_migration_flags_ext flags,
cl_uint num_events_in_wait_list,
const cl_event * event_wait_list,
cl_event * event);
/*********************************
* cl_qcom_ext_host_ptr extension
*********************************/
#define cl_qcom_ext_host_ptr 1
#define CL_MEM_EXT_HOST_PTR_QCOM (1 << 29)
#define CL_DEVICE_EXT_MEM_PADDING_IN_BYTES_QCOM 0x40A0
#define CL_DEVICE_PAGE_SIZE_QCOM 0x40A1
#define CL_IMAGE_ROW_ALIGNMENT_QCOM 0x40A2
#define CL_IMAGE_SLICE_ALIGNMENT_QCOM 0x40A3
#define CL_MEM_HOST_UNCACHED_QCOM 0x40A4
#define CL_MEM_HOST_WRITEBACK_QCOM 0x40A5
#define CL_MEM_HOST_WRITETHROUGH_QCOM 0x40A6
#define CL_MEM_HOST_WRITE_COMBINING_QCOM 0x40A7
typedef cl_uint cl_image_pitch_info_qcom;
extern CL_API_ENTRY cl_int CL_API_CALL
clGetDeviceImageInfoQCOM(cl_device_id device,
size_t image_width,
size_t image_height,
const cl_image_format *image_format,
cl_image_pitch_info_qcom param_name,
size_t param_value_size,
void *param_value,
size_t *param_value_size_ret);
typedef struct _cl_mem_ext_host_ptr
{
/* Type of external memory allocation. */
/* Legal values will be defined in layered extensions. */
cl_uint allocation_type;
/* Host cache policy for this external memory allocation. */
cl_uint host_cache_policy;
} cl_mem_ext_host_ptr;
/*******************************************
* cl_qcom_ext_host_ptr_iocoherent extension
********************************************/
/* Cache policy specifying io-coherence */
#define CL_MEM_HOST_IOCOHERENT_QCOM 0x40A9
/*********************************
* cl_qcom_ion_host_ptr extension
*********************************/
#define CL_MEM_ION_HOST_PTR_QCOM 0x40A8
typedef struct _cl_mem_ion_host_ptr
{
/* Type of external memory allocation. */
/* Must be CL_MEM_ION_HOST_PTR_QCOM for ION allocations. */
cl_mem_ext_host_ptr ext_host_ptr;
/* ION file descriptor */
int ion_filedesc;
/* Host pointer to the ION allocated memory */
void* ion_hostptr;
} cl_mem_ion_host_ptr;
/*********************************
* cl_qcom_android_native_buffer_host_ptr extension
*********************************/
#define CL_MEM_ANDROID_NATIVE_BUFFER_HOST_PTR_QCOM 0x40C6
typedef struct _cl_mem_android_native_buffer_host_ptr
{
/* Type of external memory allocation. */
/* Must be CL_MEM_ANDROID_NATIVE_BUFFER_HOST_PTR_QCOM for Android native buffers. */
cl_mem_ext_host_ptr ext_host_ptr;
/* Virtual pointer to the android native buffer */
void* anb_ptr;
} cl_mem_android_native_buffer_host_ptr;
/******************************************
* cl_img_yuv_image extension *
******************************************/
/* Image formats used in clCreateImage */
#define CL_NV21_IMG 0x40D0
#define CL_YV12_IMG 0x40D1
/******************************************
* cl_img_cached_allocations extension *
******************************************/
/* Flag values used by clCreateBuffer */
#define CL_MEM_USE_UNCACHED_CPU_MEMORY_IMG (1 << 26)
#define CL_MEM_USE_CACHED_CPU_MEMORY_IMG (1 << 27)
/******************************************
* cl_img_use_gralloc_ptr extension *
******************************************/
#define cl_img_use_gralloc_ptr 1
/* Flag values used by clCreateBuffer */
#define CL_MEM_USE_GRALLOC_PTR_IMG (1 << 28)
/* To be used by clGetEventInfo: */
#define CL_COMMAND_ACQUIRE_GRALLOC_OBJECTS_IMG 0x40D2
#define CL_COMMAND_RELEASE_GRALLOC_OBJECTS_IMG 0x40D3
/* Error code from clEnqueueReleaseGrallocObjectsIMG */
#define CL_GRALLOC_RESOURCE_NOT_ACQUIRED_IMG 0x40D4
extern CL_API_ENTRY cl_int CL_API_CALL
clEnqueueAcquireGrallocObjectsIMG(cl_command_queue command_queue,
cl_uint num_objects,
const cl_mem * mem_objects,
cl_uint num_events_in_wait_list,
const cl_event * event_wait_list,
cl_event * event) CL_EXT_SUFFIX__VERSION_1_2;
extern CL_API_ENTRY cl_int CL_API_CALL
clEnqueueReleaseGrallocObjectsIMG(cl_command_queue command_queue,
cl_uint num_objects,
const cl_mem * mem_objects,
cl_uint num_events_in_wait_list,
const cl_event * event_wait_list,
cl_event * event) CL_EXT_SUFFIX__VERSION_1_2;
/*********************************
* cl_khr_subgroups extension
*********************************/
#define cl_khr_subgroups 1
#if !defined(CL_VERSION_2_1)
/* For OpenCL 2.1 and newer, cl_kernel_sub_group_info is declared in CL.h.
In hindsight, there should have been a khr suffix on this type for
the extension, but keeping it un-suffixed to maintain backwards
compatibility. */
typedef cl_uint cl_kernel_sub_group_info;
#endif
/* cl_kernel_sub_group_info */
#define CL_KERNEL_MAX_SUB_GROUP_SIZE_FOR_NDRANGE_KHR 0x2033
#define CL_KERNEL_SUB_GROUP_COUNT_FOR_NDRANGE_KHR 0x2034
extern CL_API_ENTRY cl_int CL_API_CALL
clGetKernelSubGroupInfoKHR(cl_kernel in_kernel,
cl_device_id in_device,
cl_kernel_sub_group_info param_name,
size_t input_value_size,
const void * input_value,
size_t param_value_size,
void * param_value,
size_t * param_value_size_ret) CL_EXT_SUFFIX__VERSION_2_0_DEPRECATED;
typedef CL_API_ENTRY cl_int
(CL_API_CALL * clGetKernelSubGroupInfoKHR_fn)(cl_kernel in_kernel,
cl_device_id in_device,
cl_kernel_sub_group_info param_name,
size_t input_value_size,
const void * input_value,
size_t param_value_size,
void * param_value,
size_t * param_value_size_ret) CL_EXT_SUFFIX__VERSION_2_0_DEPRECATED;
/*********************************
* cl_khr_mipmap_image extension
*********************************/
/* cl_sampler_properties */
#define CL_SAMPLER_MIP_FILTER_MODE_KHR 0x1155
#define CL_SAMPLER_LOD_MIN_KHR 0x1156
#define CL_SAMPLER_LOD_MAX_KHR 0x1157
/*********************************
* cl_khr_priority_hints extension
*********************************/
/* This extension define is for backwards compatibility.
It shouldn't be required since this extension has no new functions. */
#define cl_khr_priority_hints 1
typedef cl_uint cl_queue_priority_khr;
/* cl_command_queue_properties */
#define CL_QUEUE_PRIORITY_KHR 0x1096
/* cl_queue_priority_khr */
#define CL_QUEUE_PRIORITY_HIGH_KHR (1<<0)
#define CL_QUEUE_PRIORITY_MED_KHR (1<<1)
#define CL_QUEUE_PRIORITY_LOW_KHR (1<<2)
/*********************************
* cl_khr_throttle_hints extension
*********************************/
/* This extension define is for backwards compatibility.
It shouldn't be required since this extension has no new functions. */
#define cl_khr_throttle_hints 1
typedef cl_uint cl_queue_throttle_khr;
/* cl_command_queue_properties */
#define CL_QUEUE_THROTTLE_KHR 0x1097
/* cl_queue_throttle_khr */
#define CL_QUEUE_THROTTLE_HIGH_KHR (1<<0)
#define CL_QUEUE_THROTTLE_MED_KHR (1<<1)
#define CL_QUEUE_THROTTLE_LOW_KHR (1<<2)
/*********************************
* cl_khr_subgroup_named_barrier
*********************************/
/* This extension define is for backwards compatibility.
It shouldn't be required since this extension has no new functions. */
#define cl_khr_subgroup_named_barrier 1
/* cl_device_info */
#define CL_DEVICE_MAX_NAMED_BARRIER_COUNT_KHR 0x2035
/**********************************
* cl_arm_import_memory extension *
**********************************/
#define cl_arm_import_memory 1
typedef intptr_t cl_import_properties_arm;
/* Default and valid proporties name for cl_arm_import_memory */
#define CL_IMPORT_TYPE_ARM 0x40B2
/* Host process memory type default value for CL_IMPORT_TYPE_ARM property */
#define CL_IMPORT_TYPE_HOST_ARM 0x40B3
/* DMA BUF memory type value for CL_IMPORT_TYPE_ARM property */
#define CL_IMPORT_TYPE_DMA_BUF_ARM 0x40B4
/* Protected DMA BUF memory type value for CL_IMPORT_TYPE_ARM property */
#define CL_IMPORT_TYPE_PROTECTED_ARM 0x40B5
/* This extension adds a new function that allows for direct memory import into
* OpenCL via the clImportMemoryARM function.
*
* Memory imported through this interface will be mapped into the device's page
* tables directly, providing zero copy access. It will never fall back to copy
* operations and aliased buffers.
*
* Types of memory supported for import are specified as additional extension
* strings.
*
* This extension produces cl_mem allocations which are compatible with all other
* users of cl_mem in the standard API.
*
* This extension maps pages with the same properties as the normal buffer creation
* function clCreateBuffer.
*/
extern CL_API_ENTRY cl_mem CL_API_CALL
clImportMemoryARM( cl_context context,
cl_mem_flags flags,
const cl_import_properties_arm *properties,
void *memory,
size_t size,
cl_int *errcode_ret) CL_EXT_SUFFIX__VERSION_1_0;
/******************************************
* cl_arm_shared_virtual_memory extension *
******************************************/
#define cl_arm_shared_virtual_memory 1
/* Used by clGetDeviceInfo */
#define CL_DEVICE_SVM_CAPABILITIES_ARM 0x40B6
/* Used by clGetMemObjectInfo */
#define CL_MEM_USES_SVM_POINTER_ARM 0x40B7
/* Used by clSetKernelExecInfoARM: */
#define CL_KERNEL_EXEC_INFO_SVM_PTRS_ARM 0x40B8
#define CL_KERNEL_EXEC_INFO_SVM_FINE_GRAIN_SYSTEM_ARM 0x40B9
/* To be used by clGetEventInfo: */
#define CL_COMMAND_SVM_FREE_ARM 0x40BA
#define CL_COMMAND_SVM_MEMCPY_ARM 0x40BB
#define CL_COMMAND_SVM_MEMFILL_ARM 0x40BC
#define CL_COMMAND_SVM_MAP_ARM 0x40BD
#define CL_COMMAND_SVM_UNMAP_ARM 0x40BE
/* Flag values returned by clGetDeviceInfo with CL_DEVICE_SVM_CAPABILITIES_ARM as the param_name. */
#define CL_DEVICE_SVM_COARSE_GRAIN_BUFFER_ARM (1 << 0)
#define CL_DEVICE_SVM_FINE_GRAIN_BUFFER_ARM (1 << 1)
#define CL_DEVICE_SVM_FINE_GRAIN_SYSTEM_ARM (1 << 2)
#define CL_DEVICE_SVM_ATOMICS_ARM (1 << 3)
/* Flag values used by clSVMAllocARM: */
#define CL_MEM_SVM_FINE_GRAIN_BUFFER_ARM (1 << 10)
#define CL_MEM_SVM_ATOMICS_ARM (1 << 11)
typedef cl_bitfield cl_svm_mem_flags_arm;
typedef cl_uint cl_kernel_exec_info_arm;
typedef cl_bitfield cl_device_svm_capabilities_arm;
extern CL_API_ENTRY void * CL_API_CALL
clSVMAllocARM(cl_context context,
cl_svm_mem_flags_arm flags,
size_t size,
cl_uint alignment) CL_EXT_SUFFIX__VERSION_1_2;
extern CL_API_ENTRY void CL_API_CALL
clSVMFreeARM(cl_context context,
void * svm_pointer) CL_EXT_SUFFIX__VERSION_1_2;
extern CL_API_ENTRY cl_int CL_API_CALL
clEnqueueSVMFreeARM(cl_command_queue command_queue,
cl_uint num_svm_pointers,
void * svm_pointers[],
void (CL_CALLBACK * pfn_free_func)(cl_command_queue queue,
cl_uint num_svm_pointers,
void * svm_pointers[],
void * user_data),
void * user_data,
cl_uint num_events_in_wait_list,
const cl_event * event_wait_list,
cl_event * event) CL_EXT_SUFFIX__VERSION_1_2;
extern CL_API_ENTRY cl_int CL_API_CALL
clEnqueueSVMMemcpyARM(cl_command_queue command_queue,
cl_bool blocking_copy,
void * dst_ptr,
const void * src_ptr,
size_t size,
cl_uint num_events_in_wait_list,
const cl_event * event_wait_list,
cl_event * event) CL_EXT_SUFFIX__VERSION_1_2;
extern CL_API_ENTRY cl_int CL_API_CALL
clEnqueueSVMMemFillARM(cl_command_queue command_queue,
void * svm_ptr,
const void * pattern,
size_t pattern_size,
size_t size,
cl_uint num_events_in_wait_list,
const cl_event * event_wait_list,
cl_event * event) CL_EXT_SUFFIX__VERSION_1_2;
extern CL_API_ENTRY cl_int CL_API_CALL
clEnqueueSVMMapARM(cl_command_queue command_queue,
cl_bool blocking_map,
cl_map_flags flags,
void * svm_ptr,
size_t size,
cl_uint num_events_in_wait_list,
const cl_event * event_wait_list,
cl_event * event) CL_EXT_SUFFIX__VERSION_1_2;
extern CL_API_ENTRY cl_int CL_API_CALL
clEnqueueSVMUnmapARM(cl_command_queue command_queue,
void * svm_ptr,
cl_uint num_events_in_wait_list,
const cl_event * event_wait_list,
cl_event * event) CL_EXT_SUFFIX__VERSION_1_2;
extern CL_API_ENTRY cl_int CL_API_CALL
clSetKernelArgSVMPointerARM(cl_kernel kernel,
cl_uint arg_index,
const void * arg_value) CL_EXT_SUFFIX__VERSION_1_2;
extern CL_API_ENTRY cl_int CL_API_CALL
clSetKernelExecInfoARM(cl_kernel kernel,
cl_kernel_exec_info_arm param_name,
size_t param_value_size,
const void * param_value) CL_EXT_SUFFIX__VERSION_1_2;
/********************************
* cl_arm_get_core_id extension *
********************************/
#ifdef CL_VERSION_1_2
#define cl_arm_get_core_id 1
/* Device info property for bitfield of cores present */
#define CL_DEVICE_COMPUTE_UNITS_BITFIELD_ARM 0x40BF
#endif /* CL_VERSION_1_2 */
/*********************************
* cl_arm_job_slot_selection
*********************************/
#define cl_arm_job_slot_selection 1
/* cl_device_info */
#define CL_DEVICE_JOB_SLOTS_ARM 0x41E0
/* cl_command_queue_properties */
#define CL_QUEUE_JOB_SLOT_ARM 0x41E1
#ifdef __cplusplus
}
#endif
#endif /* __CL_EXT_H */

423
src/3rdparty/CL/cl_ext_intel.h vendored Normal file
View File

@@ -0,0 +1,423 @@
/*******************************************************************************
* Copyright (c) 2008-2019 The Khronos Group Inc.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and/or associated documentation files (the
* "Materials"), to deal in the Materials without restriction, including
* without limitation the rights to use, copy, modify, merge, publish,
* distribute, sublicense, and/or sell copies of the Materials, and to
* permit persons to whom the Materials are furnished to do so, subject to
* the following conditions:
*
* The above copyright notice and this permission notice shall be included
* in all copies or substantial portions of the Materials.
*
* MODIFICATIONS TO THIS FILE MAY MEAN IT NO LONGER ACCURATELY REFLECTS
* KHRONOS STANDARDS. THE UNMODIFIED, NORMATIVE VERSIONS OF KHRONOS
* SPECIFICATIONS AND HEADER INFORMATION ARE LOCATED AT
* https://www.khronos.org/registry/
*
* THE MATERIALS ARE PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
* IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
* CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
* TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
* MATERIALS OR THE USE OR OTHER DEALINGS IN THE MATERIALS.
******************************************************************************/
/*****************************************************************************\
Copyright (c) 2013-2019 Intel Corporation All Rights Reserved.
THESE MATERIALS ARE PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
"AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL INTEL OR ITS
CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY OR TORT (INCLUDING
NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THESE
MATERIALS, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
File Name: cl_ext_intel.h
Abstract:
Notes:
\*****************************************************************************/
#ifndef __CL_EXT_INTEL_H
#define __CL_EXT_INTEL_H
#include <CL/cl.h>
#include <CL/cl_platform.h>
#ifdef __cplusplus
extern "C" {
#endif
/***************************************
* cl_intel_thread_local_exec extension *
****************************************/
#define cl_intel_thread_local_exec 1
#define CL_QUEUE_THREAD_LOCAL_EXEC_ENABLE_INTEL (((cl_bitfield)1) << 31)
/***********************************************
* cl_intel_device_partition_by_names extension *
************************************************/
#define cl_intel_device_partition_by_names 1
#define CL_DEVICE_PARTITION_BY_NAMES_INTEL 0x4052
#define CL_PARTITION_BY_NAMES_LIST_END_INTEL -1
/************************************************
* cl_intel_accelerator extension *
* cl_intel_motion_estimation extension *
* cl_intel_advanced_motion_estimation extension *
*************************************************/
#define cl_intel_accelerator 1
#define cl_intel_motion_estimation 1
#define cl_intel_advanced_motion_estimation 1
typedef struct _cl_accelerator_intel* cl_accelerator_intel;
typedef cl_uint cl_accelerator_type_intel;
typedef cl_uint cl_accelerator_info_intel;
typedef struct _cl_motion_estimation_desc_intel {
cl_uint mb_block_type;
cl_uint subpixel_mode;
cl_uint sad_adjust_mode;
cl_uint search_path_type;
} cl_motion_estimation_desc_intel;
/* error codes */
#define CL_INVALID_ACCELERATOR_INTEL -1094
#define CL_INVALID_ACCELERATOR_TYPE_INTEL -1095
#define CL_INVALID_ACCELERATOR_DESCRIPTOR_INTEL -1096
#define CL_ACCELERATOR_TYPE_NOT_SUPPORTED_INTEL -1097
/* cl_accelerator_type_intel */
#define CL_ACCELERATOR_TYPE_MOTION_ESTIMATION_INTEL 0x0
/* cl_accelerator_info_intel */
#define CL_ACCELERATOR_DESCRIPTOR_INTEL 0x4090
#define CL_ACCELERATOR_REFERENCE_COUNT_INTEL 0x4091
#define CL_ACCELERATOR_CONTEXT_INTEL 0x4092
#define CL_ACCELERATOR_TYPE_INTEL 0x4093
/* cl_motion_detect_desc_intel flags */
#define CL_ME_MB_TYPE_16x16_INTEL 0x0
#define CL_ME_MB_TYPE_8x8_INTEL 0x1
#define CL_ME_MB_TYPE_4x4_INTEL 0x2
#define CL_ME_SUBPIXEL_MODE_INTEGER_INTEL 0x0
#define CL_ME_SUBPIXEL_MODE_HPEL_INTEL 0x1
#define CL_ME_SUBPIXEL_MODE_QPEL_INTEL 0x2
#define CL_ME_SAD_ADJUST_MODE_NONE_INTEL 0x0
#define CL_ME_SAD_ADJUST_MODE_HAAR_INTEL 0x1
#define CL_ME_SEARCH_PATH_RADIUS_2_2_INTEL 0x0
#define CL_ME_SEARCH_PATH_RADIUS_4_4_INTEL 0x1
#define CL_ME_SEARCH_PATH_RADIUS_16_12_INTEL 0x5
#define CL_ME_SKIP_BLOCK_TYPE_16x16_INTEL 0x0
#define CL_ME_CHROMA_INTRA_PREDICT_ENABLED_INTEL 0x1
#define CL_ME_LUMA_INTRA_PREDICT_ENABLED_INTEL 0x2
#define CL_ME_SKIP_BLOCK_TYPE_8x8_INTEL 0x4
#define CL_ME_FORWARD_INPUT_MODE_INTEL 0x1
#define CL_ME_BACKWARD_INPUT_MODE_INTEL 0x2
#define CL_ME_BIDIRECTION_INPUT_MODE_INTEL 0x3
#define CL_ME_BIDIR_WEIGHT_QUARTER_INTEL 16
#define CL_ME_BIDIR_WEIGHT_THIRD_INTEL 21
#define CL_ME_BIDIR_WEIGHT_HALF_INTEL 32
#define CL_ME_BIDIR_WEIGHT_TWO_THIRD_INTEL 43
#define CL_ME_BIDIR_WEIGHT_THREE_QUARTER_INTEL 48
#define CL_ME_COST_PENALTY_NONE_INTEL 0x0
#define CL_ME_COST_PENALTY_LOW_INTEL 0x1
#define CL_ME_COST_PENALTY_NORMAL_INTEL 0x2
#define CL_ME_COST_PENALTY_HIGH_INTEL 0x3
#define CL_ME_COST_PRECISION_QPEL_INTEL 0x0
#define CL_ME_COST_PRECISION_HPEL_INTEL 0x1
#define CL_ME_COST_PRECISION_PEL_INTEL 0x2
#define CL_ME_COST_PRECISION_DPEL_INTEL 0x3
#define CL_ME_LUMA_PREDICTOR_MODE_VERTICAL_INTEL 0x0
#define CL_ME_LUMA_PREDICTOR_MODE_HORIZONTAL_INTEL 0x1
#define CL_ME_LUMA_PREDICTOR_MODE_DC_INTEL 0x2
#define CL_ME_LUMA_PREDICTOR_MODE_DIAGONAL_DOWN_LEFT_INTEL 0x3
#define CL_ME_LUMA_PREDICTOR_MODE_DIAGONAL_DOWN_RIGHT_INTEL 0x4
#define CL_ME_LUMA_PREDICTOR_MODE_PLANE_INTEL 0x4
#define CL_ME_LUMA_PREDICTOR_MODE_VERTICAL_RIGHT_INTEL 0x5
#define CL_ME_LUMA_PREDICTOR_MODE_HORIZONTAL_DOWN_INTEL 0x6
#define CL_ME_LUMA_PREDICTOR_MODE_VERTICAL_LEFT_INTEL 0x7
#define CL_ME_LUMA_PREDICTOR_MODE_HORIZONTAL_UP_INTEL 0x8
#define CL_ME_CHROMA_PREDICTOR_MODE_DC_INTEL 0x0
#define CL_ME_CHROMA_PREDICTOR_MODE_HORIZONTAL_INTEL 0x1
#define CL_ME_CHROMA_PREDICTOR_MODE_VERTICAL_INTEL 0x2
#define CL_ME_CHROMA_PREDICTOR_MODE_PLANE_INTEL 0x3
/* cl_device_info */
#define CL_DEVICE_ME_VERSION_INTEL 0x407E
#define CL_ME_VERSION_LEGACY_INTEL 0x0
#define CL_ME_VERSION_ADVANCED_VER_1_INTEL 0x1
#define CL_ME_VERSION_ADVANCED_VER_2_INTEL 0x2
extern CL_API_ENTRY cl_accelerator_intel CL_API_CALL
clCreateAcceleratorINTEL(
cl_context context,
cl_accelerator_type_intel accelerator_type,
size_t descriptor_size,
const void* descriptor,
cl_int* errcode_ret) CL_EXT_SUFFIX__VERSION_1_2;
typedef CL_API_ENTRY cl_accelerator_intel (CL_API_CALL *clCreateAcceleratorINTEL_fn)(
cl_context context,
cl_accelerator_type_intel accelerator_type,
size_t descriptor_size,
const void* descriptor,
cl_int* errcode_ret) CL_EXT_SUFFIX__VERSION_1_2;
extern CL_API_ENTRY cl_int CL_API_CALL
clGetAcceleratorInfoINTEL(
cl_accelerator_intel accelerator,
cl_accelerator_info_intel param_name,
size_t param_value_size,
void* param_value,
size_t* param_value_size_ret) CL_EXT_SUFFIX__VERSION_1_2;
typedef CL_API_ENTRY cl_int (CL_API_CALL *clGetAcceleratorInfoINTEL_fn)(
cl_accelerator_intel accelerator,
cl_accelerator_info_intel param_name,
size_t param_value_size,
void* param_value,
size_t* param_value_size_ret) CL_EXT_SUFFIX__VERSION_1_2;
extern CL_API_ENTRY cl_int CL_API_CALL
clRetainAcceleratorINTEL(
cl_accelerator_intel accelerator) CL_EXT_SUFFIX__VERSION_1_2;
typedef CL_API_ENTRY cl_int (CL_API_CALL *clRetainAcceleratorINTEL_fn)(
cl_accelerator_intel accelerator) CL_EXT_SUFFIX__VERSION_1_2;
extern CL_API_ENTRY cl_int CL_API_CALL
clReleaseAcceleratorINTEL(
cl_accelerator_intel accelerator) CL_EXT_SUFFIX__VERSION_1_2;
typedef CL_API_ENTRY cl_int (CL_API_CALL *clReleaseAcceleratorINTEL_fn)(
cl_accelerator_intel accelerator) CL_EXT_SUFFIX__VERSION_1_2;
/******************************************
* cl_intel_simultaneous_sharing extension *
*******************************************/
#define cl_intel_simultaneous_sharing 1
#define CL_DEVICE_SIMULTANEOUS_INTEROPS_INTEL 0x4104
#define CL_DEVICE_NUM_SIMULTANEOUS_INTEROPS_INTEL 0x4105
/***********************************
* cl_intel_egl_image_yuv extension *
************************************/
#define cl_intel_egl_image_yuv 1
#define CL_EGL_YUV_PLANE_INTEL 0x4107
/********************************
* cl_intel_packed_yuv extension *
*********************************/
#define cl_intel_packed_yuv 1
#define CL_YUYV_INTEL 0x4076
#define CL_UYVY_INTEL 0x4077
#define CL_YVYU_INTEL 0x4078
#define CL_VYUY_INTEL 0x4079
/********************************************
* cl_intel_required_subgroup_size extension *
*********************************************/
#define cl_intel_required_subgroup_size 1
#define CL_DEVICE_SUB_GROUP_SIZES_INTEL 0x4108
#define CL_KERNEL_SPILL_MEM_SIZE_INTEL 0x4109
#define CL_KERNEL_COMPILE_SUB_GROUP_SIZE_INTEL 0x410A
/****************************************
* cl_intel_driver_diagnostics extension *
*****************************************/
#define cl_intel_driver_diagnostics 1
typedef cl_uint cl_diagnostics_verbose_level;
#define CL_CONTEXT_SHOW_DIAGNOSTICS_INTEL 0x4106
#define CL_CONTEXT_DIAGNOSTICS_LEVEL_ALL_INTEL ( 0xff )
#define CL_CONTEXT_DIAGNOSTICS_LEVEL_GOOD_INTEL ( 1 )
#define CL_CONTEXT_DIAGNOSTICS_LEVEL_BAD_INTEL ( 1 << 1 )
#define CL_CONTEXT_DIAGNOSTICS_LEVEL_NEUTRAL_INTEL ( 1 << 2 )
/********************************
* cl_intel_planar_yuv extension *
*********************************/
#define CL_NV12_INTEL 0x410E
#define CL_MEM_NO_ACCESS_INTEL ( 1 << 24 )
#define CL_MEM_ACCESS_FLAGS_UNRESTRICTED_INTEL ( 1 << 25 )
#define CL_DEVICE_PLANAR_YUV_MAX_WIDTH_INTEL 0x417E
#define CL_DEVICE_PLANAR_YUV_MAX_HEIGHT_INTEL 0x417F
/*******************************************************
* cl_intel_device_side_avc_motion_estimation extension *
********************************************************/
#define CL_DEVICE_AVC_ME_VERSION_INTEL 0x410B
#define CL_DEVICE_AVC_ME_SUPPORTS_TEXTURE_SAMPLER_USE_INTEL 0x410C
#define CL_DEVICE_AVC_ME_SUPPORTS_PREEMPTION_INTEL 0x410D
#define CL_AVC_ME_VERSION_0_INTEL 0x0; // No support.
#define CL_AVC_ME_VERSION_1_INTEL 0x1; // First supported version.
#define CL_AVC_ME_MAJOR_16x16_INTEL 0x0
#define CL_AVC_ME_MAJOR_16x8_INTEL 0x1
#define CL_AVC_ME_MAJOR_8x16_INTEL 0x2
#define CL_AVC_ME_MAJOR_8x8_INTEL 0x3
#define CL_AVC_ME_MINOR_8x8_INTEL 0x0
#define CL_AVC_ME_MINOR_8x4_INTEL 0x1
#define CL_AVC_ME_MINOR_4x8_INTEL 0x2
#define CL_AVC_ME_MINOR_4x4_INTEL 0x3
#define CL_AVC_ME_MAJOR_FORWARD_INTEL 0x0
#define CL_AVC_ME_MAJOR_BACKWARD_INTEL 0x1
#define CL_AVC_ME_MAJOR_BIDIRECTIONAL_INTEL 0x2
#define CL_AVC_ME_PARTITION_MASK_ALL_INTEL 0x0
#define CL_AVC_ME_PARTITION_MASK_16x16_INTEL 0x7E
#define CL_AVC_ME_PARTITION_MASK_16x8_INTEL 0x7D
#define CL_AVC_ME_PARTITION_MASK_8x16_INTEL 0x7B
#define CL_AVC_ME_PARTITION_MASK_8x8_INTEL 0x77
#define CL_AVC_ME_PARTITION_MASK_8x4_INTEL 0x6F
#define CL_AVC_ME_PARTITION_MASK_4x8_INTEL 0x5F
#define CL_AVC_ME_PARTITION_MASK_4x4_INTEL 0x3F
#define CL_AVC_ME_SEARCH_WINDOW_EXHAUSTIVE_INTEL 0x0
#define CL_AVC_ME_SEARCH_WINDOW_SMALL_INTEL 0x1
#define CL_AVC_ME_SEARCH_WINDOW_TINY_INTEL 0x2
#define CL_AVC_ME_SEARCH_WINDOW_EXTRA_TINY_INTEL 0x3
#define CL_AVC_ME_SEARCH_WINDOW_DIAMOND_INTEL 0x4
#define CL_AVC_ME_SEARCH_WINDOW_LARGE_DIAMOND_INTEL 0x5
#define CL_AVC_ME_SEARCH_WINDOW_RESERVED0_INTEL 0x6
#define CL_AVC_ME_SEARCH_WINDOW_RESERVED1_INTEL 0x7
#define CL_AVC_ME_SEARCH_WINDOW_CUSTOM_INTEL 0x8
#define CL_AVC_ME_SEARCH_WINDOW_16x12_RADIUS_INTEL 0x9
#define CL_AVC_ME_SEARCH_WINDOW_4x4_RADIUS_INTEL 0x2
#define CL_AVC_ME_SEARCH_WINDOW_2x2_RADIUS_INTEL 0xa
#define CL_AVC_ME_SAD_ADJUST_MODE_NONE_INTEL 0x0
#define CL_AVC_ME_SAD_ADJUST_MODE_HAAR_INTEL 0x2
#define CL_AVC_ME_SUBPIXEL_MODE_INTEGER_INTEL 0x0
#define CL_AVC_ME_SUBPIXEL_MODE_HPEL_INTEL 0x1
#define CL_AVC_ME_SUBPIXEL_MODE_QPEL_INTEL 0x3
#define CL_AVC_ME_COST_PRECISION_QPEL_INTEL 0x0
#define CL_AVC_ME_COST_PRECISION_HPEL_INTEL 0x1
#define CL_AVC_ME_COST_PRECISION_PEL_INTEL 0x2
#define CL_AVC_ME_COST_PRECISION_DPEL_INTEL 0x3
#define CL_AVC_ME_BIDIR_WEIGHT_QUARTER_INTEL 0x10
#define CL_AVC_ME_BIDIR_WEIGHT_THIRD_INTEL 0x15
#define CL_AVC_ME_BIDIR_WEIGHT_HALF_INTEL 0x20
#define CL_AVC_ME_BIDIR_WEIGHT_TWO_THIRD_INTEL 0x2B
#define CL_AVC_ME_BIDIR_WEIGHT_THREE_QUARTER_INTEL 0x30
#define CL_AVC_ME_BORDER_REACHED_LEFT_INTEL 0x0
#define CL_AVC_ME_BORDER_REACHED_RIGHT_INTEL 0x2
#define CL_AVC_ME_BORDER_REACHED_TOP_INTEL 0x4
#define CL_AVC_ME_BORDER_REACHED_BOTTOM_INTEL 0x8
#define CL_AVC_ME_SKIP_BLOCK_PARTITION_16x16_INTEL 0x0
#define CL_AVC_ME_SKIP_BLOCK_PARTITION_8x8_INTEL 0x4000
#define CL_AVC_ME_SKIP_BLOCK_16x16_FORWARD_ENABLE_INTEL ( 0x1 << 24 )
#define CL_AVC_ME_SKIP_BLOCK_16x16_BACKWARD_ENABLE_INTEL ( 0x2 << 24 )
#define CL_AVC_ME_SKIP_BLOCK_16x16_DUAL_ENABLE_INTEL ( 0x3 << 24 )
#define CL_AVC_ME_SKIP_BLOCK_8x8_FORWARD_ENABLE_INTEL ( 0x55 << 24 )
#define CL_AVC_ME_SKIP_BLOCK_8x8_BACKWARD_ENABLE_INTEL ( 0xAA << 24 )
#define CL_AVC_ME_SKIP_BLOCK_8x8_DUAL_ENABLE_INTEL ( 0xFF << 24 )
#define CL_AVC_ME_SKIP_BLOCK_8x8_0_FORWARD_ENABLE_INTEL ( 0x1 << 24 )
#define CL_AVC_ME_SKIP_BLOCK_8x8_0_BACKWARD_ENABLE_INTEL ( 0x2 << 24 )
#define CL_AVC_ME_SKIP_BLOCK_8x8_1_FORWARD_ENABLE_INTEL ( 0x1 << 26 )
#define CL_AVC_ME_SKIP_BLOCK_8x8_1_BACKWARD_ENABLE_INTEL ( 0x2 << 26 )
#define CL_AVC_ME_SKIP_BLOCK_8x8_2_FORWARD_ENABLE_INTEL ( 0x1 << 28 )
#define CL_AVC_ME_SKIP_BLOCK_8x8_2_BACKWARD_ENABLE_INTEL ( 0x2 << 28 )
#define CL_AVC_ME_SKIP_BLOCK_8x8_3_FORWARD_ENABLE_INTEL ( 0x1 << 30 )
#define CL_AVC_ME_SKIP_BLOCK_8x8_3_BACKWARD_ENABLE_INTEL ( 0x2 << 30 )
#define CL_AVC_ME_BLOCK_BASED_SKIP_4x4_INTEL 0x00
#define CL_AVC_ME_BLOCK_BASED_SKIP_8x8_INTEL 0x80
#define CL_AVC_ME_INTRA_16x16_INTEL 0x0
#define CL_AVC_ME_INTRA_8x8_INTEL 0x1
#define CL_AVC_ME_INTRA_4x4_INTEL 0x2
#define CL_AVC_ME_INTRA_LUMA_PARTITION_MASK_16x16_INTEL 0x6
#define CL_AVC_ME_INTRA_LUMA_PARTITION_MASK_8x8_INTEL 0x5
#define CL_AVC_ME_INTRA_LUMA_PARTITION_MASK_4x4_INTEL 0x3
#define CL_AVC_ME_INTRA_NEIGHBOR_LEFT_MASK_ENABLE_INTEL 0x60
#define CL_AVC_ME_INTRA_NEIGHBOR_UPPER_MASK_ENABLE_INTEL 0x10
#define CL_AVC_ME_INTRA_NEIGHBOR_UPPER_RIGHT_MASK_ENABLE_INTEL 0x8
#define CL_AVC_ME_INTRA_NEIGHBOR_UPPER_LEFT_MASK_ENABLE_INTEL 0x4
#define CL_AVC_ME_LUMA_PREDICTOR_MODE_VERTICAL_INTEL 0x0
#define CL_AVC_ME_LUMA_PREDICTOR_MODE_HORIZONTAL_INTEL 0x1
#define CL_AVC_ME_LUMA_PREDICTOR_MODE_DC_INTEL 0x2
#define CL_AVC_ME_LUMA_PREDICTOR_MODE_DIAGONAL_DOWN_LEFT_INTEL 0x3
#define CL_AVC_ME_LUMA_PREDICTOR_MODE_DIAGONAL_DOWN_RIGHT_INTEL 0x4
#define CL_AVC_ME_LUMA_PREDICTOR_MODE_PLANE_INTEL 0x4
#define CL_AVC_ME_LUMA_PREDICTOR_MODE_VERTICAL_RIGHT_INTEL 0x5
#define CL_AVC_ME_LUMA_PREDICTOR_MODE_HORIZONTAL_DOWN_INTEL 0x6
#define CL_AVC_ME_LUMA_PREDICTOR_MODE_VERTICAL_LEFT_INTEL 0x7
#define CL_AVC_ME_LUMA_PREDICTOR_MODE_HORIZONTAL_UP_INTEL 0x8
#define CL_AVC_ME_CHROMA_PREDICTOR_MODE_DC_INTEL 0x0
#define CL_AVC_ME_CHROMA_PREDICTOR_MODE_HORIZONTAL_INTEL 0x1
#define CL_AVC_ME_CHROMA_PREDICTOR_MODE_VERTICAL_INTEL 0x2
#define CL_AVC_ME_CHROMA_PREDICTOR_MODE_PLANE_INTEL 0x3
#define CL_AVC_ME_FRAME_FORWARD_INTEL 0x1
#define CL_AVC_ME_FRAME_BACKWARD_INTEL 0x2
#define CL_AVC_ME_FRAME_DUAL_INTEL 0x3
#define CL_AVC_ME_SLICE_TYPE_PRED_INTEL 0x0
#define CL_AVC_ME_SLICE_TYPE_BPRED_INTEL 0x1
#define CL_AVC_ME_SLICE_TYPE_INTRA_INTEL 0x2
#define CL_AVC_ME_INTERLACED_SCAN_TOP_FIELD_INTEL 0x0
#define CL_AVC_ME_INTERLACED_SCAN_BOTTOM_FIELD_INTEL 0x1
#ifdef __cplusplus
}
#endif
#endif /* __CL_EXT_INTEL_H */

171
src/3rdparty/CL/cl_gl.h vendored Normal file
View File

@@ -0,0 +1,171 @@
/**********************************************************************************
* Copyright (c) 2008-2019 The Khronos Group Inc.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and/or associated documentation files (the
* "Materials"), to deal in the Materials without restriction, including
* without limitation the rights to use, copy, modify, merge, publish,
* distribute, sublicense, and/or sell copies of the Materials, and to
* permit persons to whom the Materials are furnished to do so, subject to
* the following conditions:
*
* The above copyright notice and this permission notice shall be included
* in all copies or substantial portions of the Materials.
*
* MODIFICATIONS TO THIS FILE MAY MEAN IT NO LONGER ACCURATELY REFLECTS
* KHRONOS STANDARDS. THE UNMODIFIED, NORMATIVE VERSIONS OF KHRONOS
* SPECIFICATIONS AND HEADER INFORMATION ARE LOCATED AT
* https://www.khronos.org/registry/
*
* THE MATERIALS ARE PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
* IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
* CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
* TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
* MATERIALS OR THE USE OR OTHER DEALINGS IN THE MATERIALS.
**********************************************************************************/
#ifndef __OPENCL_CL_GL_H
#define __OPENCL_CL_GL_H
#include <CL/cl.h>
#ifdef __cplusplus
extern "C" {
#endif
typedef cl_uint cl_gl_object_type;
typedef cl_uint cl_gl_texture_info;
typedef cl_uint cl_gl_platform_info;
typedef struct __GLsync *cl_GLsync;
/* cl_gl_object_type = 0x2000 - 0x200F enum values are currently taken */
#define CL_GL_OBJECT_BUFFER 0x2000
#define CL_GL_OBJECT_TEXTURE2D 0x2001
#define CL_GL_OBJECT_TEXTURE3D 0x2002
#define CL_GL_OBJECT_RENDERBUFFER 0x2003
#ifdef CL_VERSION_1_2
#define CL_GL_OBJECT_TEXTURE2D_ARRAY 0x200E
#define CL_GL_OBJECT_TEXTURE1D 0x200F
#define CL_GL_OBJECT_TEXTURE1D_ARRAY 0x2010
#define CL_GL_OBJECT_TEXTURE_BUFFER 0x2011
#endif
/* cl_gl_texture_info */
#define CL_GL_TEXTURE_TARGET 0x2004
#define CL_GL_MIPMAP_LEVEL 0x2005
#ifdef CL_VERSION_1_2
#define CL_GL_NUM_SAMPLES 0x2012
#endif
extern CL_API_ENTRY cl_mem CL_API_CALL
clCreateFromGLBuffer(cl_context context,
cl_mem_flags flags,
cl_GLuint bufobj,
cl_int * errcode_ret) CL_API_SUFFIX__VERSION_1_0;
#ifdef CL_VERSION_1_2
extern CL_API_ENTRY cl_mem CL_API_CALL
clCreateFromGLTexture(cl_context context,
cl_mem_flags flags,
cl_GLenum target,
cl_GLint miplevel,
cl_GLuint texture,
cl_int * errcode_ret) CL_API_SUFFIX__VERSION_1_2;
#endif
extern CL_API_ENTRY cl_mem CL_API_CALL
clCreateFromGLRenderbuffer(cl_context context,
cl_mem_flags flags,
cl_GLuint renderbuffer,
cl_int * errcode_ret) CL_API_SUFFIX__VERSION_1_0;
extern CL_API_ENTRY cl_int CL_API_CALL
clGetGLObjectInfo(cl_mem memobj,
cl_gl_object_type * gl_object_type,
cl_GLuint * gl_object_name) CL_API_SUFFIX__VERSION_1_0;
extern CL_API_ENTRY cl_int CL_API_CALL
clGetGLTextureInfo(cl_mem memobj,
cl_gl_texture_info param_name,
size_t param_value_size,
void * param_value,
size_t * param_value_size_ret) CL_API_SUFFIX__VERSION_1_0;
extern CL_API_ENTRY cl_int CL_API_CALL
clEnqueueAcquireGLObjects(cl_command_queue command_queue,
cl_uint num_objects,
const cl_mem * mem_objects,
cl_uint num_events_in_wait_list,
const cl_event * event_wait_list,
cl_event * event) CL_API_SUFFIX__VERSION_1_0;
extern CL_API_ENTRY cl_int CL_API_CALL
clEnqueueReleaseGLObjects(cl_command_queue command_queue,
cl_uint num_objects,
const cl_mem * mem_objects,
cl_uint num_events_in_wait_list,
const cl_event * event_wait_list,
cl_event * event) CL_API_SUFFIX__VERSION_1_0;
/* Deprecated OpenCL 1.1 APIs */
extern CL_API_ENTRY CL_EXT_PREFIX__VERSION_1_1_DEPRECATED cl_mem CL_API_CALL
clCreateFromGLTexture2D(cl_context context,
cl_mem_flags flags,
cl_GLenum target,
cl_GLint miplevel,
cl_GLuint texture,
cl_int * errcode_ret) CL_EXT_SUFFIX__VERSION_1_1_DEPRECATED;
extern CL_API_ENTRY CL_EXT_PREFIX__VERSION_1_1_DEPRECATED cl_mem CL_API_CALL
clCreateFromGLTexture3D(cl_context context,
cl_mem_flags flags,
cl_GLenum target,
cl_GLint miplevel,
cl_GLuint texture,
cl_int * errcode_ret) CL_EXT_SUFFIX__VERSION_1_1_DEPRECATED;
/* cl_khr_gl_sharing extension */
#define cl_khr_gl_sharing 1
typedef cl_uint cl_gl_context_info;
/* Additional Error Codes */
#define CL_INVALID_GL_SHAREGROUP_REFERENCE_KHR -1000
/* cl_gl_context_info */
#define CL_CURRENT_DEVICE_FOR_GL_CONTEXT_KHR 0x2006
#define CL_DEVICES_FOR_GL_CONTEXT_KHR 0x2007
/* Additional cl_context_properties */
#define CL_GL_CONTEXT_KHR 0x2008
#define CL_EGL_DISPLAY_KHR 0x2009
#define CL_GLX_DISPLAY_KHR 0x200A
#define CL_WGL_HDC_KHR 0x200B
#define CL_CGL_SHAREGROUP_KHR 0x200C
extern CL_API_ENTRY cl_int CL_API_CALL
clGetGLContextInfoKHR(const cl_context_properties * properties,
cl_gl_context_info param_name,
size_t param_value_size,
void * param_value,
size_t * param_value_size_ret) CL_API_SUFFIX__VERSION_1_0;
typedef CL_API_ENTRY cl_int (CL_API_CALL *clGetGLContextInfoKHR_fn)(
const cl_context_properties * properties,
cl_gl_context_info param_name,
size_t param_value_size,
void * param_value,
size_t * param_value_size_ret);
#ifdef __cplusplus
}
#endif
#endif /* __OPENCL_CL_GL_H */

52
src/3rdparty/CL/cl_gl_ext.h vendored Normal file
View File

@@ -0,0 +1,52 @@
/**********************************************************************************
* Copyright (c) 2008-2019 The Khronos Group Inc.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and/or associated documentation files (the
* "Materials"), to deal in the Materials without restriction, including
* without limitation the rights to use, copy, modify, merge, publish,
* distribute, sublicense, and/or sell copies of the Materials, and to
* permit persons to whom the Materials are furnished to do so, subject to
* the following conditions:
*
* The above copyright notice and this permission notice shall be included
* in all copies or substantial portions of the Materials.
*
* MODIFICATIONS TO THIS FILE MAY MEAN IT NO LONGER ACCURATELY REFLECTS
* KHRONOS STANDARDS. THE UNMODIFIED, NORMATIVE VERSIONS OF KHRONOS
* SPECIFICATIONS AND HEADER INFORMATION ARE LOCATED AT
* https://www.khronos.org/registry/
*
* THE MATERIALS ARE PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
* IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
* CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
* TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
* MATERIALS OR THE USE OR OTHER DEALINGS IN THE MATERIALS.
**********************************************************************************/
#ifndef __OPENCL_CL_GL_EXT_H
#define __OPENCL_CL_GL_EXT_H
#ifdef __cplusplus
extern "C" {
#endif
#include <CL/cl_gl.h>
/*
* cl_khr_gl_event extension
*/
#define CL_COMMAND_GL_FENCE_SYNC_OBJECT_KHR 0x200D
extern CL_API_ENTRY cl_event CL_API_CALL
clCreateEventFromGLsyncKHR(cl_context context,
cl_GLsync cl_GLsync,
cl_int * errcode_ret) CL_EXT_SUFFIX__VERSION_1_1;
#ifdef __cplusplus
}
#endif
#endif /* __OPENCL_CL_GL_EXT_H */

1384
src/3rdparty/CL/cl_platform.h vendored Normal file

File diff suppressed because it is too large Load Diff

View File

@@ -0,0 +1,172 @@
/**********************************************************************************
* Copyright (c) 2008-2019 The Khronos Group Inc.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and/or associated documentation files (the
* "Materials"), to deal in the Materials without restriction, including
* without limitation the rights to use, copy, modify, merge, publish,
* distribute, sublicense, and/or sell copies of the Materials, and to
* permit persons to whom the Materials are furnished to do so, subject to
* the following conditions:
*
* The above copyright notice and this permission notice shall be included
* in all copies or substantial portions of the Materials.
*
* MODIFICATIONS TO THIS FILE MAY MEAN IT NO LONGER ACCURATELY REFLECTS
* KHRONOS STANDARDS. THE UNMODIFIED, NORMATIVE VERSIONS OF KHRONOS
* SPECIFICATIONS AND HEADER INFORMATION ARE LOCATED AT
* https://www.khronos.org/registry/
*
* THE MATERIALS ARE PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
* IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
* CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
* TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
* MATERIALS OR THE USE OR OTHER DEALINGS IN THE MATERIALS.
**********************************************************************************/
/*****************************************************************************\
Copyright (c) 2013-2019 Intel Corporation All Rights Reserved.
THESE MATERIALS ARE PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
"AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL INTEL OR ITS
CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY OR TORT (INCLUDING
NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THESE
MATERIALS, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
File Name: cl_va_api_media_sharing_intel.h
Abstract:
Notes:
\*****************************************************************************/
#ifndef __OPENCL_CL_VA_API_MEDIA_SHARING_INTEL_H
#define __OPENCL_CL_VA_API_MEDIA_SHARING_INTEL_H
#include <CL/cl.h>
#include <CL/cl_platform.h>
#include <va/va.h>
#ifdef __cplusplus
extern "C" {
#endif
/******************************************
* cl_intel_va_api_media_sharing extension *
*******************************************/
#define cl_intel_va_api_media_sharing 1
/* error codes */
#define CL_INVALID_VA_API_MEDIA_ADAPTER_INTEL -1098
#define CL_INVALID_VA_API_MEDIA_SURFACE_INTEL -1099
#define CL_VA_API_MEDIA_SURFACE_ALREADY_ACQUIRED_INTEL -1100
#define CL_VA_API_MEDIA_SURFACE_NOT_ACQUIRED_INTEL -1101
/* cl_va_api_device_source_intel */
#define CL_VA_API_DISPLAY_INTEL 0x4094
/* cl_va_api_device_set_intel */
#define CL_PREFERRED_DEVICES_FOR_VA_API_INTEL 0x4095
#define CL_ALL_DEVICES_FOR_VA_API_INTEL 0x4096
/* cl_context_info */
#define CL_CONTEXT_VA_API_DISPLAY_INTEL 0x4097
/* cl_mem_info */
#define CL_MEM_VA_API_MEDIA_SURFACE_INTEL 0x4098
/* cl_image_info */
#define CL_IMAGE_VA_API_PLANE_INTEL 0x4099
/* cl_command_type */
#define CL_COMMAND_ACQUIRE_VA_API_MEDIA_SURFACES_INTEL 0x409A
#define CL_COMMAND_RELEASE_VA_API_MEDIA_SURFACES_INTEL 0x409B
typedef cl_uint cl_va_api_device_source_intel;
typedef cl_uint cl_va_api_device_set_intel;
extern CL_API_ENTRY cl_int CL_API_CALL
clGetDeviceIDsFromVA_APIMediaAdapterINTEL(
cl_platform_id platform,
cl_va_api_device_source_intel media_adapter_type,
void* media_adapter,
cl_va_api_device_set_intel media_adapter_set,
cl_uint num_entries,
cl_device_id* devices,
cl_uint* num_devices) CL_EXT_SUFFIX__VERSION_1_2;
typedef CL_API_ENTRY cl_int (CL_API_CALL * clGetDeviceIDsFromVA_APIMediaAdapterINTEL_fn)(
cl_platform_id platform,
cl_va_api_device_source_intel media_adapter_type,
void* media_adapter,
cl_va_api_device_set_intel media_adapter_set,
cl_uint num_entries,
cl_device_id* devices,
cl_uint* num_devices) CL_EXT_SUFFIX__VERSION_1_2;
extern CL_API_ENTRY cl_mem CL_API_CALL
clCreateFromVA_APIMediaSurfaceINTEL(
cl_context context,
cl_mem_flags flags,
VASurfaceID* surface,
cl_uint plane,
cl_int* errcode_ret) CL_EXT_SUFFIX__VERSION_1_2;
typedef CL_API_ENTRY cl_mem (CL_API_CALL * clCreateFromVA_APIMediaSurfaceINTEL_fn)(
cl_context context,
cl_mem_flags flags,
VASurfaceID* surface,
cl_uint plane,
cl_int* errcode_ret) CL_EXT_SUFFIX__VERSION_1_2;
extern CL_API_ENTRY cl_int CL_API_CALL
clEnqueueAcquireVA_APIMediaSurfacesINTEL(
cl_command_queue command_queue,
cl_uint num_objects,
const cl_mem* mem_objects,
cl_uint num_events_in_wait_list,
const cl_event* event_wait_list,
cl_event* event) CL_EXT_SUFFIX__VERSION_1_2;
typedef CL_API_ENTRY cl_int (CL_API_CALL *clEnqueueAcquireVA_APIMediaSurfacesINTEL_fn)(
cl_command_queue command_queue,
cl_uint num_objects,
const cl_mem* mem_objects,
cl_uint num_events_in_wait_list,
const cl_event* event_wait_list,
cl_event* event) CL_EXT_SUFFIX__VERSION_1_2;
extern CL_API_ENTRY cl_int CL_API_CALL
clEnqueueReleaseVA_APIMediaSurfacesINTEL(
cl_command_queue command_queue,
cl_uint num_objects,
const cl_mem* mem_objects,
cl_uint num_events_in_wait_list,
const cl_event* event_wait_list,
cl_event* event) CL_EXT_SUFFIX__VERSION_1_2;
typedef CL_API_ENTRY cl_int (CL_API_CALL *clEnqueueReleaseVA_APIMediaSurfacesINTEL_fn)(
cl_command_queue command_queue,
cl_uint num_objects,
const cl_mem* mem_objects,
cl_uint num_events_in_wait_list,
const cl_event* event_wait_list,
cl_event* event) CL_EXT_SUFFIX__VERSION_1_2;
#ifdef __cplusplus
}
#endif
#endif /* __OPENCL_CL_VA_API_MEDIA_SHARING_INTEL_H */

86
src/3rdparty/CL/cl_version.h vendored Normal file
View File

@@ -0,0 +1,86 @@
/*******************************************************************************
* Copyright (c) 2018 The Khronos Group Inc.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and/or associated documentation files (the
* "Materials"), to deal in the Materials without restriction, including
* without limitation the rights to use, copy, modify, merge, publish,
* distribute, sublicense, and/or sell copies of the Materials, and to
* permit persons to whom the Materials are furnished to do so, subject to
* the following conditions:
*
* The above copyright notice and this permission notice shall be included
* in all copies or substantial portions of the Materials.
*
* MODIFICATIONS TO THIS FILE MAY MEAN IT NO LONGER ACCURATELY REFLECTS
* KHRONOS STANDARDS. THE UNMODIFIED, NORMATIVE VERSIONS OF KHRONOS
* SPECIFICATIONS AND HEADER INFORMATION ARE LOCATED AT
* https://www.khronos.org/registry/
*
* THE MATERIALS ARE PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
* IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
* CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
* TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
* MATERIALS OR THE USE OR OTHER DEALINGS IN THE MATERIALS.
******************************************************************************/
#ifndef __CL_VERSION_H
#define __CL_VERSION_H
/* Detect which version to target */
#if !defined(CL_TARGET_OPENCL_VERSION)
#pragma message("cl_version.h: CL_TARGET_OPENCL_VERSION is not defined. Defaulting to 220 (OpenCL 2.2)")
#define CL_TARGET_OPENCL_VERSION 220
#endif
#if CL_TARGET_OPENCL_VERSION != 100 && \
CL_TARGET_OPENCL_VERSION != 110 && \
CL_TARGET_OPENCL_VERSION != 120 && \
CL_TARGET_OPENCL_VERSION != 200 && \
CL_TARGET_OPENCL_VERSION != 210 && \
CL_TARGET_OPENCL_VERSION != 220
#pragma message("cl_version: CL_TARGET_OPENCL_VERSION is not a valid value (100, 110, 120, 200, 210, 220). Defaulting to 220 (OpenCL 2.2)")
#undef CL_TARGET_OPENCL_VERSION
#define CL_TARGET_OPENCL_VERSION 220
#endif
/* OpenCL Version */
#if CL_TARGET_OPENCL_VERSION >= 220 && !defined(CL_VERSION_2_2)
#define CL_VERSION_2_2 1
#endif
#if CL_TARGET_OPENCL_VERSION >= 210 && !defined(CL_VERSION_2_1)
#define CL_VERSION_2_1 1
#endif
#if CL_TARGET_OPENCL_VERSION >= 200 && !defined(CL_VERSION_2_0)
#define CL_VERSION_2_0 1
#endif
#if CL_TARGET_OPENCL_VERSION >= 120 && !defined(CL_VERSION_1_2)
#define CL_VERSION_1_2 1
#endif
#if CL_TARGET_OPENCL_VERSION >= 110 && !defined(CL_VERSION_1_1)
#define CL_VERSION_1_1 1
#endif
#if CL_TARGET_OPENCL_VERSION >= 100 && !defined(CL_VERSION_1_0)
#define CL_VERSION_1_0 1
#endif
/* Allow deprecated APIs for older OpenCL versions. */
#if CL_TARGET_OPENCL_VERSION <= 210 && !defined(CL_USE_DEPRECATED_OPENCL_2_1_APIS)
#define CL_USE_DEPRECATED_OPENCL_2_1_APIS
#endif
#if CL_TARGET_OPENCL_VERSION <= 200 && !defined(CL_USE_DEPRECATED_OPENCL_2_0_APIS)
#define CL_USE_DEPRECATED_OPENCL_2_0_APIS
#endif
#if CL_TARGET_OPENCL_VERSION <= 120 && !defined(CL_USE_DEPRECATED_OPENCL_1_2_APIS)
#define CL_USE_DEPRECATED_OPENCL_1_2_APIS
#endif
#if CL_TARGET_OPENCL_VERSION <= 110 && !defined(CL_USE_DEPRECATED_OPENCL_1_1_APIS)
#define CL_USE_DEPRECATED_OPENCL_1_1_APIS
#endif
#if CL_TARGET_OPENCL_VERSION <= 100 && !defined(CL_USE_DEPRECATED_OPENCL_1_0_APIS)
#define CL_USE_DEPRECATED_OPENCL_1_0_APIS
#endif
#endif /* __CL_VERSION_H */

47
src/3rdparty/CL/opencl.h vendored Normal file
View File

@@ -0,0 +1,47 @@
/*******************************************************************************
* Copyright (c) 2008-2015 The Khronos Group Inc.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and/or associated documentation files (the
* "Materials"), to deal in the Materials without restriction, including
* without limitation the rights to use, copy, modify, merge, publish,
* distribute, sublicense, and/or sell copies of the Materials, and to
* permit persons to whom the Materials are furnished to do so, subject to
* the following conditions:
*
* The above copyright notice and this permission notice shall be included
* in all copies or substantial portions of the Materials.
*
* MODIFICATIONS TO THIS FILE MAY MEAN IT NO LONGER ACCURATELY REFLECTS
* KHRONOS STANDARDS. THE UNMODIFIED, NORMATIVE VERSIONS OF KHRONOS
* SPECIFICATIONS AND HEADER INFORMATION ARE LOCATED AT
* https://www.khronos.org/registry/
*
* THE MATERIALS ARE PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
* IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
* CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
* TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
* MATERIALS OR THE USE OR OTHER DEALINGS IN THE MATERIALS.
******************************************************************************/
/* $Revision: 11708 $ on $Date: 2010-06-13 23:36:24 -0700 (Sun, 13 Jun 2010) $ */
#ifndef __OPENCL_H
#define __OPENCL_H
#ifdef __cplusplus
extern "C" {
#endif
#include <CL/cl.h>
#include <CL/cl_gl.h>
#include <CL/cl_gl_ext.h>
#include <CL/cl_ext.h>
#ifdef __cplusplus
}
#endif
#endif /* __OPENCL_H */

2342
src/3rdparty/adl/adl_defines.h vendored Normal file

File diff suppressed because it is too large Load Diff

44
src/3rdparty/adl/adl_sdk.h vendored Normal file
View File

@@ -0,0 +1,44 @@
//
// Copyright (c) 2016 Advanced Micro Devices, Inc. All rights reserved.
//
// MIT LICENSE:
// Permission is hereby granted, free of charge, to any person obtaining a copy
// of this software and associated documentation files (the "Software"), to deal
// in the Software without restriction, including without limitation the rights
// to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
// copies of the Software, and to permit persons to whom the Software is
// furnished to do so, subject to the following conditions:
//
// The above copyright notice and this permission notice shall be included in
// all copies or substantial portions of the Software.
//
// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
// IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
// FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
// AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
// LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
// OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
// SOFTWARE.
/// \file adl_sdk.h
/// \brief Contains the definition of the Memory Allocation Callback.\n <b>Included in ADL SDK</b>
///
/// \n\n
/// This file contains the definition of the Memory Allocation Callback.\n
/// It also includes definitions of the respective structures and constants.\n
/// <b> This is the only header file to be included in a C/C++ project using ADL </b>
#ifndef ADL_SDK_H_
#define ADL_SDK_H_
#include "adl_structures.h"
#if defined (LINUX)
#define __stdcall
#endif /* (LINUX) */
/// Memory Allocation Call back
typedef void* ( __stdcall *ADL_MAIN_MALLOC_CALLBACK )( int );
#endif /* ADL_SDK_H_ */

3440
src/3rdparty/adl/adl_structures.h vendored Normal file

File diff suppressed because it is too large Load Diff

View File

@@ -1,34 +1,33 @@
cmake_minimum_required(VERSION 2.6)
cmake_minimum_required(VERSION 2.8)
project(Argon2 C)
set(ARGON2_VERSION 1.0)
project(argon2 C)
set(CMAKE_C_STANDARD 99)
set(CMAKE_C_STANDARD_REQUIRED ON)
include(CheckCSourceCompiles)
add_library(argon2 STATIC
set(ARGON2_SOURCES
lib/argon2.c
lib/core.c
lib/encoding.c
lib/genkat.c
lib/impl-select.c
lib/blake2/blake2.c
)
)
target_include_directories(argon2 PUBLIC ${CMAKE_CURRENT_SOURCE_DIR}/include)
target_include_directories(argon2 PRIVATE ${CMAKE_CURRENT_SOURCE_DIR}/lib)
set(ARGON2_X86_64_ENABLED ON)
set(ARGON2_X86_64_LIBS argon2-sse2 argon2-ssse3 argon2-xop argon2-avx2 argon2-avx512f)
set(ARGON2_X86_64_SOURCES arch/x86_64/lib/argon2-arch.c)
if (CMAKE_C_COMPILER_ID MATCHES MSVC)
function(add_feature_impl FEATURE MSVC_FLAG DEF)
add_library(argon2-${FEATURE} STATIC arch/x86_64/lib/argon2-${FEATURE}.c)
target_include_directories(argon2-${FEATURE} PRIVATE ${CMAKE_CURRENT_SOURCE_DIR}/include)
target_include_directories(argon2-${FEATURE} PRIVATE ${CMAKE_CURRENT_SOURCE_DIR}/../../)
target_include_directories(argon2-${FEATURE} PRIVATE ${CMAKE_CURRENT_SOURCE_DIR}/lib)
set_target_properties(argon2-${FEATURE} PROPERTIES POSITION_INDEPENDENT_CODE True)
target_compile_options(argon2-${FEATURE} PRIVATE ${MSVC_FLAG})
target_compile_definitions(argon2-${FEATURE} PRIVATE ${DEF})
target_link_libraries(argon2 PUBLIC argon2-${FEATURE})
endfunction()
add_feature_impl(sse2 "" HAVE_SSE2)
@@ -36,12 +35,10 @@ if (CMAKE_C_COMPILER_ID MATCHES MSVC)
add_feature_impl(xop "" HAVE_XOP)
add_feature_impl(avx2 "/arch:AVX2" HAVE_AVX2)
add_feature_impl(avx512f "/arch:AVX512F" HAVE_AVX512F)
target_sources(argon2 PRIVATE arch/x86_64/lib/argon2-arch.c arch/x86_64/lib/cpu-flags.c)
elseif (NOT XMRIG_ARM AND CMAKE_SIZEOF_VOID_P EQUAL 8)
function(add_feature_impl FEATURE GCC_FLAG DEF)
add_library(argon2-${FEATURE} STATIC arch/x86_64/lib/argon2-${FEATURE}.c)
target_include_directories(argon2-${FEATURE} PRIVATE ${CMAKE_CURRENT_SOURCE_DIR}/include)
target_include_directories(argon2-${FEATURE} PRIVATE ${CMAKE_CURRENT_SOURCE_DIR}/../../)
target_include_directories(argon2-${FEATURE} PRIVATE ${CMAKE_CURRENT_SOURCE_DIR}/lib)
set_target_properties(argon2-${FEATURE} PROPERTIES POSITION_INDEPENDENT_CODE True)
@@ -67,8 +64,6 @@ elseif (NOT XMRIG_ARM AND CMAKE_SIZEOF_VOID_P EQUAL 8)
message("-- argon2: feature '${FEATURE}' detected!")
target_compile_definitions(argon2-${FEATURE} PRIVATE ${DEF})
endif()
target_link_libraries(argon2 PUBLIC argon2-${FEATURE})
endfunction()
add_feature_impl(sse2 -msse2 HAVE_SSE2)
@@ -76,8 +71,18 @@ elseif (NOT XMRIG_ARM AND CMAKE_SIZEOF_VOID_P EQUAL 8)
add_feature_impl(xop -mxop HAVE_XOP)
add_feature_impl(avx2 -mavx2 HAVE_AVX2)
add_feature_impl(avx512f -mavx512f HAVE_AVX512F)
target_sources(argon2 PRIVATE arch/x86_64/lib/argon2-arch.c arch/x86_64/lib/cpu-flags.c)
else()
target_sources(argon2 PRIVATE arch/generic/lib/argon2-arch.c)
set(ARGON2_X86_64_ENABLED OFF)
list(APPEND ARGON2_SOURCES arch/generic/lib/argon2-arch.c)
endif()
if (ARGON2_X86_64_ENABLED)
set(ARGON2_LIBS ${ARGON2_X86_64_LIBS})
list(APPEND ARGON2_SOURCES ${ARGON2_X86_64_SOURCES})
endif()
add_library(argon2 STATIC ${ARGON2_SOURCES})
target_link_libraries(argon2 ${ARGON2_LIBS})
target_include_directories(argon2 PRIVATE ${CMAKE_CURRENT_SOURCE_DIR}/../../)
target_include_directories(argon2 PRIVATE ${CMAKE_CURRENT_SOURCE_DIR}/lib)

View File

@@ -4,7 +4,6 @@
#include "impl-select.h"
#include "cpu-flags.h"
#include "argon2-sse2.h"
#include "argon2-ssse3.h"
#include "argon2-xop.h"
@@ -26,16 +25,14 @@ void fill_segment_default(const argon2_instance_t *instance,
void argon2_get_impl_list(argon2_impl_list *list)
{
static const argon2_impl IMPLS[] = {
{ "x86_64", NULL, fill_segment_default },
{ "SSE2", check_sse2, fill_segment_sse2 },
{ "SSSE3", check_ssse3, fill_segment_ssse3 },
{ "XOP", check_xop, fill_segment_xop },
{ "AVX2", check_avx2, fill_segment_avx2 },
{ "AVX-512F", check_avx512f, fill_segment_avx512f },
{ "x86_64", NULL, fill_segment_default },
{ "SSE2", xmrig_ar2_check_sse2, xmrig_ar2_fill_segment_sse2 },
{ "SSSE3", xmrig_ar2_check_ssse3, xmrig_ar2_fill_segment_ssse3 },
{ "XOP", xmrig_ar2_check_xop, xmrig_ar2_fill_segment_xop },
{ "AVX2", xmrig_ar2_check_avx2, xmrig_ar2_fill_segment_avx2 },
{ "AVX-512F", xmrig_ar2_check_avx512f, xmrig_ar2_fill_segment_avx512f },
};
cpu_flags_get();
list->count = sizeof(IMPLS) / sizeof(IMPLS[0]);
list->entries = IMPLS;
}

View File

@@ -9,8 +9,6 @@
# include <intrin.h>
#endif
#include "cpu-flags.h"
#define r16 (_mm256_setr_epi8( \
2, 3, 4, 5, 6, 7, 0, 1, \
10, 11, 12, 13, 14, 15, 8, 9, \
@@ -225,8 +223,7 @@ static void next_addresses(block *address_block, block *input_block)
fill_block(zero2_block, address_block, address_block, 0);
}
void fill_segment_avx2(const argon2_instance_t *instance,
argon2_position_t position)
void xmrig_ar2_fill_segment_avx2(const argon2_instance_t *instance, argon2_position_t position)
{
block *ref_block = NULL, *curr_block = NULL;
block address_block, input_block;
@@ -310,8 +307,7 @@ void fill_segment_avx2(const argon2_instance_t *instance,
* lane.
*/
position.index = i;
ref_index = index_alpha(instance, &position, pseudo_rand & 0xFFFFFFFF,
ref_lane == position.lane);
ref_index = xmrig_ar2_index_alpha(instance, &position, pseudo_rand & 0xFFFFFFFF, ref_lane == position.lane);
/* 2 Creating a new block */
ref_block =
@@ -327,21 +323,13 @@ void fill_segment_avx2(const argon2_instance_t *instance,
}
}
int check_avx2(void)
{
return cpu_flags_have_avx2();
}
extern int cpu_flags_has_avx2(void);
int xmrig_ar2_check_avx2(void) { return cpu_flags_has_avx2(); }
#else
void fill_segment_avx2(const argon2_instance_t *instance,
argon2_position_t position)
{
}
int check_avx2(void)
{
return 0;
}
void xmrig_ar2_fill_segment_avx2(const argon2_instance_t *instance, argon2_position_t position) {}
int xmrig_ar2_check_avx2(void) { return 0; }
#endif

View File

@@ -3,9 +3,7 @@
#include "core.h"
void fill_segment_avx2(const argon2_instance_t *instance,
argon2_position_t position);
int check_avx2(void);
void xmrig_ar2_fill_segment_avx2(const argon2_instance_t *instance, argon2_position_t position);
int xmrig_ar2_check_avx2(void);
#endif // ARGON2_AVX2_H

View File

@@ -10,8 +10,6 @@
# include <intrin.h>
#endif
#include "cpu-flags.h"
#define ror64(x, n) _mm512_ror_epi64((x), (n))
static __m512i f(__m512i x, __m512i y)
@@ -210,8 +208,7 @@ static void next_addresses(block *address_block, block *input_block)
fill_block(zero2_block, address_block, address_block, 0);
}
void fill_segment_avx512f(const argon2_instance_t *instance,
argon2_position_t position)
void xmrig_ar2_fill_segment_avx512f(const argon2_instance_t *instance, argon2_position_t position)
{
block *ref_block = NULL, *curr_block = NULL;
block address_block, input_block;
@@ -295,8 +292,7 @@ void fill_segment_avx512f(const argon2_instance_t *instance,
* lane.
*/
position.index = i;
ref_index = index_alpha(instance, &position, pseudo_rand & 0xFFFFFFFF,
ref_lane == position.lane);
ref_index = xmrig_ar2_index_alpha(instance, &position, pseudo_rand & 0xFFFFFFFF, ref_lane == position.lane);
/* 2 Creating a new block */
ref_block =
@@ -312,21 +308,12 @@ void fill_segment_avx512f(const argon2_instance_t *instance,
}
}
int check_avx512f(void)
{
return cpu_flags_have_avx512f();
}
extern int cpu_flags_has_avx512f(void);
int xmrig_ar2_check_avx512f(void) { return cpu_flags_has_avx512f(); }
#else
void fill_segment_avx512f(const argon2_instance_t *instance,
argon2_position_t position)
{
}
int check_avx512f(void)
{
return 0;
}
void xmrig_ar2_fill_segment_avx512f(const argon2_instance_t *instance, argon2_position_t position) {}
int xmrig_ar2_check_avx512f(void) { return 0; }
#endif

View File

@@ -3,9 +3,7 @@
#include "core.h"
void fill_segment_avx512f(const argon2_instance_t *instance,
argon2_position_t position);
int check_avx512f(void);
void xmrig_ar2_fill_segment_avx512f(const argon2_instance_t *instance, argon2_position_t position);
int xmrig_ar2_check_avx512f(void);
#endif // ARGON2_AVX512F_H

View File

@@ -7,8 +7,6 @@
# include <intrin.h>
#endif
#include "cpu-flags.h"
#define ror64_16(x) \
_mm_shufflehi_epi16( \
_mm_shufflelo_epi16((x), _MM_SHUFFLE(0, 3, 2, 1)), \
@@ -102,27 +100,17 @@ static __m128i f(__m128i x, __m128i y)
#include "argon2-template-128.h"
void fill_segment_sse2(const argon2_instance_t *instance,
argon2_position_t position)
void xmrig_ar2_fill_segment_sse2(const argon2_instance_t *instance, argon2_position_t position)
{
fill_segment_128(instance, position);
}
int check_sse2(void)
{
return cpu_flags_have_sse2();
}
extern int cpu_flags_has_sse2(void);
int xmrig_ar2_check_sse2(void) { return cpu_flags_has_sse2(); }
#else
void fill_segment_sse2(const argon2_instance_t *instance,
argon2_position_t position)
{
}
int check_sse2(void)
{
return 0;
}
void xmrig_ar2_fill_segment_sse2(const argon2_instance_t *instance, argon2_position_t position) {}
int xmrig_ar2_check_sse2(void) { return 0; }
#endif

View File

@@ -3,9 +3,7 @@
#include "core.h"
void fill_segment_sse2(const argon2_instance_t *instance,
argon2_position_t position);
int check_sse2(void);
void xmrig_ar2_fill_segment_sse2(const argon2_instance_t *instance, argon2_position_t position);
int xmrig_ar2_check_sse2(void);
#endif // ARGON2_SSE2_H

View File

@@ -9,8 +9,6 @@
# include <intrin.h>
#endif
#include "cpu-flags.h"
#define r16 (_mm_setr_epi8( \
2, 3, 4, 5, 6, 7, 0, 1, \
10, 11, 12, 13, 14, 15, 8, 9))
@@ -114,27 +112,17 @@ static __m128i f(__m128i x, __m128i y)
#include "argon2-template-128.h"
void fill_segment_ssse3(const argon2_instance_t *instance,
argon2_position_t position)
void xmrig_ar2_fill_segment_ssse3(const argon2_instance_t *instance, argon2_position_t position)
{
fill_segment_128(instance, position);
}
int check_ssse3(void)
{
return cpu_flags_have_ssse3();
}
extern int cpu_flags_has_ssse3(void);
int xmrig_ar2_check_ssse3(void) { return cpu_flags_has_ssse3(); }
#else
void fill_segment_ssse3(const argon2_instance_t *instance,
argon2_position_t position)
{
}
int check_ssse3(void)
{
return 0;
}
void xmrig_ar2_fill_segment_ssse3(const argon2_instance_t *instance, argon2_position_t position) {}
int xmrig_ar2_check_ssse3(void) { return 0; }
#endif

View File

@@ -3,9 +3,7 @@
#include "core.h"
void fill_segment_ssse3(const argon2_instance_t *instance,
argon2_position_t position);
int check_ssse3(void);
void xmrig_ar2_fill_segment_ssse3(const argon2_instance_t *instance, argon2_position_t position);
int xmrig_ar2_check_ssse3(void);
#endif // ARGON2_SSSE3_H

View File

@@ -150,8 +150,7 @@ static void fill_segment_128(const argon2_instance_t *instance,
* lane.
*/
position.index = i;
ref_index = index_alpha(instance, &position, pseudo_rand & 0xFFFFFFFF,
ref_lane == position.lane);
ref_index = xmrig_ar2_index_alpha(instance, &position, pseudo_rand & 0xFFFFFFFF, ref_lane == position.lane);
/* 2 Creating a new block */
ref_block =

View File

@@ -9,8 +9,6 @@
# include <intrin.h>
#endif
#include "cpu-flags.h"
#define ror64(x, c) _mm_roti_epi64((x), -(c))
static __m128i f(__m128i x, __m128i y)
@@ -102,27 +100,17 @@ static __m128i f(__m128i x, __m128i y)
#include "argon2-template-128.h"
void fill_segment_xop(const argon2_instance_t *instance,
argon2_position_t position)
void xmrig_ar2_fill_segment_xop(const argon2_instance_t *instance, argon2_position_t position)
{
fill_segment_128(instance, position);
}
int check_xop(void)
{
return cpu_flags_have_xop();
}
extern int cpu_flags_has_xop(void);
int xmrig_ar2_check_xop(void) { return cpu_flags_has_xop(); }
#else
void fill_segment_xop(const argon2_instance_t *instance,
argon2_position_t position)
{
}
int check_xop(void)
{
return 0;
}
void xmrig_ar2_fill_segment_xop(const argon2_instance_t *instance, argon2_position_t position) {}
int xmrig_ar2_check_xop(void) { return 0; }
#endif

View File

@@ -3,9 +3,7 @@
#include "core.h"
void fill_segment_xop(const argon2_instance_t *instance,
argon2_position_t position);
int check_xop(void);
void xmrig_ar2_fill_segment_xop(const argon2_instance_t *instance, argon2_position_t position);
int xmrig_ar2_check_xop(void);
#endif // ARGON2_XOP_H

View File

@@ -1,129 +0,0 @@
#include <stdbool.h>
#include <stdint.h>
#include "cpu-flags.h"
#include <stdio.h>
#ifdef _MSC_VER
# include <intrin.h>
#else
# include <cpuid.h>
#endif
#ifndef bit_OSXSAVE
# define bit_OSXSAVE (1 << 27)
#endif
#ifndef bit_SSE2
# define bit_SSE2 (1 << 26)
#endif
#ifndef bit_SSSE3
# define bit_SSSE3 (1 << 9)
#endif
#ifndef bit_AVX2
# define bit_AVX2 (1 << 5)
#endif
#ifndef bit_AVX512F
# define bit_AVX512F (1 << 16)
#endif
#ifndef bit_XOP
# define bit_XOP (1 << 11)
#endif
#define PROCESSOR_INFO (1)
#define EXTENDED_FEATURES (7)
#define EAX_Reg (0)
#define EBX_Reg (1)
#define ECX_Reg (2)
#define EDX_Reg (3)
enum {
X86_64_FEATURE_SSE2 = (1 << 0),
X86_64_FEATURE_SSSE3 = (1 << 1),
X86_64_FEATURE_XOP = (1 << 2),
X86_64_FEATURE_AVX2 = (1 << 3),
X86_64_FEATURE_AVX512F = (1 << 4),
};
static unsigned int cpu_flags;
static inline void cpuid(uint32_t level, int32_t output[4])
{
# ifdef _MSC_VER
__cpuid(output, (int) level);
# else
__cpuid_count(level, 0, output[0], output[1], output[2], output[3]);
# endif
}
static bool has_feature(uint32_t level, uint32_t reg, int32_t bit)
{
int32_t cpu_info[4] = { 0 };
cpuid(level, cpu_info);
return (cpu_info[reg] & bit) != 0;
}
void cpu_flags_get(void)
{
if (has_feature(PROCESSOR_INFO, EDX_Reg, bit_SSE2)) {
cpu_flags |= X86_64_FEATURE_SSE2;
}
if (has_feature(PROCESSOR_INFO, ECX_Reg, bit_SSSE3)) {
cpu_flags |= X86_64_FEATURE_SSSE3;
}
if (!has_feature(PROCESSOR_INFO, ECX_Reg, bit_OSXSAVE)) {
return;
}
if (has_feature(EXTENDED_FEATURES, EBX_Reg, bit_AVX2)) {
cpu_flags |= X86_64_FEATURE_AVX2;
}
if (has_feature(EXTENDED_FEATURES, EBX_Reg, bit_AVX512F)) {
cpu_flags |= X86_64_FEATURE_AVX512F;
}
if (has_feature(0x80000001, ECX_Reg, bit_XOP)) {
cpu_flags |= X86_64_FEATURE_XOP;
}
}
int cpu_flags_have_sse2(void)
{
return cpu_flags & X86_64_FEATURE_SSE2;
}
int cpu_flags_have_ssse3(void)
{
return cpu_flags & X86_64_FEATURE_SSSE3;
}
int cpu_flags_have_xop(void)
{
return cpu_flags & X86_64_FEATURE_XOP;
}
int cpu_flags_have_avx2(void)
{
return cpu_flags & X86_64_FEATURE_AVX2;
}
int cpu_flags_have_avx512f(void)
{
return cpu_flags & X86_64_FEATURE_AVX512F;
}

View File

@@ -1,12 +0,0 @@
#ifndef ARGON2_CPU_FLAGS_H
#define ARGON2_CPU_FLAGS_H
void cpu_flags_get(void);
int cpu_flags_have_sse2(void);
int cpu_flags_have_ssse3(void);
int cpu_flags_have_xop(void);
int cpu_flags_have_avx2(void);
int cpu_flags_have_avx512f(void);
#endif // ARGON2_CPU_FLAGS_H

View File

@@ -174,8 +174,7 @@ static void fill_segment_64(const argon2_instance_t *instance,
* lane.
*/
position.index = i;
ref_index = index_alpha(instance, &position, pseudo_rand & 0xFFFFFFFF,
ref_lane == position.lane);
ref_index = xmrig_ar2_index_alpha(instance, &position, pseudo_rand & 0xFFFFFFFF, ref_lane == position.lane);
/* 2 Creating a new block */
ref_block =

View File

@@ -15,7 +15,7 @@
#include <stdlib.h>
#include <stdio.h>
#include "argon2.h"
#include "3rdparty/argon2.h"
#include "encoding.h"
#include "core.h"
@@ -57,7 +57,7 @@ size_t argon2_memory_size(uint32_t m_cost, uint32_t parallelism) {
int argon2_ctx_mem(argon2_context *context, argon2_type type, void *memory,
size_t memory_size) {
/* 1. Validate all inputs */
int result = validate_inputs(context);
int result = xmrig_ar2_validate_inputs(context);
uint32_t memory_blocks, segment_length;
argon2_instance_t instance;
@@ -98,20 +98,20 @@ int argon2_ctx_mem(argon2_context *context, argon2_type type, void *memory,
/* 3. Initialization: Hashing inputs, allocating memory, filling first
* blocks
*/
result = initialize(&instance, context);
result = xmrig_ar2_initialize(&instance, context);
if (ARGON2_OK != result) {
return result;
}
/* 4. Filling memory */
result = fill_memory_blocks(&instance);
result = xmrig_ar2_fill_memory_blocks(&instance);
if (ARGON2_OK != result) {
return result;
}
/* 5. Finalization */
finalize(context, &instance);
xmrig_ar2_finalize(context, &instance);
return ARGON2_OK;
}
@@ -174,7 +174,7 @@ int argon2_hash(const uint32_t t_cost, const uint32_t m_cost,
result = argon2_ctx(&context, type);
if (result != ARGON2_OK) {
clear_internal_memory(out, hashlen);
xmrig_ar2_clear_internal_memory(out, hashlen);
free(out);
return result;
}
@@ -187,13 +187,13 @@ int argon2_hash(const uint32_t t_cost, const uint32_t m_cost,
/* if encoding requested, write it */
if (encoded && encodedlen) {
if (encode_string(encoded, encodedlen, &context, type) != ARGON2_OK) {
clear_internal_memory(out, hashlen); /* wipe buffers if error */
clear_internal_memory(encoded, encodedlen);
xmrig_ar2_clear_internal_memory(out, hashlen); /* wipe buffers if error */
xmrig_ar2_clear_internal_memory(encoded, encodedlen);
free(out);
return ARGON2_ENCODING_FAIL;
}
}
clear_internal_memory(out, hashlen);
xmrig_ar2_clear_internal_memory(out, hashlen);
free(out);
return ARGON2_OK;

View File

@@ -128,14 +128,14 @@ static void blake2b_init_state(blake2b_state *S)
S->buflen = 0;
}
void blake2b_init(blake2b_state *S, size_t outlen)
void xmrig_ar2_blake2b_init(blake2b_state *S, size_t outlen)
{
blake2b_init_state(S);
/* XOR initial state with param block: */
S->h[0] ^= (uint64_t)outlen | (UINT64_C(1) << 16) | (UINT64_C(1) << 24);
}
void blake2b_update(blake2b_state *S, const void *in, size_t inlen)
void xmrig_ar2_blake2b_update(blake2b_state *S, const void *in, size_t inlen)
{
const uint8_t *pin = (const uint8_t *)in;
@@ -160,7 +160,7 @@ void blake2b_update(blake2b_state *S, const void *in, size_t inlen)
S->buflen += inlen;
}
void blake2b_final(blake2b_state *S, void *out, size_t outlen)
void xmrig_ar2_blake2b_final(blake2b_state *S, void *out, size_t outlen)
{
uint8_t buffer[BLAKE2B_OUTBYTES] = {0};
unsigned int i;
@@ -174,12 +174,12 @@ void blake2b_final(blake2b_state *S, void *out, size_t outlen)
}
memcpy(out, buffer, outlen);
clear_internal_memory(buffer, sizeof(buffer));
clear_internal_memory(S->buf, sizeof(S->buf));
clear_internal_memory(S->h, sizeof(S->h));
xmrig_ar2_clear_internal_memory(buffer, sizeof(buffer));
xmrig_ar2_clear_internal_memory(S->buf, sizeof(S->buf));
xmrig_ar2_clear_internal_memory(S->h, sizeof(S->h));
}
void blake2b_long(void *out, size_t outlen, const void *in, size_t inlen)
void xmrig_ar2_blake2b_long(void *out, size_t outlen, const void *in, size_t inlen)
{
uint8_t *pout = (uint8_t *)out;
blake2b_state blake_state;
@@ -187,39 +187,39 @@ void blake2b_long(void *out, size_t outlen, const void *in, size_t inlen)
store32(outlen_bytes, (uint32_t)outlen);
if (outlen <= BLAKE2B_OUTBYTES) {
blake2b_init(&blake_state, outlen);
blake2b_update(&blake_state, outlen_bytes, sizeof(outlen_bytes));
blake2b_update(&blake_state, in, inlen);
blake2b_final(&blake_state, pout, outlen);
xmrig_ar2_blake2b_init(&blake_state, outlen);
xmrig_ar2_blake2b_update(&blake_state, outlen_bytes, sizeof(outlen_bytes));
xmrig_ar2_blake2b_update(&blake_state, in, inlen);
xmrig_ar2_blake2b_final(&blake_state, pout, outlen);
} else {
uint32_t toproduce;
uint8_t out_buffer[BLAKE2B_OUTBYTES];
blake2b_init(&blake_state, BLAKE2B_OUTBYTES);
blake2b_update(&blake_state, outlen_bytes, sizeof(outlen_bytes));
blake2b_update(&blake_state, in, inlen);
blake2b_final(&blake_state, out_buffer, BLAKE2B_OUTBYTES);
xmrig_ar2_blake2b_init(&blake_state, BLAKE2B_OUTBYTES);
xmrig_ar2_blake2b_update(&blake_state, outlen_bytes, sizeof(outlen_bytes));
xmrig_ar2_blake2b_update(&blake_state, in, inlen);
xmrig_ar2_blake2b_final(&blake_state, out_buffer, BLAKE2B_OUTBYTES);
memcpy(pout, out_buffer, BLAKE2B_OUTBYTES / 2);
pout += BLAKE2B_OUTBYTES / 2;
toproduce = (uint32_t)outlen - BLAKE2B_OUTBYTES / 2;
while (toproduce > BLAKE2B_OUTBYTES) {
blake2b_init(&blake_state, BLAKE2B_OUTBYTES);
blake2b_update(&blake_state, out_buffer, BLAKE2B_OUTBYTES);
blake2b_final(&blake_state, out_buffer, BLAKE2B_OUTBYTES);
xmrig_ar2_blake2b_init(&blake_state, BLAKE2B_OUTBYTES);
xmrig_ar2_blake2b_update(&blake_state, out_buffer, BLAKE2B_OUTBYTES);
xmrig_ar2_blake2b_final(&blake_state, out_buffer, BLAKE2B_OUTBYTES);
memcpy(pout, out_buffer, BLAKE2B_OUTBYTES / 2);
pout += BLAKE2B_OUTBYTES / 2;
toproduce -= BLAKE2B_OUTBYTES / 2;
}
blake2b_init(&blake_state, toproduce);
blake2b_update(&blake_state, out_buffer, BLAKE2B_OUTBYTES);
blake2b_final(&blake_state, out_buffer, toproduce);
xmrig_ar2_blake2b_init(&blake_state, toproduce);
xmrig_ar2_blake2b_update(&blake_state, out_buffer, BLAKE2B_OUTBYTES);
xmrig_ar2_blake2b_final(&blake_state, out_buffer, toproduce);
memcpy(pout, out_buffer, toproduce);
clear_internal_memory(out_buffer, sizeof(out_buffer));
xmrig_ar2_clear_internal_memory(out_buffer, sizeof(out_buffer));
}
}

View File

@@ -20,11 +20,11 @@ typedef struct __blake2b_state {
} blake2b_state;
/* Streaming API */
void blake2b_init(blake2b_state *S, size_t outlen);
void blake2b_update(blake2b_state *S, const void *in, size_t inlen);
void blake2b_final(blake2b_state *S, void *out, size_t outlen);
void xmrig_ar2_blake2b_init(blake2b_state *S, size_t outlen);
void xmrig_ar2_blake2b_update(blake2b_state *S, const void *in, size_t inlen);
void xmrig_ar2_blake2b_final(blake2b_state *S, void *out, size_t outlen);
void blake2b_long(void *out, size_t outlen, const void *in, size_t inlen);
void xmrig_ar2_blake2b_long(void *out, size_t outlen, const void *in, size_t inlen);
#endif // ARGON2_BLAKE2_H

View File

@@ -77,8 +77,7 @@ static void store_block(void *output, const block *src) {
/***************Memory functions*****************/
int allocate_memory(const argon2_context *context,
argon2_instance_t *instance) {
int xmrig_ar2_allocate_memory(const argon2_context *context, argon2_instance_t *instance) {
size_t blocks = instance->memory_blocks;
size_t memory_size = blocks * ARGON2_BLOCK_SIZE;
@@ -107,11 +106,10 @@ int allocate_memory(const argon2_context *context,
return ARGON2_OK;
}
void free_memory(const argon2_context *context,
const argon2_instance_t *instance) {
void xmrig_ar2_free_memory(const argon2_context *context, const argon2_instance_t *instance) {
size_t memory_size = instance->memory_blocks * ARGON2_BLOCK_SIZE;
clear_internal_memory(instance->memory, memory_size);
xmrig_ar2_clear_internal_memory(instance->memory, memory_size);
if (instance->keep_memory) {
/* user-supplied memory -- do not free */
@@ -125,7 +123,7 @@ void free_memory(const argon2_context *context,
}
}
void NOT_OPTIMIZED secure_wipe_memory(void *v, size_t n) {
void NOT_OPTIMIZED xmrig_ar2_secure_wipe_memory(void *v, size_t n) {
#if defined(_MSC_VER) && VC_GE_2005(_MSC_VER)
SecureZeroMemory(v, n);
#elif defined memset_s
@@ -140,14 +138,14 @@ void NOT_OPTIMIZED secure_wipe_memory(void *v, size_t n) {
/* Memory clear flag defaults to true. */
int FLAG_clear_internal_memory = 0;
void clear_internal_memory(void *v, size_t n) {
void xmrig_ar2_clear_internal_memory(void *v, size_t n) {
if (FLAG_clear_internal_memory && v) {
secure_wipe_memory(v, n);
xmrig_ar2_secure_wipe_memory(v, n);
}
}
void finalize(const argon2_context *context, argon2_instance_t *instance) {
if (context != NULL && instance != NULL) {
void xmrig_ar2_finalize(const argon2_context *context, argon2_instance_t *instance) {
if (context != NULL && instance != NULL && context->out != NULL) {
block blockhash;
uint32_t l;
@@ -164,24 +162,21 @@ void finalize(const argon2_context *context, argon2_instance_t *instance) {
{
uint8_t blockhash_bytes[ARGON2_BLOCK_SIZE];
store_block(blockhash_bytes, &blockhash);
blake2b_long(context->out, context->outlen, blockhash_bytes,
ARGON2_BLOCK_SIZE);
xmrig_ar2_blake2b_long(context->out, context->outlen, blockhash_bytes, ARGON2_BLOCK_SIZE);
/* clear blockhash and blockhash_bytes */
clear_internal_memory(blockhash.v, ARGON2_BLOCK_SIZE);
clear_internal_memory(blockhash_bytes, ARGON2_BLOCK_SIZE);
xmrig_ar2_clear_internal_memory(blockhash.v, ARGON2_BLOCK_SIZE);
xmrig_ar2_clear_internal_memory(blockhash_bytes, ARGON2_BLOCK_SIZE);
}
if (instance->print_internals) {
print_tag(context->out, context->outlen);
}
free_memory(context, instance);
xmrig_ar2_free_memory(context, instance);
}
}
uint32_t index_alpha(const argon2_instance_t *instance,
const argon2_position_t *position, uint32_t pseudo_rand,
int same_lane) {
uint32_t xmrig_ar2_index_alpha(const argon2_instance_t *instance, const argon2_position_t *position, uint32_t pseudo_rand, int same_lane) {
/*
* Pass 0:
* This lane : all already finished segments plus already constructed
@@ -257,7 +252,7 @@ static int fill_memory_blocks_st(argon2_instance_t *instance) {
for (s = 0; s < ARGON2_SYNC_POINTS; ++s) {
for (l = 0; l < instance->lanes; ++l) {
argon2_position_t position = { r, l, (uint8_t)s, 0 };
fill_segment(instance, position);
xmrig_ar2_fill_segment(instance, position);
}
}
@@ -268,7 +263,7 @@ static int fill_memory_blocks_st(argon2_instance_t *instance) {
return ARGON2_OK;
}
int fill_memory_blocks(argon2_instance_t *instance) {
int xmrig_ar2_fill_memory_blocks(argon2_instance_t *instance) {
if (instance == NULL || instance->lanes == 0) {
return ARGON2_INCORRECT_PARAMETER;
}
@@ -276,19 +271,19 @@ int fill_memory_blocks(argon2_instance_t *instance) {
return fill_memory_blocks_st(instance);
}
int validate_inputs(const argon2_context *context) {
int xmrig_ar2_validate_inputs(const argon2_context *context) {
if (NULL == context) {
return ARGON2_INCORRECT_PARAMETER;
}
if (NULL == context->out) {
return ARGON2_OUTPUT_PTR_NULL;
}
//if (NULL == context->out) {
// return ARGON2_OUTPUT_PTR_NULL;
//}
/* Validate output length */
if (ARGON2_MIN_OUTLEN > context->outlen) {
return ARGON2_OUTPUT_TOO_SHORT;
}
//if (ARGON2_MIN_OUTLEN > context->outlen) {
// return ARGON2_OUTPUT_TOO_SHORT;
//}
if (ARGON2_MAX_OUTLEN < context->outlen) {
return ARGON2_OUTPUT_TOO_LONG;
@@ -403,7 +398,7 @@ int validate_inputs(const argon2_context *context) {
return ARGON2_OK;
}
void fill_first_blocks(uint8_t *blockhash, const argon2_instance_t *instance) {
void xmrig_ar2_fill_first_blocks(uint8_t *blockhash, const argon2_instance_t *instance) {
uint32_t l;
/* Make the first and second block in each lane as G(H0||0||i) or
G(H0||1||i) */
@@ -412,21 +407,17 @@ void fill_first_blocks(uint8_t *blockhash, const argon2_instance_t *instance) {
store32(blockhash + ARGON2_PREHASH_DIGEST_LENGTH, 0);
store32(blockhash + ARGON2_PREHASH_DIGEST_LENGTH + 4, l);
blake2b_long(blockhash_bytes, ARGON2_BLOCK_SIZE, blockhash,
ARGON2_PREHASH_SEED_LENGTH);
load_block(&instance->memory[l * instance->lane_length + 0],
blockhash_bytes);
xmrig_ar2_blake2b_long(blockhash_bytes, ARGON2_BLOCK_SIZE, blockhash, ARGON2_PREHASH_SEED_LENGTH);
load_block(&instance->memory[l * instance->lane_length + 0], blockhash_bytes);
store32(blockhash + ARGON2_PREHASH_DIGEST_LENGTH, 1);
blake2b_long(blockhash_bytes, ARGON2_BLOCK_SIZE, blockhash,
ARGON2_PREHASH_SEED_LENGTH);
load_block(&instance->memory[l * instance->lane_length + 1],
blockhash_bytes);
xmrig_ar2_blake2b_long(blockhash_bytes, ARGON2_BLOCK_SIZE, blockhash, ARGON2_PREHASH_SEED_LENGTH);
load_block(&instance->memory[l * instance->lane_length + 1], blockhash_bytes);
}
clear_internal_memory(blockhash_bytes, ARGON2_BLOCK_SIZE);
xmrig_ar2_clear_internal_memory(blockhash_bytes, ARGON2_BLOCK_SIZE);
}
void initial_hash(uint8_t *blockhash, argon2_context *context,
void xmrig_ar2_initial_hash(uint8_t *blockhash, argon2_context *context,
argon2_type type) {
blake2b_state BlakeHash;
uint8_t value[sizeof(uint32_t)];
@@ -435,72 +426,70 @@ void initial_hash(uint8_t *blockhash, argon2_context *context,
return;
}
blake2b_init(&BlakeHash, ARGON2_PREHASH_DIGEST_LENGTH);
xmrig_ar2_blake2b_init(&BlakeHash, ARGON2_PREHASH_DIGEST_LENGTH);
store32(&value, context->lanes);
blake2b_update(&BlakeHash, (const uint8_t *)&value, sizeof(value));
xmrig_ar2_blake2b_update(&BlakeHash, (const uint8_t *)&value, sizeof(value));
store32(&value, context->outlen);
blake2b_update(&BlakeHash, (const uint8_t *)&value, sizeof(value));
xmrig_ar2_blake2b_update(&BlakeHash, (const uint8_t *)&value, sizeof(value));
store32(&value, context->m_cost);
blake2b_update(&BlakeHash, (const uint8_t *)&value, sizeof(value));
xmrig_ar2_blake2b_update(&BlakeHash, (const uint8_t *)&value, sizeof(value));
store32(&value, context->t_cost);
blake2b_update(&BlakeHash, (const uint8_t *)&value, sizeof(value));
xmrig_ar2_blake2b_update(&BlakeHash, (const uint8_t *)&value, sizeof(value));
store32(&value, context->version);
blake2b_update(&BlakeHash, (const uint8_t *)&value, sizeof(value));
xmrig_ar2_blake2b_update(&BlakeHash, (const uint8_t *)&value, sizeof(value));
store32(&value, (uint32_t)type);
blake2b_update(&BlakeHash, (const uint8_t *)&value, sizeof(value));
xmrig_ar2_blake2b_update(&BlakeHash, (const uint8_t *)&value, sizeof(value));
store32(&value, context->pwdlen);
blake2b_update(&BlakeHash, (const uint8_t *)&value, sizeof(value));
xmrig_ar2_blake2b_update(&BlakeHash, (const uint8_t *)&value, sizeof(value));
if (context->pwd != NULL) {
blake2b_update(&BlakeHash, (const uint8_t *)context->pwd,
xmrig_ar2_blake2b_update(&BlakeHash, (const uint8_t *)context->pwd,
context->pwdlen);
if (context->flags & ARGON2_FLAG_CLEAR_PASSWORD) {
secure_wipe_memory(context->pwd, context->pwdlen);
xmrig_ar2_secure_wipe_memory(context->pwd, context->pwdlen);
context->pwdlen = 0;
}
}
store32(&value, context->saltlen);
blake2b_update(&BlakeHash, (const uint8_t *)&value, sizeof(value));
xmrig_ar2_blake2b_update(&BlakeHash, (const uint8_t *)&value, sizeof(value));
if (context->salt != NULL) {
blake2b_update(&BlakeHash, (const uint8_t *)context->salt,
xmrig_ar2_blake2b_update(&BlakeHash, (const uint8_t *)context->salt,
context->saltlen);
}
store32(&value, context->secretlen);
blake2b_update(&BlakeHash, (const uint8_t *)&value, sizeof(value));
xmrig_ar2_blake2b_update(&BlakeHash, (const uint8_t *)&value, sizeof(value));
if (context->secret != NULL) {
blake2b_update(&BlakeHash, (const uint8_t *)context->secret,
context->secretlen);
xmrig_ar2_blake2b_update(&BlakeHash, (const uint8_t *)context->secret, context->secretlen);
if (context->flags & ARGON2_FLAG_CLEAR_SECRET) {
secure_wipe_memory(context->secret, context->secretlen);
xmrig_ar2_secure_wipe_memory(context->secret, context->secretlen);
context->secretlen = 0;
}
}
store32(&value, context->adlen);
blake2b_update(&BlakeHash, (const uint8_t *)&value, sizeof(value));
xmrig_ar2_blake2b_update(&BlakeHash, (const uint8_t *)&value, sizeof(value));
if (context->ad != NULL) {
blake2b_update(&BlakeHash, (const uint8_t *)context->ad,
context->adlen);
xmrig_ar2_blake2b_update(&BlakeHash, (const uint8_t *)context->ad, context->adlen);
}
blake2b_final(&BlakeHash, blockhash, ARGON2_PREHASH_DIGEST_LENGTH);
xmrig_ar2_blake2b_final(&BlakeHash, blockhash, ARGON2_PREHASH_DIGEST_LENGTH);
}
int initialize(argon2_instance_t *instance, argon2_context *context) {
int xmrig_ar2_initialize(argon2_instance_t *instance, argon2_context *context) {
uint8_t blockhash[ARGON2_PREHASH_SEED_LENGTH];
int result = ARGON2_OK;
@@ -510,7 +499,7 @@ int initialize(argon2_instance_t *instance, argon2_context *context) {
/* 1. Memory allocation */
result = allocate_memory(context, instance);
result = xmrig_ar2_allocate_memory(context, instance);
if (result != ARGON2_OK) {
return result;
}
@@ -519,11 +508,9 @@ int initialize(argon2_instance_t *instance, argon2_context *context) {
/* H_0 + 8 extra bytes to produce the first blocks */
/* uint8_t blockhash[ARGON2_PREHASH_SEED_LENGTH]; */
/* Hashing all inputs */
initial_hash(blockhash, context, instance->type);
xmrig_ar2_initial_hash(blockhash, context, instance->type);
/* Zeroing 8 extra bytes */
clear_internal_memory(blockhash + ARGON2_PREHASH_DIGEST_LENGTH,
ARGON2_PREHASH_SEED_LENGTH -
ARGON2_PREHASH_DIGEST_LENGTH);
xmrig_ar2_clear_internal_memory(blockhash + ARGON2_PREHASH_DIGEST_LENGTH, ARGON2_PREHASH_SEED_LENGTH - ARGON2_PREHASH_DIGEST_LENGTH);
if (instance->print_internals) {
initial_kat(blockhash, context, instance->type);
@@ -531,9 +518,9 @@ int initialize(argon2_instance_t *instance, argon2_context *context) {
/* 3. Creating first blocks, we always have at least two blocks in a slice
*/
fill_first_blocks(blockhash, instance);
xmrig_ar2_fill_first_blocks(blockhash, instance);
/* Clearing the hash */
clear_internal_memory(blockhash, ARGON2_PREHASH_SEED_LENGTH);
xmrig_ar2_clear_internal_memory(blockhash, ARGON2_PREHASH_SEED_LENGTH);
return ARGON2_OK;
}

View File

@@ -14,7 +14,7 @@
#ifndef ARGON2_CORE_H
#define ARGON2_CORE_H
#include "argon2.h"
#include "3rdparty/argon2.h"
#if defined(_MSC_VER)
#define ALIGN(n) __declspec(align(16))
@@ -110,8 +110,7 @@ typedef struct Argon2_thread_data {
* @param instance the Argon2 instance
* @return ARGON2_OK if memory is allocated successfully
*/
int allocate_memory(const argon2_context *context,
argon2_instance_t *instance);
int xmrig_ar2_allocate_memory(const argon2_context *context, argon2_instance_t *instance);
/*
* Frees memory at the given pointer, uses the appropriate deallocator as
@@ -119,22 +118,21 @@ int allocate_memory(const argon2_context *context,
* @param context argon2_context which specifies the deallocator
* @param instance the Argon2 instance
*/
void free_memory(const argon2_context *context,
const argon2_instance_t *instance);
void xmrig_ar2_free_memory(const argon2_context *context, const argon2_instance_t *instance);
/* Function that securely cleans the memory. This ignores any flags set
* regarding clearing memory. Usually one just calls clear_internal_memory.
* @param mem Pointer to the memory
* @param s Memory size in bytes
*/
void secure_wipe_memory(void *v, size_t n);
void xmrig_ar2_secure_wipe_memory(void *v, size_t n);
/* Function that securely clears the memory if FLAG_clear_internal_memory is
* set. If the flag isn't set, this function does nothing.
* @param mem Pointer to the memory
* @param s Memory size in bytes
*/
ARGON2_PUBLIC void clear_internal_memory(void *v, size_t n);
ARGON2_PUBLIC void xmrig_ar2_clear_internal_memory(void *v, size_t n);
/*
* Computes absolute position of reference block in the lane following a skewed
@@ -146,9 +144,7 @@ ARGON2_PUBLIC void clear_internal_memory(void *v, size_t n);
* If so we can reference the current segment
* @pre All pointers must be valid
*/
uint32_t index_alpha(const argon2_instance_t *instance,
const argon2_position_t *position, uint32_t pseudo_rand,
int same_lane);
uint32_t xmrig_ar2_index_alpha(const argon2_instance_t *instance, const argon2_position_t *position, uint32_t pseudo_rand, int same_lane);
/*
* Function that validates all inputs against predefined restrictions and return
@@ -157,7 +153,7 @@ uint32_t index_alpha(const argon2_instance_t *instance,
* @return ARGON2_OK if everything is all right, otherwise one of error codes
* (all defined in <argon2.h>
*/
int validate_inputs(const argon2_context *context);
int xmrig_ar2_validate_inputs(const argon2_context *context);
/*
* Hashes all the inputs into @a blockhash[PREHASH_DIGEST_LENGTH], clears
@@ -169,8 +165,7 @@ int validate_inputs(const argon2_context *context);
* @pre @a blockhash must have at least @a PREHASH_DIGEST_LENGTH bytes
* allocated
*/
void initial_hash(uint8_t *blockhash, argon2_context *context,
argon2_type type);
void xmrig_ar2_initial_hash(uint8_t *blockhash, argon2_context *context, argon2_type type);
/*
* Function creates first 2 blocks per lane
@@ -178,7 +173,7 @@ void initial_hash(uint8_t *blockhash, argon2_context *context,
* @param blockhash Pointer to the pre-hashing digest
* @pre blockhash must point to @a PREHASH_SEED_LENGTH allocated values
*/
void fill_first_blocks(uint8_t *blockhash, const argon2_instance_t *instance);
void xmrig_ar2_fill_first_blocks(uint8_t *blockhash, const argon2_instance_t *instance);
/*
* Function allocates memory, hashes the inputs with Blake, and creates first
@@ -190,7 +185,7 @@ void fill_first_blocks(uint8_t *blockhash, const argon2_instance_t *instance);
* @return Zero if successful, -1 if memory failed to allocate. @context->state
* will be modified if successful.
*/
int initialize(argon2_instance_t *instance, argon2_context *context);
int xmrig_ar2_initialize(argon2_instance_t *instance, argon2_context *context);
/*
* XORing the last block of each lane, hashing it, making the tag. Deallocates
@@ -203,7 +198,7 @@ int initialize(argon2_instance_t *instance, argon2_context *context);
* @pre if context->free_cbk is not NULL, it should point to a function that
* deallocates memory
*/
void finalize(const argon2_context *context, argon2_instance_t *instance);
void xmrig_ar2_finalize(const argon2_context *context, argon2_instance_t *instance);
/*
* Function that fills the segment using previous segments also from other
@@ -212,8 +207,7 @@ void finalize(const argon2_context *context, argon2_instance_t *instance);
* @param position Current position
* @pre all block pointers must be valid
*/
void fill_segment(const argon2_instance_t *instance,
argon2_position_t position);
void xmrig_ar2_fill_segment(const argon2_instance_t *instance, argon2_position_t position);
/*
* Function that fills the entire memory t_cost times based on the first two
@@ -221,6 +215,6 @@ void fill_segment(const argon2_instance_t *instance,
* @param instance Pointer to the current instance
* @return ARGON2_OK if successful, @context->state
*/
int fill_memory_blocks(argon2_instance_t *instance);
int xmrig_ar2_fill_memory_blocks(argon2_instance_t *instance);
#endif

View File

@@ -323,7 +323,7 @@ int decode_string(argon2_context *ctx, const char *str, argon2_type type) {
ctx->flags = ARGON2_DEFAULT_FLAGS;
/* On return, must have valid context */
validation_result = validate_inputs(ctx);
validation_result = xmrig_ar2_validate_inputs(ctx);
if (validation_result != ARGON2_OK) {
return validation_result;
}
@@ -371,7 +371,7 @@ int encode_string(char *dst, size_t dst_len, argon2_context *ctx,
} while ((void)0, 0)
const char* type_string = argon2_type2string(type, 0);
int validation_result = validate_inputs(ctx);
int validation_result = xmrig_ar2_validate_inputs(ctx);
if (!type_string) {
return ARGON2_ENCODING_FAIL;

View File

@@ -1,6 +1,6 @@
#ifndef ENCODING_H
#define ENCODING_H
#include "argon2.h"
#include "3rdparty/argon2.h"
#define ARGON2_MAX_DECODED_LANES UINT32_C(255)
#define ARGON2_MIN_DECODED_SALT_LEN UINT32_C(8)

View File

@@ -2,79 +2,81 @@
#include <string.h>
#include "impl-select.h"
#include "3rdparty/argon2.h"
#include "argon2.h"
#define BENCH_SAMPLES 1024
extern uint64_t uv_hrtime(void);
#define BENCH_SAMPLES 1024U
#define BENCH_MEM_BLOCKS 512
static argon2_impl selected_argon_impl = {
"default", NULL, fill_segment_default
};
#ifdef _MSC_VER
# define strcasecmp _stricmp
#endif
static argon2_impl selected_argon_impl = { "default", NULL, fill_segment_default };
/* the benchmark routine is not thread-safe, so we can use a global var here: */
static block memory[BENCH_MEM_BLOCKS];
static uint64_t benchmark_impl(const argon2_impl *impl) {
clock_t time;
unsigned int i;
uint64_t bench;
argon2_instance_t instance;
argon2_position_t pos;
static uint64_t benchmark_impl(const argon2_impl *impl) {
memset(memory, 0, sizeof(memory));
instance.version = ARGON2_VERSION_NUMBER;
instance.memory = memory;
instance.passes = 1;
instance.memory_blocks = BENCH_MEM_BLOCKS;
argon2_instance_t instance;
instance.version = ARGON2_VERSION_NUMBER;
instance.memory = memory;
instance.passes = 1;
instance.memory_blocks = BENCH_MEM_BLOCKS;
instance.segment_length = BENCH_MEM_BLOCKS / ARGON2_SYNC_POINTS;
instance.lane_length = instance.segment_length * ARGON2_SYNC_POINTS;
instance.lanes = 1;
instance.threads = 1;
instance.type = Argon2_i;
instance.lane_length = instance.segment_length * ARGON2_SYNC_POINTS;
instance.lanes = 1;
instance.threads = 1;
instance.type = Argon2_id;
pos.lane = 0;
pos.pass = 0;
pos.slice = 0;
pos.index = 0;
argon2_position_t pos;
pos.lane = 0;
pos.pass = 0;
pos.slice = 0;
pos.index = 0;
/* warm-up cache: */
impl->fill_segment(&instance, pos);
/* OK, now measure: */
bench = 0;
time = clock();
for (i = 0; i < BENCH_SAMPLES; i++) {
const uint64_t time = uv_hrtime();
for (uint32_t i = 0; i < BENCH_SAMPLES; i++) {
impl->fill_segment(&instance, pos);
}
time = clock() - time;
bench = (uint64_t)time;
return bench;
return uv_hrtime() - time;
}
void argon2_select_impl()
{
argon2_impl_list impls;
unsigned int i;
const argon2_impl *best_impl = NULL;
uint64_t best_bench = UINT_MAX;
argon2_get_impl_list(&impls);
for (i = 0; i < impls.count; i++) {
for (uint32_t i = 0; i < impls.count; i++) {
const argon2_impl *impl = &impls.entries[i];
uint64_t bench;
if (impl->check != NULL && !impl->check()) {
continue;
}
bench = benchmark_impl(impl);
const uint64_t bench = benchmark_impl(impl);
if (bench < best_bench) {
best_bench = bench;
best_impl = impl;
best_impl = impl;
}
}
@@ -83,11 +85,13 @@ void argon2_select_impl()
}
}
void fill_segment(const argon2_instance_t *instance, argon2_position_t position)
void xmrig_ar2_fill_segment(const argon2_instance_t *instance, argon2_position_t position)
{
selected_argon_impl.fill_segment(instance, position);
}
const char *argon2_get_impl_name()
{
return selected_argon_impl.name;
@@ -97,14 +101,12 @@ const char *argon2_get_impl_name()
int argon2_select_impl_by_name(const char *name)
{
argon2_impl_list impls;
unsigned int i;
argon2_get_impl_list(&impls);
for (i = 0; i < impls.count; i++) {
for (uint32_t i = 0; i < impls.count; i++) {
const argon2_impl *impl = &impls.entries[i];
if (strcmp(impl->name, name) == 0) {
if (strcasecmp(impl->name, name) == 0) {
selected_argon_impl = *impl;
return 1;

68
src/3rdparty/base32/base32.h vendored Normal file
View File

@@ -0,0 +1,68 @@
// Base32 implementation
//
// Copyright 2010 Google Inc.
// Author: Markus Gutschke
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
//
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
//
// Encode and decode from base32 encoding using the following alphabet:
// ABCDEFGHIJKLMNOPQRSTUVWXYZ234567
// This alphabet is documented in RFC 4648/3548
//
// We allow white-space and hyphens, but all other characters are considered
// invalid.
//
// All functions return the number of output bytes or -1 on error. If the
// output buffer is too small, the result will silently be truncated.
#ifndef XMRIG_BASE32_H
#define XMRIG_BASE32_H
#include <stdint.h>
int base32_encode(const uint8_t *data, int length, uint8_t *result, int bufSize) {
if (length < 0 || length > (1 << 28)) {
return -1;
}
int count = 0;
if (length > 0) {
int buffer = data[0];
int next = 1;
int bitsLeft = 8;
while (count < bufSize && (bitsLeft > 0 || next < length)) {
if (bitsLeft < 5) {
if (next < length) {
buffer <<= 8;
buffer |= data[next++] & 0xFF;
bitsLeft += 8;
} else {
int pad = 5 - bitsLeft;
buffer <<= pad;
bitsLeft += pad;
}
}
int index = 0x1F & (buffer >> (bitsLeft - 5));
bitsLeft -= 5;
result[count++] = "ABCDEFGHIJKLMNOPQRSTUVWXYZ234567"[index];
}
}
if (count < bufSize) {
result[count] = '\000';
}
return count;
}
#endif /* XMRIG_BASE32_H */

36
src/3rdparty/cl.h vendored Normal file
View File

@@ -0,0 +1,36 @@
/* XMRig
* Copyright 2010 Jeff Garzik <jgarzik@pobox.com>
* Copyright 2012-2014 pooler <pooler@litecoinpool.org>
* Copyright 2014 Lucas Jones <https://github.com/lucasjones>
* Copyright 2014-2016 Wolf9466 <https://github.com/OhGodAPet>
* Copyright 2016 Jay D Dee <jayddee246@gmail.com>
* Copyright 2017-2018 XMR-Stak <https://github.com/fireice-uk>, <https://github.com/psychocrypt>
* Copyright 2018-2019 SChernykh <https://github.com/SChernykh>
* Copyright 2016-2019 XMRig <https://github.com/xmrig>, <support@xmrig.com>
*
* This program is free software: you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 3 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#ifndef XMRIG_CL_H
#define XMRIG_CL_H
#if defined(__APPLE__)
# include <OpenCL/cl.h>
#else
# include "3rdparty/CL/cl.h"
#endif
#endif /* XMRIG_CL_H */

View File

@@ -381,7 +381,10 @@ enum header_states
, h_transfer_encoding
, h_upgrade
, h_matching_transfer_encoding_token_start
, h_matching_transfer_encoding_chunked
, h_matching_transfer_encoding_token
, h_matching_connection_token_start
, h_matching_connection_keep_alive
, h_matching_connection_close
@@ -1257,9 +1260,9 @@ reexecute:
switch (parser->header_state) {
case h_general: {
size_t limit = data + len - p;
limit = MIN(limit, max_header_size);
while (p+1 < data + limit && TOKEN(p[1])) {
size_t left = data + len - p;
const char* pe = p + MIN(left, max_header_size);
while (p+1 < pe && TOKEN(p[1])) {
p++;
}
break;
@@ -1335,6 +1338,7 @@ reexecute:
parser->header_state = h_general;
} else if (parser->index == sizeof(TRANSFER_ENCODING)-2) {
parser->header_state = h_transfer_encoding;
parser->flags |= F_TRANSFER_ENCODING;
}
break;
@@ -1416,10 +1420,14 @@ reexecute:
if ('c' == c) {
parser->header_state = h_matching_transfer_encoding_chunked;
} else {
parser->header_state = h_general;
parser->header_state = h_matching_transfer_encoding_token;
}
break;
/* Multi-value `Transfer-Encoding` header */
case h_matching_transfer_encoding_token_start:
break;
case h_content_length:
if (UNLIKELY(!IS_NUM(ch))) {
SET_ERRNO(HPE_INVALID_CONTENT_LENGTH);
@@ -1496,28 +1504,25 @@ reexecute:
switch (h_state) {
case h_general:
{
const char* p_cr;
const char* p_lf;
size_t limit = data + len - p;
{
size_t left = data + len - p;
const char* pe = p + MIN(left, max_header_size);
limit = MIN(limit, max_header_size);
p_cr = (const char*) memchr(p, CR, limit);
p_lf = (const char*) memchr(p, LF, limit);
if (p_cr != NULL) {
if (p_lf != NULL && p_cr >= p_lf)
p = p_lf;
else
p = p_cr;
} else if (UNLIKELY(p_lf != NULL)) {
p = p_lf;
} else {
p = data + len;
for (; p != pe; p++) {
ch = *p;
if (ch == CR || ch == LF) {
--p;
break;
}
if (!lenient && !IS_HEADER_CHAR(ch)) {
SET_ERRNO(HPE_INVALID_HEADER_TOKEN);
goto error;
}
}
if (p == data + len)
--p;
break;
}
--p;
break;
}
case h_connection:
case h_transfer_encoding:
@@ -1566,16 +1571,41 @@ reexecute:
goto error;
/* Transfer-Encoding: chunked */
case h_matching_transfer_encoding_token_start:
/* looking for 'Transfer-Encoding: chunked' */
if ('c' == c) {
h_state = h_matching_transfer_encoding_chunked;
} else if (STRICT_TOKEN(c)) {
/* TODO(indutny): similar code below does this, but why?
* At the very least it seems to be inconsistent given that
* h_matching_transfer_encoding_token does not check for
* `STRICT_TOKEN`
*/
h_state = h_matching_transfer_encoding_token;
} else if (c == ' ' || c == '\t') {
/* Skip lws */
} else {
h_state = h_general;
}
break;
case h_matching_transfer_encoding_chunked:
parser->index++;
if (parser->index > sizeof(CHUNKED)-1
|| c != CHUNKED[parser->index]) {
h_state = h_general;
h_state = h_matching_transfer_encoding_token;
} else if (parser->index == sizeof(CHUNKED)-2) {
h_state = h_transfer_encoding_chunked;
}
break;
case h_matching_transfer_encoding_token:
if (ch == ',') {
h_state = h_matching_transfer_encoding_token_start;
parser->index = 0;
}
break;
case h_matching_connection_token_start:
/* looking for 'Connection: keep-alive' */
if (c == 'k') {
@@ -1634,7 +1664,7 @@ reexecute:
break;
case h_transfer_encoding_chunked:
if (ch != ' ') h_state = h_general;
if (ch != ' ') h_state = h_matching_transfer_encoding_token;
break;
case h_connection_keep_alive:
@@ -1768,12 +1798,17 @@ reexecute:
REEXECUTE();
}
/* Cannot use chunked encoding and a content-length header together
per the HTTP specification. */
if ((parser->flags & F_CHUNKED) &&
/* Cannot us transfer-encoding and a content-length header together
per the HTTP specification. (RFC 7230 Section 3.3.3) */
if ((parser->flags & F_TRANSFER_ENCODING) &&
(parser->flags & F_CONTENTLENGTH)) {
SET_ERRNO(HPE_UNEXPECTED_CONTENT_LENGTH);
goto error;
/* Allow it for lenient parsing as long as `Transfer-Encoding` is
* not `chunked`
*/
if (!lenient || (parser->flags & F_CHUNKED)) {
SET_ERRNO(HPE_UNEXPECTED_CONTENT_LENGTH);
goto error;
}
}
UPDATE_STATE(s_headers_done);
@@ -1848,8 +1883,31 @@ reexecute:
UPDATE_STATE(NEW_MESSAGE());
CALLBACK_NOTIFY(message_complete);
} else if (parser->flags & F_CHUNKED) {
/* chunked encoding - ignore Content-Length header */
/* chunked encoding - ignore Content-Length header,
* prepare for a chunk */
UPDATE_STATE(s_chunk_size_start);
} else if (parser->flags & F_TRANSFER_ENCODING) {
if (parser->type == HTTP_REQUEST && !lenient) {
/* RFC 7230 3.3.3 */
/* If a Transfer-Encoding header field
* is present in a request and the chunked transfer coding is not
* the final encoding, the message body length cannot be determined
* reliably; the server MUST respond with the 400 (Bad Request)
* status code and then close the connection.
*/
SET_ERRNO(HPE_INVALID_TRANSFER_ENCODING);
RETURN(p - data); /* Error */
} else {
/* RFC 7230 3.3.3 */
/* If a Transfer-Encoding header field is present in a response and
* the chunked transfer coding is not the final encoding, the
* message body length is determined by reading the connection until
* it is closed by the server.
*/
UPDATE_STATE(s_body_identity_eof);
}
} else {
if (parser->content_length == 0) {
/* Content-Length header given but zero: Content-Length: 0\r\n */
@@ -2103,6 +2161,12 @@ http_message_needs_eof (const http_parser *parser)
return 0;
}
/* RFC 7230 3.3.3, see `s_headers_almost_done` */
if ((parser->flags & F_TRANSFER_ENCODING) &&
(parser->flags & F_CHUNKED) == 0) {
return 1;
}
if ((parser->flags & F_CHUNKED) || parser->content_length != ULLONG_MAX) {
return 0;
}

View File

@@ -27,7 +27,7 @@ extern "C" {
/* Also update SONAME in the Makefile whenever you change these. */
#define HTTP_PARSER_VERSION_MAJOR 2
#define HTTP_PARSER_VERSION_MINOR 9
#define HTTP_PARSER_VERSION_PATCH 0
#define HTTP_PARSER_VERSION_PATCH 3
#include <stddef.h>
#if defined(_WIN32) && !defined(__MINGW32__) && \
@@ -225,6 +225,7 @@ enum flags
, F_UPGRADE = 1 << 5
, F_SKIPBODY = 1 << 6
, F_CONTENTLENGTH = 1 << 7
, F_TRANSFER_ENCODING = 1 << 8
};
@@ -271,6 +272,8 @@ enum flags
"unexpected content-length header") \
XX(INVALID_CHUNK_SIZE, \
"invalid character in chunk size header") \
XX(INVALID_TRANSFER_ENCODING, \
"request has invalid transfer-encoding") \
XX(INVALID_CONSTANT, "invalid constant string") \
XX(INVALID_INTERNAL_STATE, "encountered unexpected internal state")\
XX(STRICT, "strict mode assertion failed") \
@@ -293,11 +296,11 @@ enum http_errno {
struct http_parser {
/** PRIVATE **/
unsigned int type : 2; /* enum http_parser_type */
unsigned int flags : 8; /* F_* values from 'flags' enum; semi-public */
unsigned int state : 7; /* enum state from http_parser.c */
unsigned int header_state : 7; /* enum header_state from http_parser.c */
unsigned int index : 7; /* index into current matcher */
unsigned int lenient_http_headers : 1;
unsigned int flags : 16; /* F_* values from 'flags' enum; semi-public */
uint32_t nread; /* # bytes read in various scenarios */
uint64_t content_length; /* # bytes in body (0 if no Content-Length header) */

View File

@@ -21,6 +21,7 @@ Nathalie Furmento CNRS
Bryon Gloden
Brice Goglin Inria
Gilles Gouaillardet RIST
Valentin Hoyet Inria
Joshua Hursey UWL
Alexey Kardashevskiy IBM
Rob Latham ANL

View File

@@ -5,7 +5,7 @@ include_directories(include)
include_directories(src)
add_definitions(/D_CRT_SECURE_NO_WARNINGS)
set(CMAKE_C_FLAGS_RELEASE "${CMAKE_C_FLAGS_RELEASE} /MT")
set(CMAKE_C_FLAGS_RELEASE "/MT /O2 /Ob2 /DNDEBUG")
set(HEADERS
include/hwloc.h

View File

@@ -1,5 +1,5 @@
Copyright © 2009 CNRS
Copyright © 2009-2019 Inria. All rights reserved.
Copyright © 2009-2020 Inria. All rights reserved.
Copyright © 2009-2013 Université Bordeaux
Copyright © 2009-2011 Cisco Systems, Inc. All rights reserved.
@@ -13,8 +13,117 @@ $HEADER$
This file contains the main features as well as overviews of specific
bug fixes (and other actions) for each version of hwloc since version
0.9 (as initially released as "libtopology", then re-branded to "hwloc"
in v0.9.1).
0.9.
Version 2.2.0
-------------
* API
+ Add hwloc_bitmap_singlify_by_core() to remove SMT from a given cpuset,
thanks to Florian Reynier for the suggestion.
+ Add --enable-32bits-pci-domain to stop ignoring PCI devices with domain
>16bits (e.g. 10000:02:03.4). Enabling this option breaks the library ABI.
Thanks to Dylan Simon for the help.
* Backends
+ Add support for Linux cgroups v2.
+ Add NUMA support for FreeBSD.
+ Add get_last_cpu_location support for FreeBSD.
+ Remove support for Intel Xeon Phi (MIC, Knights Corner) co-processors.
* Tools
+ Add --uid to filter the hwloc-ps output by uid on Linux.
+ Add a GRAPHICAL OUTPUT section in the manpage of lstopo.
* Misc
+ Use the native dlopen instead of libltdl,
unless --disable-plugin-dlopen is passed at configure time.
Version 2.1.0
-------------
* API
+ Add a new "Die" object (HWLOC_OBJ_DIE) for upcoming x86 processors
with multiple dies per package, in the x86 and Linux backends.
+ Add the new HWLOC_OBJ_MEMCACHE object type for memory-side caches.
- They are filtered-out by default, except in command-line tools.
- They are only available on very recent platforms running Linux 5.2+
and uptodate ACPI tables.
- The KNL MCDRAM in cache mode is still exposed as a L3 unless
HWLOC_KNL_MSCACHE_L3=0 in the environment.
+ Add HWLOC_RESTRICT_FLAG_BYNODESET and _REMOVE_MEMLESS for restricting
topologies based on some memory nodes.
+ Add hwloc_topology_set_components() for blacklisting some components
from being enabled in a topology.
+ Add hwloc_bitmap_nr_ulongs() and hwloc_bitmap_from/to_ulongs(),
thanks to Junchao Zhang for the suggestion.
+ Improve the API for dealing with disallowed resources
- HWLOC_TOPOLOGY_FLAG_WHOLE_SYSTEM is replaced with FLAG_INCLUDE_DISALLOWED
and --whole-system command-line options with --disallowed.
. Former names are still accepted for backward compatibility.
- Add hwloc_topology_allow() for changing allowed sets after load().
- Add the HWLOC_ALLOW=all environment variable to totally ignore
administrative restrictions such as Linux Cgroups.
- Add disallowed_pu and disallowed_numa bits to the discovery support
structure.
+ Group objects have a new "dont_merge" attribute to prevent them from
being automatically merged with identical parent or children.
+ Add more distances-related features:
- Add hwloc_distances_get_name() to retrieve a string describing
what a distances structure contain.
- Add hwloc_distances_get_by_name() to retrieve distances structures
based on their name.
- Add hwloc_distances_release_remove()
- Distances may now cover objects of different types with new kind
HWLOC_DISTANCES_KIND_HETEROGENEOUS_TYPES.
* Backends
+ Add support for Linux 5.3 new sysfs cpu topology files with Die information.
+ Add support for Intel v2 Extended Topology Enumeration in the x86 backend.
+ Improve memory locality on Linux by using HMAT initiators (exposed
since Linux 5.2+), and NUMA distances for CPU-less NUMA nodes.
+ The x86 backend now properly handles offline CPUs.
+ Detect the locality of NVIDIA GPU OpenCL devices.
+ Ignore NUMA nodes that correspond to NVIDIA GPU by default.
- They may be unignored if HWLOC_KEEP_NVIDIA_GPU_NUMA_NODES=1 in the environment.
- Fix their CPU locality and add info attributes to identify them.
Thanks to Max Katz and Edgar Leon for the help.
+ Add support for IBM S/390 drawers.
+ Rework the heuristics for discovering KNL Cluster and Memory modes
to stop assuming all CPUs are online (required for mOS support).
Thanks to Sharath K Bhat for testing patches.
+ Ignore NUMA node information from AMD topoext in the x86 backend,
unless HWLOC_X86_TOPOEXT_NUMANODES=1 is set in the environment.
+ Expose Linux DAX devices as hwloc Block OS devices.
+ Remove support for /proc/cpuinfo-only topology discovery in Linux
kernel prior to 2.6.16.
+ Disable POWER device-tree-based topology on Linux by default.
- It may be reenabled by setting HWLOC_USE_DT=1 in the environment.
+ Discovery components are now divided in phases that may be individually
blacklisted.
- The linuxio component has been merged back into the linux component.
* Tools
+ lstopo
- lstopo factorizes objects by default in the graphical output when
there are more than 4 identical children.
. New options --no-factorize and --factorize may be used to configure this.
. Hit the 'f' key to disable factorizing in interactive outputs.
- Both logical and OS/physical indexes are now displayed by default
for PU and NUMA nodes.
- The X11 and Windows interactive outputs support many keyboard
shortcuts to dynamically customize the attributes, legend, etc.
- Add --linespacing and change default margins and linespacing.
- Add --allow for changing allowed sets.
- Add a native SVG backend. Its graphical output may be slightly less
pretty than Cairo (still used by default if available) but the SVG
code provides attributes to manipulate objects from HTML/JS.
See dynamic_SVG_example.html for an example.
+ Add --nodeset options to hwloc-calc for converting between cpusets and
nodesets.
+ Add --no-smt to lstopo, hwloc-bind and hwloc-calc to ignore multiple
PU in SMT cores.
+ hwloc-annotate may annotate multiple locations at once.
+ Add a HTML/JS version of hwloc-ps. See contrib/hwloc-ps.www/README.
+ Add bash completions.
* Misc
+ Add several FAQ entries in "Compatibility between hwloc versions"
about API version, ABI, XML, Synthetic strings, and shmem topologies.
Version 2.0.4 (also included in 1.11.13 when appropriate)
@@ -214,6 +323,54 @@ Version 2.0.0
+ hwloc now requires a C99 compliant compiler.
Version 1.11.13 (also included in 2.0.4)
---------------
* Add support for Linux 5.3 new sysfs cpu topology files with Die information.
* Add support for Intel v2 Extended Topology Enumeration in the x86 backend.
* Tiles, Modules and Dies are exposed as Groups for now.
+ HWLOC_DONT_MERGE_DIE_GROUPS=1 may be set in the environment to prevent
Die groups from being automatically merged with identical parent or children.
* Ignore NUMA node information from AMD topoext in the x86 backend,
unless HWLOC_X86_TOPOEXT_NUMANODES=1 is set in the environment.
* Group objects have a new "dont_merge" attribute to prevent them from
being automatically merged with identical parent or children.
Version 1.11.12 (also included in 2.0.3)
---------------
* Fix a corner case of hwloc_topology_restrict() where children would
become out-of-order.
* Fix the return length of export_xmlbuffer() functions to always
include the ending \0.
Version 1.11.11 (also included in 2.0.2)
---------------
* Add support for Hygon Dhyana processors in the x86 backend,
thanks to Pu Wen for the patch.
* Fix symbol renaming to also rename internal components,
thanks to Evan Ramos for the patch.
* Fix build on HP-UX, thanks to Richard Lloyd for reporting the issues.
* Detect PCI link speed without being root on Linux >= 4.13.
Version 1.11.10 (also included in 2.0.1)
---------------
* Fix detection of cores and hyperthreads on Mac OS X.
* Serialize pciaccess discovery to fix concurrent topology loads in
multiple threads.
* Fix first touch area memory binding on Linux when thread memory
binding is different.
* Some minor fixes to memory binding.
* Fix hwloc-dump-hwdata to only process SMBIOS information that correspond
to the KNL and KNM configuration.
* Add a heuristic for guessing KNL/KNM memory and cluster modes when
hwloc-dump-hwdata could not run as root earlier.
* Fix discovery of NVMe OS devices on Linux >= 4.0.
* Add get_area_memlocation() on Windows.
* Add CPUVendor, Model, ... attributes on Mac OS X.
Version 1.11.9
--------------
* Add support for Zhaoxin ZX-C and ZX-D processors in the x86 backend,
@@ -941,7 +1098,7 @@ Version 1.6.0
+ Add a section about Synthetic topologies in the documentation.
Version 1.5.2 (some of these changes are in v1.6.2 but not in v1.6)
Version 1.5.2 (some of these changes are in 1.6.2 but not in 1.6)
-------------
* Use libpciaccess instead of pciutils/libpci by default for I/O discovery.
pciutils/libpci is only used if --enable-libpci is given to configure
@@ -1076,9 +1233,8 @@ Version 1.4.2
for most of them.
Version 1.4.1
Version 1.4.1 (contains all 1.3.2 changes)
-------------
* This release contains all changes from v1.3.2.
* Fix hwloc_alloc_membind, thanks Karl Napf for reporting the issue.
* Fix memory leaks in some get_membind() functions.
* Fix helpers converting from Linux libnuma to hwloc (hwloc/linux-libnuma.h)
@@ -1091,7 +1247,7 @@ Version 1.4.1
issues.
Version 1.4.0 (does not contain all v1.3.2 changes)
Version 1.4.0 (does not contain all 1.3.2 changes)
-------------
* Major features
+ Add "custom" interface and "assembler" tools to build multi-node
@@ -1536,7 +1692,7 @@ Version 1.0.0
Version 0.9.4 (unreleased)
--------------------------
-------------
* Fix reseting colors to normal in lstopo -.txt output.
* Fix Linux pthread_t binding error report.
@@ -1593,7 +1749,7 @@ Version 0.9.1
the physical location of IB devices.
Version 0.9 (libtopology)
-------------------------
Version 0.9 (formerly named "libtopology")
-----------
* First release.

View File

@@ -8,8 +8,8 @@
# Please update HWLOC_VERSION* in contrib/windows/hwloc_config.h too.
major=2
minor=0
release=4
minor=2
release=0
# greek is used for alpha or beta release tags. If it is non-empty,
# it will be appended to the version number. It does not have to be
@@ -22,7 +22,7 @@ greek=
# The date when this release was created
date="Jun 03, 2019"
date="Mar 30, 2020"
# If snapshot=1, then use the value from snapshot_version as the
# entire hwloc version (i.e., ignore major, minor, release, and
@@ -41,7 +41,7 @@ snapshot_version=${major}.${minor}.${release}${greek}-git
# 2. Version numbers are described in the Libtool current:revision:age
# format.
libhwloc_so_version=15:3:0
libhwloc_so_version=17:0:2
libnetloc_so_version=0:0:0
# Please also update the <TargetName> lines in contrib/windows/libhwloc.vcxproj

View File

@@ -1,6 +1,6 @@
/*
* Copyright © 2009 CNRS
* Copyright © 2009-2019 Inria. All rights reserved.
* Copyright © 2009-2020 Inria. All rights reserved.
* Copyright © 2009-2012 Université Bordeaux
* Copyright © 2009-2011 Cisco Systems, Inc. All rights reserved.
* See COPYING in top-level directory.
@@ -53,7 +53,8 @@
#ifndef HWLOC_H
#define HWLOC_H
#include <hwloc/autogen/config.h>
#include "hwloc/autogen/config.h"
#include <sys/types.h>
#include <stdio.h>
#include <string.h>
@@ -62,13 +63,13 @@
/*
* Symbol transforms
*/
#include <hwloc/rename.h>
#include "hwloc/rename.h"
/*
* Bitmap definitions
*/
#include <hwloc/bitmap.h>
#include "hwloc/bitmap.h"
#ifdef __cplusplus
@@ -86,13 +87,13 @@ extern "C" {
* actually modifies the API.
*
* Users may check for available features at build time using this number
* (see \ref faq_upgrade).
* (see \ref faq_version_api).
*
* \note This should not be confused with HWLOC_VERSION, the library version.
* Two stable releases of the same series usually have the same ::HWLOC_API_VERSION
* even if their HWLOC_VERSION are different.
*/
#define HWLOC_API_VERSION 0x00020000
#define HWLOC_API_VERSION 0x00020100
/** \brief Indicate at runtime which hwloc API version was used at build time.
*
@@ -101,7 +102,7 @@ extern "C" {
HWLOC_DECLSPEC unsigned hwloc_get_api_version(void);
/** \brief Current component and plugin ABI version (see hwloc/plugins.h) */
#define HWLOC_COMPONENT_ABI 5
#define HWLOC_COMPONENT_ABI 6
/** @} */
@@ -172,8 +173,12 @@ typedef hwloc_const_bitmap_t hwloc_const_nodeset_t;
* may be defined in the future! If you need to compare types, use
* hwloc_compare_types() instead.
*/
#define HWLOC_OBJ_TYPE_MIN HWLOC_OBJ_MACHINE /**< \private Sentinel value */
typedef enum {
/** \cond */
#define HWLOC_OBJ_TYPE_MIN HWLOC_OBJ_MACHINE /* Sentinel value */
/** \endcond */
HWLOC_OBJ_MACHINE, /**< \brief Machine.
* A set of processors and memory with cache
* coherency.
@@ -186,7 +191,8 @@ typedef enum {
HWLOC_OBJ_PACKAGE, /**< \brief Physical package.
* The physical package that usually gets inserted
* into a socket on the motherboard.
* A processor package usually contains multiple cores.
* A processor package usually contains multiple cores,
* and possibly some dies.
*/
HWLOC_OBJ_CORE, /**< \brief Core.
* A computation unit (may be shared by several
@@ -233,6 +239,10 @@ typedef enum {
* It is usually close to some cores (the corresponding objects
* are descendants of the NUMA node object in the hwloc tree).
*
* This is the smallest object representing Memory resources,
* it cannot have any child except Misc objects.
* However it may have Memory-side cache parents.
*
* There is always at least one such object in the topology
* even if the machine is not NUMA.
*
@@ -245,7 +255,7 @@ typedef enum {
*/
HWLOC_OBJ_BRIDGE, /**< \brief Bridge (filtered out by default).
* Any bridge that connects the host or an I/O bus,
* Any bridge (or PCI switch) that connects the host or an I/O bus,
* to another I/O bus.
* They are not added to the topology unless I/O discovery
* is enabled with hwloc_topology_set_flags().
@@ -279,6 +289,24 @@ typedef enum {
* Misc objects have NULL CPU and node sets.
*/
HWLOC_OBJ_MEMCACHE, /**< \brief Memory-side cache (filtered out by default).
* A cache in front of a specific NUMA node.
*
* This object always has at least one NUMA node as a memory child.
*
* Memory objects are not listed in the main children list,
* but rather in the dedicated Memory children list.
*
* Memory-side cache have a special depth ::HWLOC_TYPE_DEPTH_MEMCACHE
* instead of a normal depth just like other objects in the
* main tree.
*/
HWLOC_OBJ_DIE, /**< \brief Die within a physical package.
* A subpart of the physical package, that contains multiple cores.
* \hideinitializer
*/
HWLOC_OBJ_TYPE_MAX /**< \private Sentinel value */
} hwloc_obj_type_t;
@@ -297,8 +325,8 @@ typedef enum hwloc_obj_bridge_type_e {
/** \brief Type of a OS device. */
typedef enum hwloc_obj_osdev_type_e {
HWLOC_OBJ_OSDEV_BLOCK, /**< \brief Operating system block device.
* For instance "sda" on Linux. */
HWLOC_OBJ_OSDEV_BLOCK, /**< \brief Operating system block device, or non-volatile memory device.
* For instance "sda" or "dax2.0" on Linux. */
HWLOC_OBJ_OSDEV_GPU, /**< \brief Operating system GPU device.
* For instance ":0.0" for a GL display,
* "card0" for a Linux DRM device. */
@@ -336,9 +364,8 @@ typedef enum hwloc_obj_osdev_type_e {
*/
HWLOC_DECLSPEC int hwloc_compare_types (hwloc_obj_type_t type1, hwloc_obj_type_t type2) __hwloc_attribute_const;
enum hwloc_compare_types_e {
HWLOC_TYPE_UNORDERED = INT_MAX /**< \brief Value returned by hwloc_compare_types() when types can not be compared. \hideinitializer */
};
/** \brief Value returned by hwloc_compare_types() when types can not be compared. \hideinitializer */
#define HWLOC_TYPE_UNORDERED INT_MAX
/** @} */
@@ -434,9 +461,15 @@ struct hwloc_obj {
* These children are listed in \p memory_first_child.
*/
struct hwloc_obj *memory_first_child; /**< \brief First Memory child.
* NUMA nodes are listed here (\p memory_arity and \p memory_first_child)
* NUMA nodes and Memory-side caches are listed here
* (\p memory_arity and \p memory_first_child)
* instead of in the normal children list.
* See also hwloc_obj_type_is_memory().
*
* A memory hierarchy starts from a normal CPU-side object
* (e.g. Package) and ends with NUMA nodes as leaves.
* There might exist some memory-side caches between them
* in the middle of the memory subtree.
*/
/**@}*/
@@ -471,7 +504,7 @@ struct hwloc_obj {
* object and known how (the children path between this object and the PU
* objects).
*
* If the ::HWLOC_TOPOLOGY_FLAG_WHOLE_SYSTEM configuration flag is set,
* If the ::HWLOC_TOPOLOGY_FLAG_INCLUDE_DISALLOWED configuration flag is set,
* some of these CPUs may not be allowed for binding,
* see hwloc_topology_get_allowed_cpuset().
*
@@ -483,7 +516,7 @@ struct hwloc_obj {
*
* This may include not only the same as the cpuset field, but also some CPUs for
* which topology information is unknown or incomplete, some offlines CPUs, and
* the CPUs that are ignored when the ::HWLOC_TOPOLOGY_FLAG_WHOLE_SYSTEM flag
* the CPUs that are ignored when the ::HWLOC_TOPOLOGY_FLAG_INCLUDE_DISALLOWED flag
* is not set.
* Thus no corresponding PU object may be found in the topology, because the
* precise position is undefined. It is however known that it would be somewhere
@@ -501,7 +534,7 @@ struct hwloc_obj {
*
* In the end, these nodes are those that are close to the current object.
*
* If the ::HWLOC_TOPOLOGY_FLAG_WHOLE_SYSTEM configuration flag is set,
* If the ::HWLOC_TOPOLOGY_FLAG_INCLUDE_DISALLOWED configuration flag is set,
* some of these nodes may not be allowed for allocation,
* see hwloc_topology_get_allowed_nodeset().
*
@@ -516,7 +549,7 @@ struct hwloc_obj {
*
* This may include not only the same as the nodeset field, but also some NUMA
* nodes for which topology information is unknown or incomplete, some offlines
* nodes, and the nodes that are ignored when the ::HWLOC_TOPOLOGY_FLAG_WHOLE_SYSTEM
* nodes, and the nodes that are ignored when the ::HWLOC_TOPOLOGY_FLAG_INCLUDE_DISALLOWED
* flag is not set.
* Thus no corresponding NUMA node object may be found in the topology, because the
* precise position is undefined. It is however known that it would be
@@ -584,7 +617,11 @@ union hwloc_obj_attr_u {
} group;
/** \brief PCI Device specific Object Attributes */
struct hwloc_pcidev_attr_s {
unsigned short domain;
#ifndef HWLOC_HAVE_32BITS_PCI_DOMAIN
unsigned short domain; /* Only 16bits PCI domains are supported by default */
#else
unsigned int domain; /* 32bits PCI domain support break the library ABI, hence it's disabled by default */
#endif
unsigned char bus, dev, func;
unsigned short class_id;
unsigned short vendor_id, device_id, subvendor_id, subdevice_id;
@@ -599,7 +636,11 @@ union hwloc_obj_attr_u {
hwloc_obj_bridge_type_t upstream_type;
union {
struct {
unsigned short domain;
#ifndef HWLOC_HAVE_32BITS_PCI_DOMAIN
unsigned short domain; /* Only 16bits PCI domains are supported by default */
#else
unsigned int domain; /* 32bits PCI domain support break the library ABI, hence it's disabled by default */
#endif
unsigned char secondary_bus, subordinate_bus;
} pci;
} downstream;
@@ -770,7 +811,8 @@ enum hwloc_get_type_depth_e {
HWLOC_TYPE_DEPTH_BRIDGE = -4, /**< \brief Virtual depth for bridge object level. \hideinitializer */
HWLOC_TYPE_DEPTH_PCI_DEVICE = -5, /**< \brief Virtual depth for PCI device object level. \hideinitializer */
HWLOC_TYPE_DEPTH_OS_DEVICE = -6, /**< \brief Virtual depth for software device object level. \hideinitializer */
HWLOC_TYPE_DEPTH_MISC = -7 /**< \brief Virtual depth for Misc object. \hideinitializer */
HWLOC_TYPE_DEPTH_MISC = -7, /**< \brief Virtual depth for Misc object. \hideinitializer */
HWLOC_TYPE_DEPTH_MEMCACHE = -8 /**< \brief Virtual depth for MemCache object. \hideinitializer */
};
/** \brief Return the depth of parents where memory objects are attached.
@@ -828,7 +870,8 @@ hwloc_get_type_or_above_depth (hwloc_topology_t topology, hwloc_obj_type_t type)
/** \brief Returns the type of objects at depth \p depth.
*
* \p depth should between 0 and hwloc_topology_get_depth()-1.
* \p depth should between 0 and hwloc_topology_get_depth()-1,
* or a virtual depth such as ::HWLOC_TYPE_DEPTH_NUMANODE.
*
* \return (hwloc_obj_type_t)-1 if depth \p depth does not exist.
*/
@@ -1324,7 +1367,7 @@ HWLOC_DECLSPEC int hwloc_get_proc_last_cpu_location(hwloc_topology_t topology, h
typedef enum {
/** \brief Reset the memory allocation policy to the system default.
* Depending on the operating system, this may correspond to
* ::HWLOC_MEMBIND_FIRSTTOUCH (Linux),
* ::HWLOC_MEMBIND_FIRSTTOUCH (Linux, FreeBSD),
* or ::HWLOC_MEMBIND_BIND (AIX, HP-UX, Solaris, Windows).
* This policy is never returned by get membind functions.
* The nodeset argument is ignored.
@@ -1781,6 +1824,31 @@ HWLOC_DECLSPEC int hwloc_topology_set_xml(hwloc_topology_t __hwloc_restrict topo
*/
HWLOC_DECLSPEC int hwloc_topology_set_xmlbuffer(hwloc_topology_t __hwloc_restrict topology, const char * __hwloc_restrict buffer, int size);
/** \brief Flags to be passed to hwloc_topology_set_components()
*/
enum hwloc_topology_components_flag_e {
/** \brief Blacklist the target component from being used.
* \hideinitializer
*/
HWLOC_TOPOLOGY_COMPONENTS_FLAG_BLACKLIST = (1UL<<0)
};
/** \brief Prevent a discovery component from being used for a topology.
*
* \p name is the name of the discovery component that should not be used
* when loading topology \p topology. The name is a string such as "cuda".
*
* For components with multiple phases, it may also be suffixed with the name
* of a phase, for instance "linux:io".
*
* \p flags should be ::HWLOC_TOPOLOGY_COMPONENTS_FLAG_BLACKLIST.
*
* This may be used to avoid expensive parts of the discovery process.
* For instance, CUDA-specific discovery may be expensive and unneeded
* while generic I/O discovery could still be useful.
*/
HWLOC_DECLSPEC int hwloc_topology_set_components(hwloc_topology_t __hwloc_restrict topology, unsigned long flags, const char * __hwloc_restrict name);
/** @} */
@@ -1800,28 +1868,27 @@ HWLOC_DECLSPEC int hwloc_topology_set_xmlbuffer(hwloc_topology_t __hwloc_restric
* They may also be returned by hwloc_topology_get_flags().
*/
enum hwloc_topology_flags_e {
/** \brief Detect the whole system, ignore reservations.
/** \brief Detect the whole system, ignore reservations, include disallowed objects.
*
* Gather all resources, even if some were disabled by the administrator.
* For instance, ignore Linux Cgroup/Cpusets and gather all processors and memory nodes.
*
* When this flag is not set, PUs and NUMA nodes that are disallowed are not added to the topology.
* Parent objects (package, core, cache, etc.) are added only if some of their children are allowed.
* All existing PUs and NUMA nodes in the topology are allowed.
* hwloc_topology_get_allowed_cpuset() and hwloc_topology_get_allowed_nodeset()
* are equal to the root object cpuset and nodeset.
*
* When this flag is set, the actual sets of allowed PUs and NUMA nodes are given
* by hwloc_topology_get_allowed_cpuset() and hwloc_topology_get_allowed_nodeset().
* They may be smaller than the root object cpuset and nodeset.
*
* When this flag is not set, all existing PUs and NUMA nodes in the topology
* are allowed. hwloc_topology_get_allowed_cpuset() and hwloc_topology_get_allowed_nodeset()
* are equal to the root object cpuset and nodeset.
*
* If the current topology is exported to XML and reimported later, this flag
* should be set again in the reimported topology so that disallowed resources
* are reimported as well.
* \hideinitializer
*/
HWLOC_TOPOLOGY_FLAG_WHOLE_SYSTEM = (1UL<<0),
HWLOC_TOPOLOGY_FLAG_INCLUDE_DISALLOWED = (1UL<<0),
/** \brief Assume that the selected backend provides the topology for the
* system on which we are running.
@@ -1901,6 +1968,10 @@ struct hwloc_topology_discovery_support {
unsigned char numa;
/** \brief Detecting the amount of memory in NUMA nodes is supported. */
unsigned char numa_memory;
/** \brief Detecting and identifying PU objects that are not available to the current process is supported. */
unsigned char disallowed_pu;
/** \brief Detecting and identifying NUMA nodes that are not available to the current process is supported. */
unsigned char disallowed_numa;
};
/** \brief Flags describing actual PU binding support for this topology.
@@ -1998,7 +2069,7 @@ HWLOC_DECLSPEC const struct hwloc_topology_support *hwloc_topology_get_support(h
*
* By default, most objects are kept (::HWLOC_TYPE_FILTER_KEEP_ALL).
* Instruction caches, I/O and Misc objects are ignored by default (::HWLOC_TYPE_FILTER_KEEP_NONE).
* Group levels are ignored unless they bring structure (::HWLOC_TYPE_FILTER_KEEP_STRUCTURE).
* Die and Group levels are ignored unless they bring structure (::HWLOC_TYPE_FILTER_KEEP_STRUCTURE).
*
* Note that group objects are also ignored individually (without the entire level)
* when they do not bring structure.
@@ -2063,11 +2134,15 @@ HWLOC_DECLSPEC int hwloc_topology_get_type_filter(hwloc_topology_t topology, hwl
*/
HWLOC_DECLSPEC int hwloc_topology_set_all_types_filter(hwloc_topology_t topology, enum hwloc_type_filter_e filter);
/** \brief Set the filtering for all cache object types.
/** \brief Set the filtering for all CPU cache object types.
*
* Memory-side caches are not involved since they are not CPU caches.
*/
HWLOC_DECLSPEC int hwloc_topology_set_cache_types_filter(hwloc_topology_t topology, enum hwloc_type_filter_e filter);
/** \brief Set the filtering for all instruction cache object types.
/** \brief Set the filtering for all CPU instruction cache object types.
*
* Memory-side caches are not involved since they are not CPU caches.
*/
HWLOC_DECLSPEC int hwloc_topology_set_icache_types_filter(hwloc_topology_t topology, enum hwloc_type_filter_e filter);
@@ -2106,10 +2181,24 @@ HWLOC_DECLSPEC void * hwloc_topology_get_userdata(hwloc_topology_t topology);
enum hwloc_restrict_flags_e {
/** \brief Remove all objects that became CPU-less.
* By default, only objects that contain no PU and no memory are removed.
* This flag may not be used with ::HWLOC_RESTRICT_FLAG_BYNODESET.
* \hideinitializer
*/
HWLOC_RESTRICT_FLAG_REMOVE_CPULESS = (1UL<<0),
/** \brief Restrict by nodeset instead of CPU set.
* Only keep objects whose nodeset is included or partially included in the given set.
* This flag may not be used with ::HWLOC_RESTRICT_FLAG_REMOVE_CPULESS.
*/
HWLOC_RESTRICT_FLAG_BYNODESET = (1UL<<3),
/** \brief Remove all objects that became Memory-less.
* By default, only objects that contain no PU and no memory are removed.
* This flag may only be used with ::HWLOC_RESTRICT_FLAG_BYNODESET.
* \hideinitializer
*/
HWLOC_RESTRICT_FLAG_REMOVE_MEMLESS = (1UL<<4),
/** \brief Move Misc objects to ancestors if their parents are removed during restriction.
* If this flag is not set, Misc objects are removed when their parents are removed.
* \hideinitializer
@@ -2123,28 +2212,70 @@ enum hwloc_restrict_flags_e {
HWLOC_RESTRICT_FLAG_ADAPT_IO = (1UL<<2)
};
/** \brief Restrict the topology to the given CPU set.
/** \brief Restrict the topology to the given CPU set or nodeset.
*
* Topology \p topology is modified so as to remove all objects that
* are not included (or partially included) in the CPU set \p cpuset.
* are not included (or partially included) in the CPU set \p set.
* All objects CPU and node sets are restricted accordingly.
*
* If ::HWLOC_RESTRICT_FLAG_BYNODESET is passed in \p flags,
* \p set is considered a nodeset instead of a CPU set.
*
* \p flags is a OR'ed set of ::hwloc_restrict_flags_e.
*
* \note This call may not be reverted by restricting back to a larger
* cpuset. Once dropped during restriction, objects may not be brought
* set. Once dropped during restriction, objects may not be brought
* back, except by loading another topology with hwloc_topology_load().
*
* \return 0 on success.
*
* \return -1 with errno set to EINVAL if the input cpuset is invalid.
* \return -1 with errno set to EINVAL if the input set is invalid.
* The topology is not modified in this case.
*
* \return -1 with errno set to ENOMEM on failure to allocate internal data.
* The topology is reinitialized in this case. It should be either
* destroyed with hwloc_topology_destroy() or configured and loaded again.
*/
HWLOC_DECLSPEC int hwloc_topology_restrict(hwloc_topology_t __hwloc_restrict topology, hwloc_const_cpuset_t cpuset, unsigned long flags);
HWLOC_DECLSPEC int hwloc_topology_restrict(hwloc_topology_t __hwloc_restrict topology, hwloc_const_bitmap_t set, unsigned long flags);
/** \brief Flags to be given to hwloc_topology_allow(). */
enum hwloc_allow_flags_e {
/** \brief Mark all objects as allowed in the topology.
*
* \p cpuset and \p nođeset given to hwloc_topology_allow() must be \c NULL.
* \hideinitializer */
HWLOC_ALLOW_FLAG_ALL = (1UL<<0),
/** \brief Only allow objects that are available to the current process.
*
* The topology must have ::HWLOC_TOPOLOGY_FLAG_IS_THISSYSTEM so that the set
* of available resources can actually be retrieved from the operating system.
*
* \p cpuset and \p nođeset given to hwloc_topology_allow() must be \c NULL.
* \hideinitializer */
HWLOC_ALLOW_FLAG_LOCAL_RESTRICTIONS = (1UL<<1),
/** \brief Allow a custom set of objects, given to hwloc_topology_allow() as \p cpuset and/or \p nodeset parameters.
* \hideinitializer */
HWLOC_ALLOW_FLAG_CUSTOM = (1UL<<2)
};
/** \brief Change the sets of allowed PUs and NUMA nodes in the topology.
*
* This function only works if the ::HWLOC_TOPOLOGY_FLAG_INCLUDE_DISALLOWED
* was set on the topology. It does not modify any object, it only changes
* the sets returned by hwloc_topology_get_allowed_cpuset() and
* hwloc_topology_get_allowed_nodeset().
*
* It is notably useful when importing a topology from another process
* running in a different Linux Cgroup.
*
* \p flags must be set to one flag among ::hwloc_allow_flags_e.
*
* \note Removing objects from a topology should rather be performed with
* hwloc_topology_restrict().
*/
HWLOC_DECLSPEC int hwloc_topology_allow(hwloc_topology_t __hwloc_restrict topology, hwloc_const_cpuset_t cpuset, hwloc_const_nodeset_t nodeset, unsigned long flags);
/** \brief Add a MISC object as a leaf of the topology
*
@@ -2250,21 +2381,21 @@ HWLOC_DECLSPEC int hwloc_obj_add_other_obj_sets(hwloc_obj_t dst, hwloc_obj_t src
/* high-level helpers */
#include <hwloc/helper.h>
#include "hwloc/helper.h"
/* inline code of some functions above */
#include <hwloc/inlines.h>
#include "hwloc/inlines.h"
/* exporting to XML or synthetic */
#include <hwloc/export.h>
#include "hwloc/export.h"
/* distances */
#include <hwloc/distances.h>
#include "hwloc/distances.h"
/* topology diffs */
#include <hwloc/diff.h>
#include "hwloc/diff.h"
/* deprecated headers */
#include <hwloc/deprecated.h>
#include "hwloc/deprecated.h"
#endif /* HWLOC_H */

View File

@@ -1,6 +1,6 @@
/*
* Copyright © 2009 CNRS
* Copyright © 2009-2018 Inria. All rights reserved.
* Copyright © 2009-2019 Inria. All rights reserved.
* Copyright © 2009-2012 Université Bordeaux
* Copyright © 2009-2011 Cisco Systems, Inc. All rights reserved.
* See COPYING in top-level directory.
@@ -11,10 +11,10 @@
#ifndef HWLOC_CONFIG_H
#define HWLOC_CONFIG_H
#define HWLOC_VERSION "2.0.4"
#define HWLOC_VERSION "2.2.0"
#define HWLOC_VERSION_MAJOR 2
#define HWLOC_VERSION_MINOR 0
#define HWLOC_VERSION_RELEASE 4
#define HWLOC_VERSION_MINOR 2
#define HWLOC_VERSION_RELEASE 0
#define HWLOC_VERSION_GREEK ""
#define __hwloc_restrict

View File

@@ -13,7 +13,8 @@
#ifndef HWLOC_BITMAP_H
#define HWLOC_BITMAP_H
#include <hwloc/autogen/config.h>
#include "hwloc/autogen/config.h"
#include <assert.h>
@@ -198,6 +199,9 @@ HWLOC_DECLSPEC int hwloc_bitmap_from_ulong(hwloc_bitmap_t bitmap, unsigned long
/** \brief Setup bitmap \p bitmap from unsigned long \p mask used as \p i -th subset */
HWLOC_DECLSPEC int hwloc_bitmap_from_ith_ulong(hwloc_bitmap_t bitmap, unsigned i, unsigned long mask);
/** \brief Setup bitmap \p bitmap from unsigned longs \p masks used as first \p nr subsets */
HWLOC_DECLSPEC int hwloc_bitmap_from_ulongs(hwloc_bitmap_t bitmap, unsigned nr, const unsigned long *masks);
/*
* Modifying bitmaps.
@@ -256,6 +260,29 @@ HWLOC_DECLSPEC unsigned long hwloc_bitmap_to_ulong(hwloc_const_bitmap_t bitmap)
/** \brief Convert the \p i -th subset of bitmap \p bitmap into unsigned long mask */
HWLOC_DECLSPEC unsigned long hwloc_bitmap_to_ith_ulong(hwloc_const_bitmap_t bitmap, unsigned i) __hwloc_attribute_pure;
/** \brief Convert the first \p nr subsets of bitmap \p bitmap into the array of \p nr unsigned long \p masks
*
* \p nr may be determined earlier with hwloc_bitmap_nr_ulongs().
*
* \return 0
*/
HWLOC_DECLSPEC int hwloc_bitmap_to_ulongs(hwloc_const_bitmap_t bitmap, unsigned nr, unsigned long *masks);
/** \brief Return the number of unsigned longs required for storing bitmap \p bitmap entirely
*
* This is the number of contiguous unsigned longs from the very first bit of the bitmap
* (even if unset) up to the last set bit.
* This is useful for knowing the \p nr parameter to pass to hwloc_bitmap_to_ulongs()
* (or which calls to hwloc_bitmap_to_ith_ulong() are needed)
* to entirely convert a bitmap into multiple unsigned longs.
*
* When called on the output of hwloc_topology_get_topology_cpuset(),
* the returned number is large enough for all cpusets of the topology.
*
* \return -1 if \p bitmap is infinite.
*/
HWLOC_DECLSPEC int hwloc_bitmap_nr_ulongs(hwloc_const_bitmap_t bitmap) __hwloc_attribute_pure;
/** \brief Test whether index \p id is part of bitmap \p bitmap.
*
* \return 1 if the bit at index \p id is set in bitmap \p bitmap, 0 otherwise.

View File

@@ -16,11 +16,11 @@
#ifndef HWLOC_CUDA_H
#define HWLOC_CUDA_H
#include <hwloc.h>
#include <hwloc/autogen/config.h>
#include <hwloc/helper.h>
#include "hwloc.h"
#include "hwloc/autogen/config.h"
#include "hwloc/helper.h"
#ifdef HWLOC_LINUX_SYS
#include <hwloc/linux.h>
#include "hwloc/linux.h"
#endif
#include <cuda.h>

View File

@@ -16,11 +16,11 @@
#ifndef HWLOC_CUDART_H
#define HWLOC_CUDART_H
#include <hwloc.h>
#include <hwloc/autogen/config.h>
#include <hwloc/helper.h>
#include "hwloc.h"
#include "hwloc/autogen/config.h"
#include "hwloc/helper.h"
#ifdef HWLOC_LINUX_SYS
#include <hwloc/linux.h>
#include "hwloc/linux.h"
#endif
#include <cuda.h> /* for CUDA_VERSION */

View File

@@ -1,6 +1,6 @@
/*
* Copyright © 2009 CNRS
* Copyright © 2009-2017 Inria. All rights reserved.
* Copyright © 2009-2018 Inria. All rights reserved.
* Copyright © 2009-2012 Université Bordeaux
* Copyright © 2009-2010 Cisco Systems, Inc. All rights reserved.
* See COPYING in top-level directory.
@@ -21,6 +21,8 @@
extern "C" {
#endif
/* backward compat with v2.0 before WHOLE_SYSTEM renaming */
#define HWLOC_TOPOLOGY_FLAG_WHOLE_SYSTEM HWLOC_TOPOLOGY_FLAG_INCLUDE_DISALLOWED
/* backward compat with v1.11 before System removal */
#define HWLOC_OBJ_SYSTEM HWLOC_OBJ_MACHINE
/* backward compat with v1.10 before Socket->Package renaming */

View File

@@ -87,7 +87,12 @@ enum hwloc_distances_kind_e {
* Such values are currently ignored for distance-based grouping.
* \hideinitializer
*/
HWLOC_DISTANCES_KIND_MEANS_BANDWIDTH = (1UL<<3)
HWLOC_DISTANCES_KIND_MEANS_BANDWIDTH = (1UL<<3),
/** \brief This distances structure covers objects of different types.
* \hideinitializer
*/
HWLOC_DISTANCES_KIND_HETEROGENEOUS_TYPES = (1UL<<4)
};
/** \brief Retrieve distance matrices.
@@ -131,20 +136,32 @@ hwloc_distances_get_by_depth(hwloc_topology_t topology, int depth,
*
* Identical to hwloc_distances_get() with the additional \p type filter.
*/
static __hwloc_inline int
HWLOC_DECLSPEC int
hwloc_distances_get_by_type(hwloc_topology_t topology, hwloc_obj_type_t type,
unsigned *nr, struct hwloc_distances_s **distances,
unsigned long kind, unsigned long flags)
{
int depth = hwloc_get_type_depth(topology, type);
if (depth == HWLOC_TYPE_DEPTH_UNKNOWN || depth == HWLOC_TYPE_DEPTH_MULTIPLE) {
*nr = 0;
return 0;
}
return hwloc_distances_get_by_depth(topology, depth, nr, distances, kind, flags);
}
unsigned long kind, unsigned long flags);
/** \brief Release a distance matrix structure previously returned by hwloc_distances_get(). */
/** \brief Retrieve a distance matrix with the given name.
*
* Usually only one distances structure may match a given name.
*/
HWLOC_DECLSPEC int
hwloc_distances_get_by_name(hwloc_topology_t topology, const char *name,
unsigned *nr, struct hwloc_distances_s **distances,
unsigned long flags);
/** \brief Get a description of what a distances structure contains.
*
* For instance "NUMALatency" for hardware-provided NUMA distances (ACPI SLIT),
* or NULL if unknown.
*/
HWLOC_DECLSPEC const char *
hwloc_distances_get_name(hwloc_topology_t topology, struct hwloc_distances_s *distances);
/** \brief Release a distance matrix structure previously returned by hwloc_distances_get().
*
* \note This function is not required if the structure is removed with hwloc_distances_release_remove().
*/
HWLOC_DECLSPEC void
hwloc_distances_release(hwloc_topology_t topology, struct hwloc_distances_s *distances);
@@ -221,11 +238,11 @@ enum hwloc_distances_add_flag_e {
* The distance from object i to object j is in slot i*nbobjs+j.
*
* \p kind specifies the kind of distance as a OR'ed set of ::hwloc_distances_kind_e.
* Kind ::HWLOC_DISTANCES_KIND_HETEROGENEOUS_TYPES will be automatically added
* if objects of different types are given.
*
* \p flags configures the behavior of the function using an optional OR'ed set of
* ::hwloc_distances_add_flag_e.
*
* Objects must be of the same type. They cannot be of type Group.
*/
HWLOC_DECLSPEC int hwloc_distances_add(hwloc_topology_t topology,
unsigned nbobjs, hwloc_obj_t *objs, hwloc_uint64_t *values,
@@ -237,7 +254,7 @@ HWLOC_DECLSPEC int hwloc_distances_add(hwloc_topology_t topology,
* gathered through the OS.
*
* If these distances were used to group objects, these additional
*Group objects are not removed from the topology.
* Group objects are not removed from the topology.
*/
HWLOC_DECLSPEC int hwloc_distances_remove(hwloc_topology_t topology);
@@ -260,6 +277,12 @@ hwloc_distances_remove_by_type(hwloc_topology_t topology, hwloc_obj_type_t type)
return hwloc_distances_remove_by_depth(topology, depth);
}
/** \brief Release and remove the given distance matrice from the topology.
*
* This function includes a call to hwloc_distances_release().
*/
HWLOC_DECLSPEC int hwloc_distances_release_remove(hwloc_topology_t topology, struct hwloc_distances_s *distances);
/** @} */

View File

@@ -14,7 +14,7 @@
#ifndef HWLOC_GL_H
#define HWLOC_GL_H
#include <hwloc.h>
#include "hwloc.h"
#include <stdio.h>
#include <string.h>

View File

@@ -17,8 +17,9 @@
#ifndef HWLOC_GLIBC_SCHED_H
#define HWLOC_GLIBC_SCHED_H
#include <hwloc.h>
#include <hwloc/helper.h>
#include "hwloc.h"
#include "hwloc/helper.h"
#include <assert.h>
#if !defined _GNU_SOURCE || !defined _SCHED_H || (!defined CPU_SETSIZE && !defined sched_priority)

View File

@@ -1,6 +1,6 @@
/*
* Copyright © 2009 CNRS
* Copyright © 2009-2019 Inria. All rights reserved.
* Copyright © 2009-2020 Inria. All rights reserved.
* Copyright © 2009-2012 Université Bordeaux
* Copyright © 2009-2010 Cisco Systems, Inc. All rights reserved.
* See COPYING in top-level directory.
@@ -527,30 +527,36 @@ hwloc_obj_type_is_io(hwloc_obj_type_t type);
*
* Memory objects are objects attached to their parents
* in the Memory children list.
* This current only includes NUMA nodes.
* This current includes NUMA nodes and Memory-side caches.
*
* \return 1 if an object of type \p type is a Memory object, 0 otherwise.
*/
HWLOC_DECLSPEC int
hwloc_obj_type_is_memory(hwloc_obj_type_t type);
/** \brief Check whether an object type is a Cache (Data, Unified or Instruction).
/** \brief Check whether an object type is a CPU Cache (Data, Unified or Instruction).
*
* Memory-side caches are not CPU caches.
*
* \return 1 if an object of type \p type is a Cache, 0 otherwise.
*/
HWLOC_DECLSPEC int
hwloc_obj_type_is_cache(hwloc_obj_type_t type);
/** \brief Check whether an object type is a Data or Unified Cache.
/** \brief Check whether an object type is a CPU Data or Unified Cache.
*
* \return 1 if an object of type \p type is a Data or Unified Cache, 0 otherwise.
* Memory-side caches are not CPU caches.
*
* \return 1 if an object of type \p type is a CPU Data or Unified Cache, 0 otherwise.
*/
HWLOC_DECLSPEC int
hwloc_obj_type_is_dcache(hwloc_obj_type_t type);
/** \brief Check whether an object type is a Instruction Cache,
/** \brief Check whether an object type is a CPU Instruction Cache,
*
* \return 1 if an object of type \p type is a Instruction Cache, 0 otherwise.
* Memory-side caches are not CPU caches.
*
* \return 1 if an object of type \p type is a CPU Instruction Cache, 0 otherwise.
*/
HWLOC_DECLSPEC int
hwloc_obj_type_is_icache(hwloc_obj_type_t type);
@@ -666,6 +672,24 @@ hwloc_get_shared_cache_covering_obj (hwloc_topology_t topology __hwloc_attribute
* package has fewer caches than its peers.
*/
/** \brief Remove simultaneous multithreading PUs from a CPU set.
*
* For each core in \p topology, if \p cpuset contains some PUs of that core,
* modify \p cpuset to only keep a single PU for that core.
*
* \p which specifies which PU will be kept.
* PU are considered in physical index order.
* If 0, for each core, the function keeps the first PU that was originally set in \p cpuset.
*
* If \p which is larger than the number of PUs in a core there were originally set in \p cpuset,
* no PU is kept for that core.
*
* \note PUs that are not below a Core object are ignored
* (for instance if the topology does not contain any Core object).
* None of them is removed from \p cpuset.
*/
HWLOC_DECLSPEC int hwloc_bitmap_singlify_per_core(hwloc_topology_t topology, hwloc_bitmap_t cpuset, unsigned which);
/** \brief Returns the object of type ::HWLOC_OBJ_PU with \p os_index.
*
* This function is useful for converting a CPU set into the PU
@@ -914,7 +938,7 @@ hwloc_topology_get_complete_cpuset(hwloc_topology_t topology) __hwloc_attribute_
* \note The returned cpuset is not newly allocated and should thus not be
* changed or freed; hwloc_bitmap_dup() must be used to obtain a local copy.
*
* \note This is equivalent to retrieving the root object complete CPU-set.
* \note This is equivalent to retrieving the root object CPU-set.
*/
HWLOC_DECLSPEC hwloc_const_cpuset_t
hwloc_topology_get_topology_cpuset(hwloc_topology_t topology) __hwloc_attribute_pure;
@@ -923,11 +947,11 @@ hwloc_topology_get_topology_cpuset(hwloc_topology_t topology) __hwloc_attribute_
*
* \return the CPU set of allowed logical processors of the system.
*
* \note If the topology flag ::HWLOC_TOPOLOGY_FLAG_WHOLE_SYSTEM was not set,
* \note If the topology flag ::HWLOC_TOPOLOGY_FLAG_INCLUDE_DISALLOWED was not set,
* this is identical to hwloc_topology_get_topology_cpuset(), which means
* all PUs are allowed.
*
* \note If ::HWLOC_TOPOLOGY_FLAG_WHOLE_SYSTEM was set, applying
* \note If ::HWLOC_TOPOLOGY_FLAG_INCLUDE_DISALLOWED was set, applying
* hwloc_bitmap_intersects() on the result of this function and on an object
* cpuset checks whether there are allowed PUs inside that object.
* Applying hwloc_bitmap_and() returns the list of these allowed PUs.
@@ -945,7 +969,7 @@ hwloc_topology_get_allowed_cpuset(hwloc_topology_t topology) __hwloc_attribute_p
* \note The returned nodeset is not newly allocated and should thus not be
* changed or freed; hwloc_bitmap_dup() must be used to obtain a local copy.
*
* \note This is equivalent to retrieving the root object complete CPU-set.
* \note This is equivalent to retrieving the root object complete nodeset.
*/
HWLOC_DECLSPEC hwloc_const_nodeset_t
hwloc_topology_get_complete_nodeset(hwloc_topology_t topology) __hwloc_attribute_pure;
@@ -959,7 +983,7 @@ hwloc_topology_get_complete_nodeset(hwloc_topology_t topology) __hwloc_attribute
* \note The returned nodeset is not newly allocated and should thus not be
* changed or freed; hwloc_bitmap_dup() must be used to obtain a local copy.
*
* \note This is equivalent to retrieving the root object complete CPU-set.
* \note This is equivalent to retrieving the root object nodeset.
*/
HWLOC_DECLSPEC hwloc_const_nodeset_t
hwloc_topology_get_topology_nodeset(hwloc_topology_t topology) __hwloc_attribute_pure;
@@ -968,11 +992,11 @@ hwloc_topology_get_topology_nodeset(hwloc_topology_t topology) __hwloc_attribute
*
* \return the node set of allowed memory of the system.
*
* \note If the topology flag ::HWLOC_TOPOLOGY_FLAG_WHOLE_SYSTEM was not set,
* \note If the topology flag ::HWLOC_TOPOLOGY_FLAG_INCLUDE_DISALLOWED was not set,
* this is identical to hwloc_topology_get_topology_nodeset(), which means
* all NUMA nodes are allowed.
*
* \note If ::HWLOC_TOPOLOGY_FLAG_WHOLE_SYSTEM was set, applying
* \note If ::HWLOC_TOPOLOGY_FLAG_INCLUDE_DISALLOWED was set, applying
* hwloc_bitmap_intersects() on the result of this function and on an object
* nodeset checks whether there are allowed NUMA nodes inside that object.
* Applying hwloc_bitmap_and() returns the list of these allowed NUMA nodes.
@@ -992,15 +1016,16 @@ hwloc_topology_get_allowed_nodeset(hwloc_topology_t topology) __hwloc_attribute_
* @{
*/
/** \brief Convert a CPU set into a NUMA node set and handle non-NUMA cases
/** \brief Convert a CPU set into a NUMA node set
*
* For each PU included in the input \p _cpuset, set the corresponding
* local NUMA node(s) in the output \p nodeset.
*
* If some NUMA nodes have no CPUs at all, this function never sets their
* indexes in the output node set, even if a full CPU set is given in input.
*
* If the topology contains no NUMA nodes, the machine is considered
* as a single memory node, and the following behavior is used:
* If \p cpuset is empty, \p nodeset will be emptied as well.
* Otherwise \p nodeset will be entirely filled.
* Hence the entire topology CPU set is converted into the set of all nodes
* that have some local CPUs.
*/
static __hwloc_inline int
hwloc_cpuset_to_nodeset(hwloc_topology_t topology, hwloc_const_cpuset_t _cpuset, hwloc_nodeset_t nodeset)
@@ -1015,13 +1040,16 @@ hwloc_cpuset_to_nodeset(hwloc_topology_t topology, hwloc_const_cpuset_t _cpuset,
return 0;
}
/** \brief Convert a NUMA node set into a CPU set and handle non-NUMA cases
/** \brief Convert a NUMA node set into a CPU set
*
* If the topology contains no NUMA nodes, the machine is considered
* as a single memory node, and the following behavior is used:
* If \p nodeset is empty, \p cpuset will be emptied as well.
* Otherwise \p cpuset will be entirely filled.
* This is useful for manipulating memory binding sets.
* For each NUMA node included in the input \p nodeset, set the corresponding
* local PUs in the output \p _cpuset.
*
* If some CPUs have no local NUMA nodes, this function never sets their
* indexes in the output CPU set, even if a full node set is given in input.
*
* Hence the entire topology node set is converted into the set of all CPUs
* that have some local NUMA nodes.
*/
static __hwloc_inline int
hwloc_cpuset_from_nodeset(hwloc_topology_t topology, hwloc_cpuset_t _cpuset, hwloc_const_nodeset_t nodeset)

View File

@@ -13,11 +13,13 @@
#ifndef HWLOC_INTEL_MIC_H
#define HWLOC_INTEL_MIC_H
#include <hwloc.h>
#include <hwloc/autogen/config.h>
#include <hwloc/helper.h>
#include "hwloc.h"
#include "hwloc/autogen/config.h"
#include "hwloc/helper.h"
#ifdef HWLOC_LINUX_SYS
#include <hwloc/linux.h>
#include "hwloc/linux.h"
#include <dirent.h>
#include <string.h>
#endif

View File

@@ -15,7 +15,8 @@
#ifndef HWLOC_LINUX_LIBNUMA_H
#define HWLOC_LINUX_LIBNUMA_H
#include <hwloc.h>
#include "hwloc.h"
#include <numa.h>

Some files were not shown because too many files have changed in this diff Show More