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3 Commits

Author SHA1 Message Date
xmrig
ebb0f81f2f Update CHANGELOG.md 2017-05-26 09:07:45 +03:00
XMRig
eb3e2b8868 Fix gcc7 support. 2017-05-25 09:32:39 +03:00
XMRig
583d892eb5 Workaround for AMD CPUs https://github.com/anrieff/libcpuid/issues/97 2017-05-24 18:50:24 +03:00
8 changed files with 24 additions and 13 deletions

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@@ -1,3 +1,7 @@
# v0.8.2
- Fixed L2 cache size detection for AMD CPUs (Bulldozer/Piledriver/Steamroller/Excavator architecture).
- Fixed gcc 7.1 support.
# v0.8.1
- Added nicehash support, detects automaticaly by pool URL, for example `cryptonight.eu.nicehash.com:3355` or manually via option `--nicehash`.

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@@ -116,7 +116,7 @@ inline void aes_genkey(const __m128i* memory, __m128i* k0, __m128i* k1, __m128i*
}
inline void cn_explode_scratchpad(const __m128i* input, __m128i* output)
static inline void cn_explode_scratchpad(const __m128i* input, __m128i* output)
{
// This is more than we have registers, compiler will assign 2 keys on the stack
__m128i xin0, xin1, xin2, xin3, xin4, xin5, xin6, xin7;
@@ -157,7 +157,7 @@ inline void cn_explode_scratchpad(const __m128i* input, __m128i* output)
}
inline void cn_implode_scratchpad(const __m128i* input, __m128i* output)
static inline void cn_implode_scratchpad(const __m128i* input, __m128i* output)
{
// This is more than we have registers, compiler will assign 2 keys on the stack
__m128i xout0, xout1, xout2, xout3, xout4, xout5, xout6, xout7;

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@@ -97,7 +97,7 @@ inline void aes_genkey(const __m128i* memory, __m128i* k0, __m128i* k1, __m128i*
}
inline void cn_explode_scratchpad(const __m128i* input, __m128i* output)
static inline void cn_explode_scratchpad(const __m128i* input, __m128i* output)
{
// This is more than we have registers, compiler will assign 2 keys on the stack
__m128i xin0, xin1, xin2, xin3, xin4, xin5, xin6, xin7;
@@ -138,7 +138,7 @@ inline void cn_explode_scratchpad(const __m128i* input, __m128i* output)
}
inline void cn_implode_scratchpad(const __m128i* input, __m128i* output)
static inline void cn_implode_scratchpad(const __m128i* input, __m128i* output)
{
// This is more than we have registers, compiler will assign 2 keys on the stack
__m128i xout0, xout1, xout2, xout3, xout4, xout5, xout6, xout7;

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@@ -116,7 +116,7 @@ inline void aes_genkey(const __m128i* memory, __m128i* k0, __m128i* k1, __m128i*
}
inline void cn_explode_scratchpad(const __m128i* input, __m128i* output)
static inline void cn_explode_scratchpad(const __m128i* input, __m128i* output)
{
// This is more than we have registers, compiler will assign 2 keys on the stack
__m128i xin0, xin1, xin2, xin3, xin4, xin5, xin6, xin7;
@@ -157,7 +157,7 @@ inline void cn_explode_scratchpad(const __m128i* input, __m128i* output)
}
inline void cn_implode_scratchpad(const __m128i* input, __m128i* output)
static inline void cn_implode_scratchpad(const __m128i* input, __m128i* output)
{
// This is more than we have registers, compiler will assign 2 keys on the stack
__m128i xout0, xout1, xout2, xout3, xout4, xout5, xout6, xout7;

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@@ -97,7 +97,7 @@ inline void aes_genkey(const __m128i* memory, __m128i* k0, __m128i* k1, __m128i*
}
inline void cn_explode_scratchpad(const __m128i* input, __m128i* output)
static inline void cn_explode_scratchpad(const __m128i* input, __m128i* output)
{
// This is more than we have registers, compiler will assign 2 keys on the stack
__m128i xin0, xin1, xin2, xin3, xin4, xin5, xin6, xin7;
@@ -138,7 +138,7 @@ inline void cn_explode_scratchpad(const __m128i* input, __m128i* output)
}
inline void cn_implode_scratchpad(const __m128i* input, __m128i* output)
static inline void cn_implode_scratchpad(const __m128i* input, __m128i* output)
{
// This is more than we have registers, compiler will assign 2 keys on the stack
__m128i xout0, xout1, xout2, xout3, xout4, xout5, xout6, xout7;

11
cpu.c
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@@ -31,7 +31,6 @@
#endif
#include "cpu.h"
#include "utils/applog.h"
#ifndef BUILD_TEST
@@ -47,9 +46,17 @@ void cpu_init_common() {
cpu_info.total_logical_cpus = data.total_logical_cpus;
cpu_info.sockets = data.total_logical_cpus / data.num_logical_cpus;
cpu_info.total_cores = data.num_cores * cpu_info.sockets;
cpu_info.l2_cache = data.l2_cache > 0 ? data.l2_cache * cpu_info.total_cores * cpu_info.sockets : 0;
cpu_info.l3_cache = data.l3_cache > 0 ? data.l3_cache * cpu_info.sockets : 0;
// Workaround for AMD CPUs https://github.com/anrieff/libcpuid/issues/97
if (data.vendor == VENDOR_AMD && data.l3_cache <= 0 && data.l2_assoc == 16 && data.ext_family >= 21) {
cpu_info.l2_cache = data.l2_cache * (cpu_info.total_cores / 2) * cpu_info.sockets;
}
else {
cpu_info.l2_cache = data.l2_cache > 0 ? data.l2_cache * cpu_info.total_cores * cpu_info.sockets : 0;
}
# ifdef __x86_64__
cpu_info.flags |= CPU_FLAG_X86_64;
# endif

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@@ -27,14 +27,14 @@
#define APP_ID "xmrig"
#define APP_NAME "XMRig"
#define APP_DESC "Monero (XMR) CPU miner"
#define APP_VERSION "0.8.1"
#define APP_VERSION "0.8.2"
#define APP_DOMAIN "xmrig.com"
#define APP_SITE "www.xmrig.com"
#define APP_COPYRIGHT "Copyright (C) 2016-2017 xmrig.com"
#define APP_VER_MAJOR 0
#define APP_VER_MINOR 8
#define APP_VER_BUILD 1
#define APP_VER_BUILD 2
#define APP_VER_REV 0
#endif /* __VERSION_H__ */

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@@ -641,8 +641,8 @@ static bool start_mining() {
* @return
*/
int main(int argc, char *argv[]) {
cpu_init();
applog_init();
cpu_init();
parse_cmdline(argc, argv);
persistent_memory_allocate();
print_summary();