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evo ... v6.18.1

Author SHA1 Message Date
XMRig
28e81bd7c0 v6.18.1 2022-10-23 17:44:24 +07:00
XMRig
54e75bc7c4 Merge branch 'dev' 2022-10-23 17:43:38 +07:00
xmrig
c388113a30 Update CHANGELOG.md 2022-10-23 17:14:57 +07:00
xmrig
36afeec225 Merge pull request #3134 from SChernykh/dev
Added Zen4 to randomx_boost.sh
2022-10-10 03:37:06 +07:00
SChernykh
4b5e56416d Added Zen4 to randomx_boost.sh 2022-10-09 22:02:50 +02:00
xmrig
0d314d0469 Merge pull request #3132 from SChernykh/dev
RandomX: added MSR mod for Zen 4
2022-10-01 23:40:04 +07:00
SChernykh
7fc45dfb2d RandomX: added MSR mod for Zen 4
+0.8% faster on Ryzen 9 7950X
2022-10-01 18:33:04 +02:00
xmrig
2ba40edee0 Update CHANGELOG.md 2022-09-25 17:01:33 +07:00
9 changed files with 58 additions and 18 deletions

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@@ -1,3 +1,13 @@
# v6.18.1
- [#3129](https://github.com/xmrig/xmrig/pull/3129) Fix: protectRX flushed CPU cache only on MacOS/iOS.
- [#3126](https://github.com/xmrig/xmrig/pull/3126) Don't reset when pool sends the same job blob.
- [#3120](https://github.com/xmrig/xmrig/pull/3120) RandomX: optimized `CFROUND` elimination.
- [#3109](https://github.com/xmrig/xmrig/pull/3109) RandomX: added Blake2 AVX2 version.
- [#3082](https://github.com/xmrig/xmrig/pull/3082) Fixed GCC 12 warnings.
- [#3075](https://github.com/xmrig/xmrig/pull/3075) Recognize `armv7ve` as valid ARMv7 target.
- [#3132](https://github.com/xmrig/xmrig/pull/3132) RandomX: added MSR mod for Zen 4.
- [#3134](https://github.com/xmrig/xmrig/pull/3134) Added Zen4 to `randomx_boost.sh`.
# v6.18.0
- [#3067](https://github.com/xmrig/xmrig/pull/3067) Monero v15 network upgrade support and more house keeping.
- Removed deprecated AstroBWTv1 and v2.

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@@ -10,14 +10,24 @@ fi
if grep -E 'AMD Ryzen|AMD EPYC' /proc/cpuinfo > /dev/null;
then
if grep "cpu family[[:space:]]:[[:space:]]25" /proc/cpuinfo > /dev/null;
if grep "cpu family[[:space:]]\{1,\}:[[:space:]]25" /proc/cpuinfo > /dev/null;
then
echo "Detected Zen3 CPU"
wrmsr -a 0xc0011020 0x4480000000000
wrmsr -a 0xc0011021 0x1c000200000040
wrmsr -a 0xc0011022 0xc000000401500000
wrmsr -a 0xc001102b 0x2000cc14
echo "MSR register values for Zen3 applied"
if grep "model[[:space:]]\{1,\}:[[:space:]]97" /proc/cpuinfo > /dev/null;
then
echo "Detected Zen4 CPU"
wrmsr -a 0xc0011020 0x4400000000000
wrmsr -a 0xc0011021 0x4000000000040
wrmsr -a 0xc0011022 0x8680000401570000
wrmsr -a 0xc001102b 0x2040cc10
echo "MSR register values for Zen4 applied"
else
echo "Detected Zen3 CPU"
wrmsr -a 0xc0011020 0x4480000000000
wrmsr -a 0xc0011021 0x1c000200000040
wrmsr -a 0xc0011022 0xc000000401500000
wrmsr -a 0xc001102b 0x2000cc14
echo "MSR register values for Zen3 applied"
fi
else
echo "Detected Zen1/Zen2 CPU"
wrmsr -a 0xc0011020 0

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@@ -77,8 +77,11 @@ xmrig::CpuWorker<N>::CpuWorker(size_t id, const CpuLaunchData &data) :
{
# ifdef XMRIG_ALGO_CN_HEAVY
// cn-heavy optimization for Zen3 CPUs
const bool is_vermeer = (Cpu::info()->arch() == ICpuInfo::ARCH_ZEN3) && (Cpu::info()->model() == 0x21);
if ((N == 1) && (m_av == CnHash::AV_SINGLE) && (m_algorithm.family() == Algorithm::CN_HEAVY) && (m_assembly != Assembly::NONE) && is_vermeer) {
const auto arch = Cpu::info()->arch();
const uint32_t model = Cpu::info()->model();
const bool is_vermeer = (arch == ICpuInfo::ARCH_ZEN3) && (model == 0x21);
const bool is_raphael = (arch == ICpuInfo::ARCH_ZEN4) && (model == 0x61);
if ((N == 1) && (m_av == CnHash::AV_SINGLE) && (m_algorithm.family() == Algorithm::CN_HEAVY) && (m_assembly != Assembly::NONE) && (is_vermeer || is_raphael)) {
std::lock_guard<std::mutex> lock(cn_heavyZen3MemoryMutex);
if (!cn_heavyZen3Memory) {
// Round up number of threads to the multiple of 8

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@@ -45,19 +45,21 @@ public:
ARCH_ZEN,
ARCH_ZEN_PLUS,
ARCH_ZEN2,
ARCH_ZEN3
ARCH_ZEN3,
ARCH_ZEN4
};
enum MsrMod : uint32_t {
MSR_MOD_NONE,
MSR_MOD_RYZEN_17H,
MSR_MOD_RYZEN_19H,
MSR_MOD_RYZEN_19H_ZEN4,
MSR_MOD_INTEL,
MSR_MOD_CUSTOM,
MSR_MOD_MAX
};
# define MSR_NAMES_LIST "none", "ryzen_17h", "ryzen_19h", "intel", "custom"
# define MSR_NAMES_LIST "none", "ryzen_17h", "ryzen_19h", "ryzen_19h_zen4", "intel", "custom"
enum Flag : uint32_t {
FLAG_AES,

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@@ -64,7 +64,7 @@ static_assert(kCpuFlagsSize == ICpuInfo::FLAG_MAX, "kCpuFlagsSize and FLAG_MAX m
#ifdef XMRIG_FEATURE_MSR
constexpr size_t kMsrArraySize = 5;
constexpr size_t kMsrArraySize = 6;
static const std::array<const char *, kMsrArraySize> msrNames = { MSR_NAMES_LIST };
static_assert(kMsrArraySize == ICpuInfo::MSR_MOD_MAX, "kMsrArraySize and MSR_MOD_MAX mismatch");
#endif
@@ -250,8 +250,14 @@ xmrig::BasicCpuInfo::BasicCpuInfo() :
break;
case 0x19:
m_arch = ARCH_ZEN3;
m_msrMod = MSR_MOD_RYZEN_19H;
if (m_model == 0x61) {
m_arch = ARCH_ZEN4;
m_msrMod = MSR_MOD_RYZEN_19H_ZEN4;
}
else {
m_arch = ARCH_ZEN3;
m_msrMod = MSR_MOD_RYZEN_19H;
}
break;
default:

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@@ -407,8 +407,12 @@ xmrig::cn_hash_fun xmrig::CnHash::fn(const Algorithm &algorithm, AlgoVariant av,
}
# ifdef XMRIG_ALGO_CN_HEAVY
// cn-heavy optimization for Zen3 CPUs
if ((av == AV_SINGLE) && (assembly != Assembly::NONE) && (Cpu::info()->arch() == ICpuInfo::ARCH_ZEN3) && (Cpu::info()->model() == 0x21)) {
// cn-heavy optimization for Zen3/Zen4 CPUs
const auto arch = Cpu::info()->arch();
const uint32_t model = Cpu::info()->model();
const bool is_vermeer = (arch == ICpuInfo::ARCH_ZEN3) && (model == 0x21);
const bool is_raphael = (arch == ICpuInfo::ARCH_ZEN4) && (model == 0x61);
if ((av == AV_SINGLE) && (assembly != Assembly::NONE) && (is_vermeer || is_raphael)) {
switch (algorithm.id()) {
case Algorithm::CN_HEAVY_0:
return cryptonight_single_hash<Algorithm::CN_HEAVY_0, false, 3>;

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@@ -262,6 +262,10 @@ namespace randomx {
// AVX2 init is faster on Zen3
initDatasetAVX2 = true;
break;
case xmrig::ICpuInfo::ARCH_ZEN4:
// AVX2 init is slower on Zen4
initDatasetAVX2 = false;
break;
}
}
}

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@@ -58,12 +58,13 @@ static const std::array<const char *, RxConfig::ModeMax> modeNames = { "auto", "
#ifdef XMRIG_FEATURE_MSR
constexpr size_t kMsrArraySize = 5;
constexpr size_t kMsrArraySize = 6;
static const std::array<MsrItems, kMsrArraySize> msrPresets = {
MsrItems(),
MsrItems{{ 0xC0011020, 0ULL }, { 0xC0011021, 0x40ULL, ~0x20ULL }, { 0xC0011022, 0x1510000ULL }, { 0xC001102b, 0x2000cc16ULL }},
MsrItems{{ 0xC0011020, 0x0004480000000000ULL }, { 0xC0011021, 0x001c000200000040ULL, ~0x20ULL }, { 0xC0011022, 0xc000000401500000ULL }, { 0xC001102b, 0x2000cc14ULL }},
MsrItems{{ 0xC0011020, 0x0004400000000000ULL }, { 0xC0011021, 0x0004000000000040ULL, ~0x20ULL }, { 0xC0011022, 0x8680000401570000ULL }, { 0xC001102b, 0x2040cc10ULL }},
MsrItems{{ 0x1a4, 0xf }},
MsrItems()
};

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@@ -22,7 +22,7 @@
#define APP_ID "xmrig"
#define APP_NAME "XMRig"
#define APP_DESC "XMRig miner"
#define APP_VERSION "6.18.1-dev"
#define APP_VERSION "6.18.1"
#define APP_DOMAIN "xmrig.com"
#define APP_SITE "www.xmrig.com"
#define APP_COPYRIGHT "Copyright (C) 2016-2022 xmrig.com"