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3 Commits

Author SHA1 Message Date
XMRig
064a61988a Update deps scripts. 2025-06-12 00:52:49 +07:00
xmrig
2ab7f85ccd Merge pull request #3665 from SChernykh/dev
Tweaked autoconfig for AMD CPUs with < 2 MB L3 cache per thread
2025-06-11 23:40:46 +07:00
SChernykh
e4c30eb0dd Tweaked autoconfig for AMD CPUs with < 2 MB L3 cache per thread 2025-06-11 18:34:50 +02:00
4 changed files with 6 additions and 5 deletions

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@@ -1,8 +1,8 @@
#!/bin/sh -e #!/bin/sh -e
HWLOC_VERSION_MAJOR="2" HWLOC_VERSION_MAJOR="2"
HWLOC_VERSION_MINOR="11" HWLOC_VERSION_MINOR="12"
HWLOC_VERSION_PATCH="2" HWLOC_VERSION_PATCH="1"
HWLOC_VERSION="${HWLOC_VERSION_MAJOR}.${HWLOC_VERSION_MINOR}.${HWLOC_VERSION_PATCH}" HWLOC_VERSION="${HWLOC_VERSION_MAJOR}.${HWLOC_VERSION_MINOR}.${HWLOC_VERSION_PATCH}"

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@@ -1,6 +1,6 @@
#!/bin/sh -e #!/bin/sh -e
OPENSSL_VERSION="3.0.15" OPENSSL_VERSION="3.0.16"
mkdir -p deps mkdir -p deps
mkdir -p deps/include mkdir -p deps/include

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@@ -1,6 +1,6 @@
#!/bin/sh -e #!/bin/sh -e
UV_VERSION="1.49.2" UV_VERSION="1.51.0"
mkdir -p deps mkdir -p deps
mkdir -p deps/include mkdir -p deps/include

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@@ -322,7 +322,8 @@ void xmrig::HwlocCpuInfo::processTopLevelCache(hwloc_obj_t cache, const Algorith
if (L3_exclusive) { if (L3_exclusive) {
if (vendor() == VENDOR_AMD) { if (vendor() == VENDOR_AMD) {
extra += std::min<size_t>(l2->attr->cache.size, scratchpad); // For some reason, AMD CPUs can use only half of the exclusive L2/L3 cache combo efficiently
extra += std::min<size_t>(l2->attr->cache.size / 2, scratchpad);
} }
else if (l2->attr->cache.size >= scratchpad) { else if (l2->attr->cache.size >= scratchpad) {
extra += scratchpad; extra += scratchpad;