Merge a776ebf394 into c5d8b8265b

Merge pull request #3571 from SChernykh/dev
Fix number of threads on the new Intel Core Ultra CPUs
2026-07-02 15:02:43 -04:00 · 2024-10-26 12:34:41 +07:00 · 2024-10-25 20:55:35 +07:00 · 2024-10-25 13:44:24 +02:00
1 changed files with 1 additions and 1 deletions
@@ -342,7 +342,7 @@ void xmrig::HwlocCpuInfo::processTopLevelCache(hwloc_obj_t cache, const Algorith
    }
 #   ifdef XMRIG_ALGO_RANDOMX
-    if ((algorithm.family() == Algorithm::RANDOM_X) && L3_exclusive && (PUs > cores.size()) && (PUs < cores.size() * 2)) {
+    if ((vendor() == VENDOR_INTEL) && (algorithm.family() == Algorithm::RANDOM_X) && L3_exclusive && (PUs < cores.size() * 2)) {
        // Use all L3+L2 on latest Intel CPUs with P-cores, E-cores and exclusive L3 cache
        cacheHashes = (L3 + L2) / scratchpad;
    }
Author	SHA1	Message	Date
Tony Butler	1eaecc1cc7	Merge `a776ebf394` into `c5d8b8265b`	2024-10-26 12:34:41 +07:00
xmrig	c5d8b8265b	Merge pull request #3571 from SChernykh/dev Fix number of threads on the new Intel Core Ultra CPUs	2024-10-25 20:55:35 +07:00
SChernykh	77c14c8362	Fix number of threads on the new Intel Core Ultra CPUs	2024-10-25 13:44:24 +02:00