1
0
mirror of https://github.com/xmrig/xmrig.git synced 2025-12-07 07:55:04 -05:00

Compare commits

...

36 Commits

Author SHA1 Message Date
Tony Butler
862280f28c How about this way 2023-07-12 02:06:53 -06:00
Tony Butler
814e1de2a6 CN: Consistency cleanup 2023-07-12 02:06:53 -06:00
XMRig
e7de104d88 v6.20.1-dev 2023-07-03 18:47:55 +07:00
XMRig
3b5e04b1b7 Merge branch 'master' into dev 2023-07-03 18:47:22 +07:00
XMRig
2e77faa80c v6.20.0 2023-07-03 12:42:00 +07:00
XMRig
6e63a246bf Merge branch 'dev' 2023-07-03 12:41:35 +07:00
XMRig
09abc81255 v6.20.0-dev 2023-07-03 12:37:36 +07:00
xmrig
fc698f7bcf Merge pull request #3291 from SChernykh/dev
Zephyr solo mining: fix for blocks with transactions
2023-06-24 20:22:53 +07:00
SChernykh
cb2f8fd453 Zephyr solo mining: fix for blocks with transactions 2023-06-24 15:15:37 +02:00
xmrig
59c6c42ceb Merge pull request #3290 from SChernykh/dev
Zephyr coin support
2023-06-24 19:53:54 +07:00
SChernykh
6c10cc5a4b Zephyr coin support
Solo mining will require `--coin Zephyr` in command line, or `"coin": "Zephyr",` in `pools` section of config.json
2023-06-24 14:37:20 +02:00
xmrig
d5a8f8a5ae Merge pull request #3288 from SChernykh/dev
KawPow: fixed data race when building programs
2023-06-19 17:40:24 +07:00
SChernykh
d94d052e6c KawPow: fixed data race when building programs
`uv_queue_work` can't be called from other threads, only `uv_async_send` is thread-safe.
2023-06-19 12:32:28 +02:00
XMRig
ae2b7e3348 Merge branch 'Spudz76-dev-addApiRebind' into dev 2023-06-07 20:49:34 +07:00
XMRig
7d7f30701f Code cleanup. 2023-06-07 20:48:56 +07:00
XMRig
e80fc25789 Merge branch 'dev-addApiRebind' of https://github.com/Spudz76/xmrig into Spudz76-dev-addApiRebind 2023-06-07 20:12:58 +07:00
XMRig
ff53be5f3b Merge branch 'benthetechguy-readme' into dev 2023-06-07 00:52:37 +07:00
XMRig
6981e68ae3 Merge branch 'readme' of https://github.com/benthetechguy/xmrig into benthetechguy-readme 2023-06-07 00:52:03 +07:00
XMRig
c7e541d84f Disallow direct use of HwlocCpuInfo class. 2023-06-07 00:32:09 +07:00
XMRig
a2ae17b4c4 Code cleanup. 2023-06-06 23:15:58 +07:00
XMRig
554b60966b Fixed compatibility with hwloc 1.11. 2023-06-06 02:30:10 +07:00
xmrig
0378aa8df4 Merge pull request #3236 from MrFoxPro/dev
fix(cuda): receive CUDA loader error on linux too.
2023-06-05 23:07:38 +07:00
XMRig
6dbd46a891 Added new CMake options ARM_V8 and ARM_V7. 2023-06-04 20:32:05 +07:00
XMRig
055db83142 Added new ARM CPU names. 2023-06-04 19:36:53 +07:00
XMRig
cdd5dff337 v6.19.4-dev 2023-06-03 21:14:26 +07:00
XMRig
bc5fe8f456 Merge branch 'master' into dev 2023-06-03 21:13:51 +07:00
XMRig
0bc87345c4 v6.19.3 2023-06-03 19:59:18 +07:00
XMRig
f17d31e61a Merge branch 'dev' 2023-06-03 19:57:36 +07:00
xmrig
e6bf4c0077 Update CHANGELOG.md 2023-06-02 22:12:18 +07:00
xmrig
ff79b8fce4 Merge pull request #3280 from SChernykh/dev
Updated example scripts
2023-06-02 17:47:13 +07:00
SChernykh
af87369e4f Updated example scripts
- Hashvault is top 1 pool now, so changed it to a smaller pool
- node.xmr.to doesn't exist anymore
2023-06-02 09:34:26 +02:00
xmrig
65fc16d5ac Merge pull request #3275 from SChernykh/dev
RandomX: fixed `jccErratum` list
2023-05-26 18:25:57 +07:00
SChernykh
826e23b4c4 Fixed jccErratum list 2023-05-26 12:46:59 +02:00
Tony Butler
548fbb9f71 Add API rebind polling 2023-05-23 16:49:43 -06:00
Dmitriy Nikiforov
62a3a98e7d fix(cuda): receive CUDA loader error on linux too. 2023-03-27 18:48:13 +05:00
benthetechguy
c0bce256e1 Add x86 to README 2022-05-31 21:15:37 -04:00
31 changed files with 480 additions and 355 deletions

View File

@@ -1,3 +1,20 @@
# v6.20.0
- Added new ARM CPU names.
- [#2394](https://github.com/xmrig/xmrig/pull/2394) Added new CMake options `ARM_V8` and `ARM_V7`.
- [#2830](https://github.com/xmrig/xmrig/pull/2830) Added API rebind polling.
- [#2927](https://github.com/xmrig/xmrig/pull/2927) Fixed compatibility with hwloc 1.11.x.
- [#3060](https://github.com/xmrig/xmrig/pull/3060) Added x86 to `README.md`.
- [#3236](https://github.com/xmrig/xmrig/pull/3236) Fixed: receive CUDA loader error on Linux too.
- [#3290](https://github.com/xmrig/xmrig/pull/3290) Added [Zephyr](https://www.zephyrprotocol.com/) coin support for solo mining.
# v6.19.3
- [#3245](https://github.com/xmrig/xmrig/issues/3245) Improved algorithm negotiation for donation rounds by sending extra information about current mining job.
- [#3254](https://github.com/xmrig/xmrig/pull/3254) Tweaked auto-tuning for Intel CPUs.
- [#3271](https://github.com/xmrig/xmrig/pull/3271) RandomX: optimized program generation.
- [#3273](https://github.com/xmrig/xmrig/pull/3273) RandomX: fixed undefined behavior.
- [#3275](https://github.com/xmrig/xmrig/pull/3275) RandomX: fixed `jccErratum` list.
- [#3280](https://github.com/xmrig/xmrig/pull/3280) Updated example scripts.
# v6.19.2
- [#3230](https://github.com/xmrig/xmrig/pull/3230) Fixed parsing of `TX_EXTRA_MERGE_MINING_TAG`.
- [#3232](https://github.com/xmrig/xmrig/pull/3232) Added new `X-Hash-Difficulty` HTTP header.

View File

@@ -34,7 +34,8 @@ option(WITH_SECURE_JIT "Enable secure access to JIT memory" OFF)
option(WITH_DMI "Enable DMI/SMBIOS reader" ON)
option(BUILD_STATIC "Build static binary" OFF)
option(ARM_TARGET "Force use specific ARM target 8 or 7" 0)
option(ARM_V8 "Force ARMv8 (64 bit) architecture, use with caution if automatic detection fails, but you sure it may work" OFF)
option(ARM_V7 "Force ARMv7 (32 bit) architecture, use with caution if automatic detection fails, but you sure it may work" OFF)
option(HWLOC_DEBUG "Enable hwloc debug helpers and log" OFF)

View File

@@ -10,7 +10,7 @@
XMRig is a high performance, open source, cross platform RandomX, KawPow, CryptoNight and [GhostRider](https://github.com/xmrig/xmrig/tree/master/src/crypto/ghostrider#readme) unified CPU/GPU miner and [RandomX benchmark](https://xmrig.com/benchmark). Official binaries are available for Windows, Linux, macOS and FreeBSD.
## Mining backends
- **CPU** (x64/ARMv7/ARMv8)
- **CPU** (x86/x64/ARMv7/ARMv8)
- **OpenCL** for AMD GPUs.
- **CUDA** for NVIDIA GPUs via external [CUDA plugin](https://github.com/xmrig/xmrig-cuda).

View File

@@ -29,6 +29,12 @@ else()
set(WITH_VAES OFF)
endif()
if (ARM_V8)
set(ARM_TARGET 8)
elseif (ARM_V7)
set(ARM_TARGET 7)
endif()
if (NOT ARM_TARGET)
if (CMAKE_SYSTEM_PROCESSOR MATCHES "^(aarch64|arm64|armv8-a)$")
set(ARM_TARGET 8)

View File

@@ -16,5 +16,5 @@
:: Smaller pools also often have smaller fees/payout limits.
cd /d "%~dp0"
xmrig.exe -o pool.hashvault.pro:3333 -u 48edfHu7V9Z84YzzMa6fUueoELZ9ZRXq9VetWzYGzKt52XU5xvqgzYnDK9URnRoJMk1j8nLwEVsaSWJ4fhdUyZijBGUicoD -p x
xmrig.exe -o xmrpool.eu:3333 -u 48edfHu7V9Z84YzzMa6fUueoELZ9ZRXq9VetWzYGzKt52XU5xvqgzYnDK9URnRoJMk1j8nLwEVsaSWJ4fhdUyZijBGUicoD -p x
pause

View File

@@ -12,5 +12,5 @@
:: But you will only get a payout when you find a block which can take more than a year for a single low-end PC.
cd /d "%~dp0"
xmrig.exe -o node.xmr.to:18081 -a rx/0 -u 48edfHu7V9Z84YzzMa6fUueoELZ9ZRXq9VetWzYGzKt52XU5xvqgzYnDK9URnRoJMk1j8nLwEVsaSWJ4fhdUyZijBGUicoD --daemon
xmrig.exe -o YOUR_NODE_IP:18081 -a rx/0 -u 48edfHu7V9Z84YzzMa6fUueoELZ9ZRXq9VetWzYGzKt52XU5xvqgzYnDK9URnRoJMk1j8nLwEVsaSWJ4fhdUyZijBGUicoD --daemon
pause

View File

@@ -1,6 +1,6 @@
/* XMRig
* Copyright (c) 2018-2020 SChernykh <https://github.com/SChernykh>
* Copyright (c) 2016-2020 XMRig <https://github.com/xmrig>, <support@xmrig.com>
* Copyright (c) 2018-2023 SChernykh <https://github.com/SChernykh>
* Copyright (c) 2016-2023 XMRig <https://github.com/xmrig>, <support@xmrig.com>
*
* This program is free software: you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@@ -37,7 +37,7 @@ public:
};
} /* namespace xmrig */
} // namespace xmrig
#endif /* XMRIG_CPU_H */
#endif // XMRIG_CPU_H

View File

@@ -1,6 +1,6 @@
/* XMRig
* Copyright (c) 2018-2021 SChernykh <https://github.com/SChernykh>
* Copyright (c) 2016-2021 XMRig <support@xmrig.com>
* Copyright (c) 2018-2023 SChernykh <https://github.com/SChernykh>
* Copyright (c) 2016-2023 XMRig <support@xmrig.com>
*
* This program is free software: you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@@ -26,6 +26,12 @@
#include "crypto/common/Assembly.h"
#ifdef XMRIG_FEATURE_HWLOC
using hwloc_const_bitmap_t = const struct hwloc_bitmap_s *;
using hwloc_topology_t = struct hwloc_topology *;
#endif
namespace xmrig {
@@ -116,10 +122,16 @@ public:
virtual size_t threads() const = 0;
virtual Vendor vendor() const = 0;
virtual uint32_t model() const = 0;
# ifdef XMRIG_FEATURE_HWLOC
virtual bool membind(hwloc_const_bitmap_t nodeset) = 0;
virtual const std::vector<uint32_t> &nodeset() const = 0;
virtual hwloc_topology_t topology() const = 0;
# endif
};
} /* namespace xmrig */
} // namespace xmrig
#endif // XMRIG_CPUINFO_H

View File

@@ -296,7 +296,7 @@ xmrig::BasicCpuInfo::BasicCpuInfo() :
// Affected CPU models and stepping numbers are taken from https://www.intel.com/content/dam/support/us/en/documents/processors/mitigations-jump-conditional-code-erratum.pdf
m_jccErratum =
((model == 0x4E) && (stepping == 0x3)) ||
((model == 0x55) && (stepping == 0x4)) ||
((model == 0x55) && ((stepping == 0x4) || (stepping == 0x7))) ||
((model == 0x5E) && (stepping == 0x3)) ||
((model == 0x8E) && (stepping >= 0x9) && (stepping <= 0xC)) ||
((model == 0x9E) && (stepping >= 0x9) && (stepping <= 0xD)) ||

View File

@@ -1,7 +1,7 @@
/* XMRig
* Copyright (c) 2017-2019 XMR-Stak <https://github.com/fireice-uk>, <https://github.com/psychocrypt>
* Copyright (c) 2018-2021 SChernykh <https://github.com/SChernykh>
* Copyright (c) 2016-2021 XMRig <support@xmrig.com>
* Copyright (c) 2018-2023 SChernykh <https://github.com/SChernykh>
* Copyright (c) 2016-2023 XMRig <support@xmrig.com>
*
* This program is free software: you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@@ -72,11 +72,10 @@ protected:
# endif
}
protected:
Arch m_arch = ARCH_UNKNOWN;
bool m_jccErratum = false;
char m_brand[64 + 6]{};
size_t m_threads;
size_t m_threads = 0;
std::vector<int32_t> m_units;
Vendor m_vendor = VENDOR_UNKNOWN;
@@ -94,7 +93,7 @@ private:
};
} /* namespace xmrig */
} // namespace xmrig
#endif /* XMRIG_BASICCPUINFO_H */
#endif // XMRIG_BASICCPUINFO_H

View File

@@ -1,6 +1,6 @@
/* XMRig
* Copyright (c) 2018-2021 SChernykh <https://github.com/SChernykh>
* Copyright (c) 2016-2021 XMRig <support@xmrig.com>
* Copyright (c) 2018-2023 SChernykh <https://github.com/SChernykh>
* Copyright (c) 2016-2023 XMRig <support@xmrig.com>
*
* This program is free software: you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@@ -36,27 +36,22 @@
#include "base/io/log/Log.h"
namespace xmrig {
uint32_t HwlocCpuInfo::m_features = 0;
static inline bool isCacheObject(hwloc_obj_t obj)
#if HWLOC_API_VERSION < 0x20000
static inline int hwloc_obj_type_is_cache(hwloc_obj_type_t type)
{
# if HWLOC_API_VERSION >= 0x20000
return hwloc_obj_type_is_cache(obj->type);
# else
return obj->type == HWLOC_OBJ_CACHE;
# endif
return type == HWLOC_OBJ_CACHE;
}
#endif
namespace xmrig {
template <typename func>
static inline void findCache(hwloc_obj_t obj, unsigned min, unsigned max, func lambda)
{
for (size_t i = 0; i < obj->arity; i++) {
if (isCacheObject(obj->children[i])) {
if (hwloc_obj_type_is_cache(obj->children[i]->type)) {
const unsigned depth = obj->children[i]->attr->cache.depth;
if (depth < min || depth > max) {
continue;
@@ -174,10 +169,6 @@ xmrig::HwlocCpuInfo::HwlocCpuInfo()
m_packages = countByType(m_topology, HWLOC_OBJ_PACKAGE);
if (m_nodes > 1) {
if (hwloc_topology_get_support(m_topology)->membind->set_thisthread_membind) {
m_features |= SET_THISTHREAD_MEMBIND;
}
m_nodeset.reserve(m_nodes);
hwloc_obj_t node = nullptr;
@@ -322,7 +313,7 @@ void xmrig::HwlocCpuInfo::processTopLevelCache(hwloc_obj_t cache, const Algorith
if (cache->attr->cache.depth == 3) {
for (size_t i = 0; i < cache->arity; ++i) {
hwloc_obj_t l2 = cache->children[i];
if (!isCacheObject(l2) || l2->attr == nullptr) {
if (!hwloc_obj_type_is_cache(l2->type) || l2->attr == nullptr) {
continue;
}

View File

@@ -1,6 +1,6 @@
/* XMRig
* Copyright (c) 2018-2021 SChernykh <https://github.com/SChernykh>
* Copyright (c) 2016-2021 XMRig <support@xmrig.com>
* Copyright (c) 2018-2023 SChernykh <https://github.com/SChernykh>
* Copyright (c) 2016-2023 XMRig <support@xmrig.com>
*
* This program is free software: you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@@ -21,12 +21,9 @@
#include "backend/cpu/platform/BasicCpuInfo.h"
#include "base/tools/Object.h"
using hwloc_const_bitmap_t = const struct hwloc_bitmap_s *;
using hwloc_obj_t = struct hwloc_obj *;
using hwloc_topology_t = struct hwloc_topology *;
using hwloc_obj_t = struct hwloc_obj *;
namespace xmrig {
@@ -37,39 +34,27 @@ class HwlocCpuInfo : public BasicCpuInfo
public:
XMRIG_DISABLE_COPY_MOVE(HwlocCpuInfo)
enum Feature : uint32_t {
SET_THISTHREAD_MEMBIND = 1
};
HwlocCpuInfo();
~HwlocCpuInfo() override;
static inline bool hasFeature(Feature feature) { return m_features & feature; }
inline const std::vector<uint32_t> &nodeset() const { return m_nodeset; }
inline hwloc_topology_t topology() const { return m_topology; }
bool membind(hwloc_const_bitmap_t nodeset);
protected:
bool membind(hwloc_const_bitmap_t nodeset) override;
CpuThreads threads(const Algorithm &algorithm, uint32_t limit) const override;
inline const char *backend() const override { return m_backend; }
inline size_t cores() const override { return m_cores; }
inline size_t L2() const override { return m_cache[2]; }
inline size_t L3() const override { return m_cache[3]; }
inline size_t nodes() const override { return m_nodes; }
inline size_t packages() const override { return m_packages; }
inline const char *backend() const override { return m_backend; }
inline const std::vector<uint32_t> &nodeset() const override { return m_nodeset; }
inline hwloc_topology_t topology() const override { return m_topology; }
inline size_t cores() const override { return m_cores; }
inline size_t L2() const override { return m_cache[2]; }
inline size_t L3() const override { return m_cache[3]; }
inline size_t nodes() const override { return m_nodes; }
inline size_t packages() const override { return m_packages; }
private:
CpuThreads allThreads(const Algorithm &algorithm, uint32_t limit) const;
void processTopLevelCache(hwloc_obj_t cache, const Algorithm &algorithm, CpuThreads &threads, size_t limit) const;
void setThreads(size_t threads);
static uint32_t m_features;
char m_backend[20] = { 0 };
hwloc_topology_t m_topology = nullptr;
size_t m_cache[5] = { 0 };
@@ -80,7 +65,7 @@ private:
};
} /* namespace xmrig */
} // namespace xmrig
#endif /* XMRIG_HWLOCCPUINFO_H */
#endif // XMRIG_HWLOCCPUINFO_H

View File

@@ -1,7 +1,7 @@
/* XMRig
* Copyright (c) 2018 Riku Voipio <riku.voipio@iki.fi>
* Copyright (c) 2018-2021 SChernykh <https://github.com/SChernykh>
* Copyright (c) 2016-2021 XMRig <support@xmrig.com>
* Copyright (c) 2018-2023 SChernykh <https://github.com/SChernykh>
* Copyright (c) 2016-2023 XMRig <support@xmrig.com>
*
* This program is free software: you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@@ -17,7 +17,6 @@
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#include "base/tools/String.h"
#include "3rdparty/fmt/core.h"
@@ -84,6 +83,7 @@ static const id_part arm_part[] = {
{ 0xc27, "Cortex-M7" },
{ 0xc60, "Cortex-M0+" },
{ 0xd01, "Cortex-A32" },
{ 0xd02, "Cortex-A34" },
{ 0xd03, "Cortex-A53" },
{ 0xd04, "Cortex-A35" },
{ 0xd05, "Cortex-A55" },
@@ -97,40 +97,60 @@ static const id_part arm_part[] = {
{ 0xd0d, "Cortex-A77" },
{ 0xd0e, "Cortex-A76AE" },
{ 0xd13, "Cortex-R52" },
{ 0xd15, "Cortex-R82" },
{ 0xd20, "Cortex-M23" },
{ 0xd21, "Cortex-M33" },
{ 0xd40, "Neoverse-V1" },
{ 0xd41, "Cortex-A78" },
{ 0xd42, "Cortex-A78AE" },
{ 0xd43, "Cortex-A65AE" },
{ 0xd44, "Cortex-X1" },
{ 0xd46, "Cortex-A510" },
{ 0xd47, "Cortex-A710" },
{ 0xd48, "Cortex-X2" },
{ 0xd49, "Neoverse-N2" },
{ 0xd4a, "Neoverse-E1" },
{ 0xd4b, "Cortex-A78C" },
{ -1, nullptr },
{ 0xd4c, "Cortex-X1C" },
{ 0xd4d, "Cortex-A715" },
{ 0xd4e, "Cortex-X3" },
{ 0xd4f, "Neoverse-V2" },
{ -1, nullptr }
};
static const id_part brcm_part[] = {
{ 0x0f, "Brahma B15" },
{ 0x100, "Brahma B53" },
{ 0x0f, "Brahma-B15" },
{ 0x100, "Brahma-B53" },
{ 0x516, "ThunderX2" },
{ -1, nullptr },
{ -1, nullptr }
};
static const id_part dec_part[] = {
{ 0xa10, "SA110" },
{ 0xa11, "SA1100" },
{ -1, nullptr },
{ -1, nullptr }
};
static const id_part cavium_part[] = {
{ 0x0a0, "ThunderX" },
{ 0x0a1, "ThunderX 88XX" },
{ 0x0a2, "ThunderX 81XX" },
{ 0x0a3, "ThunderX 83XX" },
{ 0x0af, "ThunderX2 99xx" },
{ -1, nullptr },
{ 0x0a1, "ThunderX-88XX" },
{ 0x0a2, "ThunderX-81XX" },
{ 0x0a3, "ThunderX-83XX" },
{ 0x0af, "ThunderX2-99xx" },
{ 0x0b0, "OcteonTX2" },
{ 0x0b1, "OcteonTX2-98XX" },
{ 0x0b2, "OcteonTX2-96XX" },
{ 0x0b3, "OcteonTX2-95XX" },
{ 0x0b4, "OcteonTX2-95XXN" },
{ 0x0b5, "OcteonTX2-95XXMM" },
{ 0x0b6, "OcteonTX2-95XXO" },
{ 0x0b8, "ThunderX3-T110" },
{ -1, nullptr }
};
static const id_part apm_part[] = {
{ 0x000, "X-Gene" },
{ -1, nullptr },
{ -1, nullptr }
};
static const id_part qcom_part[] = {
@@ -141,36 +161,43 @@ static const id_part qcom_part[] = {
{ 0x201, "Kryo" },
{ 0x205, "Kryo" },
{ 0x211, "Kryo" },
{ 0x800, "Falkor V1/Kryo" },
{ 0x801, "Kryo V2" },
{ 0x800, "Falkor-V1/Kryo" },
{ 0x801, "Kryo-V2" },
{ 0x802, "Kryo-3XX-Gold" },
{ 0x803, "Kryo-3XX-Silver" },
{ 0x804, "Kryo-4XX-Gold" },
{ 0x805, "Kryo-4XX-Silver" },
{ 0xc00, "Falkor" },
{ 0xc01, "Saphira" },
{ -1, nullptr },
{ -1, nullptr }
};
static const id_part samsung_part[] = {
{ 0x001, "exynos-m1" },
{ -1, nullptr },
{ 0x002, "exynos-m3" },
{ 0x003, "exynos-m4" },
{ 0x004, "exynos-m5" },
{ -1, nullptr }
};
static const id_part nvidia_part[] = {
{ 0x000, "Denver" },
{ 0x003, "Denver 2" },
{ 0x004, "Carmel" },
{ -1, nullptr },
{ -1, nullptr }
};
static const id_part marvell_part[] = {
{ 0x131, "Feroceon 88FR131" },
{ 0x131, "Feroceon-88FR131" },
{ 0x581, "PJ4/PJ4b" },
{ 0x584, "PJ4B-MP" },
{ -1, nullptr },
{ -1, nullptr }
};
static const id_part faraday_part[] = {
{ 0x526, "FA526" },
{ 0x626, "FA626" },
{ -1, nullptr },
{ -1, nullptr }
};
static const id_part intel_part[] = {
@@ -195,23 +222,50 @@ static const id_part intel_part[] = {
{ 0x689, "PXA31x" },
{ 0xb11, "SA1110" },
{ 0xc12, "IPX1200" },
{ -1, nullptr },
{ -1, nullptr }
};
static const struct id_part fujitsu_part[] = {
{ 0x001, "A64FX" },
{ -1, "unknown" },
{ -1, nullptr }
};
static const id_part hisi_part[] = {
{ 0xd01, "Kunpeng-920" }, /* aka tsv110 */
{ -1, nullptr },
{ 0xd01, "Kunpeng-920" }, /* aka tsv110 */
{ 0xd40, "Cortex-A76" }, /* HiSilicon uses this ID though advertises A76 */
{ -1, nullptr }
};
static const id_part apple_part[] = {
{ 0x022, "M1" },
{ 0x023, "M1" },
{ -1, nullptr },
{ 0x024, "M1-Pro" },
{ 0x025, "M1-Pro" },
{ 0x028, "M1-Max" },
{ 0x029, "M1-Max" },
{ 0x032, "M2" },
{ 0x033, "M2" },
{ 0x034, "M2-Pro" },
{ 0x035, "M2-Pro" },
{ 0x038, "M2-Max" },
{ 0x039, "M2-Max" },
{ -1, nullptr }
};
static const struct id_part ft_part[] = {
{ 0x660, "FTC660" },
{ 0x661, "FTC661" },
{ 0x662, "FTC662" },
{ 0x663, "FTC663" },
{ -1, nullptr }
};
static const struct id_part ampere_part[] = {
{ 0xac3, "Ampere-1" },
{ 0xac4, "Ampere-1a" },
{ -1, nullptr }
};
@@ -229,7 +283,9 @@ static const hw_impl hw_implementer[] = {
{ 0x56, marvell_part, "Marvell" },
{ 0x61, apple_part, "Apple" },
{ 0x66, faraday_part, "Faraday" },
{ 0x69, intel_part, "Intel" }
{ 0x69, intel_part, "Intel" },
{ 0x70, ft_part, "Phytium" },
{ 0xc0, ampere_part, "Ampere" }
};

View File

@@ -353,13 +353,9 @@ bool xmrig::CudaLib::open()
# ifdef XMRIG_OS_LINUX
if (m_loader == defaultLoader) {
m_loader = Process::location(Process::ExeLocation, m_loader);
}
else {
return false;
}
if (uv_dlopen(m_loader, &cudaLib) == 0) {
return true;
if (uv_dlopen(m_loader, &cudaLib) == 0) {
return true;
}
}
# endif

View File

@@ -399,6 +399,9 @@ private:
uv_loop_t* m_loop = nullptr;
uv_thread_t m_loopThread = {};
uv_async_t m_shutdownAsync = {};
uv_async_t m_batonAsync = {};
std::vector<KawPowBaton> m_batons;
static void loop(void* data)
{
@@ -419,19 +422,37 @@ void KawPowBuilder::build_async(const IOclRunner& runner, uint64_t period, uint3
if (!m_loop) {
m_loop = new uv_loop_t{};
uv_loop_init(m_loop);
uv_async_init(m_loop, &m_shutdownAsync, [](uv_async_t* handle) { uv_close(reinterpret_cast<uv_handle_t*>(handle), nullptr); });
uv_async_init(m_loop, &m_shutdownAsync, [](uv_async_t* handle)
{
KawPowBuilder* builder = reinterpret_cast<KawPowBuilder*>(handle->data);
uv_close(reinterpret_cast<uv_handle_t*>(&builder->m_shutdownAsync), nullptr);
uv_close(reinterpret_cast<uv_handle_t*>(&builder->m_batonAsync), nullptr);
});
uv_async_init(m_loop, &m_batonAsync, [](uv_async_t* handle)
{
std::vector<KawPowBaton> batons;
{
KawPowBuilder* b = reinterpret_cast<KawPowBuilder*>(handle->data);
std::lock_guard<std::mutex> lock(b->m_mutex);
batons = std::move(b->m_batons);
}
for (const KawPowBaton& baton : batons) {
builder.build(baton.runner, baton.period, baton.worksize);
}
});
m_shutdownAsync.data = this;
m_batonAsync.data = this;
uv_thread_create(&m_loopThread, loop, this);
}
KawPowBaton* baton = new KawPowBaton(runner, period, worksize);
uv_queue_work(m_loop, &baton->req,
[](uv_work_t* req) {
KawPowBaton* baton = static_cast<KawPowBaton*>(req->data);
builder.build(baton->runner, baton->period, baton->worksize);
},
[](uv_work_t* req, int) { delete static_cast<KawPowBaton*>(req->data); }
);
m_batons.emplace_back(runner, period, worksize);
uv_async_send(&m_batonAsync);
}

View File

@@ -1,6 +1,6 @@
/* XMRig
* Copyright (c) 2018-2021 SChernykh <https://github.com/SChernykh>
* Copyright (c) 2016-2021 XMRig <https://github.com/xmrig>, <support@xmrig.com>
* Copyright (c) 2018-2023 SChernykh <https://github.com/SChernykh>
* Copyright (c) 2016-2023 XMRig <https://github.com/xmrig>, <support@xmrig.com>
*
* This program is free software: you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@@ -123,6 +123,21 @@ void xmrig::Api::stop()
}
void xmrig::Api::tick()
{
# ifdef XMRIG_FEATURE_HTTP
if (m_httpd->isBound() || !m_base->config()->http().isEnabled()) {
return;
}
if (++m_ticks % 10 == 0) {
m_ticks = 0;
m_httpd->start();
}
# endif
}
void xmrig::Api::onConfigChanged(Config *config, Config *previousConfig)
{
if (config->apiId() != previousConfig->apiId()) {

View File

@@ -1,6 +1,6 @@
/* XMRig
* Copyright (c) 2018-2021 SChernykh <https://github.com/SChernykh>
* Copyright (c) 2016-2021 XMRig <https://github.com/xmrig>, <support@xmrig.com>
* Copyright (c) 2018-2023 SChernykh <https://github.com/SChernykh>
* Copyright (c) 2016-2023 XMRig <https://github.com/xmrig>, <support@xmrig.com>
*
* This program is free software: you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@@ -21,7 +21,6 @@
#include <vector>
#include <cstdint>
#include "base/kernel/interfaces/IBaseListener.h"
@@ -44,7 +43,7 @@ class Api : public IBaseListener
public:
XMRIG_DISABLE_COPY_MOVE_DEFAULT(Api)
Api(Base *base);
explicit Api(Base *base);
~Api() override;
inline const char *id() const { return m_id; }
@@ -54,6 +53,7 @@ public:
void request(const HttpData &req);
void start();
void stop();
void tick();
protected:
void onConfigChanged(Config *config, Config *previousConfig) override;
@@ -65,14 +65,15 @@ private:
Base *m_base;
char m_id[32]{};
String m_workerId;
const uint64_t m_timestamp;
Httpd *m_httpd = nullptr;
Httpd *m_httpd = nullptr;
std::vector<IApiListener *> m_listeners;
String m_workerId;
uint8_t m_ticks = 0;
};
} // namespace xmrig
#endif /* XMRIG_API_H */
#endif // XMRIG_API_H

View File

@@ -1,6 +1,6 @@
/* XMRig
* Copyright (c) 2018-2021 SChernykh <https://github.com/SChernykh>
* Copyright (c) 2016-2021 XMRig <https://github.com/xmrig>, <support@xmrig.com>
* Copyright (c) 2018-2023 SChernykh <https://github.com/SChernykh>
* Copyright (c) 2016-2023 XMRig <https://github.com/xmrig>, <support@xmrig.com>
*
* This program is free software: you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@@ -22,11 +22,6 @@
#include "base/kernel/interfaces/IBaseListener.h"
#include "base/net/http/HttpListener.h"
#include "base/tools/Object.h"
#include <cstdint>
#include <memory>
namespace xmrig {
@@ -43,9 +38,11 @@ class Httpd : public IBaseListener, public IHttpListener
public:
XMRIG_DISABLE_COPY_MOVE_DEFAULT(Httpd)
Httpd(Base *base);
explicit Httpd(Base *base);
~Httpd() override;
inline bool isBound() const { return m_server != nullptr; }
bool start();
void stop();
@@ -69,7 +66,7 @@ private:
};
} /* namespace xmrig */
} // namespace xmrig
#endif /* XMRIG_HTTPD_H */
#endif // XMRIG_HTTPD_H

View File

@@ -53,6 +53,7 @@ static const CoinInfo coinInfo[] = {
{ Algorithm::RX_KEVA, "KVA", "Kevacoin", 0, 0, MAGENTA_BG_BOLD(WHITE_BOLD_S " keva ") },
{ Algorithm::KAWPOW_RVN, "RVN", "Ravencoin", 0, 0, BLUE_BG_BOLD( WHITE_BOLD_S " raven ") },
{ Algorithm::RX_WOW, "WOW", "Wownero", 300, 100000000000, MAGENTA_BG_BOLD(WHITE_BOLD_S " wownero ") },
{ Algorithm::RX_0, "ZEPH", "Zephyr", 120, 1000000000000, BLUE_BG_BOLD( WHITE_BOLD_S " zephyr ") },
};

View File

@@ -39,6 +39,7 @@ public:
KEVA,
RAVEN,
WOWNERO,
ZEPHYR,
MAX
};

View File

@@ -1,6 +1,6 @@
/* XMRig
* Copyright (c) 2018-2020 SChernykh <https://github.com/SChernykh>
* Copyright (c) 2016-2020 XMRig <https://github.com/xmrig>, <support@xmrig.com>
* Copyright (c) 2018-2023 SChernykh <https://github.com/SChernykh>
* Copyright (c) 2016-2023 XMRig <https://github.com/xmrig>, <support@xmrig.com>
*
* This program is free software: you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@@ -16,9 +16,7 @@
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#include "base/kernel/Platform.h"
#include "backend/cpu/platform/HwlocCpuInfo.h"
#include "backend/cpu/Cpu.h"
@@ -29,20 +27,21 @@
#ifndef XMRIG_OS_APPLE
bool xmrig::Platform::setThreadAffinity(uint64_t cpu_id)
{
auto cpu = static_cast<HwlocCpuInfo *>(Cpu::info());
hwloc_obj_t pu = hwloc_get_pu_obj_by_os_index(cpu->topology(), static_cast<unsigned>(cpu_id));
auto topology = Cpu::info()->topology();
auto pu = hwloc_get_pu_obj_by_os_index(topology, static_cast<unsigned>(cpu_id));
if (pu == nullptr) {
return false;
}
if (hwloc_set_cpubind(cpu->topology(), pu->cpuset, HWLOC_CPUBIND_THREAD | HWLOC_CPUBIND_STRICT) >= 0) {
if (hwloc_set_cpubind(topology, pu->cpuset, HWLOC_CPUBIND_THREAD | HWLOC_CPUBIND_STRICT) >= 0) {
std::this_thread::sleep_for(std::chrono::milliseconds(1));
return true;
}
const bool result = (hwloc_set_cpubind(cpu->topology(), pu->cpuset, HWLOC_CPUBIND_THREAD) >= 0);
const bool result = (hwloc_set_cpubind(topology, pu->cpuset, HWLOC_CPUBIND_THREAD) >= 0);
std::this_thread::sleep_for(std::chrono::milliseconds(1));
return result;
}
#endif

View File

@@ -197,6 +197,11 @@ bool xmrig::BlockTemplate::parse(bool hashes)
ar(m_vote);
}
if (m_coin == Coin::ZEPHYR) {
uint8_t pricing_record[24];
ar(pricing_record);
}
// Miner transaction begin
// Prefix begin
setOffset(MINER_TX_PREFIX_OFFSET, ar.index());
@@ -220,8 +225,8 @@ bool xmrig::BlockTemplate::parse(bool hashes)
ar(m_height);
ar(m_numOutputs);
// must be 1 output
if (m_numOutputs != 1) {
const uint64_t expected_outputs = (m_coin == Coin::ZEPHYR) ? 2 : 1;
if (m_numOutputs != expected_outputs) {
return false;
}
@@ -237,7 +242,35 @@ bool xmrig::BlockTemplate::parse(bool hashes)
ar(m_ephPublicKey, kKeySize);
if (m_outputType == 3) {
if (m_coin == Coin::ZEPHYR) {
if (m_outputType != 2) {
return false;
}
uint64_t asset_type_len;
ar(asset_type_len);
ar.skip(asset_type_len);
ar(m_viewTag);
uint64_t amount2;
ar(amount2);
uint8_t output_type2;
ar(output_type2);
if (output_type2 != 2) {
return false;
}
Span key2;
ar(key2, kKeySize);
ar(asset_type_len);
ar.skip(asset_type_len);
uint8_t view_tag2;
ar(view_tag2);
}
else if (m_outputType == 3) {
ar(m_viewTag);
}
@@ -248,6 +281,8 @@ bool xmrig::BlockTemplate::parse(bool hashes)
BlobReader<true> ar_extra(blob(TX_EXTRA_OFFSET), m_extraSize);
ar.skip(m_extraSize);
bool pubkey_offset_first = true;
while (ar_extra.index() < m_extraSize) {
uint64_t extra_tag = 0;
uint64_t size = 0;
@@ -256,7 +291,10 @@ bool xmrig::BlockTemplate::parse(bool hashes)
switch (extra_tag) {
case 0x01: // TX_EXTRA_TAG_PUBKEY
setOffset(TX_PUBKEY_OFFSET, offset(TX_EXTRA_OFFSET) + ar_extra.index());
if (pubkey_offset_first) {
pubkey_offset_first = false;
setOffset(TX_PUBKEY_OFFSET, offset(TX_EXTRA_OFFSET) + ar_extra.index());
}
ar_extra.skip(kKeySize);
break;
@@ -277,6 +315,13 @@ bool xmrig::BlockTemplate::parse(bool hashes)
}
}
if (m_coin == Coin::ZEPHYR) {
uint64_t pricing_record_height, amount_burnt, amount_minted;
ar(pricing_record_height);
ar(amount_burnt);
ar(amount_minted);
}
setOffset(MINER_TX_PREFIX_END_OFFSET, ar.index());
// Prefix end

View File

@@ -37,14 +37,36 @@ class CnAlgo
public:
constexpr CnAlgo() {};
constexpr inline Algorithm::Id base() const { static_assert(Algorithm::isCN(ALGO), "invalid CRYPTONIGHT algorithm"); return Algorithm::base(ALGO); }
constexpr inline bool isHeavy() const { return Algorithm::family(ALGO) == Algorithm::CN_HEAVY; }
constexpr inline bool isR() const { return ALGO == Algorithm::CN_R; }
constexpr inline size_t memory() const { static_assert(Algorithm::isCN(ALGO), "invalid CRYPTONIGHT algorithm"); return Algorithm::l3(ALGO); }
constexpr inline uint32_t iterations() const { static_assert(Algorithm::isCN(ALGO), "invalid CRYPTONIGHT algorithm"); return CN_ITER; }
# define ASSERT_CN static_assert(Algorithm::isCN(ALGO), "invalid CRYPTONIGHT algorithm")
constexpr inline Algorithm::Id base() const { ASSERT_CN; return Algorithm::base(ALGO); }
constexpr inline size_t memory() const { ASSERT_CN; return Algorithm::l3(ALGO); }
constexpr inline uint32_t iterations() const { ASSERT_CN; return CN_ITER; }
constexpr inline uint32_t mask() const { return static_cast<uint32_t>(((memory() - 1) / 16) * 16); }
constexpr inline uint32_t half_mem() const { return mask() < memory() / 2; }
constexpr inline bool isBase1() const { ASSERT_CN; return Algorithm::base(ALGO) == Algorithm::CN_1; }
constexpr inline bool isBase2() const { ASSERT_CN; return Algorithm::base(ALGO) == Algorithm::CN_2; }
constexpr inline bool is2() const { return ALGO == Algorithm::CN_2; }
constexpr inline bool isR() const { return ALGO == Algorithm::CN_R; }
constexpr inline bool isHalf() const { return ALGO == Algorithm::CN_HALF; }
constexpr inline bool isRTO() const { return ALGO == Algorithm::CN_RTO; }
constexpr inline bool isRWZ() const { return ALGO == Algorithm::CN_RWZ; }
constexpr inline bool isZLS() const { return ALGO == Algorithm::CN_ZLS; }
constexpr inline bool isDouble() const { return ALGO == Algorithm::CN_DOUBLE; }
constexpr inline bool isCCX() const { return ALGO == Algorithm::CN_CCX; }
constexpr inline bool isHeavy() const { ASSERT_CN; return Algorithm::family(ALGO) == Algorithm::CN_HEAVY; }
constexpr inline bool isHeavyTube() const { return ALGO == Algorithm::CN_HEAVY_TUBE; }
constexpr inline bool isHeavyXHV() const { return ALGO == Algorithm::CN_HEAVY_XHV; }
constexpr inline bool isPico0() const { return ALGO == Algorithm::CN_PICO_0; }
constexpr inline bool isPicoTLO() const { return ALGO == Algorithm::CN_PICO_TLO; }
constexpr inline bool isUPX2() const { return ALGO == Algorithm::CN_UPX2; }
constexpr inline bool isGR0() const { return ALGO == Algorithm::CN_GR_0; }
constexpr inline bool isGR1() const { return ALGO == Algorithm::CN_GR_1; }
constexpr inline bool isGR2() const { return ALGO == Algorithm::CN_GR_2; }
constexpr inline bool isGR3() const { return ALGO == Algorithm::CN_GR_3; }
constexpr inline bool isGR4() const { return ALGO == Algorithm::CN_GR_4; }
constexpr inline bool isGR5() const { return ALGO == Algorithm::CN_GR_5; }
inline static uint32_t iterations(Algorithm::Id algo)
{
switch (algo) {

View File

@@ -603,7 +603,7 @@ static inline void cryptonight_monero_tweak(uint64_t *mem_out, const uint8_t *l,
constexpr CnAlgo<ALGO> props;
if (props.base() == Algorithm::CN_2) {
VARIANT2_SHUFFLE(l, idx, ax0, bx0, bx1, cx, (((ALGO == Algorithm::CN_RWZ) || (ALGO == Algorithm::CN_UPX2)) ? 1 : 0));
VARIANT2_SHUFFLE(l, idx, ax0, bx0, bx1, cx, ((props.isRWZ() || props.isUPX2()) ? 1 : 0));
_mm_store_si128(reinterpret_cast<__m128i *>(mem_out), _mm_xor_si128(bx0, cx));
} else {
__m128i tmp = _mm_xor_si128(bx0, cx);
@@ -665,15 +665,8 @@ inline void cryptonight_single_hash(const uint8_t *__restrict__ input, size_t si
constexpr CnAlgo<ALGO> props;
constexpr size_t MASK = props.mask();
constexpr Algorithm::Id BASE = props.base();
# ifdef XMRIG_ALGO_CN_HEAVY
constexpr bool IS_CN_HEAVY_TUBE = ALGO == Algorithm::CN_HEAVY_TUBE;
# else
constexpr bool IS_CN_HEAVY_TUBE = false;
# endif
if (BASE == Algorithm::CN_1 && size < 43) {
if (props.isBase1() && size < 43) {
memset(output, 0, 32);
return;
}
@@ -694,10 +687,7 @@ inline void cryptonight_single_hash(const uint8_t *__restrict__ input, size_t si
V4_Instruction code[256];
const int code_size = v4_random_math_init<ALGO>(code, height);
if (ALGO == Algorithm::CN_R) {
v4_soft_aes_compile_code(code, code_size, reinterpret_cast<void*>(ctx[0]->generated_code), Assembly::NONE);
}
v4_soft_aes_compile_code(code, code_size, reinterpret_cast<void*>(ctx[0]->generated_code), Assembly::NONE);
ctx[0]->generated_code_data = { ALGO, height };
}
@@ -718,26 +708,26 @@ inline void cryptonight_single_hash(const uint8_t *__restrict__ input, size_t si
__m128i bx1 = _mm_set_epi64x(static_cast<int64_t>(h0[9] ^ h0[11]), static_cast<int64_t>(h0[8] ^ h0[10]));
__m128 conc_var;
if (ALGO == Algorithm::CN_CCX) {
if (props.isCCX()) {
conc_var = _mm_setzero_ps();
RESTORE_ROUNDING_MODE();
}
for (size_t i = 0; i < props.iterations(); i++) {
__m128i cx;
if (IS_CN_HEAVY_TUBE || !SOFT_AES) {
if (props.isHeavyTube() || !SOFT_AES) {
cx = _mm_load_si128(reinterpret_cast<const __m128i *>(&l0[interleaved_index<interleave>(idx0 & MASK)]));
if (ALGO == Algorithm::CN_CCX) {
if (props.isCCX()) {
cryptonight_conceal_tweak(cx, conc_var);
}
}
const __m128i ax0 = _mm_set_epi64x(static_cast<int64_t>(ah0), static_cast<int64_t>(al0));
if (IS_CN_HEAVY_TUBE) {
if (props.isHeavyTube()) {
cx = aes_round_tweak_div(cx, ax0);
}
else if (SOFT_AES) {
if (ALGO == Algorithm::CN_CCX) {
if (props.isCCX()) {
cx = _mm_load_si128(reinterpret_cast<const __m128i*>(&l0[interleaved_index<interleave>(idx0 & MASK)]));
cryptonight_conceal_tweak(cx, conc_var);
cx = soft_aesenc(&cx, ax0, reinterpret_cast<const uint32_t*>(saes_table));
@@ -750,7 +740,7 @@ inline void cryptonight_single_hash(const uint8_t *__restrict__ input, size_t si
cx = _mm_aesenc_si128(cx, ax0);
}
if (BASE == Algorithm::CN_1 || BASE == Algorithm::CN_2) {
if (props.isBase1() || props.isBase2()) {
cryptonight_monero_tweak<ALGO>(reinterpret_cast<uint64_t*>(&l0[interleaved_index<interleave>(idx0 & MASK)]), l0, idx0 & MASK, ax0, bx0, bx1, cx);
} else {
_mm_store_si128(reinterpret_cast<__m128i *>(&l0[interleaved_index<interleave>(idx0 & MASK)]), _mm_xor_si128(bx0, cx));
@@ -762,13 +752,11 @@ inline void cryptonight_single_hash(const uint8_t *__restrict__ input, size_t si
cl = (reinterpret_cast<uint64_t*>(&l0[interleaved_index<interleave>(idx0 & MASK)]))[0];
ch = (reinterpret_cast<uint64_t*>(&l0[interleaved_index<interleave>(idx0 & MASK)]))[1];
if (BASE == Algorithm::CN_2) {
if (props.isBase2()) {
if (props.isR()) {
VARIANT4_RANDOM_MATH(0, al0, ah0, cl, bx0, bx1);
if (ALGO == Algorithm::CN_R) {
al0 ^= r0[2] | (static_cast<uint64_t>(r0[3]) << 32);
ah0 ^= r0[0] | (static_cast<uint64_t>(r0[1]) << 32);
}
al0 ^= r0[2] | (static_cast<uint64_t>(r0[3]) << 32);
ah0 ^= r0[0] | (static_cast<uint64_t>(r0[1]) << 32);
} else {
VARIANT2_INTEGER_MATH(0, cl, cx);
}
@@ -776,11 +764,11 @@ inline void cryptonight_single_hash(const uint8_t *__restrict__ input, size_t si
lo = __umul128(idx0, cl, &hi);
if (BASE == Algorithm::CN_2) {
if (ALGO == Algorithm::CN_R) {
if (props.isBase2()) {
if (props.isR()) {
VARIANT2_SHUFFLE(l0, idx0 & MASK, ax0, bx0, bx1, cx, 0);
} else {
VARIANT2_SHUFFLE2(l0, idx0 & MASK, ax0, bx0, bx1, hi, lo, (((ALGO == Algorithm::CN_RWZ) || (ALGO == Algorithm::CN_UPX2)) ? 1 : 0));
VARIANT2_SHUFFLE2(l0, idx0 & MASK, ax0, bx0, bx1, hi, lo, ((props.isRWZ() || props.isUPX2()) ? 1 : 0));
}
}
@@ -789,9 +777,9 @@ inline void cryptonight_single_hash(const uint8_t *__restrict__ input, size_t si
reinterpret_cast<uint64_t*>(&l0[interleaved_index<interleave>(idx0 & MASK)])[0] = al0;
if (IS_CN_HEAVY_TUBE || ALGO == Algorithm::CN_RTO) {
if (props.isHeavyTube() || props.isRTO()) {
reinterpret_cast<uint64_t*>(&l0[interleaved_index<interleave>(idx0 & MASK)])[1] = ah0 ^ tweak1_2_0 ^ al0;
} else if (BASE == Algorithm::CN_1) {
} else if (props.isBase1()) {
reinterpret_cast<uint64_t*>(&l0[interleaved_index<interleave>(idx0 & MASK)])[1] = ah0 ^ tweak1_2_0;
} else {
reinterpret_cast<uint64_t*>(&l0[interleaved_index<interleave>(idx0 & MASK)])[1] = ah0;
@@ -819,7 +807,7 @@ inline void cryptonight_single_hash(const uint8_t *__restrict__ input, size_t si
((int64_t*)&l0[interleaved_index<interleave>(idx0 & MASK)])[0] = n ^ q;
if (ALGO == Algorithm::CN_HEAVY_XHV) {
if (props.isHeavyXHV()) {
d = ~d;
}
@@ -827,7 +815,7 @@ inline void cryptonight_single_hash(const uint8_t *__restrict__ input, size_t si
}
# endif
if (BASE == Algorithm::CN_2) {
if (props.isBase2()) {
bx1 = bx0;
}
@@ -960,7 +948,7 @@ inline void cryptonight_single_hash_asm(const uint8_t *__restrict__ input, size_
}
cn_explode_scratchpad<ALGO, false, 0>(ctx[0]);
if (ALGO == Algorithm::CN_2) {
if (props.is2()) {
if (ASM == Assembly::INTEL) {
cnv2_mainloop_ivybridge_asm(ctx);
}
@@ -971,7 +959,7 @@ inline void cryptonight_single_hash_asm(const uint8_t *__restrict__ input, size_
cnv2_mainloop_bulldozer_asm(ctx);
}
}
else if (ALGO == Algorithm::CN_HALF) {
else if (props.isHalf()) {
if (ASM == Assembly::INTEL) {
cn_half_mainloop_ivybridge_asm(ctx);
}
@@ -983,7 +971,7 @@ inline void cryptonight_single_hash_asm(const uint8_t *__restrict__ input, size_
}
}
# ifdef XMRIG_ALGO_CN_PICO
else if (ALGO == Algorithm::CN_PICO_0) {
else if (props.isPico0()) {
if (ASM == Assembly::INTEL) {
cn_trtl_mainloop_ivybridge_asm(ctx);
}
@@ -994,7 +982,7 @@ inline void cryptonight_single_hash_asm(const uint8_t *__restrict__ input, size_
cn_trtl_mainloop_bulldozer_asm(ctx);
}
}
else if (ALGO == Algorithm::CN_PICO_TLO) {
else if (props.isPicoTLO()) {
if (ASM == Assembly::INTEL) {
cn_tlo_mainloop_ivybridge_asm(ctx);
}
@@ -1006,10 +994,10 @@ inline void cryptonight_single_hash_asm(const uint8_t *__restrict__ input, size_
}
}
# endif
else if (ALGO == Algorithm::CN_RWZ) {
else if (props.isRWZ()) {
cnv2_rwz_mainloop_asm(ctx);
}
else if (ALGO == Algorithm::CN_ZLS) {
else if (props.isZLS()) {
if (ASM == Assembly::INTEL) {
cn_zls_mainloop_ivybridge_asm(ctx);
}
@@ -1020,7 +1008,7 @@ inline void cryptonight_single_hash_asm(const uint8_t *__restrict__ input, size_
cn_zls_mainloop_bulldozer_asm(ctx);
}
}
else if (ALGO == Algorithm::CN_DOUBLE) {
else if (props.isDouble()) {
if (ASM == Assembly::INTEL) {
cn_double_mainloop_ivybridge_asm(ctx);
}
@@ -1032,7 +1020,7 @@ inline void cryptonight_single_hash_asm(const uint8_t *__restrict__ input, size_
}
}
# ifdef XMRIG_ALGO_CN_FEMTO
else if (ALGO == Algorithm::CN_UPX2) {
else if (props.isUPX2()) {
cn_upx2_mainloop_asm(ctx);
}
# endif
@@ -1078,22 +1066,22 @@ inline void cryptonight_double_hash_asm(const uint8_t *__restrict__ input, size_
cn_explode_scratchpad<ALGO, false, 0>(ctx[1]);
}
if (ALGO == Algorithm::CN_2) {
if (props.is2()) {
cnv2_double_mainloop_sandybridge_asm(ctx);
}
else if (ALGO == Algorithm::CN_HALF) {
else if (props.isHalf()){
cn_half_double_mainloop_sandybridge_asm(ctx);
}
# ifdef XMRIG_ALGO_CN_PICO
else if (ALGO == Algorithm::CN_PICO_0) {
else if (props.isPico0()) {
cn_trtl_double_mainloop_sandybridge_asm(ctx);
}
else if (ALGO == Algorithm::CN_PICO_TLO) {
else if (props.isPicoTLO()) {
cn_tlo_double_mainloop_sandybridge_asm(ctx);
}
# endif
# ifdef XMRIG_ALGO_CN_FEMTO
else if (ALGO == Algorithm::CN_UPX2) {
else if (props.isUPX2()) {
if (Cpu::info()->arch() == ICpuInfo::ARCH_ZEN3) {
cnv2_upx_double_mainloop_zen3_asm(ctx);
}
@@ -1102,13 +1090,13 @@ inline void cryptonight_double_hash_asm(const uint8_t *__restrict__ input, size_
}
}
# endif
else if (ALGO == Algorithm::CN_RWZ) {
else if (props.isRWZ()) {
cnv2_rwz_double_mainloop_asm(ctx);
}
else if (ALGO == Algorithm::CN_ZLS) {
else if (props.isZLS()) {
cn_zls_double_mainloop_sandybridge_asm(ctx);
}
else if (ALGO == Algorithm::CN_DOUBLE) {
else if (props.isDouble()) {
cn_double_double_mainloop_sandybridge_asm(ctx);
}
else if (props.isR()) {
@@ -1146,9 +1134,8 @@ template<Algorithm::Id ALGO>
static NOINLINE void cryptonight_single_hash_gr_sse41(const uint8_t* __restrict__ input, size_t size, uint8_t* __restrict__ output, cryptonight_ctx** __restrict__ ctx, uint64_t height)
{
constexpr CnAlgo<ALGO> props;
constexpr Algorithm::Id BASE = props.base();
if (BASE == Algorithm::CN_1 && size < 43) {
if (props.isBase1() && size < 43) {
memset(output, 0, 32);
return;
}
@@ -1163,12 +1150,12 @@ static NOINLINE void cryptonight_single_hash_gr_sse41(const uint8_t* __restrict_
VARIANT1_INIT(0);
ctx[0]->tweak1_2 = tweak1_2_0;
ctx[0]->tweak1_table = tweak1_table;
if (ALGO == Algorithm::CN_GR_0) cn_gr0_single_mainloop_asm(ctx);
if (ALGO == Algorithm::CN_GR_1) cn_gr1_single_mainloop_asm(ctx);
if (ALGO == Algorithm::CN_GR_2) cn_gr2_single_mainloop_asm(ctx);
if (ALGO == Algorithm::CN_GR_3) cn_gr3_single_mainloop_asm(ctx);
if (ALGO == Algorithm::CN_GR_4) cn_gr4_single_mainloop_asm(ctx);
if (ALGO == Algorithm::CN_GR_5) cn_gr5_single_mainloop_asm(ctx);
if (props.isGR0()) cn_gr0_single_mainloop_asm(ctx);
if (props.isGR1()) cn_gr1_single_mainloop_asm(ctx);
if (props.isGR2()) cn_gr2_single_mainloop_asm(ctx);
if (props.isGR3()) cn_gr3_single_mainloop_asm(ctx);
if (props.isGR4()) cn_gr4_single_mainloop_asm(ctx);
if (props.isGR5()) cn_gr5_single_mainloop_asm(ctx);
cn_implode_scratchpad<ALGO, false, 0>(ctx[0]);
keccakf(reinterpret_cast<uint64_t*>(ctx[0]->state), 24);
@@ -1180,9 +1167,8 @@ template<Algorithm::Id ALGO>
static NOINLINE void cryptonight_double_hash_gr_sse41(const uint8_t *__restrict__ input, size_t size, uint8_t *__restrict__ output, cryptonight_ctx **__restrict__ ctx, uint64_t height)
{
constexpr CnAlgo<ALGO> props;
constexpr Algorithm::Id BASE = props.base();
if (BASE == Algorithm::CN_1 && size < 43) {
if (props.isBase1() && size < 43) {
memset(output, 0, 64);
return;
}
@@ -1196,7 +1182,7 @@ static NOINLINE void cryptonight_double_hash_gr_sse41(const uint8_t *__restrict_
}
# ifdef XMRIG_VAES
if (!props.isHeavy() && cn_vaes_enabled) {
if (cn_vaes_enabled) {
cn_explode_scratchpad_vaes_double(ctx[0], ctx[1], props.memory(), props.half_mem());
}
else
@@ -1214,15 +1200,15 @@ static NOINLINE void cryptonight_double_hash_gr_sse41(const uint8_t *__restrict_
ctx[0]->tweak1_table = tweak1_table;
if (ALGO == Algorithm::CN_GR_0) cn_gr0_double_mainloop_asm(ctx);
if (ALGO == Algorithm::CN_GR_1) cn_gr1_double_mainloop_asm(ctx);
if (ALGO == Algorithm::CN_GR_2) cn_gr2_double_mainloop_asm(ctx);
if (ALGO == Algorithm::CN_GR_3) cn_gr3_double_mainloop_asm(ctx);
if (ALGO == Algorithm::CN_GR_4) cn_gr4_double_mainloop_asm(ctx);
if (ALGO == Algorithm::CN_GR_5) cn_gr5_double_mainloop_asm(ctx);
if (props.isGR0()) cn_gr0_double_mainloop_asm(ctx);
if (props.isGR1()) cn_gr1_double_mainloop_asm(ctx);
if (props.isGR2()) cn_gr2_double_mainloop_asm(ctx);
if (props.isGR3()) cn_gr3_double_mainloop_asm(ctx);
if (props.isGR4()) cn_gr4_double_mainloop_asm(ctx);
if (props.isGR5()) cn_gr5_double_mainloop_asm(ctx);
# ifdef XMRIG_VAES
if (!props.isHeavy() && cn_vaes_enabled) {
if (cn_vaes_enabled) {
cn_implode_scratchpad_vaes_double(ctx[0], ctx[1], props.memory(), props.half_mem());
}
else
@@ -1267,15 +1253,8 @@ inline void cryptonight_double_hash(const uint8_t *__restrict__ input, size_t si
constexpr CnAlgo<ALGO> props;
constexpr size_t MASK = props.mask();
constexpr Algorithm::Id BASE = props.base();
# ifdef XMRIG_ALGO_CN_HEAVY
constexpr bool IS_CN_HEAVY_TUBE = ALGO == Algorithm::CN_HEAVY_TUBE;
# else
constexpr bool IS_CN_HEAVY_TUBE = false;
# endif
if (BASE == Algorithm::CN_1 && size < 43) {
if (props.isBase1() && size < 43) {
memset(output, 0, 64);
return;
}
@@ -1323,7 +1302,7 @@ inline void cryptonight_double_hash(const uint8_t *__restrict__ input, size_t si
__m128i bx11 = _mm_set_epi64x(h1[9] ^ h1[11], h1[8] ^ h1[10]);
__m128 conc_var0, conc_var1;
if (ALGO == Algorithm::CN_CCX) {
if (props.isCCX()) {
conc_var0 = _mm_setzero_ps();
conc_var1 = _mm_setzero_ps();
RESTORE_ROUNDING_MODE();
@@ -1334,10 +1313,10 @@ inline void cryptonight_double_hash(const uint8_t *__restrict__ input, size_t si
for (size_t i = 0; i < props.iterations(); i++) {
__m128i cx0, cx1;
if (IS_CN_HEAVY_TUBE || !SOFT_AES) {
if (props.isHeavyTube() || !SOFT_AES) {
cx0 = _mm_load_si128(reinterpret_cast<const __m128i *>(&l0[idx0 & MASK]));
cx1 = _mm_load_si128(reinterpret_cast<const __m128i *>(&l1[idx1 & MASK]));
if (ALGO == Algorithm::CN_CCX) {
if (props.isCCX()) {
cryptonight_conceal_tweak(cx0, conc_var0);
cryptonight_conceal_tweak(cx1, conc_var1);
}
@@ -1345,12 +1324,12 @@ inline void cryptonight_double_hash(const uint8_t *__restrict__ input, size_t si
const __m128i ax0 = _mm_set_epi64x(ah0, al0);
const __m128i ax1 = _mm_set_epi64x(ah1, al1);
if (IS_CN_HEAVY_TUBE) {
if (props.isHeavyTube()) {
cx0 = aes_round_tweak_div(cx0, ax0);
cx1 = aes_round_tweak_div(cx1, ax1);
}
else if (SOFT_AES) {
if (ALGO == Algorithm::CN_CCX) {
if (props.isCCX()) {
cx0 = _mm_load_si128(reinterpret_cast<const __m128i*>(&l0[idx0 & MASK]));
cx1 = _mm_load_si128(reinterpret_cast<const __m128i*>(&l1[idx1 & MASK]));
cryptonight_conceal_tweak(cx0, conc_var0);
@@ -1368,7 +1347,7 @@ inline void cryptonight_double_hash(const uint8_t *__restrict__ input, size_t si
cx1 = _mm_aesenc_si128(cx1, ax1);
}
if (BASE == Algorithm::CN_1 || BASE == Algorithm::CN_2) {
if (props.isBase1() || props.isBase2()) {
cryptonight_monero_tweak<ALGO>((uint64_t*)&l0[idx0 & MASK], l0, idx0 & MASK, ax0, bx00, bx01, cx0);
cryptonight_monero_tweak<ALGO>((uint64_t*)&l1[idx1 & MASK], l1, idx1 & MASK, ax1, bx10, bx11, cx1);
} else {
@@ -1383,13 +1362,11 @@ inline void cryptonight_double_hash(const uint8_t *__restrict__ input, size_t si
cl = ((uint64_t*) &l0[idx0 & MASK])[0];
ch = ((uint64_t*) &l0[idx0 & MASK])[1];
if (BASE == Algorithm::CN_2) {
if (props.isBase2()) {
if (props.isR()) {
VARIANT4_RANDOM_MATH(0, al0, ah0, cl, bx00, bx01);
if (ALGO == Algorithm::CN_R) {
al0 ^= r0[2] | ((uint64_t)(r0[3]) << 32);
ah0 ^= r0[0] | ((uint64_t)(r0[1]) << 32);
}
al0 ^= r0[2] | ((uint64_t)(r0[3]) << 32);
ah0 ^= r0[0] | ((uint64_t)(r0[1]) << 32);
} else {
VARIANT2_INTEGER_MATH(0, cl, cx0);
}
@@ -1397,11 +1374,11 @@ inline void cryptonight_double_hash(const uint8_t *__restrict__ input, size_t si
lo = __umul128(idx0, cl, &hi);
if (BASE == Algorithm::CN_2) {
if (ALGO == Algorithm::CN_R) {
if (props.isBase2()) {
if (props.isR()) {
VARIANT2_SHUFFLE(l0, idx0 & MASK, ax0, bx00, bx01, cx0, 0);
} else {
VARIANT2_SHUFFLE2(l0, idx0 & MASK, ax0, bx00, bx01, hi, lo, (((ALGO == Algorithm::CN_RWZ) || (ALGO == Algorithm::CN_UPX2)) ? 1 : 0));
VARIANT2_SHUFFLE2(l0, idx0 & MASK, ax0, bx00, bx01, hi, lo, ((props.isRWZ() || props.isUPX2()) ? 1 : 0));
}
}
@@ -1410,9 +1387,9 @@ inline void cryptonight_double_hash(const uint8_t *__restrict__ input, size_t si
((uint64_t*)&l0[idx0 & MASK])[0] = al0;
if (IS_CN_HEAVY_TUBE || ALGO == Algorithm::CN_RTO) {
if (props.isHeavyTube() || props.isRTO()) {
((uint64_t*) &l0[idx0 & MASK])[1] = ah0 ^ tweak1_2_0 ^ al0;
} else if (BASE == Algorithm::CN_1) {
} else if (props.isBase1()) {
((uint64_t*) &l0[idx0 & MASK])[1] = ah0 ^ tweak1_2_0;
} else {
((uint64_t*) &l0[idx0 & MASK])[1] = ah0;
@@ -1430,7 +1407,7 @@ inline void cryptonight_double_hash(const uint8_t *__restrict__ input, size_t si
((int64_t*)&l0[idx0 & MASK])[0] = n ^ q;
if (ALGO == Algorithm::CN_HEAVY_XHV) {
if (props.isHeavyXHV()) {
d = ~d;
}
@@ -1441,13 +1418,11 @@ inline void cryptonight_double_hash(const uint8_t *__restrict__ input, size_t si
cl = ((uint64_t*) &l1[idx1 & MASK])[0];
ch = ((uint64_t*) &l1[idx1 & MASK])[1];
if (BASE == Algorithm::CN_2) {
if (props.isBase2()) {
if (props.isR()) {
VARIANT4_RANDOM_MATH(1, al1, ah1, cl, bx10, bx11);
if (ALGO == Algorithm::CN_R) {
al1 ^= r1[2] | ((uint64_t)(r1[3]) << 32);
ah1 ^= r1[0] | ((uint64_t)(r1[1]) << 32);
}
al1 ^= r1[2] | ((uint64_t)(r1[3]) << 32);
ah1 ^= r1[0] | ((uint64_t)(r1[1]) << 32);
} else {
VARIANT2_INTEGER_MATH(1, cl, cx1);
}
@@ -1455,11 +1430,11 @@ inline void cryptonight_double_hash(const uint8_t *__restrict__ input, size_t si
lo = __umul128(idx1, cl, &hi);
if (BASE == Algorithm::CN_2) {
if (ALGO == Algorithm::CN_R) {
if (props.isBase2()) {
if (props.isR()) {
VARIANT2_SHUFFLE(l1, idx1 & MASK, ax1, bx10, bx11, cx1, 0);
} else {
VARIANT2_SHUFFLE2(l1, idx1 & MASK, ax1, bx10, bx11, hi, lo, (((ALGO == Algorithm::CN_RWZ) || (ALGO == Algorithm::CN_UPX2)) ? 1 : 0));
VARIANT2_SHUFFLE2(l1, idx1 & MASK, ax1, bx10, bx11, hi, lo, ((props.isRWZ() || props.isUPX2()) ? 1 : 0));
}
}
@@ -1468,9 +1443,9 @@ inline void cryptonight_double_hash(const uint8_t *__restrict__ input, size_t si
((uint64_t*)&l1[idx1 & MASK])[0] = al1;
if (IS_CN_HEAVY_TUBE || ALGO == Algorithm::CN_RTO) {
if (props.isHeavyTube() || props.isRTO()) {
((uint64_t*)&l1[idx1 & MASK])[1] = ah1 ^ tweak1_2_1 ^ al1;
} else if (BASE == Algorithm::CN_1) {
} else if (props.isBase1()) {
((uint64_t*)&l1[idx1 & MASK])[1] = ah1 ^ tweak1_2_1;
} else {
((uint64_t*)&l1[idx1 & MASK])[1] = ah1;
@@ -1488,7 +1463,7 @@ inline void cryptonight_double_hash(const uint8_t *__restrict__ input, size_t si
((int64_t*)&l1[idx1 & MASK])[0] = n ^ q;
if (ALGO == Algorithm::CN_HEAVY_XHV) {
if (props.isHeavyXHV()) {
d = ~d;
}
@@ -1496,7 +1471,7 @@ inline void cryptonight_double_hash(const uint8_t *__restrict__ input, size_t si
}
# endif
if (BASE == Algorithm::CN_2) {
if (props.isBase2()) {
bx01 = bx00;
bx11 = bx10;
}
@@ -1529,9 +1504,8 @@ template<Algorithm::Id ALGO>
static NOINLINE void cryptonight_quad_hash_gr_sse41(const uint8_t* __restrict__ input, size_t size, uint8_t* __restrict__ output, cryptonight_ctx** __restrict__ ctx, uint64_t height)
{
constexpr CnAlgo<ALGO> props;
constexpr Algorithm::Id BASE = props.base();
if (BASE == Algorithm::CN_1 && size < 43) {
if (props.isBase1() && size < 43) {
memset(output, 0, 32 * 4);
return;
}
@@ -1549,7 +1523,7 @@ static NOINLINE void cryptonight_quad_hash_gr_sse41(const uint8_t* __restrict__
}
# ifdef XMRIG_VAES
if (!props.isHeavy() && cn_vaes_enabled) {
if (cn_vaes_enabled) {
cn_explode_scratchpad_vaes_double(ctx[0], ctx[1], props.memory(), props.half_mem());
cn_explode_scratchpad_vaes_double(ctx[2], ctx[3], props.memory(), props.half_mem());
}
@@ -1569,15 +1543,15 @@ static NOINLINE void cryptonight_quad_hash_gr_sse41(const uint8_t* __restrict__
ctx[0]->tweak1_table = tweak1_table;
if (ALGO == Algorithm::CN_GR_0) cn_gr0_quad_mainloop_asm(ctx);
if (ALGO == Algorithm::CN_GR_1) cn_gr1_quad_mainloop_asm(ctx);
if (ALGO == Algorithm::CN_GR_2) cn_gr2_quad_mainloop_asm(ctx);
if (ALGO == Algorithm::CN_GR_3) cn_gr3_quad_mainloop_asm(ctx);
if (ALGO == Algorithm::CN_GR_4) cn_gr4_quad_mainloop_asm(ctx);
if (ALGO == Algorithm::CN_GR_5) cn_gr5_quad_mainloop_asm(ctx);
if (props.isGR0()) cn_gr0_quad_mainloop_asm(ctx);
if (props.isGR1()) cn_gr1_quad_mainloop_asm(ctx);
if (props.isGR2()) cn_gr2_quad_mainloop_asm(ctx);
if (props.isGR3()) cn_gr3_quad_mainloop_asm(ctx);
if (props.isGR4()) cn_gr4_quad_mainloop_asm(ctx);
if (props.isGR5()) cn_gr5_quad_mainloop_asm(ctx);
# ifdef XMRIG_VAES
if (!props.isHeavy() && cn_vaes_enabled) {
if (cn_vaes_enabled) {
cn_implode_scratchpad_vaes_double(ctx[0], ctx[1], props.memory(), props.half_mem());
cn_implode_scratchpad_vaes_double(ctx[2], ctx[3], props.memory(), props.half_mem());
}
@@ -1606,14 +1580,14 @@ static NOINLINE void cryptonight_quad_hash_gr_sse41(const uint8_t* __restrict__
#define CN_STEP1(a, b0, b1, c, l, ptr, idx, conc_var) \
ptr = reinterpret_cast<__m128i*>(&l[idx & MASK]); \
c = _mm_load_si128(ptr); \
if (ALGO == Algorithm::CN_CCX) { \
if (props.isCCX()) { \
cryptonight_conceal_tweak(c, conc_var); \
}
#define CN_STEP2(a, b0, b1, c, l, ptr, idx) \
if (IS_CN_HEAVY_TUBE) { \
if (props.isHeavyTube()) { \
c = aes_round_tweak_div(c, a); \
} \
else if (SOFT_AES) { \
@@ -1622,7 +1596,7 @@ static NOINLINE void cryptonight_quad_hash_gr_sse41(const uint8_t* __restrict__
c = _mm_aesenc_si128(c, a); \
} \
\
if (BASE == Algorithm::CN_1 || BASE == Algorithm::CN_2) { \
if (props.isBase1() || props.isBase2()) { \
cryptonight_monero_tweak<ALGO>((uint64_t*)ptr, l, idx & MASK, a, b0, b1, c); \
} else { \
_mm_store_si128(ptr, _mm_xor_si128(b0, c)); \
@@ -1638,36 +1612,34 @@ static NOINLINE void cryptonight_quad_hash_gr_sse41(const uint8_t* __restrict__
#define CN_STEP4(part, a, b0, b1, c, l, mc, ptr, idx) \
uint64_t al##part, ah##part; \
if (BASE == Algorithm::CN_2) { \
if (props.isBase2()) { \
if (props.isR()) { \
al##part = _mm_cvtsi128_si64(a); \
ah##part = _mm_cvtsi128_si64(_mm_srli_si128(a, 8)); \
VARIANT4_RANDOM_MATH(part, al##part, ah##part, cl##part, b0, b1); \
if (ALGO == Algorithm::CN_R) { \
al##part ^= r##part[2] | ((uint64_t)(r##part[3]) << 32); \
ah##part ^= r##part[0] | ((uint64_t)(r##part[1]) << 32); \
} \
al##part ^= r##part[2] | ((uint64_t)(r##part[3]) << 32); \
ah##part ^= r##part[0] | ((uint64_t)(r##part[1]) << 32); \
} else { \
VARIANT2_INTEGER_MATH(part, cl##part, c); \
} \
} \
lo = __umul128(idx, cl##part, &hi); \
if (BASE == Algorithm::CN_2) { \
if (ALGO == Algorithm::CN_R) { \
if (props.isBase2()) { \
if (props.isR()) { \
VARIANT2_SHUFFLE(l, idx & MASK, a, b0, b1, c, 0); \
} else { \
VARIANT2_SHUFFLE2(l, idx & MASK, a, b0, b1, hi, lo, (((ALGO == Algorithm::CN_RWZ) || (ALGO == Algorithm::CN_UPX2)) ? 1 : 0)); \
VARIANT2_SHUFFLE2(l, idx & MASK, a, b0, b1, hi, lo, ((props.isRWZ() || props.isUPX2()) ? 1 : 0)); \
} \
} \
if (ALGO == Algorithm::CN_R) { \
if (props.isR()) { \
a = _mm_set_epi64x(ah##part, al##part); \
} \
a = _mm_add_epi64(a, _mm_set_epi64x(lo, hi)); \
\
if (BASE == Algorithm::CN_1) { \
if (props.isBase1()) { \
_mm_store_si128(ptr, _mm_xor_si128(a, mc)); \
\
if (IS_CN_HEAVY_TUBE || ALGO == Algorithm::CN_RTO) { \
if (props.isHeavyTube() || props.isRTO()) { \
((uint64_t*)ptr)[1] ^= ((uint64_t*)ptr)[0]; \
} \
} else { \
@@ -1681,13 +1653,13 @@ static NOINLINE void cryptonight_quad_hash_gr_sse41(const uint8_t* __restrict__
int32_t d = ((int32_t*)&l[idx & MASK])[2]; \
int64_t q = n / (d | 0x5); \
((int64_t*)&l[idx & MASK])[0] = n ^ q; \
if (IS_CN_HEAVY_XHV) { \
if (props.isHeavyXHV()) { \
d = ~d; \
} \
\
idx = d ^ q; \
} \
if (BASE == Algorithm::CN_2) { \
if (props.isBase2()) { \
b1 = b0; \
} \
b0 = c;
@@ -1697,11 +1669,11 @@ static NOINLINE void cryptonight_quad_hash_gr_sse41(const uint8_t* __restrict__
__m128i mc##n; \
__m128i division_result_xmm_##n; \
__m128i sqrt_result_xmm_##n; \
if (BASE == Algorithm::CN_1) { \
if (props.isBase1()) { \
mc##n = _mm_set_epi64x(*reinterpret_cast<const uint64_t*>(input + n * size + 35) ^ \
*(reinterpret_cast<const uint64_t*>((ctx)->state) + 24), 0); \
} \
if (BASE == Algorithm::CN_2) { \
if (props.isBase2()) { \
division_result_xmm_##n = _mm_cvtsi64_si128(h##n[12]); \
sqrt_result_xmm_##n = _mm_cvtsi64_si128(h##n[13]); \
} \
@@ -1710,7 +1682,7 @@ static NOINLINE void cryptonight_quad_hash_gr_sse41(const uint8_t* __restrict__
__m128i bx##n##1 = _mm_set_epi64x(h##n[9] ^ h##n[11], h##n[8] ^ h##n[10]); \
__m128i cx##n = _mm_setzero_si128(); \
__m128 conc_var##n; \
if (ALGO == Algorithm::CN_CCX) { \
if (props.isCCX()) { \
conc_var##n = _mm_setzero_ps(); \
} \
VARIANT4_RANDOM_MATH_INIT(n);
@@ -1721,17 +1693,8 @@ inline void cryptonight_triple_hash(const uint8_t *__restrict__ input, size_t si
{
constexpr CnAlgo<ALGO> props;
constexpr size_t MASK = props.mask();
constexpr Algorithm::Id BASE = props.base();
# ifdef XMRIG_ALGO_CN_HEAVY
constexpr bool IS_CN_HEAVY_TUBE = ALGO == Algorithm::CN_HEAVY_TUBE;
constexpr bool IS_CN_HEAVY_XHV = ALGO == Algorithm::CN_HEAVY_XHV;
# else
constexpr bool IS_CN_HEAVY_TUBE = false;
constexpr bool IS_CN_HEAVY_XHV = false;
# endif
if (BASE == Algorithm::CN_1 && size < 43) {
if (props.isBase1() && size < 43) {
memset(output, 0, 32 * 3);
return;
}
@@ -1755,7 +1718,7 @@ inline void cryptonight_triple_hash(const uint8_t *__restrict__ input, size_t si
CONST_INIT(ctx[1], 1);
CONST_INIT(ctx[2], 2);
VARIANT2_SET_ROUNDING_MODE();
if (ALGO == Algorithm::CN_CCX) {
if (props.isCCX()) {
RESTORE_ROUNDING_MODE();
}
@@ -1819,17 +1782,8 @@ inline void cryptonight_quad_hash(const uint8_t *__restrict__ input, size_t size
constexpr CnAlgo<ALGO> props;
constexpr size_t MASK = props.mask();
constexpr Algorithm::Id BASE = props.base();
# ifdef XMRIG_ALGO_CN_HEAVY
constexpr bool IS_CN_HEAVY_TUBE = ALGO == Algorithm::CN_HEAVY_TUBE;
constexpr bool IS_CN_HEAVY_XHV = ALGO == Algorithm::CN_HEAVY_XHV;
# else
constexpr bool IS_CN_HEAVY_TUBE = false;
constexpr bool IS_CN_HEAVY_XHV = false;
# endif
if (BASE == Algorithm::CN_1 && size < 43) {
if (props.isBase1() && size < 43) {
memset(output, 0, 32 * 4);
return;
}
@@ -1869,7 +1823,7 @@ inline void cryptonight_quad_hash(const uint8_t *__restrict__ input, size_t size
CONST_INIT(ctx[2], 2);
CONST_INIT(ctx[3], 3);
VARIANT2_SET_ROUNDING_MODE();
if (ALGO == Algorithm::CN_CCX) {
if (props.isCCX()) {
RESTORE_ROUNDING_MODE();
}
@@ -1930,17 +1884,8 @@ inline void cryptonight_penta_hash(const uint8_t *__restrict__ input, size_t siz
{
constexpr CnAlgo<ALGO> props;
constexpr size_t MASK = props.mask();
constexpr Algorithm::Id BASE = props.base();
# ifdef XMRIG_ALGO_CN_HEAVY
constexpr bool IS_CN_HEAVY_TUBE = ALGO == Algorithm::CN_HEAVY_TUBE;
constexpr bool IS_CN_HEAVY_XHV = ALGO == Algorithm::CN_HEAVY_XHV;
# else
constexpr bool IS_CN_HEAVY_TUBE = false;
constexpr bool IS_CN_HEAVY_XHV = false;
# endif
if (BASE == Algorithm::CN_1 && size < 43) {
if (props.isBase1() && size < 43) {
memset(output, 0, 32 * 5);
return;
}
@@ -1970,7 +1915,7 @@ inline void cryptonight_penta_hash(const uint8_t *__restrict__ input, size_t siz
CONST_INIT(ctx[3], 3);
CONST_INIT(ctx[4], 4);
VARIANT2_SET_ROUNDING_MODE();
if (ALGO == Algorithm::CN_CCX) {
if (props.isCCX()) {
RESTORE_ROUNDING_MODE();
}

View File

@@ -1,8 +1,8 @@
/* XMRig
* Copyright (c) 2018 Lee Clagett <https://github.com/vtnerd>
* Copyright (c) 2018-2019 tevador <tevador@gmail.com>
* Copyright (c) 2018-2021 SChernykh <https://github.com/SChernykh>
* Copyright (c) 2016-2021 XMRig <https://github.com/xmrig>, <support@xmrig.com>
* Copyright (c) 2018-2023 SChernykh <https://github.com/SChernykh>
* Copyright (c) 2016-2023 XMRig <https://github.com/xmrig>, <support@xmrig.com>
*
* This program is free software: you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@@ -18,10 +18,8 @@
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#include "crypto/common/VirtualMemory.h"
#include "backend/cpu/Cpu.h"
#include "backend/cpu/platform/HwlocCpuInfo.h"
#include "base/io/log/Log.h"
@@ -34,10 +32,9 @@ uint32_t xmrig::VirtualMemory::bindToNUMANode(int64_t affinity)
return 0;
}
auto cpu = static_cast<HwlocCpuInfo *>(Cpu::info());
hwloc_obj_t pu = hwloc_get_pu_obj_by_os_index(cpu->topology(), static_cast<unsigned>(affinity));
auto pu = hwloc_get_pu_obj_by_os_index(Cpu::info()->topology(), static_cast<unsigned>(affinity));
if (pu == nullptr || !cpu->membind(pu->nodeset)) {
if (pu == nullptr || !Cpu::info()->membind(pu->nodeset)) {
LOG_WARN("CPU #%02" PRId64 " warning: \"can't bind memory\"", affinity);
return 0;

View File

@@ -47,9 +47,12 @@
#include <uv.h>
#ifdef XMRIG_FEATURE_HWLOC
#include "base/kernel/Platform.h"
#include "backend/cpu/platform/HwlocCpuInfo.h"
#include <hwloc.h>
# include "base/kernel/Platform.h"
# include <hwloc.h>
# if HWLOC_API_VERSION < 0x20000
# define HWLOC_OBJ_L3CACHE HWLOC_OBJ_CACHE
# endif
#endif
#if defined(XMRIG_ARM)
@@ -86,7 +89,7 @@ CORE_HASH(14, whirlpool );
#undef CORE_HASH
typedef void (*core_hash_func)(const uint8_t* data, size_t size, uint8_t* output);
using core_hash_func = void (*)(const uint8_t* data, size_t size, uint8_t* output);
static const core_hash_func core_hash[15] = { h0, h1, h2, h3, h4, h5, h6, h7, h8, h9, h10, h11, h12, h13, h14 };
namespace xmrig
@@ -165,6 +168,8 @@ static struct AlgoTune
struct HelperThread
{
XMRIG_DISABLE_COPY_MOVE_DEFAULT(HelperThread)
HelperThread(hwloc_bitmap_t cpu_set, int priority, bool is8MB) : m_cpuSet(cpu_set), m_priority(priority), m_is8MB(is8MB)
{
uv_mutex_init(&m_mutex);
@@ -194,14 +199,17 @@ struct HelperThread
struct TaskBase
{
virtual ~TaskBase() {}
virtual void run() = 0;
XMRIG_DISABLE_COPY_MOVE(TaskBase)
TaskBase() = default;
virtual ~TaskBase() = default;
virtual void run() = 0;
};
template<typename T>
struct Task : TaskBase
{
inline Task(T&& task) : m_task(std::move(task))
explicit inline Task(T&& task) : m_task(std::move(task))
{
static_assert(sizeof(Task) <= 128, "Task struct is too large");
}
@@ -219,7 +227,7 @@ struct HelperThread
inline void launch_task(T&& task)
{
uv_mutex_lock(&m_mutex);
new (&m_tasks[m_numTasks++]) Task<T>(std::move(task));
new (&m_tasks[m_numTasks++]) Task<T>(std::forward<T>(task));
uv_cond_signal(&m_cond);
uv_mutex_unlock(&m_mutex);
}
@@ -234,7 +242,7 @@ struct HelperThread
void run()
{
if (hwloc_bitmap_weight(m_cpuSet) > 0) {
hwloc_topology_t topology = reinterpret_cast<HwlocCpuInfo*>(Cpu::info())->topology();
hwloc_topology_t topology = Cpu::info()->topology();
if (hwloc_set_cpubind(topology, m_cpuSet, HWLOC_CPUBIND_THREAD | HWLOC_CPUBIND_STRICT) < 0) {
hwloc_set_cpubind(topology, m_cpuSet, HWLOC_CPUBIND_THREAD);
}
@@ -288,9 +296,9 @@ void benchmark()
// Try to avoid CPU core 0 because many system threads use it and can interfere
uint32_t thread_index1 = (Cpu::info()->threads() > 2) ? 2 : 0;
hwloc_topology_t topology = reinterpret_cast<HwlocCpuInfo*>(Cpu::info())->topology();
hwloc_topology_t topology = Cpu::info()->topology();
hwloc_obj_t pu = hwloc_get_pu_obj_by_os_index(topology, thread_index1);
hwloc_obj_t pu2;
hwloc_obj_t pu2 = nullptr;
hwloc_get_closest_objs(topology, pu, &pu2, 1);
uint32_t thread_index2 = pu2 ? pu2->os_index : thread_index1;
@@ -481,12 +489,17 @@ HelperThread* create_helper_thread(int64_t cpu_index, int priority, const std::v
}
if (cpu_index >= 0) {
hwloc_topology_t topology = reinterpret_cast<HwlocCpuInfo*>(Cpu::info())->topology();
hwloc_obj_t root = hwloc_get_root_obj(topology);
hwloc_obj_t root = hwloc_get_root_obj(Cpu::info()->topology());
bool is8MB = false;
findByType(root, HWLOC_OBJ_L3CACHE, [cpu_index, &is8MB](hwloc_obj_t obj) {
# if HWLOC_API_VERSION < 0x20000
if (obj->attr->cache.depth != 3) {
return false;
}
# endif
if (!hwloc_bitmap_isset(obj->cpuset, cpu_index)) {
return false;
}
@@ -510,7 +523,11 @@ HelperThread* create_helper_thread(int64_t cpu_index, int priority, const std::v
return true;
});
# if HWLOC_API_VERSION >= 0x20000
for (auto obj_type : { HWLOC_OBJ_CORE, HWLOC_OBJ_L1CACHE, HWLOC_OBJ_L2CACHE, HWLOC_OBJ_L3CACHE }) {
# else
for (auto obj_type : { HWLOC_OBJ_CORE, HWLOC_OBJ_CACHE }) {
# endif
findByType(root, obj_type, [cpu_index, helper_cpu_set, main_threads_set](hwloc_obj_t obj) {
const hwloc_cpuset_t& s = obj->cpuset;
if (hwloc_bitmap_isset(s, cpu_index)) {
@@ -571,9 +588,13 @@ void hash_octa(const uint8_t* data, size_t size, uint8_t* output, cryptonight_ct
uint8_t tmp[64 * N];
if (helper && (tune[cn_indices[0]].threads == 2) && (tune[cn_indices[1]].threads == 2) && (tune[cn_indices[2]].threads == 2)) {
const size_t n = N / 2;
constexpr size_t n = N / 2;
helper->launch_task([av, data, size, &ctx_memory, ctx, &cn_indices, &core_indices, &tmp, output, tune]() {
# ifdef _MSC_VER
constexpr size_t n = N / 2;
# endif
helper->launch_task([n, av, data, size, &ctx_memory, ctx, &cn_indices, &core_indices, &tmp, output, tune]() {
const uint8_t* input = data;
size_t input_size = size;

View File

@@ -1,6 +1,6 @@
/* XMRig
* Copyright (c) 2018-2021 SChernykh <https://github.com/SChernykh>
* Copyright (c) 2016-2021 XMRig <https://github.com/xmrig>, <support@xmrig.com>
* Copyright (c) 2018-2023 SChernykh <https://github.com/SChernykh>
* Copyright (c) 2016-2023 XMRig <https://github.com/xmrig>, <support@xmrig.com>
*
* This program is free software: you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@@ -22,11 +22,6 @@
#include "base/io/json/Json.h"
#ifdef XMRIG_FEATURE_HWLOC
# include "backend/cpu/platform/HwlocCpuInfo.h"
#endif
#include <array>
#include <algorithm>
#include <cmath>
@@ -190,7 +185,7 @@ std::vector<uint32_t> xmrig::RxConfig::nodeset() const
return m_nodeset;
}
return (m_numa && Cpu::info()->nodes() > 1) ? static_cast<HwlocCpuInfo *>(Cpu::info())->nodeset() : std::vector<uint32_t>();
return (m_numa && Cpu::info()->nodes() > 1) ? Cpu::info()->nodeset() : std::vector<uint32_t>();
}
#endif

View File

@@ -1,6 +1,6 @@
/* XMRig
* Copyright (c) 2018-2021 SChernykh <https://github.com/SChernykh>
* Copyright (c) 2016-2021 XMRig <https://github.com/xmrig>, <support@xmrig.com>
* Copyright (c) 2018-2023 SChernykh <https://github.com/SChernykh>
* Copyright (c) 2016-2023 XMRig <https://github.com/xmrig>, <support@xmrig.com>
*
* This program is free software: you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@@ -123,7 +123,7 @@ private:
};
} /* namespace xmrig */
} // namespace xmrig
#endif /* XMRIG_RXCONFIG_H */
#endif // XMRIG_RXCONFIG_H

View File

@@ -1,7 +1,7 @@
/* XMRig
* Copyright (c) 2018-2019 tevador <tevador@gmail.com>
* Copyright (c) 2018-2021 SChernykh <https://github.com/SChernykh>
* Copyright (c) 2016-2021 XMRig <https://github.com/xmrig>, <support@xmrig.com>
* Copyright (c) 2018-2023 SChernykh <https://github.com/SChernykh>
* Copyright (c) 2016-2023 XMRig <https://github.com/xmrig>, <support@xmrig.com>
*
* This program is free software: you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@@ -19,7 +19,6 @@
#include "crypto/rx/RxNUMAStorage.h"
#include "backend/cpu/Cpu.h"
#include "backend/cpu/platform/HwlocCpuInfo.h"
#include "base/io/log/Log.h"
#include "base/io/log/Tags.h"
#include "base/kernel/Platform.h"
@@ -45,13 +44,12 @@ static std::mutex mutex;
static bool bindToNUMANode(uint32_t nodeId)
{
auto cpu = static_cast<HwlocCpuInfo *>(Cpu::info());
hwloc_obj_t node = hwloc_get_numanode_obj_by_os_index(cpu->topology(), nodeId);
auto node = hwloc_get_numanode_obj_by_os_index(Cpu::info()->topology(), nodeId);
if (!node) {
return false;
}
if (cpu->membind(node->nodeset)) {
if (Cpu::info()->membind(node->nodeset)) {
Platform::setThreadAffinity(static_cast<uint64_t>(hwloc_bitmap_first(node->cpuset)));
return true;

View File

@@ -308,6 +308,10 @@ void xmrig::Network::tick()
if (m_donate) {
m_donate->tick(now);
}
# ifdef XMRIG_FEATURE_API
m_controller->api()->tick();
# endif
}

View File

@@ -22,15 +22,15 @@
#define APP_ID "xmrig"
#define APP_NAME "XMRig"
#define APP_DESC "XMRig miner"
#define APP_VERSION "6.19.3-dev"
#define APP_VERSION "6.20.1-dev"
#define APP_DOMAIN "xmrig.com"
#define APP_SITE "www.xmrig.com"
#define APP_COPYRIGHT "Copyright (C) 2016-2023 xmrig.com"
#define APP_KIND "miner"
#define APP_VER_MAJOR 6
#define APP_VER_MINOR 19
#define APP_VER_PATCH 3
#define APP_VER_MINOR 20
#define APP_VER_PATCH 1
#ifdef _MSC_VER
# if (_MSC_VER >= 1930)