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v6.18.1
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28e81bd7c0 | ||
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54e75bc7c4 | ||
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c388113a30 | ||
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36afeec225 | ||
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4b5e56416d | ||
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0d314d0469 | ||
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7fc45dfb2d |
@@ -5,6 +5,8 @@
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- [#3109](https://github.com/xmrig/xmrig/pull/3109) RandomX: added Blake2 AVX2 version.
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- [#3082](https://github.com/xmrig/xmrig/pull/3082) Fixed GCC 12 warnings.
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- [#3075](https://github.com/xmrig/xmrig/pull/3075) Recognize `armv7ve` as valid ARMv7 target.
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- [#3132](https://github.com/xmrig/xmrig/pull/3132) RandomX: added MSR mod for Zen 4.
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- [#3134](https://github.com/xmrig/xmrig/pull/3134) Added Zen4 to `randomx_boost.sh`.
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# v6.18.0
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- [#3067](https://github.com/xmrig/xmrig/pull/3067) Monero v15 network upgrade support and more house keeping.
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@@ -10,14 +10,24 @@ fi
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if grep -E 'AMD Ryzen|AMD EPYC' /proc/cpuinfo > /dev/null;
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then
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if grep "cpu family[[:space:]]:[[:space:]]25" /proc/cpuinfo > /dev/null;
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if grep "cpu family[[:space:]]\{1,\}:[[:space:]]25" /proc/cpuinfo > /dev/null;
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then
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echo "Detected Zen3 CPU"
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wrmsr -a 0xc0011020 0x4480000000000
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wrmsr -a 0xc0011021 0x1c000200000040
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wrmsr -a 0xc0011022 0xc000000401500000
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wrmsr -a 0xc001102b 0x2000cc14
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echo "MSR register values for Zen3 applied"
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if grep "model[[:space:]]\{1,\}:[[:space:]]97" /proc/cpuinfo > /dev/null;
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then
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echo "Detected Zen4 CPU"
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wrmsr -a 0xc0011020 0x4400000000000
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wrmsr -a 0xc0011021 0x4000000000040
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wrmsr -a 0xc0011022 0x8680000401570000
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wrmsr -a 0xc001102b 0x2040cc10
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echo "MSR register values for Zen4 applied"
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else
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echo "Detected Zen3 CPU"
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wrmsr -a 0xc0011020 0x4480000000000
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wrmsr -a 0xc0011021 0x1c000200000040
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wrmsr -a 0xc0011022 0xc000000401500000
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wrmsr -a 0xc001102b 0x2000cc14
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echo "MSR register values for Zen3 applied"
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fi
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else
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echo "Detected Zen1/Zen2 CPU"
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wrmsr -a 0xc0011020 0
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@@ -77,8 +77,11 @@ xmrig::CpuWorker<N>::CpuWorker(size_t id, const CpuLaunchData &data) :
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{
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# ifdef XMRIG_ALGO_CN_HEAVY
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// cn-heavy optimization for Zen3 CPUs
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const bool is_vermeer = (Cpu::info()->arch() == ICpuInfo::ARCH_ZEN3) && (Cpu::info()->model() == 0x21);
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if ((N == 1) && (m_av == CnHash::AV_SINGLE) && (m_algorithm.family() == Algorithm::CN_HEAVY) && (m_assembly != Assembly::NONE) && is_vermeer) {
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const auto arch = Cpu::info()->arch();
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const uint32_t model = Cpu::info()->model();
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const bool is_vermeer = (arch == ICpuInfo::ARCH_ZEN3) && (model == 0x21);
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const bool is_raphael = (arch == ICpuInfo::ARCH_ZEN4) && (model == 0x61);
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if ((N == 1) && (m_av == CnHash::AV_SINGLE) && (m_algorithm.family() == Algorithm::CN_HEAVY) && (m_assembly != Assembly::NONE) && (is_vermeer || is_raphael)) {
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std::lock_guard<std::mutex> lock(cn_heavyZen3MemoryMutex);
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if (!cn_heavyZen3Memory) {
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// Round up number of threads to the multiple of 8
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@@ -45,19 +45,21 @@ public:
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ARCH_ZEN,
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ARCH_ZEN_PLUS,
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ARCH_ZEN2,
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ARCH_ZEN3
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ARCH_ZEN3,
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ARCH_ZEN4
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};
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enum MsrMod : uint32_t {
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MSR_MOD_NONE,
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MSR_MOD_RYZEN_17H,
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MSR_MOD_RYZEN_19H,
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MSR_MOD_RYZEN_19H_ZEN4,
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MSR_MOD_INTEL,
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MSR_MOD_CUSTOM,
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MSR_MOD_MAX
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};
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# define MSR_NAMES_LIST "none", "ryzen_17h", "ryzen_19h", "intel", "custom"
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# define MSR_NAMES_LIST "none", "ryzen_17h", "ryzen_19h", "ryzen_19h_zen4", "intel", "custom"
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enum Flag : uint32_t {
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FLAG_AES,
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@@ -64,7 +64,7 @@ static_assert(kCpuFlagsSize == ICpuInfo::FLAG_MAX, "kCpuFlagsSize and FLAG_MAX m
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#ifdef XMRIG_FEATURE_MSR
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constexpr size_t kMsrArraySize = 5;
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constexpr size_t kMsrArraySize = 6;
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static const std::array<const char *, kMsrArraySize> msrNames = { MSR_NAMES_LIST };
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static_assert(kMsrArraySize == ICpuInfo::MSR_MOD_MAX, "kMsrArraySize and MSR_MOD_MAX mismatch");
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#endif
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@@ -250,8 +250,14 @@ xmrig::BasicCpuInfo::BasicCpuInfo() :
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break;
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case 0x19:
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m_arch = ARCH_ZEN3;
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m_msrMod = MSR_MOD_RYZEN_19H;
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if (m_model == 0x61) {
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m_arch = ARCH_ZEN4;
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m_msrMod = MSR_MOD_RYZEN_19H_ZEN4;
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}
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else {
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m_arch = ARCH_ZEN3;
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m_msrMod = MSR_MOD_RYZEN_19H;
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}
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break;
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default:
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@@ -407,8 +407,12 @@ xmrig::cn_hash_fun xmrig::CnHash::fn(const Algorithm &algorithm, AlgoVariant av,
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}
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# ifdef XMRIG_ALGO_CN_HEAVY
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// cn-heavy optimization for Zen3 CPUs
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if ((av == AV_SINGLE) && (assembly != Assembly::NONE) && (Cpu::info()->arch() == ICpuInfo::ARCH_ZEN3) && (Cpu::info()->model() == 0x21)) {
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// cn-heavy optimization for Zen3/Zen4 CPUs
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const auto arch = Cpu::info()->arch();
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const uint32_t model = Cpu::info()->model();
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const bool is_vermeer = (arch == ICpuInfo::ARCH_ZEN3) && (model == 0x21);
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const bool is_raphael = (arch == ICpuInfo::ARCH_ZEN4) && (model == 0x61);
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if ((av == AV_SINGLE) && (assembly != Assembly::NONE) && (is_vermeer || is_raphael)) {
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switch (algorithm.id()) {
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case Algorithm::CN_HEAVY_0:
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return cryptonight_single_hash<Algorithm::CN_HEAVY_0, false, 3>;
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@@ -262,6 +262,10 @@ namespace randomx {
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// AVX2 init is faster on Zen3
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initDatasetAVX2 = true;
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break;
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case xmrig::ICpuInfo::ARCH_ZEN4:
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// AVX2 init is slower on Zen4
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initDatasetAVX2 = false;
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break;
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}
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}
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}
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@@ -58,12 +58,13 @@ static const std::array<const char *, RxConfig::ModeMax> modeNames = { "auto", "
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#ifdef XMRIG_FEATURE_MSR
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constexpr size_t kMsrArraySize = 5;
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constexpr size_t kMsrArraySize = 6;
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static const std::array<MsrItems, kMsrArraySize> msrPresets = {
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MsrItems(),
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MsrItems{{ 0xC0011020, 0ULL }, { 0xC0011021, 0x40ULL, ~0x20ULL }, { 0xC0011022, 0x1510000ULL }, { 0xC001102b, 0x2000cc16ULL }},
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MsrItems{{ 0xC0011020, 0x0004480000000000ULL }, { 0xC0011021, 0x001c000200000040ULL, ~0x20ULL }, { 0xC0011022, 0xc000000401500000ULL }, { 0xC001102b, 0x2000cc14ULL }},
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MsrItems{{ 0xC0011020, 0x0004400000000000ULL }, { 0xC0011021, 0x0004000000000040ULL, ~0x20ULL }, { 0xC0011022, 0x8680000401570000ULL }, { 0xC001102b, 0x2040cc10ULL }},
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MsrItems{{ 0x1a4, 0xf }},
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MsrItems()
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};
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@@ -22,7 +22,7 @@
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#define APP_ID "xmrig"
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#define APP_NAME "XMRig"
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#define APP_DESC "XMRig miner"
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#define APP_VERSION "6.18.1-dev"
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#define APP_VERSION "6.18.1"
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#define APP_DOMAIN "xmrig.com"
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#define APP_SITE "www.xmrig.com"
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#define APP_COPYRIGHT "Copyright (C) 2016-2022 xmrig.com"
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