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17 Commits

Author SHA1 Message Date
XMRig
28e81bd7c0 v6.18.1 2022-10-23 17:44:24 +07:00
XMRig
54e75bc7c4 Merge branch 'dev' 2022-10-23 17:43:38 +07:00
xmrig
c388113a30 Update CHANGELOG.md 2022-10-23 17:14:57 +07:00
xmrig
36afeec225 Merge pull request #3134 from SChernykh/dev
Added Zen4 to randomx_boost.sh
2022-10-10 03:37:06 +07:00
SChernykh
4b5e56416d Added Zen4 to randomx_boost.sh 2022-10-09 22:02:50 +02:00
xmrig
0d314d0469 Merge pull request #3132 from SChernykh/dev
RandomX: added MSR mod for Zen 4
2022-10-01 23:40:04 +07:00
SChernykh
7fc45dfb2d RandomX: added MSR mod for Zen 4
+0.8% faster on Ryzen 9 7950X
2022-10-01 18:33:04 +02:00
xmrig
2ba40edee0 Update CHANGELOG.md 2022-09-25 17:01:33 +07:00
xmrig
bc4dd11761 Merge pull request #3129 from SChernykh/dev
Fix: protectRX flushed CPU cache only on MacOS/iOS
2022-09-22 07:02:28 +07:00
SChernykh
7b52a41459 Fix: protectRX flushed CPU cache only on MacOS/iOS 2022-09-21 15:18:06 +02:00
xmrig
b5de214ff9 Merge pull request #3126 from SChernykh/dev
Don't reset when pool sends the same job blob
2022-09-19 19:03:17 +07:00
SChernykh
8bd3b393ef Update m_size only if blob was set successfully 2022-09-19 10:42:08 +02:00
SChernykh
9223c2f027 Don't reset when pool sends the same job blob 2022-09-19 10:35:36 +02:00
xmrig
6346d36d1b Merge pull request #3120 from SChernykh/dev
RandomX: optimized CFROUND elimination more
2022-09-16 22:50:51 +07:00
SChernykh
93c07e1d34 RandomX: optimized CFROUND elimination more 2022-09-16 14:11:27 +02:00
xmrig
0ba3000982 Merge pull request #3119 from SChernykh/dev
RandomX: optimized CFROUND elimination
2022-09-16 01:04:32 +07:00
SChernykh
f0e7de8c71 RandomX: optimized CFROUND elimination 2022-09-15 19:57:34 +02:00
14 changed files with 122 additions and 56 deletions

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@@ -1,3 +1,13 @@
# v6.18.1
- [#3129](https://github.com/xmrig/xmrig/pull/3129) Fix: protectRX flushed CPU cache only on MacOS/iOS.
- [#3126](https://github.com/xmrig/xmrig/pull/3126) Don't reset when pool sends the same job blob.
- [#3120](https://github.com/xmrig/xmrig/pull/3120) RandomX: optimized `CFROUND` elimination.
- [#3109](https://github.com/xmrig/xmrig/pull/3109) RandomX: added Blake2 AVX2 version.
- [#3082](https://github.com/xmrig/xmrig/pull/3082) Fixed GCC 12 warnings.
- [#3075](https://github.com/xmrig/xmrig/pull/3075) Recognize `armv7ve` as valid ARMv7 target.
- [#3132](https://github.com/xmrig/xmrig/pull/3132) RandomX: added MSR mod for Zen 4.
- [#3134](https://github.com/xmrig/xmrig/pull/3134) Added Zen4 to `randomx_boost.sh`.
# v6.18.0
- [#3067](https://github.com/xmrig/xmrig/pull/3067) Monero v15 network upgrade support and more house keeping.
- Removed deprecated AstroBWTv1 and v2.

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@@ -10,14 +10,24 @@ fi
if grep -E 'AMD Ryzen|AMD EPYC' /proc/cpuinfo > /dev/null;
then
if grep "cpu family[[:space:]]:[[:space:]]25" /proc/cpuinfo > /dev/null;
if grep "cpu family[[:space:]]\{1,\}:[[:space:]]25" /proc/cpuinfo > /dev/null;
then
echo "Detected Zen3 CPU"
wrmsr -a 0xc0011020 0x4480000000000
wrmsr -a 0xc0011021 0x1c000200000040
wrmsr -a 0xc0011022 0xc000000401500000
wrmsr -a 0xc001102b 0x2000cc14
echo "MSR register values for Zen3 applied"
if grep "model[[:space:]]\{1,\}:[[:space:]]97" /proc/cpuinfo > /dev/null;
then
echo "Detected Zen4 CPU"
wrmsr -a 0xc0011020 0x4400000000000
wrmsr -a 0xc0011021 0x4000000000040
wrmsr -a 0xc0011022 0x8680000401570000
wrmsr -a 0xc001102b 0x2040cc10
echo "MSR register values for Zen4 applied"
else
echo "Detected Zen3 CPU"
wrmsr -a 0xc0011020 0x4480000000000
wrmsr -a 0xc0011021 0x1c000200000040
wrmsr -a 0xc0011022 0xc000000401500000
wrmsr -a 0xc001102b 0x2000cc14
echo "MSR register values for Zen3 applied"
fi
else
echo "Detected Zen1/Zen2 CPU"
wrmsr -a 0xc0011020 0

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@@ -77,8 +77,11 @@ xmrig::CpuWorker<N>::CpuWorker(size_t id, const CpuLaunchData &data) :
{
# ifdef XMRIG_ALGO_CN_HEAVY
// cn-heavy optimization for Zen3 CPUs
const bool is_vermeer = (Cpu::info()->arch() == ICpuInfo::ARCH_ZEN3) && (Cpu::info()->model() == 0x21);
if ((N == 1) && (m_av == CnHash::AV_SINGLE) && (m_algorithm.family() == Algorithm::CN_HEAVY) && (m_assembly != Assembly::NONE) && is_vermeer) {
const auto arch = Cpu::info()->arch();
const uint32_t model = Cpu::info()->model();
const bool is_vermeer = (arch == ICpuInfo::ARCH_ZEN3) && (model == 0x21);
const bool is_raphael = (arch == ICpuInfo::ARCH_ZEN4) && (model == 0x61);
if ((N == 1) && (m_av == CnHash::AV_SINGLE) && (m_algorithm.family() == Algorithm::CN_HEAVY) && (m_assembly != Assembly::NONE) && (is_vermeer || is_raphael)) {
std::lock_guard<std::mutex> lock(cn_heavyZen3MemoryMutex);
if (!cn_heavyZen3Memory) {
// Round up number of threads to the multiple of 8

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@@ -45,19 +45,21 @@ public:
ARCH_ZEN,
ARCH_ZEN_PLUS,
ARCH_ZEN2,
ARCH_ZEN3
ARCH_ZEN3,
ARCH_ZEN4
};
enum MsrMod : uint32_t {
MSR_MOD_NONE,
MSR_MOD_RYZEN_17H,
MSR_MOD_RYZEN_19H,
MSR_MOD_RYZEN_19H_ZEN4,
MSR_MOD_INTEL,
MSR_MOD_CUSTOM,
MSR_MOD_MAX
};
# define MSR_NAMES_LIST "none", "ryzen_17h", "ryzen_19h", "intel", "custom"
# define MSR_NAMES_LIST "none", "ryzen_17h", "ryzen_19h", "ryzen_19h_zen4", "intel", "custom"
enum Flag : uint32_t {
FLAG_AES,

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@@ -64,7 +64,7 @@ static_assert(kCpuFlagsSize == ICpuInfo::FLAG_MAX, "kCpuFlagsSize and FLAG_MAX m
#ifdef XMRIG_FEATURE_MSR
constexpr size_t kMsrArraySize = 5;
constexpr size_t kMsrArraySize = 6;
static const std::array<const char *, kMsrArraySize> msrNames = { MSR_NAMES_LIST };
static_assert(kMsrArraySize == ICpuInfo::MSR_MOD_MAX, "kMsrArraySize and MSR_MOD_MAX mismatch");
#endif
@@ -250,8 +250,14 @@ xmrig::BasicCpuInfo::BasicCpuInfo() :
break;
case 0x19:
m_arch = ARCH_ZEN3;
m_msrMod = MSR_MOD_RYZEN_19H;
if (m_model == 0x61) {
m_arch = ARCH_ZEN4;
m_msrMod = MSR_MOD_RYZEN_19H_ZEN4;
}
else {
m_arch = ARCH_ZEN3;
m_msrMod = MSR_MOD_RYZEN_19H;
}
break;
default:

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@@ -48,7 +48,13 @@ xmrig::Job::Job(bool nicehash, const Algorithm &algorithm, const String &clientI
bool xmrig::Job::isEqual(const Job &other) const
{
return m_id == other.m_id && m_clientId == other.m_clientId && memcmp(m_blob, other.m_blob, sizeof(m_blob)) == 0 && m_target == other.m_target;
return m_id == other.m_id && m_clientId == other.m_clientId && isEqualBlob(other) && m_target == other.m_target;
}
bool xmrig::Job::isEqualBlob(const Job &other) const
{
return (m_size == other.m_size) && (memcmp(m_blob, other.m_blob, m_size) == 0);
}
@@ -58,19 +64,19 @@ bool xmrig::Job::setBlob(const char *blob)
return false;
}
m_size = strlen(blob);
if (m_size % 2 != 0) {
size_t size = strlen(blob);
if (size % 2 != 0) {
return false;
}
m_size /= 2;
size /= 2;
const size_t minSize = nonceOffset() + nonceSize();
if (m_size < minSize || m_size >= sizeof(m_blob)) {
if (size < minSize || size >= sizeof(m_blob)) {
return false;
}
if (!Cvt::fromHex(m_blob, sizeof(m_blob), blob, m_size * 2)) {
if (!Cvt::fromHex(m_blob, sizeof(m_blob), blob, size * 2)) {
return false;
}
@@ -80,9 +86,10 @@ bool xmrig::Job::setBlob(const char *blob)
# ifdef XMRIG_PROXY_PROJECT
memset(m_rawBlob, 0, sizeof(m_rawBlob));
memcpy(m_rawBlob, blob, m_size * 2);
memcpy(m_rawBlob, blob, size * 2);
# endif
m_size = size;
return true;
}

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@@ -59,6 +59,7 @@ public:
~Job() = default;
bool isEqual(const Job &other) const;
bool isEqualBlob(const Job &other) const;
bool setBlob(const char *blob);
bool setSeedHash(const char *hash);
bool setTarget(const char *target);

View File

@@ -561,6 +561,12 @@ void xmrig::Miner::setJob(const Job &job, bool donate)
const uint8_t index = donate ? 1 : 0;
d_ptr->reset = !(d_ptr->job.index() == 1 && index == 0 && d_ptr->userJobId == job.id());
// Don't reset nonce if pool sends the same hashing blob again, but with different difficulty (for example)
if (d_ptr->job.isEqualBlob(job)) {
d_ptr->reset = false;
}
d_ptr->job = job;
d_ptr->job.setIndex(index);

View File

@@ -407,8 +407,12 @@ xmrig::cn_hash_fun xmrig::CnHash::fn(const Algorithm &algorithm, AlgoVariant av,
}
# ifdef XMRIG_ALGO_CN_HEAVY
// cn-heavy optimization for Zen3 CPUs
if ((av == AV_SINGLE) && (assembly != Assembly::NONE) && (Cpu::info()->arch() == ICpuInfo::ARCH_ZEN3) && (Cpu::info()->model() == 0x21)) {
// cn-heavy optimization for Zen3/Zen4 CPUs
const auto arch = Cpu::info()->arch();
const uint32_t model = Cpu::info()->model();
const bool is_vermeer = (arch == ICpuInfo::ARCH_ZEN3) && (model == 0x21);
const bool is_raphael = (arch == ICpuInfo::ARCH_ZEN4) && (model == 0x61);
if ((av == AV_SINGLE) && (assembly != Assembly::NONE) && (is_vermeer || is_raphael)) {
switch (algorithm.id()) {
case Algorithm::CN_HEAVY_0:
return cryptonight_single_hash<Algorithm::CN_HEAVY_0, false, 3>;

View File

@@ -112,13 +112,19 @@ bool xmrig::VirtualMemory::protectRWX(void *p, size_t size)
bool xmrig::VirtualMemory::protectRX(void *p, size_t size)
{
bool result = true;
# if defined(XMRIG_OS_APPLE) && defined(XMRIG_ARM)
pthread_jit_write_protect_np(true);
flushInstructionCache(p, size);
return true;
# else
return mprotect(p, size, PROT_READ | PROT_EXEC) == 0;
result = (mprotect(p, size, PROT_READ | PROT_EXEC) == 0);
# endif
# if defined(XMRIG_ARM)
flushInstructionCache(p, size);
# endif
return result;
}

View File

@@ -167,6 +167,11 @@ namespace randomx {
static const uint8_t* NOPX[] = { NOP1, NOP2, NOP3, NOP4, NOP5, NOP6, NOP7, NOP8, NOP9 };
static const uint8_t NOP13[] = { 0x0F, 0x1F, 0x84, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0F, 0x1F, 0x44, 0x00, 0x00 };
static const uint8_t NOP14[] = { 0x0F, 0x1F, 0x80, 0x00, 0x00, 0x00, 0x00, 0x0F, 0x1F, 0x80, 0x00, 0x00, 0x00, 0x00 };
static const uint8_t NOP25[] = { 0x66, 0x0F, 0x1F, 0x84, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0F, 0x1F, 0x84, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0F, 0x1F, 0x84, 0x00, 0x00, 0x00, 0x00, 0x00 };
static const uint8_t NOP26[] = { 0x66, 0x0F, 0x1F, 0x84, 0x00, 0x00, 0x00, 0x00, 0x00, 0x66, 0x0F, 0x1F, 0x84, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0F, 0x1F, 0x84, 0x00, 0x00, 0x00, 0x00, 0x00 };
static const uint8_t JMP_ALIGN_PREFIX[14][16] = {
{},
{0x2E},
@@ -257,6 +262,10 @@ namespace randomx {
// AVX2 init is faster on Zen3
initDatasetAVX2 = true;
break;
case xmrig::ICpuInfo::ARCH_ZEN4:
// AVX2 init is slower on Zen4
initDatasetAVX2 = false;
break;
}
}
}
@@ -419,7 +428,8 @@ namespace randomx {
memcpy(imul_rcp_storage - 34, &pcfg.eMask, sizeof(pcfg.eMask));
codePos = codePosFirst;
prevCFROUND = 0;
prevCFROUND = -1;
prevFPOperation = -1;
//mark all registers as used
uint64_t* r = (uint64_t*)registerUsage;
@@ -1155,7 +1165,7 @@ namespace randomx {
uint8_t* const p = code;
uint32_t pos = codePos;
prevCFROUND = 0;
prevFPOperation = pos;
const uint64_t dst = instr.dst % RegisterCountFlt;
const uint64_t src = instr.src % RegisterCountFlt;
@@ -1170,7 +1180,7 @@ namespace randomx {
uint8_t* const p = code;
uint32_t pos = codePos;
prevCFROUND = 0;
prevFPOperation = pos;
const uint32_t src = instr.src % RegistersCount;
const uint32_t dst = instr.dst % RegisterCountFlt;
@@ -1187,7 +1197,7 @@ namespace randomx {
uint8_t* const p = code;
uint32_t pos = codePos;
prevCFROUND = 0;
prevFPOperation = pos;
const uint64_t dst = instr.dst % RegisterCountFlt;
const uint64_t src = instr.src % RegisterCountFlt;
@@ -1202,7 +1212,7 @@ namespace randomx {
uint8_t* const p = code;
uint32_t pos = codePos;
prevCFROUND = 0;
prevFPOperation = pos;
const uint32_t src = instr.src % RegistersCount;
const uint32_t dst = instr.dst % RegisterCountFlt;
@@ -1230,7 +1240,7 @@ namespace randomx {
uint8_t* const p = code;
uint32_t pos = codePos;
prevCFROUND = 0;
prevFPOperation = pos;
const uint64_t dst = instr.dst % RegisterCountFlt;
const uint64_t src = instr.src % RegisterCountFlt;
@@ -1245,7 +1255,7 @@ namespace randomx {
uint8_t* const p = code;
uint32_t pos = codePos;
prevCFROUND = 0;
prevFPOperation = pos;
const uint32_t src = instr.src % RegistersCount;
const uint64_t dst = instr.dst % RegisterCountFlt;
@@ -1272,7 +1282,7 @@ namespace randomx {
uint8_t* const p = code;
uint32_t pos = codePos;
prevCFROUND = 0;
prevFPOperation = pos;
const uint32_t dst = instr.dst % RegisterCountFlt;
@@ -1283,21 +1293,18 @@ namespace randomx {
void JitCompilerX86::h_CFROUND(const Instruction& instr) {
uint8_t* const p = code;
uint32_t pos = prevCFROUND;
int32_t t = prevCFROUND;
if (pos) {
if (t > prevFPOperation) {
if (vm_flags & RANDOMX_FLAG_AMD) {
memcpy(p + pos + 0, NOP9, 9);
memcpy(p + pos + 9, NOP9, 9);
memcpy(p + pos + 18, NOP8, 8);
memcpy(p + t, NOP26, 26);
}
else {
memcpy(p + pos + 0, NOP8, 8);
memcpy(p + pos + 8, NOP6, 6);
memcpy(p + t, NOP14, 14);
}
}
pos = codePos;
uint32_t pos = codePos;
prevCFROUND = pos;
const uint32_t src = instr.src % RegistersCount;
@@ -1322,21 +1329,18 @@ namespace randomx {
void JitCompilerX86::h_CFROUND_BMI2(const Instruction& instr) {
uint8_t* const p = code;
uint32_t pos = prevCFROUND;
int32_t t = prevCFROUND;
if (pos) {
if (t > prevFPOperation) {
if (vm_flags & RANDOMX_FLAG_AMD) {
memcpy(p + pos + 0, NOP9, 9);
memcpy(p + pos + 9, NOP9, 9);
memcpy(p + pos + 18, NOP7, 7);
memcpy(p + t, NOP25, 25);
}
else {
memcpy(p + pos + 0, NOP8, 8);
memcpy(p + pos + 8, NOP5, 5);
memcpy(p + t, NOP13, 13);
}
}
pos = codePos;
uint32_t pos = codePos;
prevCFROUND = pos;
const uint64_t src = instr.src % RegistersCount;
@@ -1363,10 +1367,15 @@ namespace randomx {
uint8_t* const p = code;
uint32_t pos = codePos;
prevCFROUND = 0;
const int reg = instr.dst % RegistersCount;
int32_t jmp_offset = registerUsage[reg] - (pos + 16);
int32_t jmp_offset = registerUsage[reg];
// if it jumps over the previous FP instruction that uses rounding, treat it as if FP instruction happened now
if (jmp_offset <= prevFPOperation) {
prevFPOperation = pos;
}
jmp_offset -= pos + 16;
if (jccErratum) {
const uint32_t branch_begin = static_cast<uint32_t>(pos + 7);

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@@ -89,7 +89,8 @@ namespace randomx {
uint32_t codePos = 0;
uint32_t codePosFirst = 0;
uint32_t vm_flags = 0;
uint32_t prevCFROUND = 0;
int32_t prevCFROUND = -1;
int32_t prevFPOperation = -1;
# ifdef XMRIG_FIX_RYZEN
std::pair<const void*, const void*> mainLoopBounds;

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@@ -58,12 +58,13 @@ static const std::array<const char *, RxConfig::ModeMax> modeNames = { "auto", "
#ifdef XMRIG_FEATURE_MSR
constexpr size_t kMsrArraySize = 5;
constexpr size_t kMsrArraySize = 6;
static const std::array<MsrItems, kMsrArraySize> msrPresets = {
MsrItems(),
MsrItems{{ 0xC0011020, 0ULL }, { 0xC0011021, 0x40ULL, ~0x20ULL }, { 0xC0011022, 0x1510000ULL }, { 0xC001102b, 0x2000cc16ULL }},
MsrItems{{ 0xC0011020, 0x0004480000000000ULL }, { 0xC0011021, 0x001c000200000040ULL, ~0x20ULL }, { 0xC0011022, 0xc000000401500000ULL }, { 0xC001102b, 0x2000cc14ULL }},
MsrItems{{ 0xC0011020, 0x0004400000000000ULL }, { 0xC0011021, 0x0004000000000040ULL, ~0x20ULL }, { 0xC0011022, 0x8680000401570000ULL }, { 0xC001102b, 0x2040cc10ULL }},
MsrItems{{ 0x1a4, 0xf }},
MsrItems()
};

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@@ -22,7 +22,7 @@
#define APP_ID "xmrig"
#define APP_NAME "XMRig"
#define APP_DESC "XMRig miner"
#define APP_VERSION "6.18.1-dev"
#define APP_VERSION "6.18.1"
#define APP_DOMAIN "xmrig.com"
#define APP_SITE "www.xmrig.com"
#define APP_COPYRIGHT "Copyright (C) 2016-2022 xmrig.com"