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RISC-V: vectorized RandomX main loop
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@@ -1,12 +1,10 @@
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/* RISC-V - test if the vector extension and prefetch instruction are present */
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/* RISC-V - test if the vector extension is present */
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.text
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.option arch, rv64gcv_zicbop
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.option arch, rv64gcv
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.global main
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main:
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lla x5, main
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prefetch.r (x5)
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li x5, 4
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vsetvli x6, x5, e64, m1, ta, ma
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vxor.vv v0, v0, v0
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