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RISC-V: vectorized RandomX main loop
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@@ -34,7 +34,7 @@ struct riscv_cpu_desc
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bool has_vector = false;
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bool has_crypto = false;
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inline bool isReady() const { return !model.isNull(); }
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inline bool isReady() const { return !isa.isNull(); }
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};
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static bool lookup_riscv(char *line, const char *pattern, String &value)
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@@ -82,7 +82,7 @@ static bool read_riscv_cpuinfo(riscv_cpu_desc *desc)
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if (lookup_riscv(buf, "isa", desc->isa)) {
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// Check for vector extensions
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if (strstr(buf, "zve") || strstr(buf, "v_")) {
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if (strstr(buf, "zve64d") || strstr(buf, "v_")) {
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desc->has_vector = true;
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}
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// Check for crypto extensions (AES, SHA, etc.)
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@@ -96,7 +96,7 @@ static bool read_riscv_cpuinfo(riscv_cpu_desc *desc)
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lookup_riscv(buf, "uarch", desc->uarch);
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if (desc->isReady() && !desc->isa.isNull()) {
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if (desc->isReady()) {
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break;
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}
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}
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