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RISC-V: detect and use hardware AES

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This commit is contained in:
SChernykh
2025-12-29 22:10:07 +01:00
parent eb49237aaa
commit d3a84c4b52
6 changed files with 284 additions and 13 deletions
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6
src/backend/cpu/platform/BasicCpuInfo_riscv.cpp
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@@ -34,7 +34,7 @@ namespace xmrig {
extern String cpu_name_riscv();
extern bool has_riscv_vector();
extern bool has_riscv_crypto();
extern bool has_riscv_aes();
} // namespace xmrig
@@ -58,8 +58,8 @@ xmrig::BasicCpuInfo::BasicCpuInfo() :
// Check for vector extensions
m_flags.set(FLAG_RISCV_VECTOR, has_riscv_vector());
// Check for crypto extensions (Zknd/Zkne/Zknh - AES and SHA)
m_flags.set(FLAG_AES, has_riscv_crypto());
// Check for AES extensions (Zknd/Zkne)
m_flags.set(FLAG_AES, has_riscv_aes());
// RISC-V typically supports 1GB huge pages
m_flags.set(FLAG_PDPE1GB, std::ifstream("/sys/kernel/mm/hugepages/hugepages-1048576kB/nr_hugepages").good());