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RISC-V: use vector hardware AES instead of scalar
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SChernykh
199
src/crypto/randomx/aes_hash_rv64_zvkned.cpp
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199
src/crypto/randomx/aes_hash_rv64_zvkned.cpp
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/*
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Copyright (c) 2025 SChernykh <https://github.com/SChernykh>
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Copyright (c) 2025 XMRig <support@xmrig.com>
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All rights reserved.
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Redistribution and use in source and binary forms, with or without
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modification, are permitted provided that the following conditions are met:
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* Redistributions of source code must retain the above copyright
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notice, this list of conditions and the following disclaimer.
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* Redistributions in binary form must reproduce the above copyright
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notice, this list of conditions and the following disclaimer in the
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documentation and/or other materials provided with the distribution.
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* Neither the name of the copyright holder nor the
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names of its contributors may be used to endorse or promote products
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derived from this software without specific prior written permission.
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THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
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ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
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WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
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FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
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CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#include "crypto/randomx/aes_hash.hpp"
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#include "crypto/randomx/randomx.h"
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#include "crypto/rx/Profiler.h"
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#include <riscv_vector.h>
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static FORCE_INLINE vuint32m1_t aesenc_zvkned(vuint32m1_t a, vuint32m1_t b) { return __riscv_vaesem_vv_u32m1(a, b, 8); }
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static FORCE_INLINE vuint32m1_t aesdec_zvkned(vuint32m1_t a, vuint32m1_t b, vuint32m1_t zero) { return __riscv_vxor_vv_u32m1(__riscv_vaesdm_vv_u32m1(a, zero, 8), b, 8); }
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static constexpr uint32_t AES_HASH_1R_STATE02[8] = { 0x92b52c0d, 0x9fa856de, 0xcc82db47, 0xd7983aad, 0x6a770017, 0xae62c7d0, 0x5079506b, 0xe8a07ce4 };
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static constexpr uint32_t AES_HASH_1R_STATE13[8] = { 0x338d996e, 0x15c7b798, 0xf59e125a, 0xace78057, 0x630a240c, 0x07ad828d, 0x79a10005, 0x7e994948 };
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static constexpr uint32_t AES_GEN_1R_KEY02[8] = { 0x6daca553, 0x62716609, 0xdbb5552b, 0xb4f44917, 0x3f1262f1, 0x9f947ec6, 0xf4c0794f, 0x3e20e345 };
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static constexpr uint32_t AES_GEN_1R_KEY13[8] = { 0x6d7caf07, 0x846a710d, 0x1725d378, 0x0da1dc4e, 0x6aef8135, 0xb1ba317c, 0x16314c88, 0x49169154 };
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static constexpr uint32_t AES_HASH_1R_XKEY00[8] = { 0xf6fa8389, 0x8b24949f, 0x90dc56bf, 0x06890201, 0xf6fa8389, 0x8b24949f, 0x90dc56bf, 0x06890201 };
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static constexpr uint32_t AES_HASH_1R_XKEY11[8] = { 0x61b263d1, 0x51f4e03c, 0xee1043c6, 0xed18f99b, 0x61b263d1, 0x51f4e03c, 0xee1043c6, 0xed18f99b };
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static constexpr uint32_t AES_HASH_STRIDE_X2[8] = { 0, 4, 8, 12, 32, 36, 40, 44 };
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static constexpr uint32_t AES_HASH_STRIDE_X4[8] = { 0, 4, 8, 12, 64, 68, 72, 76 };
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void hashAes1Rx4_zvkned(const void *input, size_t inputSize, void *hash)
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{
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const uint8_t* inptr = (const uint8_t*)input;
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const uint8_t* inputEnd = inptr + inputSize;
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//intial state
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vuint32m1_t state02 = __riscv_vle32_v_u32m1(AES_HASH_1R_STATE02, 8);
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vuint32m1_t state13 = __riscv_vle32_v_u32m1(AES_HASH_1R_STATE13, 8);
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const vuint32m1_t stride = __riscv_vle32_v_u32m1(AES_HASH_STRIDE_X2, 8);
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const vuint32m1_t zero = {};
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//process 64 bytes at a time in 4 lanes
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while (inptr < inputEnd) {
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state02 = aesenc_zvkned(state02, __riscv_vluxei32_v_u32m1((uint32_t*)inptr + 0, stride, 8));
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state13 = aesdec_zvkned(state13, __riscv_vluxei32_v_u32m1((uint32_t*)inptr + 4, stride, 8), zero);
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inptr += 64;
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}
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//two extra rounds to achieve full diffusion
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const vuint32m1_t xkey00 = __riscv_vle32_v_u32m1(AES_HASH_1R_XKEY00, 8);
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const vuint32m1_t xkey11 = __riscv_vle32_v_u32m1(AES_HASH_1R_XKEY11, 8);
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state02 = aesenc_zvkned(state02, xkey00);
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state13 = aesdec_zvkned(state13, xkey00, zero);
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state02 = aesenc_zvkned(state02, xkey11);
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state13 = aesdec_zvkned(state13, xkey11, zero);
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//output hash
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__riscv_vsuxei32_v_u32m1((uint32_t*)hash + 0, stride, state02, 8);
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__riscv_vsuxei32_v_u32m1((uint32_t*)hash + 4, stride, state13, 8);
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}
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void fillAes1Rx4_zvkned(void *state, size_t outputSize, void *buffer)
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{
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const uint8_t* outptr = (uint8_t*)buffer;
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const uint8_t* outputEnd = outptr + outputSize;
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const vuint32m1_t key02 = __riscv_vle32_v_u32m1(AES_GEN_1R_KEY02, 8);
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const vuint32m1_t key13 = __riscv_vle32_v_u32m1(AES_GEN_1R_KEY13, 8);
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const vuint32m1_t stride = __riscv_vle32_v_u32m1(AES_HASH_STRIDE_X2, 8);
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const vuint32m1_t zero = {};
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vuint32m1_t state02 = __riscv_vluxei32_v_u32m1((uint32_t*)state + 0, stride, 8);
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vuint32m1_t state13 = __riscv_vluxei32_v_u32m1((uint32_t*)state + 4, stride, 8);
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while (outptr < outputEnd) {
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state02 = aesdec_zvkned(state02, key02, zero);
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state13 = aesenc_zvkned(state13, key13);
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__riscv_vsuxei32_v_u32m1((uint32_t*)outptr + 0, stride, state02, 8);
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__riscv_vsuxei32_v_u32m1((uint32_t*)outptr + 4, stride, state13, 8);
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outptr += 64;
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}
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__riscv_vsuxei32_v_u32m1((uint32_t*)state + 0, stride, state02, 8);
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__riscv_vsuxei32_v_u32m1((uint32_t*)state + 4, stride, state13, 8);
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}
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void fillAes4Rx4_zvkned(void *state, size_t outputSize, void *buffer)
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{
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const uint8_t* outptr = (uint8_t*)buffer;
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const uint8_t* outputEnd = outptr + outputSize;
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const vuint32m1_t stride4 = __riscv_vle32_v_u32m1(AES_HASH_STRIDE_X4, 8);
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const vuint32m1_t key04 = __riscv_vluxei32_v_u32m1((uint32_t*)(RandomX_CurrentConfig.fillAes4Rx4_Key + 0), stride4, 8);
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const vuint32m1_t key15 = __riscv_vluxei32_v_u32m1((uint32_t*)(RandomX_CurrentConfig.fillAes4Rx4_Key + 1), stride4, 8);
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const vuint32m1_t key26 = __riscv_vluxei32_v_u32m1((uint32_t*)(RandomX_CurrentConfig.fillAes4Rx4_Key + 2), stride4, 8);
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const vuint32m1_t key37 = __riscv_vluxei32_v_u32m1((uint32_t*)(RandomX_CurrentConfig.fillAes4Rx4_Key + 3), stride4, 8);
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const vuint32m1_t stride = __riscv_vle32_v_u32m1(AES_HASH_STRIDE_X2, 8);
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const vuint32m1_t zero = {};
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vuint32m1_t state02 = __riscv_vluxei32_v_u32m1((uint32_t*)state + 0, stride, 8);
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vuint32m1_t state13 = __riscv_vluxei32_v_u32m1((uint32_t*)state + 4, stride, 8);
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while (outptr < outputEnd) {
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state02 = aesdec_zvkned(state02, key04, zero);
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state13 = aesenc_zvkned(state13, key04);
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state02 = aesdec_zvkned(state02, key15, zero);
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state13 = aesenc_zvkned(state13, key15);
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state02 = aesdec_zvkned(state02, key26, zero);
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state13 = aesenc_zvkned(state13, key26);
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state02 = aesdec_zvkned(state02, key37, zero);
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state13 = aesenc_zvkned(state13, key37);
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__riscv_vsuxei32_v_u32m1((uint32_t*)outptr + 0, stride, state02, 8);
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__riscv_vsuxei32_v_u32m1((uint32_t*)outptr + 4, stride, state13, 8);
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outptr += 64;
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}
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}
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void hashAndFillAes1Rx4_zvkned(void *scratchpad, size_t scratchpadSize, void *hash, void* fill_state)
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{
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uint8_t* scratchpadPtr = (uint8_t*)scratchpad;
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const uint8_t* scratchpadEnd = scratchpadPtr + scratchpadSize;
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vuint32m1_t hash_state02 = __riscv_vle32_v_u32m1(AES_HASH_1R_STATE02, 8);
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vuint32m1_t hash_state13 = __riscv_vle32_v_u32m1(AES_HASH_1R_STATE13, 8);
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const vuint32m1_t key02 = __riscv_vle32_v_u32m1(AES_GEN_1R_KEY02, 8);
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const vuint32m1_t key13 = __riscv_vle32_v_u32m1(AES_GEN_1R_KEY13, 8);
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const vuint32m1_t stride = __riscv_vle32_v_u32m1(AES_HASH_STRIDE_X2, 8);
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const vuint32m1_t zero = {};
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vuint32m1_t fill_state02 = __riscv_vluxei32_v_u32m1((uint32_t*)fill_state + 0, stride, 8);
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vuint32m1_t fill_state13 = __riscv_vluxei32_v_u32m1((uint32_t*)fill_state + 4, stride, 8);
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//process 64 bytes at a time in 4 lanes
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while (scratchpadPtr < scratchpadEnd) {
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hash_state02 = aesenc_zvkned(hash_state02, __riscv_vluxei32_v_u32m1((uint32_t*)scratchpadPtr + 0, stride, 8));
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hash_state13 = aesdec_zvkned(hash_state13, __riscv_vluxei32_v_u32m1((uint32_t*)scratchpadPtr + 4, stride, 8), zero);
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fill_state02 = aesdec_zvkned(fill_state02, key02, zero);
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fill_state13 = aesenc_zvkned(fill_state13, key13);
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__riscv_vsuxei32_v_u32m1((uint32_t*)scratchpadPtr + 0, stride, fill_state02, 8);
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__riscv_vsuxei32_v_u32m1((uint32_t*)scratchpadPtr + 4, stride, fill_state13, 8);
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scratchpadPtr += 64;
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}
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__riscv_vsuxei32_v_u32m1((uint32_t*)fill_state + 0, stride, fill_state02, 8);
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__riscv_vsuxei32_v_u32m1((uint32_t*)fill_state + 4, stride, fill_state13, 8);
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//two extra rounds to achieve full diffusion
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const vuint32m1_t xkey00 = __riscv_vle32_v_u32m1(AES_HASH_1R_XKEY00, 8);
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const vuint32m1_t xkey11 = __riscv_vle32_v_u32m1(AES_HASH_1R_XKEY11, 8);
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hash_state02 = aesenc_zvkned(hash_state02, xkey00);
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hash_state13 = aesdec_zvkned(hash_state13, xkey00, zero);
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hash_state02 = aesenc_zvkned(hash_state02, xkey11);
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hash_state13 = aesdec_zvkned(hash_state13, xkey11, zero);
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//output hash
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__riscv_vsuxei32_v_u32m1((uint32_t*)hash + 0, stride, hash_state02, 8);
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__riscv_vsuxei32_v_u32m1((uint32_t*)hash + 4, stride, hash_state13, 8);
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}
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