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RISC-V: use vector hardware AES instead of scalar
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@@ -41,7 +41,7 @@ OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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#ifdef XMRIG_RISCV
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#include "backend/cpu/Cpu.h"
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#include "crypto/randomx/aes_hash_rv64_vector.hpp"
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#include "crypto/randomx/aes_hash_rv64_zkn.hpp"
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#include "crypto/randomx/aes_hash_rv64_zvkned.hpp"
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#endif
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#define AES_HASH_1R_STATE0 0xd7983aad, 0xcc82db47, 0x9fa856de, 0x92b52c0d
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@@ -69,7 +69,7 @@ void hashAes1Rx4(const void *input, size_t inputSize, void *hash)
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{
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#ifdef XMRIG_RISCV
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if (xmrig::Cpu::info()->hasAES()) {
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hashAes1Rx4_zkn(input, inputSize, hash);
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hashAes1Rx4_zvkned(input, inputSize, hash);
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return;
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}
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@@ -150,7 +150,7 @@ void fillAes1Rx4(void *state, size_t outputSize, void *buffer)
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{
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#ifdef XMRIG_RISCV
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if (xmrig::Cpu::info()->hasAES()) {
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fillAes1Rx4_zkn(state, outputSize, buffer);
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fillAes1Rx4_zvkned(state, outputSize, buffer);
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return;
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}
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@@ -207,7 +207,7 @@ void fillAes4Rx4(void *state, size_t outputSize, void *buffer)
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{
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#ifdef XMRIG_RISCV
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if (xmrig::Cpu::info()->hasAES()) {
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fillAes4Rx4_zkn(state, outputSize, buffer);
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fillAes4Rx4_zvkned(state, outputSize, buffer);
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return;
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}
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@@ -287,7 +287,7 @@ void hashAndFillAes1Rx4(void *scratchpad, size_t scratchpadSize, void *hash, voi
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#ifdef XMRIG_RISCV
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if (xmrig::Cpu::info()->hasAES()) {
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hashAndFillAes1Rx4_zkn(scratchpad, scratchpadSize, hash, fill_state);
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hashAndFillAes1Rx4_zvkned(scratchpad, scratchpadSize, hash, fill_state);
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return;
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}
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