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RandomX: added MSR mod for Zen 4

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+0.8% faster on Ryzen 9 7950X
This commit is contained in:
SChernykh
2022-10-01 18:33:04 +02:00
parent 7b52a41459
commit 7fc45dfb2d
6 changed files with 30 additions and 10 deletions
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8
src/crypto/cn/CnHash.cpp
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@@ -407,8 +407,12 @@ xmrig::cn_hash_fun xmrig::CnHash::fn(const Algorithm &algorithm, AlgoVariant av,
}
# ifdef XMRIG_ALGO_CN_HEAVY
// cn-heavy optimization for Zen3 CPUs
if ((av == AV_SINGLE) && (assembly != Assembly::NONE) && (Cpu::info()->arch() == ICpuInfo::ARCH_ZEN3) && (Cpu::info()->model() == 0x21)) {
// cn-heavy optimization for Zen3/Zen4 CPUs
const auto arch = Cpu::info()->arch();
const uint32_t model = Cpu::info()->model();
const bool is_vermeer = (arch == ICpuInfo::ARCH_ZEN3) && (model == 0x21);
const bool is_raphael = (arch == ICpuInfo::ARCH_ZEN4) && (model == 0x61);
if ((av == AV_SINGLE) && (assembly != Assembly::NONE) && (is_vermeer || is_raphael)) {
switch (algorithm.id()) {
case Algorithm::CN_HEAVY_0:
return cryptonight_single_hash<Algorithm::CN_HEAVY_0, false, 3>;

4
src/crypto/randomx/jit_compiler_x86.cpp
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@@ -262,6 +262,10 @@ namespace randomx {
// AVX2 init is faster on Zen3
initDatasetAVX2 = true;
break;
case xmrig::ICpuInfo::ARCH_ZEN4:
// AVX2 init is slower on Zen4
initDatasetAVX2 = false;
break;
}
}
}

3
src/crypto/rx/RxConfig.cpp
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@@ -58,12 +58,13 @@ static const std::array<const char *, RxConfig::ModeMax> modeNames = { "auto", "
#ifdef XMRIG_FEATURE_MSR
constexpr size_t kMsrArraySize = 5;
constexpr size_t kMsrArraySize = 6;
static const std::array<MsrItems, kMsrArraySize> msrPresets = {
MsrItems(),
MsrItems{{ 0xC0011020, 0ULL }, { 0xC0011021, 0x40ULL, ~0x20ULL }, { 0xC0011022, 0x1510000ULL }, { 0xC001102b, 0x2000cc16ULL }},
MsrItems{{ 0xC0011020, 0x0004480000000000ULL }, { 0xC0011021, 0x001c000200000040ULL, ~0x20ULL }, { 0xC0011022, 0xc000000401500000ULL }, { 0xC001102b, 0x2000cc14ULL }},
MsrItems{{ 0xC0011020, 0x0004400000000000ULL }, { 0xC0011021, 0x0004000000000040ULL, ~0x20ULL }, { 0xC0011022, 0x8680000401570000ULL }, { 0xC001102b, 0x2040cc10ULL }},
MsrItems{{ 0x1a4, 0xf }},
MsrItems()
};