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RISC-V Intergration

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This commit is contained in:
slayingripper
2025-10-22 18:57:20 +02:00
committed by SChernykh
parent 116ba1828f
commit 643b65f2c0
30 changed files with 3620 additions and 20 deletions
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7
src/backend/cpu/cpu.cmake
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@@ -46,7 +46,12 @@ else()
set(CPUID_LIB "")
endif()
if (XMRIG_ARM)
if (XMRIG_RISCV)
list(APPEND SOURCES_BACKEND_CPU
src/backend/cpu/platform/lscpu_riscv.cpp
src/backend/cpu/platform/BasicCpuInfo_riscv.cpp
)
elseif (XMRIG_ARM)
list(APPEND SOURCES_BACKEND_CPU src/backend/cpu/platform/BasicCpuInfo_arm.cpp)
if (XMRIG_OS_WIN)