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Added L2 information to Algorithm.

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XMRig
2019-08-08 14:03:52 +07:00
parent 9a842a593b
commit 5896b27bf3
7 changed files with 277 additions and 10 deletions
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2
src/backend/cpu/platform/HwlocCpuInfo.cpp
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@@ -249,7 +249,7 @@ void xmrig::HwlocCpuInfo::processTopLevelCache(hwloc_obj_t cache, const Algorith
size_t L2 = 0;
int L2_associativity = 0;
size_t extra = 0;
const size_t scratchpad = algorithm.memory();
const size_t scratchpad = algorithm.l3();
int intensity = algorithm.maxIntensity() == 1 ? -1 : 1;
if (cache->attr->cache.depth == 3 && isCacheExclusive(cache)) {